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Electrical and Electronics Engineering

EE6311 – Linear and Digital Integrated Circuits Laboratory


Time: 3 Hours Max. Marks: 100

1. Design a combinational circuit which has two inputs and two output.which performs
the addition between two bits.
Design a combinational circuit which has three inputs and two output.which 6. Design a combinational circuit which is capable of generating even parity and odd
performs the subtraction between two bits and one input borrow. parity for three bit binary message, and verifies the parity bit detecting correctly or
not at the receiver.
Aim& Circuit Diagram Conduction Result & Viva Total Aim& Circuit Diagram Conduction Result & Viva Total
Procedure (10) (30) (40) graph (10) (100) Procedure (10) (30) (40) graph (10) (100)
(10) (10)

2. Design a combinational circuit which has three inputs and two output.which 7. Design and construct Inverting and non inverting amplifier with gain 10.
performs the addition between two bits and one input carry. Design and construct Difference amplifier and comparator.
Design a combinational circuit which has two inputs and two output.which performs Aim& Circuit Diagram Conduction Result & Viva Total
the addition between two bits. Procedure (10) (30) (40) graph (10) (100)
Aim& Circuit Diagram Conduction Result & Viva Total (10)
Procedure (10) (30) (40) graph (10) (100)
(10)

8. Design and construct Summing amplifier for R1 = 1K R2=1K Rf =1K..


Design and construct Difference amplifier and comparator.
3. Design a combinational circuit which has compatible for both binary and reflected Aim& Circuit Diagram Conduction Result & Viva Total
code and vice versa. Procedure (10) (30) (40) graph (10) (100)
(10)
Aim& Circuit Diagram Conduction Result & Viva Total
Procedure (10) (30) (40) graph (10) (100)
(10)

9. Design and construct a 4-bit shift register in SISO, SIPO, PISO and PIPO modes using
suitable ICs.
4. Design and construct BCD to Excess-3code converter by using suitable logic gated Aim& Circuit Diagram Conduction Result & Viva Total
and verify its truth table. Procedure (10) (30) (40) graph (10) (100)
Aim& Circuit Diagram Conduction Result & Viva Total (10)
Procedure (10) (30) (40) graph (10) (100)
(10)

10. Design and construct an asynchronous 4-bit binary counter using JK flip-flop ICs.
Aim& Circuit Diagram Conduction Result & Viva Total
5. Design and construct Excess-3 to BCD code converter by using suitable logic gated Procedure (10) (30) (40) graph (10) (100)
and verify its truth table. (10)
Aim& Circuit Diagram Conduction Result & Viva Total
Procedure (10) (30) (40) graph (10) (100)
(10)

11. Design and construct a asynchronous 4-bit modulo 12 counter using flip-flop ICs.
Aim& Circuit Diagram Conduction Result & Viva Total
Electrical and Electronics Engineering
EE6311 – Linear and Digital Integrated Circuits Laboratory
Time: 3 Hours Max. Marks: 100

Procedure (10) (30) (40) graph (10) (100)


(10)
17. Design and construct a synchronous 4-bit binary counter using JK flip-flop ICs.

Aim& Circuit Diagram Conduction Result & Viva Total


Procedure (10) (30) (40) graph (10) (100)
12. Design and construct an astable multivibrator using IC 555 for square wave generation. (10)
Aim& Circuit Diagram Conduction Result & Viva Total
Procedure (10) (30) (40) graph (10) (100)
(10)
18. Design and construct a half adder and full adder by using suitable logic gated and verify its
truth table.

Aim& Circuit Diagram Conduction Result & Viva Total


Procedure (10) (30) (40) graph (10) (100)
13. Design and construct a monostable multivibrator using IC 555 for pulse wave generation. (10)
Aim& Circuit Diagram Conduction Result & Viva Total
Procedure (30) (40) graph (10) (100)
(10) (10)

19. Design and construct a half subtractor and full subtractor by using suitable logic gated and
verify its truth table.
Aim& Circuit Diagram Conduction Result & Viva Total
Procedure (10) (30) (40) graph (10) (100)
14. Design an inverting and non-inverting amplifier for a gain of 5 using operational amplifier (10)
IC 741.

Aim& Circuit Diagram Conduction Result & Viva Total


Procedure (10) (30) (40) graph (10) (100)
(10) 20. Design and construct binary to gray code converter and gray to binary code converter by
using suitable logic gated and verify its truth table.

Aim& Circuit Diagram Conduction Result & Viva Total


Procedure (10) (30) (40) graph (10) (100)
15. Design an integrator and a differentiator circuit using op-amp IC 741. Assume the input (10)
waveform to be sine waveform and square waveform.
Aim& Circuit Diagram Conduction Result & Viva Total
Procedure (10) (30) (40) graph (10) (100)
(10)
20. Design and construct binary to gray code converter and gray to binary code converter by
using suitable logic gate and verify its truth table.

Aim& Circuit Diagram Conduction Result & Viva Total


16. Design and construct a circuit for analog to digital signal conversion using dedicated ICs. Procedure (10) (30) (40) graph (10) (100)
Aim& Circuit Diagram Conduction Result & Viva Total (10)
Procedure (10) (30) (40) graph (10) (100)
(10)
Electrical and Electronics Engineering
EE6311 – Linear and Digital Integrated Circuits Laboratory
Time: 3 Hours Max. Marks: 100

20. Design and construct binary to gray code converter and gray to binary code converter by
using suitable logic gate and verify its truth table.

Aim& Circuit Diagram Conduction Result & Viva Total


Procedure (10) (30) (40) graph (10) (100)
(10)