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UE �C Hardware :

i) Supported HW 1: PC intel Core i7 6900K (8 cores), 16GB DDR, 480GB SSD; ex


supplier LDLC Pro parts list attached (~2200�)
Allows SW LDPC on 3 cores (1 segment per slot, up to 30Mb/s) or LDPC on FPGA
(up to 300Mb/s on 80MHz SISO).

Or ii) HW 2 (Under validation) : intel Core i9 7980EX (18 cores) shall support
future configurations incl. MIMO; ex. supplier LDLC Pro part list attached (~3700
�)
Allows parallel LDPC SW decoder on 9 or 12 cores, up to 3 (tested) or 5 (ongoing)
segments per slot or 140Mb/s or LDPC on FPGA (same as above);

ii) FPGA board (1 mandatory) : EVALUATION KIT ZYNQ-7000 ZC706 ex. supplier Digikey
ref: 122-1904-ND (2427�)
Currently Gen2 using 4 lanes. Evolutions planned to Gen3 8 lanes.

iv) RF board : Analog Device Transceiver type ADRV9371 ; ex. supplier : Digikey
ADRV9371-W/PCBZ-ND ('WIDE TUNING RANGE 300MHZ-6HGZ' version) 1169�

v) Misc HW list :
- LO : ADRV9371 required a 30.72MHz reference, 2 solutions listed below
-> CPRO33-30.720 from http://www.crystek.com ($ 50) : this module require a
3.3V power
-> AST3TQ-T-30.720MHZ-28 + AST3TQ-EVAL from digikey (14� + 49� ) : this
solution require soldering capabilities.

- LO : 3.3V power cable. Both previous solution require a 3.3V power using a SMA
connector. The 3.3V is provided by the ADRV9371 board using a 2 pins 2.56 header
connector.
-> the header shall be soldered on the ADRV9371 board
-> the cable can be easily build (example from digikey ACX1915-ND + PRT-
09918-ND )

- 1 or 2 PCIe Riser depending on the LDPC offload option: Thermaltake PC


enclosure come with a PCIe riser cable. We had some problem with it so we change
all of them with AC-053-CN1OTN-C1 from Thermaltake (LDLC 28�)

UE �C OAI SW versions

- OS Kernel version
i7: Ubuntu 14.04 3.19.0-61-lowlatency
i9: Ubuntu 17.10 4.13.0-21-lowlatency

- OAI UE SW version: Private Git repository: oai-nr (features and restrictions to


be documented, e.g. issue with 100PBCH, ~3h with Xilinx demo license, gNB RT vs CPU
version).
Branch name: oai_ue_mwc18_integration / Commit: 0a0a90fc
Supported as of today: PHY-test only , 40/80MHz, SCS 60kHz, LDPC, adapted LTE L1.
Planned mid 2018: no-S1 mode, SCS 30/100MHz, NR L1

�� UE�C Drivers / Platform


The UE requires 2 TCL/Syrtem proprietary SW pieces:

RF board interface: FPGA module + linux driver (mandatory)


FPGA interface to LDPC + linux Driver (if LDPC on FPGA is wanted)

The license proposal is as follows :


1) OAI UE developments under OAI license
2) Drivers library (may contain some object code) under OAI license
3) proprietary license, free of charge for non-commercial use of the FPGA modules
4) Creonic license for their IP (should be foc for non-commercial use)
So only 2 categories: OAI for 1) and 2), license (to be drafted) for 3) and 4)

LDPC IP on FPGA

HW: EVALUATION KIT ZYNQ-7000 ZC706 (second FPGA board)


SW : FPGA binary image provided by Creonic with license agreement.
Drivers: same as above.

�� Services option (Syrtem)


- installation service : based on a predefined version of OAI that has been tested
in SYRTEM Lab, SYRTEM can provide service to duplicate this version.
- integration service : support to integrate specific branch or version of OAI on
the platform.

gNB �C HW

Curently tested: Same platform as UE (HW1 or 2 with 1 FPGA board)


or
EURECOM currently uses a different PC:
- Intel(R) Xeon(R) Gold 6154 CPU @ 3.00GHz with 18 cores
- CentOS Linux release 7.4.1708 (Core)
- USRP x300 (using 3/4 sampling 80MHz support, see below)
However, this setup was not tested with UE yet

gNB - SW

branch is gNB_mwc18_integration.
supports PHY-test only , 20/40/80MHz, SCS 60kHz, LDPC, adapted LTE L1 (tested with
UE descscribed above)
the throughput (mcs) is limited by the performance of the PC. For the intel Core i7
6900K PC mentioned above, the MCS is limited to 15, but it might be different on
other PCs and also with the USRP.
Other notes/ restrictions:
- some parameters are hard coded: in lte-softmodem.c: rf-config-file (for
ADRV9371_ZC706 target), numerology, in eNB_scheduler_phytest.c: mcs
- command line parameters to be used: --phy-test -O
<path_to_config_files>/enb.band7.tm1.100PRB.usrpx310.conf -E (for 3/4 sampling in
case of USRP X300)