Product Brief – JN5148

Single Chip JenNet, ZigBee PRO and IEEE802.15.4 Solution

Overview
The JN5148 is an ultra low power, high performance wireless microcontroller targeted
at low-power wireless networking applications. The device features an enhanced 32-bit Features: Transceiver
• 2.4GHz IEEE802.15.4
RISC processor offering high coding efficiency through variable width instructions, a
compliant
multi-stage instruction pipeline and low power operation with programmable clock • 128-bit AES security
speeds. It also includes a 2.4GHz IEEE802.15.4 compliant transceiver, 128kB of ROM, processor
128kB of RAM, and a rich mix of analogue and digital peripherals. The large memory • MAC accelerator with packet
footprint allows the device to run both the networking stack and an embedded formatting, CRCs, address
application or in a co-processor mode. The operating current is below 18mA, allowing check, auto-acks, timers
operation direct from a coin cell. • 500 & 667kbps data rate
modes
Enhanced peripherals include low power pulse counters running in sleep mode • Integrated sleep oscillator for
2
designed for pulse counting in AMR applications and a 4-wire I S audio interface to low power
interface directly to mainstream audio CODECs as well as conventional MCU • On chip power regulation for
peripherals. 2.0V to 3.6V battery
operation
• Deep sleep current 100nA
Product and Support Overview • Sleep current with active
sleep timer 1.25µA
Watchdog RAM ROM
• <$0.50 external component
SPI
Timer 128kB 128kB cost
Ranging Engine
2-Wire Serial • Rx current 17.5mA
2.4GHz • Tx current 15mA
32-bit
Radio Timers
RISC CPU • Receiver sensitivity -95dBm
O-QPSK
Modem UARTs • Transmit power 2.5dBm
32-byte
OTP eFuse
4-Wire Audio Features: Microcontroller
IEEE802.15.4
MAC Sleep Counters • 32-bit RISC CPU, 4 to
XTAL Accelerator 32MHz clock speed
12-bit ADC,
Comparators
• Low power operation
Power
128-bit AES • Variable instruction width for
Encryption 11-bit DACs,
Management
Temp Sensor
high coding efficiency
Accelerator
• Multi-stage instruction
pipeline
• 128kB ROM and 128kB RAM
Benefits Applications for bootloaded program code
• JTAG debug interface
• Single chip integrates transceiver • Robust and secure low power
and microcontroller for wireless • 4-input 12-bit ADC, 2 12-bit
wireless applications
sensor networks DACs, 2 comparators
• ZigBee PRO and JenNet
Small memory footprint • 3 application timer/counters
• networks
• Large memory footprint to run • 2 UARTs
• Utilities metering
ZigBee PRO together with an • SPI port with 5 selects
(e.g. AMR)
application Co-existence with Wi-Fi • 2-wire serial interface
• Home and commercial building
and Bluetooth • 4-wire digital audio interface
automation
• Very low current solution for long • Watchdog timer and Power-
battery life
• Location Aware services - eg
Asset Tracking on-Reset circuit
• Highly featured 32-bit RISC CPU • Up to 21 DIO
for high performance and low • Industrial systems
power • Telemetry Industrial temp (-40°C to +85°C)
• System BOM is low in component • Remote Control 8x8mm 56-lead Sawn QFN
count and cost • Toys and gaming peripherals Lead-free and RoHS compliant
• Extensive user peripherals

JN5148-PBv1.3 © NXP Laboratories UK Ltd 2010 Page 1 of 2

Battery Life Optimisation
Typical
To maximise battery life, the JN5148 supports a number of Power Saving Mode
Current
power management and sleep modes. These include ultra
low power sleep modes and reduced CPU clock speeds Deep sleep 0.12µA

down to 4MHz. Used effectively, these will allow a battery’s Sleep: wakeup on I/O or timer event 1.25µA

life expectancy for a typical remote sensing application, to Sleep: wakeup on I/O or timer event and 128kB RAM retained 3.45µA
be of the order of a few years.

Wireless Networking Protocol Stacks

The IEEE802.15.4 MAC and elements of the wireless networking stacks are included in the device ROM. The JN5148’s
combined memory footprint of 256kB and its efficient code usage ensure that it supports a full JenNet and ZigBee PRO stack
with sufficient code space to implement the application as well. Supported protocols include IEEE802.15.4, ZigBee PRO and
Jennic’s proprietary stack, JenNet. Custom ROM masks will support the integration of user code into ROM giving cost
reduction for higher volume applications. Vcc

Two Wire Timers

Serial Port UART 0

TIM1CK_GT

TIM0CK_GT
TIM0CAP
TIM1CAP

TIM0OUT
TIM1OUT
SIF_CLK

SPISEL4
UART 1 SPI Selects
SIF_D

VDD2

RXD0
TXD0
RTS0
CTS0
Example Application Diagram RXD1
43

SPISEL3
1

The JN5148 device requires a minimum of external CTS1

VSS3
SPISEL2
VB_DIG
Vcc
RTS1 RESETN

components to support wireless applications; a crystal, TXD1

VSS2
Jennic SPISEL1
SPISEL0 1
IC2SerialFlashMemory
S
S
Vcc 8
VSS MOSI

serial flash memory, some decoupling components S

XTALOUT
XTALIN
JN5148
VB_RAM

MISO
2

3
SDO

WP
HOLD

CLK
7

and printed antenna are all that is required for the lowest
VB_SYN SPICLK
4 Vss SDI 5
VCOTUNE VSS1
VB_VCO DIO20

cost bill of materials and smallest size. VDD1

IBIAS
29
DAC2

DAC1
Vcc
15
COMP1M

COMP2M

NC
COMP1P

COMP2P
VB_RF2

ADC1

ADC4
VB_RF

ADC2
ADC3
VREF

VB_
A

Evaluation Kits
To assist users with the development of wireless sensor Printed Antenna Analogue IO

networks, Jennic provides a series of Evaluation Kits.

These contain everything that is needed to carry out product development and test, and include controller and sensor boards
and a Software Developer Kit (SDK).
The SDK provides a comprehensive suite of tools to facilitate the development of application code. The kit includes a C
compiler, graphical and text debuggers, assembler, linker and flash programmer. Libraries are supplied for the supported
network stacks, the chip peripheral interface and also a simple Application Programming Interface (API) to drive the
peripherals on the controller and sensor boards. These, combined with the many example applications provided on the
website, ensure that designers can take products to market easily and quickly.

NXP Laboratories UK Ltd

Furnival Street
Sheffield S1 4QT
United Kingdom
Tel: +44 (0) 114 281 2655
Fax: +44 (0) 114 281 2951
E-mail: info@jennic.com

www.jennic.com

JN5148-PBv1.3 © NXP Laboratories UK Ltd 2010 Page 2 of 2