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UNIT – I

1. Define keyword in Verilog HDL.


2. Define: -(i) Unary operators (ii) Ternary operators
3. Explain the different levels of design description in Verilog.
4. Explain type declaration for parameters.
5. Define synthesis and simulation.
6. Give the functioning of “$ monitor” on system task?
7. What is the difference between Scalars and vectors in module?
8. Write short notes on verilog HDL.
9. Write about applications of ASIC design
10. Write syntax for functions and tasks with one example.
11. Explain about number system used in verilog HDL.
12. Write about $readmemb with example.
13. Explain the components of Verilog module with block diagram?
14. Define system tasks?
15. Write advantages of Programmable Interconnects?
16. Draw the block diagram of Configurable Logic Blocks(CLB)?
17. Define FPGA?
18. Write any two examples of Lookuptable(LUT)?
19. Compare ASIC and FPGA?
20. Write the steps that how to program an FPGA?

UNIT – II
1. Define gate level modelling.
2. What are tristate gates?
3. Give the syntax of repeat construct.
4. Write the Verilog module for repeat construct.
5. Write the syntax of even construct.
6. Give the syntax of always construct.
7. Give the syntax of case statement.
8. Write the function for fork join construct
9. Draw a flowchart for execution of IF ELSE loop.
10. Define Strength and list out types of Strengths.
11. Write short note on Blocking and Non-Blocking statement.
12. What are Bi-directional Gates and List them.
13. Design an D flip flop with gate primitives?
14. Classify delays?
15. What is inter and intra assignment delay?
16. Design a JK flip flop using NAND gate?
17. What is net delay?
18. What are the advantages of Multiple always block?
19. What is AND gate primitive?
20. What is array of instances of primitives?
UNIT – III

1. Write a verilog code using data flow model.


2. Explain about CMOS inverter.
3. Define resistive switches?
4. Design half subtractor using CMOS switch?
5. Explain the operation of NMOS switch?
6. How to instante with strength and delays?
7. What is continuous assignment structure?
8. Explain assignment with delays?
9. Define Compiler Directive?
10. What are Compiler Directives?
11. Explain the operation of PMOS Switch?
12. What is meant by assignment to vectors in Verilog HDL?
13. Explain operators in data flow?
14. Write the verilog code for CMOS NOR in Switch level modeling?
15. Write a verilog code for half adder using in data flow modeling?

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