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EC8361 Analog and Digital Circuits Laboratory

Exp. No Date:
COMMON BASE AMPLIFIER
OBJECTIVE
i) To construct and analyze a common base amplifier.
ii) To plot the frequency response and determine the bandwidth of the amplifier.
iii) To simulate the common base amplifier using SPICE.
EQUIPMENT AND COMPONENTS USED
30 MHz Dual Channel Cathode Ray Oscilloscope
3 MHz Function Generator
0-30 V dc dual regulated power supply
4 ½ digit Digital Multimeter
Transistor SK100
Resistors ¼W, Decade Resistance Box
Electrolytic Capacitors
Breadboard and Connecting wires
BNC Cables and Probes
THEORY
 This configuration is more complex than the other two, and is less common due to its strange
operating characteristics.

 It is called the common-base configuration because (DC power source aside), the signal
source and the load share the base of the transistor as a common connection point

 The input current is the emitter current is greater than any other current in the transistor,
being the sum of base and collector currents.

 Because the input current exceeds all other currents in the circuit, including the output
current, the current gain of this amplifier is actually less than 1 (notice how Rload is connected to the
collector, thus carrying slightly less current than the signal source). In other words,
it attenuates current rather than amplifying it. With common-emitter and common-collector amplifier
configurations, the transistor parameter most closely associated with gain was β.

 In the common-base circuit, we follow another basic transistor parameter: the ratio between
collector current and emitter current, which is a fraction always less than 1. This fractional value for
any transistor is called the alpha ratio, or α ratio.

 Since it obviously can’t boost signal current, it only seems reasonable to expect it to boost
signal voltage.

 The input and output waveforms are in phase with each other. This tells us that the common-
base amplifier is non-inverting.

 Predicting voltage gain for the common-base amplifier configuration is quite difficult, and
involves approximations of transistor behavior that are difficult to measure directly. Unlike the other
amplifier configurations, where voltage gain was either set by the ratio of two resistors (common-
emitter), or fixed at an unchangeable value (common-collector), the voltage gain of the common-
base amplifier depends largely on the amount of DC bias on the input signal. As it turns out, the

2018 – 2019 Department of Electronics and Communication Engineering, Dr.N.G.P.IT. Coimbatore Page
EC8361 Analog and Digital Circuits Laboratory
internal transistor resistance between emitter and base plays a major role in determining voltage
gain, and this resistance changes with different levels of current through the emitter.

 Few applications include radio frequency amplifiers. The grounded base helps shield the
input at the emitter from the collector output, preventing instability in RF amplifiers. The common
base configuration is usable at higher frequencies than common emitter or common collector.

CIRCUIT DIAGRAM

COMMON BASE AMPLIFIER

2018 – 2019 Department of Electronics and Communication Engineering, Dr.N.G.P.IT. Coimbatore Page
EC8361 Analog and Digital Circuits Laboratory

DESIGN
Let us assume the following specifications for this design,

DC biasing conditions
VCC = 12 V; VEE = 12 V
VBE = 0.7 V
IE = IC = 1mA (IB is in the order of µA, hence negligible)
β = hFE = (observe this from the multimeter)
Consider,
VCE = 50% of VCC =

Design of Collector resistor RC


Applying KVL around the Emitter-Collector Loop in the circuit,
IE RE + VCE + IC RC = VEE + VCC

=> RC = VEE + VCC - IE RE - VCE =

IC

Design of Emitter resistor RE


Applying KVL around the Emitter Loop in the circuit,

VEE = VBE + IE . RE

=> RE = VEE – VBE =

IE

Design of coupling capacitors CC1 and CC2


XCC1 ≤ Zin

Let, Zin = 21Ω; XCC1 = 5Ω; f = 1000Hz

Zo = 1 KΩ ; XCC2 = 100Ω

Now, CC1 = 1 =
2πf XCC1

CC2 = 1 =
2πf XCC2

2018 – 2019 Department of Electronics and Communication Engineering, Dr.N.G.P.IT. Coimbatore Page
EC8361 Analog and Digital Circuits Laboratory

PRACTICE PROCEDURE
1.Test all the components and probes before connecting in the circuit.
2.Connect the circuit as shown in circuit diagram without DRBs at the input & output side.
3.Set function generator to produce a sine wave with amplitude between 40 and 60mV, 1 KHz
frequency to serve as input Vi. Note the output voltage Vo.
4.Connect the DRB at the input side as in circuit.
5.Keep the DRB at zero and then increase it step by step until half V o is observed at output. At this
stage, Note the resistance at DRB that is equal to Zi. Now, remove this DRB.
6.Connect the DRB at the output side as in circuit.
7.Keep the DRB at maximum position and then decrease it step by step until half V o is observed at
output. At this stage, Note the resistance at DRB that is equal to Z o. Now, remove this DRB.
8.Vary the frequency of the input signal from 50Hz to 200KHz and observe the corresponding V o.
Tabulate the values.
9.Make necessary calculations as in Table and plot the frequency response curve in a semilog sheet.
10. Determine the bandwidth from the frequency response graph.
11. Use the given formula to calculate the voltage gain & current gain.
SPICE simulation
1.Open new SPICE schematic design window.
2.Select the required components using Place part tool.
3.Connect the components as per the Circuit.
4.Connect the sources & output indicators in the nodes.
5.Save the design & run the simulation.
6.Observe the waveforms.

2018 – 2019 Department of Electronics and Communication Engineering, Dr.N.G.P.IT. Coimbatore Page
EC8361 Analog and Digital Circuits Laboratory

OBSERVATION

Volt/div = Time/div = Volt/div = Time/div =

Graph 1: Input sine wave Graph 2: Output Waveform

2018 – 2019 Department of Electronics and Communication Engineering, Dr.N.G.P.IT. Coimbatore Page
EC8361 Analog and Digital Circuits Laboratory
TABULATION

Frequency response

Vi = Zi = Zo =

Voltage Gain Voltage Gain in dB


Input frequency Output Voltage Vo
AV = Vo 20 log AV
(Hz) (V)
Vi

MODEL GRAPH
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EC8361 Analog and Digital Circuits Laboratory

Frequency Response

Bandwidth BW = fH – fL =

2018 – 2019 Department of Electronics and Communication Engineering, Dr.N.G.P.IT. Coimbatore Page
EC8361 Analog and Digital Circuits Laboratory

MODEL CALCULATION

Vi =
Vo =
Zi =
Zo =

1. Voltage Gain, AV = Vo =
Vi

2. Gain in dB, 20 log AV =

3. Current Gain, AI = AV Zi =
Zo

4. Power Gain, AP = AV . AI =

5. Bandwidth BW = fH – fL =

2018 – 2019 Department of Electronics and Communication Engineering, Dr.N.G.P.IT. Coimbatore Page
EC8361 Analog and Digital Circuits Laboratory

Space for Pasting the Schematic design & Simulation Output

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EC8361 Analog and Digital Circuits Laboratory

Inference
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RESULTS AND CONCLUSION

Parameters Theoretical Value Experimental value

2018 – 2019 Department of Electronics and Communication Engineering, Dr.N.G.P.IT. Coimbatore Page
EC8361 Analog and Digital Circuits Laboratory

2018 – 2019 Department of Electronics and Communication Engineering, Dr.N.G.P.IT. Coimbatore Page

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