DSP Lab Master

LENDI INSTITUTE OF ENGINEERING AND TECHNOLOGY
(Approved by A.I.C.T.E & Affiliated to JNTU, Kakinada)

Accredited by NAAC with ’A’ grade
Jonnada (Village), Denkada (Mandal), Vizianagaram Dist –535005
Phone No. 08922-241111, 241112
EMail: lendi_2008@yahoo.com Website: www.lendi.org
DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING
DSP LABORATORY MANUAL

LENDI INSTITUTE OF ENGINEERING AND
TECHNOLOGY
(Approved by AICTE, New Delhi, and Affiliated to Jawaharlal Nehru Technological University: Kakinada (AP))
Department of Electronics & Communication Engineering

III B.Tech ECE: II Semester
LABORATORY MANUAL
For
Digital Signal Processing Laboratory

Teacher’s Manual
Prepared by
(Approved by A.I.C.T.E & Affiliated to JNTU, Kakinada)
Jonnada (Village), Denkada (Mandal), Vizianagaram Dist –535005
Phone No. 08922-241111, 241112
EMail: lendi_2008@yahoo.com Website: www.lendi.org
DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING
DSP LABORATORY MANUAL

(Approved by A.I.C.T.E & Affiliated to JNTU,Kakinada)

Jonnada (Village), Denkada (Mandal), Vizianagaram Dist – 535 005
Phone No. 08922-241111, 241112
E-Mail: lendi_2008@yahoo.com Website: www.lendi.org
INSTITUTE
VISION
Producing globally competent and quality technocrats with human values for
the holistic needs of industry and society.
MISSION
 Creating an outstanding infrastructure and platform for enhancement of skills,
knowledge and behaviour of students towards employment and higher studies.
 Providing a healthy environment for research, development and
Entrepreneurship, to meet the expectations of industry and society.
 Transforming the graduates to contribute to the socio-economic development
and welfare of the society through value based education
Phone No. 08922-241111, 241112
Department of Electronics and Communication Engineering
VISION
Emerge as a Center of Eminence in Electronics and Communication Engineering to impart
quality education towards highly skilled and competent engineers.
MISSION
 Offering an inspiring and conducive learning environment to prepare skilled and
competent engineers.
 Providing practical skills and project based education for meeting the growing challenges
of industry.
 Arranging an unique environment towards entrepreneurship by fostering innovation,
creativity, freedom and empowerment.
 Imparting professional behaviour, strong ethical values, innovative research capabilities
and leadership abilities.
PROGRAM EDUCATIONAL OBJECTIVES (PEOs)

PEO1: Graduates will have strong knowledge, skills and attitudes towards employment,
higher studies and research.
PEO2: Graduates shall comprehend latest tools and techniques to analyze, design and
develop novel systems and products to solve real life problems.
PEO3: Graduates shall have multidisciplinary approach, professional attitude, ethical values,
good communication, team work and engage in life-long learning to adapt the rapidly
changing technologies.
PROGRAM OUTCOMES (POs)

1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering
fundamentals, and an engineering specialization to the solution of complex engineering
problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems
and design system components or processes that meet the specified needs with appropriate
consideration for the public health and safety, and the cultural, societal, and environmental
considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and

research methods including design of experiments, analysis and interpretation of data, and
synthesis of the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and
modern engineering and IT tools including prediction and modelling to complex engineering
activities with an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to
assess societal, health, safety, legal and cultural issues and the consequent responsibilities
relevant to the professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional engineering

solutions in societal and environmental contexts, and demonstrate the knowledge of, and
need for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or

leader in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the

engineering community and with society at large, such as, being able to comprehend and
write effective reports and design documentation, make effective presentations, and give and
receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a member and
leader in a team, to manage projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to
engage in independent and life-long learning in the broadest context of technological change.
PROGRAM SPECIFIC OUTCOMES (PSOs)

PSO1: Capable of design, develop, test, verify and implement analog and digital electronics
and communication engineering systems and products.
PSO2: Qualify in national and international competitive examinations for successful higher
studies and employment.
SYLLABUS
DIGITAL SIGNAL PROCESSING LAB
LIST OF EXPERIMENTS:
1. To study the architecture of DSP chips – TMS 320C 5X/6X Instructions.
2. To verify linear convolution.
3. To verify the circular convolution.
4. To design FIR filter (LP/HP) using windowing technique
a) Using rectangular window
b) Using triangular window
c) Using Kaiser window
5. To Implement IIR filter (LP/HP) on DSP Processors
6. N-point FFT algorithm.
7. MATLAB program to generate sum of sinusoidal signals.
8. MATLAB program to find frequency response of analog LP/HP filters.
9. To compute power density spectrum of a sequence.
10. To find the FFT of given 1-D signal and plot.

INSTRUCTIONS / Do’s and Don’t
Instruction to Students:-
1. Do not handle any equipment without reading the instructions /Instruction manuals.
2. Observe type of sockets of equipment power to avoid mechanical damage.
3. Do not insert connectors forcefully in the Sockets.
4. Strictly observe the instructions given by the Teacher/ Lab Instructor.
5. After the experiment is over, the students must hand over the Bread board, Trainer kits,
wires, CRO Probes and other Components to the lab assistant / teacher.
6. It is mandatory to come to lab in a formal dress (Shirts, Trousers, ID card, and Shoes for
boys). Strictly no Jeans for both Girls and Boys.
7. It is mandatory to come with observation book and lab record in which previous
experiment should be written in Record and the present lab‘s experiment in Observation
book.
8. Observation book of the present lab experiment should be get corrected on the same day
and Record should be corrected on the next scheduled lab session.
9. Mobile Phones should be Switched OFF in the lab session.
10. Students have to come to lab in-time. Late comers are not allowed to enter the lab.
11. Prepare for the viva questions. At the end of the experiment, the lab faculty will ask the
viva Questions and marks are allotted accordingly.
12. Bring all the required stationery like graph sheets, pencil & eraser, different color pens
etc. for the lab class.
Instructions to Laboratory Teachers:-

1. Observation book and lab records submitted for the lab work are to be checked and
signed before the next lab session.
2. Students should be instructed to switch ON the power supply after the connections are
checked by the lab assistant / teacher.
3. The promptness of submission should be strictly insisted by awarding the marks
accordingly.
4. Ask viva questions at the end of the experiment.
5. Do not allow students who come late to the lab class.
6. Encourage the students to do the experiments innovatively
DSP Lab Manual

Phone No. 08922-241111, 241112
COURSE DATA SHEET
PROGRAM: Electronics and Communication DEGREE: B.Tech (U.G)

Engineering
COURSE: DIGITAL SIGNAL PROCESSING SEMESTER: III-II CREDITS: 3
LAB
COURSE CODE: C317 REGULATION: R13 COURSE TYPE: CORE
COURSE AREA/DOMAIN:COMMUNICATION CONTACT HOURS: 3
CORRESPONDING LAB COURSE CODE (IF LAB COURSE NAME (IF ANY):
ANY):
SYLLABUS:
Experiments DETAILS HOURS
1 To study the architecture of DSP chips – TMS 320C 5X/6X Instructions. 3
2 To verify linear convolution 3
3 To verify the circular convolution. 3
To design FIR filter (LP/HP) using windowing technique 9
a) Using rectangular window
4 b) Using triangular window
c) Using Kaiser window
5 To Implement IIR filter (LP/HP) on DSP Processors 3
6 N-point FFT algorithm. 3
7 MATLAB program to generate sum of sinusoidal signals 3
8 MATLAB program to find frequency response of analog LP/HP filters 3
9 To compute power density spectrum of a sequence. 3
10 To find the FFT of given 1-D signal and plot. 3
TOTAL 36
TEXT/REFERENCE BOOKS:
T/R BOOK TITLE/AUTHORS/PUBLICATION
1. Digital Signal Processing, Principles, Algorithms, and Applications: John G. Proakis, Dimitris
G.Manolakis,Pearson Education / PHI, 2007
2. Digital Signal Processing: MH Hayes, Schaum’s Outlines, TATA Mc-Graw Hill, 2007
3. Fundamentals of Digital Signal Processing using Matlab – Robert J. Schilling, Sandra
4. Digital Signal Processing – Alan V. Oppenheim, Ronald W. Schafer, PHI Ed., 2006
[Type text] Page 9

DSP Lab Manual
COURSE PRE-REQUISITES:
C.CODE COURSE NAME DESCRIPTION SEM
C216 ANALOG AMPLITUDE II YEAR
COMMUNICATION LAB MODULATION,FREQUENCY
MODULATION,
C316 DIGITAL GENERATION OF PULSES ,PPM III YEAR
COMMUNICATION LAB ,PAM.PCM MODULATION
TECHNIQUES
C306 PULSE & DIGITAL LINEAR WAVE III YEAR

CIRCUITS SHAPPING,FILTERS DESIGN
COURSE OBJECTIVES:
1 Familiarize the students with Digital Signal Processing using software tools and to verify the
convolution techniques.
2 To study the time domain and the frequency domain representation of signals.
3 To Illustrate different windowing techniques to design FIR filters
4 To Demonstrate that the amount of noise in an audio signal can be reduced through digital
filtering.
COURSE OUTCOMES:
SNO DESCRIPTION PO(1..12) PSO(1,2)
MAPPING MAPPING
Understand the TMS 320C 5X/6X processor architecture 1,2,5, 9, 12 1,2
C317.1 and its instructions.
Demonstrate the working environment of MATLAB tool 1,2,3,4,5,9,11,12 1,2
C317.2 and CC Studio for signal processing applications.
Analyze the response of discrete time LTI systems using 1,2,3,4,5,9,11,12 1,2
C317 .3 linear and circular convolution.
Design and implementation of FIR and IIR filters 1,2,3,4,5,9,11,12 1,2
C317.4
Apply the Fast Fourier Transform (FFT) algorithm on 1,2,3,4,5,9,11,12 1,2
C317.5 signals
Compute the power spectral density for signals.
1,2,3,4,5,9,11,12 1,2
C317.6
COURSE OVERALL PO/PSO MAPPING:
PO1,PO2,PO3,PO4,PO5,PO6,PO9,PO11,PO12,PSO1,PSO2
COURSE OUTCOMES VS POs MAPPING (DETAILED; HIGH:3; MEDIUM:2; LOW:1):
SNO PO PO PO PO PO PO PO PO PO PO1 PO1 PO1 PSO PSO
1 2 3 4 5 6 7 8 9 0 1 2 1 2
C317. 3 2 - - 3 - - - 2 - - 2 2 2
1
C317. 3 3 2 3 3 - - - 2 - 1 2 2 2
2
C317 3 3 3 2 3 - - - 2 - 1 2 2 2
.3
Lendi Institute of Engineering and Technology –ECE Page 10

DSP Lab Manual
C317. 3 3 3 3 3 - - - 2 - 1 2 2 3
4
C317. 3 3 3 3 3 - - - 2 - 1 3 2 3
5
C317. 3 2 3 3 3 - - - 2 - 1 2 2 2
6
C317 2 2
3 3 3 3 3 - - - 2 - 1 2
*
* For Entire Course, PO & PSO Mapping
POs & PSO REFERENCE:
PO1 Engineering PO7 Environment & PSO1 Capable of design, develop, test, verify
Knowledge Sustainability and implement analog and digital
electronics and communication
engineering systems and products
PO2 Problem PO8 Ethics PSO2 Qualify in national and international
Analysis competitive examinations for
successful higher studies and
employment
PO3 Design & PO9 Individual &
Development Team Work
PO4 Investigations PO10 Communication
Skills
PO5 Modern Tools PO11 Project Mgt. &
Finance
PO6 Engineer & PO12 Life Long
Society Learning
COs VS POs MAPPING JUSTIFICATION:
SNO PO/PSO LEVEL OF JUSTIFICATION
MAPPED MAPPING
PO1,PO2, 3,2,3,2,2,2,2 Student ability to know the importance Of digital
C317.1 ,PO5,PO9,PO signal processing.
12,
PSO1,PSO2
PO1,PO2,PO3 3,3,2,3,3,2,1,2,2,2 Synchronizing practical analysis with real
C317.2 ,PO4,PO5,PO application
6,PO9,PO11,P
O12,PSO1,PS
O2
PO1,PO2,PO3 3,3,3,2,3,2,1,2,2,2 Testing of Different types of DSP Tools to analysis
C317 .3 ,PO4,PO5,PO the processing of a signal nature
6,PO9,PO11,P
O12,PSO1,PS
O2
PO1,PO2,PO3 3,3,3,3,3,2,1,2,2,3 Students will be able to convert time domain signal to
C317.4 ,PO4,PO5,PO frequency domain in various applications
6,PO9,PO11,P
O12,PSO1,PS
O2

DSP Lab Manual
PO1,PO2,PO3 3,3,3,3,3,2,1,3,2,3 Need more focus on real time applications run by the
C317.5
,PO4,PO5,PO MATLAB Supported Simulink tools.
6,PO9,PO11,P
O12,PSO1,PS
O2
PO1,PO2,PO3 3,2,3,3,3,2,1,2,2,2 Student ability to know about the importance of DSP
C317.6 ,PO4,PO5,PO processor in analog and digital filters.
6,PO9,PO11,P
O12,PSO1,PS
O2
GAPS IN THE SYLLABUS - TO MEET INDUSTRY/PROFESSION REQUIREMENTS, POs
& PSOs:
S.NO DESCRIPTION PROPOSED PO(1..12) PSO(1,2)
ACTIONS
MAPPING MAPPING
1 Need more experiments on image Topics to be PO1,PO2,PO3,PO4,PO5, PSO1,PSO2

processing with support of DSP covered PO9,PO11,PO12
Tool. along with
syllabus
2 Implementation of decimation and Topics to be PO1,PO2,PO3,PO4,PO5, PSO1,PSO2
interpolation techniques. covered PO9,PO11,PO12
along with
syllabus
PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY VISIT/GUEST
LECTURER/NPTEL ETC
TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:
S.No Topics CO
1 Attached updated Fourier transforms like STFT in C317.4
the present Lab Syllabus
2 Measurement of magnitude and phase response of C317.4
Fourier’s
3 Introduction to the Motorola 56000 family C317.1
description.
4 Comparisons of the FPGA and DSP for real time C317.2
applications.
WEB SOURCE REFERENCES:
1 https://www.tutorialspoint.com/digital_signal_processing/index.htm
2 http://www.dspguide.com/ch20/1.htm
3 http://www.analog.com/en/design-center/landing-pages/001/beginners-guide-to-dsp.html
4 http://nptel.ac.in/courses/117102060/
5 https://www.youtube.com/watch?v=pf8Be_6eGdk
DELIVERY/INSTRUCTIONAL METHODOLOGIES:
CHALK & TALK ☐ STUD. WEB RESOURCES NPTEL/OTHERS
ASSIGNMENT

DSP Lab Manual
LCD/SMART STUD. SEMINARS ADD-ON ☐ WEBNIARS

BOARDS COURSES
ASSESSMENT METHODOLOGIES-DIRECT
ASSIGNMENTS STUD. SEMINARS TESTS/MODEL UNIV.
EXAMS EXAMINATION
☐ STUD. LAB ☐ STUD. VIVA MINI/MAJOR ☐ CERTIFICATIONS
PRACTICES PROJECTS
☐ ADD-ON ☐ OTHERS
COURSES
ASSESSMENT METHODOLOGIES-INDIRECT
ASSESSMENT OF COURSE OUTCOMES (BY STUDENT FEEDBACK ON FACULTY
FEEDBACK, ONCE) (TWICE)
ASSESSMENT OF MINI/MAJOR PROJECTS ☐ OTHERS
BY EXT. EXPERTS
Prepared by Approved by
H.O.D

DSP Lab Manual
CONTENTS
S.NO NAME OF THE EXPERIMENT PAGE NO

University prescribed lab experiments:
1 To study the architecture of DSP chips – TMS 320C 5X/6X 18-29
Instructions.
2 To verify linear convolution and plot the response. 30-37
3 To verify the circular convolution and plot the response. 38-44
To design FIR filter (LP/HP) using windowing technique. 45-54
4 a) Using rectangular window b) Using triangular window
c) Using Kaiser Window
5 To Implement IIR filter (LP/HP) on DSP Processors. 55-63
6 To find the FFT of given 1-D signal and plot. 64-70
7 To generate sum of sinusoidal signals. 71-74
8 To Implement N-point FFT algorithm. 75-82
9 To compute power density spectrum of a sequence. 83-90
10 To find frequency response of analog LP/HP filters. 91-97
Advanced experiments :
11 To verify down sampling and up sampling by a factor 20. 98-103
Design Experiments:
12 Mat lab program to Generation of AM & FM 104-109
Open-Ended Experiments:
13 Poles and zeros location in Z/S planes 110-114
Equipment Required:
1. Mat lab software/ Mat lab supported Simulink tools.
2. Personal computer with necessary peripherals.
3. DSP kit 6713 with code composer studio

DSP Lab Manual
Introduction to MATLAB
------------------------------------------------------------------------------------------------
The main objective of this manual is to guide all the III and IV year students of Department
of ECE to successfully do the experiments in the Digital Signal Processing Laboratory. It not
only provides guidance for experiments prescribed by JNTU but also acts reference to learn
MATLAB, CCS simulation software and working with DSP starter kits. In addition to the 10
experiments given in JNTU curriculum, few more experiments are included for the sake of
students’ practice.
The name MATLAB stands for MATrix LABoratory. MATLAB was written
originally to provide easy access to matrix software developed by the LINPACK (linear
system package) and EISPACK (Eigen system package) projects.
MATLAB [1] is a high-performance language for technical computing. It integrates
computation, visualization, and programming environment. Furthermore, MATLAB is a
modern programming language environment: it has sophisticated data structures, contains
built-in editing and debugging tools, and supports object-oriented programming. These
factors make MATLAB an excellent tool for teaching and research.
MATLAB has many advantages compared to conventional computer languages (e.g.,
C, FORTRAN) for solving technical problems. MATLAB is an interactive system whose
basic data element is an array that does not require dimensioning. The software package has
been commercially available since 1984 and is now considered as a standard tool at most
universities and industries worldwide.
It has powerful built-in routines that enable a very wide variety of computations. It
also has easy to use graphics commands that make the visualization of results immediately
available. Specific applications are collected in packages referred to as toolbox. There are
toolboxes for signal processing, symbolic computation, control theory, simulation,
optimization, and several other fields of applied science and engineering.
Matrices are the basic elements of the MATLAB environment. A matrix is a two-
dimensional array consisting of m rows and n columns. Special cases are column vectors (n =
1) and row vectors (m = 1).
MATLAB supports two types of operations, known as matrix operations and array
operations. Matrix operations will be discussed first.

DSP Lab Manual
Starting MATLAB
After logging into your account, you can enter MATLAB by double-clicking on the
MATLAB shortcut icon (MATLAB 7.0.4) on your Windows desktop. When you start
MATLAB, a special window called the MATLAB desktop appears. The desktop is a window
that contains other windows. The major tools within or accessible from the desktop are:
• The Command Window
• The Command History
• The Workspace
• The Current Directory
• The Help Browser
• The Start button
Fig.1. graphical interface to the mat lab workspace

Basic arithmetic operators :
Symbol Operation Example

+ Addition 2+3
− Subtraction 2−3
∗ Multiplication 2∗3
/ Division 2/3

DSP Lab Manual
Mathematical functions:
There is a long list of mathematical functions that are built into MATLAB. These functions
are called built-ins. Many standard mathematical functions, such as sin(x), cos(x), tan(x), e x ,
ln(x), are evaluated by the functions sin, cos, tan, exp, and log respectively in MATLAB.
Elementary Functions
Matrix generators:
MATLAB provides functions that generates elementary matrices. The matrix of zeros, the
matrix of ones, and the identity matrix are returned by the functions zeros, ones, and eye,
respectively.
Element matrices
Array operators:

DSP Lab Manual
EXPERIMENT NO: 1
Architecture of DSP chips - TMS 320C 6713 DSP Processor
AIM: To study the architecture of TMS320C6713 DSK
APPARATUS REQUIRED: TMS320C6713 DSK kit
INTRODUCTION:
A digital signal processor (DSP) is an integrated circuit designed for high-speed data
manipulations, and is used in audio, communications, image manipulation, and other data-
acquisition and data-control applications. The microprocessors used in personal computers
are optimized for tasks involving data movement and inequality testing. The typical
applications requiring such capabilities are word processing, database management, spread
sheets, etc. When it comes to mathematical computations the traditional microprocessor are
deficient particularly where real-time performance is required. Digital signal processors are
microprocessors optimized for basic mathematical calculations such as additions and
multiplications.
Fixed versus Floating Point:
Digital Signal Processing can be divided into two categories, fixed point and floating
point which refer to the format used to store and manipulate numbers within the devices.
Fixed point DSPs usually represent each number with a minimum of 16 bits, although a
different length can be used. There are four common ways that these 216i.e., 65,536 possible
bit patterns can represent a number. In unsigned integer, the stored number can take on any
integer value from 0 to 65, 535, signed integer uses two's complement to include negative
numbers from -32,768 to 32,767. With unsigned fraction notation, the 65,536 levels are
spread uniformly between 0 and 1 and the signed fraction format allows negative numbers,
equally spaced between -1 and 1.
The floating point DSPs typically use a minimum of 32 bits to store each value. This
results in many more bit patterns than for fixed point, 232i,e., 4,294,967,296 to be exact. All
floating point DSPs can also handle fixed point numbers, a necessity to implement counters,
loops, and signals coming from the ADC and going to the DAC. However, this doesn't mean
that fixed point math will be carried out as quickly as the floating point operations; it depends
on the internal architecture. The primary trade-offs between fixed and floating point DSPs are
shown below. Fixed point arithmetic is much faster than floating point in general purpose
computers.
ARCHITECTURE OF 6713 DSP PROCESSOR:
This chapter provides an overview of the architectural structure of the TMS320C67xx DSP,
which comprises the central processing unit (CPU), memory, and on-chip Peripherals. The
C67xE DSPs use an advanced modified Harvard architecture that maximizes processing
power with eight buses. Separate program and data spaces allow simultaneous access to
DSP Lab Manual
program instructions and data, providing a high degree of parallelism. For example, three
reads and one write can be performed in a single cycle. Instructions with parallel store and
application-specific instructions fully utilize this architecture. In addition, data can be
transferred between data and program spaces. Such Parallelism supports a powerful set of
arithmetic, logic, and bit-manipulation operations that can all be performed in a single
machine cycle. Also, the C67xx DSP includes the control mechanisms to manage interrupts,
repeated operations, and function calling.
C versus Assembly:
DSPs are programmed in the same languages as other scientific and engineering
applications, usually assembly or C. Programs written in assembly can execute faster, while
programs written in C are easier to develop and maintain. In traditional applications, such as
programs run on PCs and mainframes, C is almost always the first choice. If assembly is used
at all, it is restricted to short subroutines that must run with the utmost speed.
How fast are DSPs?
The primary reason for using a DSP instead of a traditional microprocessor is speed:
the ability to move samples into the device and carry out the needed mathematical operations,
and output the processed data. The usual way of specifying the fastness of a DSP is: fixed
point systems are often quoted in MIPS (million integer operations per second). Likewise,
floating point devices can be specified in MFLOPS (million floating point operations per
second).
TMS320 Family:
The Texas Instruments TMS320 family of DSP devices covers a wide range, from a
16-bit fixed-point device to a single-chip parallel-processor device. In the past, DSPs were
used only in specialized applications. Now they are in many mass-market consumer products
that are continuously entering new market segments. The Texas Instruments TMS320 family
of DSP devices and their typical applications are mentioned below.C1x, C2x, C2xx, C5x,
C54x: The width of the data bus on these devices is 16 bits. All have modified Harvard
architectures. They have been used in toys, hard disk drives, modems, cellular phones, and
active car suspensions.
C3x: The width of the data bus in the C3x series is 32 bits. Because of the reasonable cost
and floating-point performance, these are suitable for many applications. These include
almost any filters, analyzers, hi-fi systems, voice-mail, imaging, bar-code readers, motor
control, 3D graphics, or scientific processing.
C4x: This range is designed for parallel processing. The C4x devices have a 32-bit data bus
and are floating-point. They have an optimized on-chip communication channel, which
enables a number of them to be put together to form a parallel-processing cluster. The C4x

DSP Lab Manual
range devices have been used in virtual reality, image recognition, telecom routing, and
parallel-processing systems.
C6x: The C6x devices feature VelociTI , an advanced very long instruction word (VLIW)
architecture developed by Texas Instruments. Eight functional units, including two
multipliers and six arithmetic logic units (ALUs), provide 1600 MIPS of cost-effective
performance. The C6x DSPs are optimized for multi-channel, multifunction applications,
including wireless base stations, pooled modems, remote-access servers, digital subscriber
loop systems, cable modems, and multi-channel telephone systems.
Introduction to TMS320C6713:
The TMS320C6000™ digital signal processor (DSP) platform is part of the

TMS320™ DSP family. The TMS320C62x™ DSP generation and the TMS320C64x™ DSP
generation comprise fixed-point devices and the TMS320C67x™ DSP generation comprises
floating point devices in the C6000 DSP platform. All three uses the VelociTI™ architecture,
a high-performance, advanced VLIW (very long instruction word) architecture.
The VelociTI architecture of the C6000 platform of devices makes them the first off-
the-shelf DSPs to use advanced VLIW to achieve high performance through increased
instruction-level parallelism. A traditional VLIW architecture consists of multiple execution
units running in parallel, performing multiple instructions during a single clock cycle.
Parallelism is the key to extremely high performance, taking these DSPs well beyond the
performance capabilities of traditional superscalar designs. VelociTI is a highly deterministic
architecture, having few restrictions on how or when instructions are fetched, executed, or
stored. VelociTI’s advanced features include:
 Instruction packing: reduced code size

 All instructions can operate conditionally: flexibility of code
 Variable-width instructions: flexibility of data types
 Fully pipelined branches: zero-overhead branching.
TMS320 Family Overview
The TMS320™ DSP family consists of fixed-point, floating-point, and multipro-

cessor digital signal processors (DSPs). TMS320 DSPs have an architecture designed
specifically for real-time signal processing. In 1982, Texas Instruments (TI) introduced the
TMS32010 — the first fixed-point DSP in the TMS320 family. Today, the TMS320 family
consists of many generations:C1x, C2x, C2xx, C5x, and C54x fixed-point DSPs, C3x and
C4x floating-point DSPs, C8x multiprocessor DSPs and TMS320C6x™ DSPs.
Features and Options of TMS320C67X:
The C6000 devices execute up to eight 32-bit instructions per cycle. The C67x
device’s core CPU consists of 32 general-purpose registers of 32-bit word length and eight
functional units. The C6000 generation has a complete set of optimized development tools,
including an efficient C compiler, an assembly optimizer for simplified assembly-language

DSP Lab Manual
programming and scheduling, and a Windows™ based debugger interface for visibility into
source code execution characteristics.
TMS320C6713 DSKPackage Contents:

The C6713™ DSK builds on TI's DSP Starter Kit (DSK) development boards. The
high-performance board features the TMS320C6713 floating-point DSP capable of
performing 1350 million floating-point operations per second (MFLOPS). The DSK is USB
port interfaced platform that allows efficiently developing and testing applications for the
C6713.
Fig1.1 DSK Accessories
The C6713 DSK has a TMS320C6713 DSP onboard that allows full-speed
verification of code with CCS. The C6713 DSK provides a USB Interface, SDRAM and
ROM, an analog interface circuit for Data conversion (AIC), an I/O port and Embedded
JTAG emulation support. Connectors on the C6713 DSK provide DSP external memory
interface (EMIF) and peripheral signals that enable its functionality to be expanded with
custom or third party daughter boards. The C6713 DSK includes a stereo codec. This analog
interface circuit (AIC) has the following characteristics:
High-Performance Stereo Codec
90-dB SNR Multibit Sigma-Delta ADC (A-weighted at 48 kHz)
100-dB SNR Multibit Sigma-Delta DAC (A-weighted at 48 kHz)
8-kHz – 96-kHz Sampling-Frequency Support
Software Control Via TI McBSP-CompatibleMultiprotocolSerialPort
I2C-Compatible and SPI-Compatible Serial-Port Protocols

DSP Lab Manual
Glueless Interface to TI McBSPs
Audio-Data Input/OutputVia TI McBSP-Compatible Programmable Audio Interface
I2S-Compatible Interface Requiring Only One McBSP for both ADC and
DAC
Standard I 2 S, MSB, or LSB Justified-Data Transfers
16/20/24/32-Bit Word Lengths
Features of C6713DSK:
The 6713 DSK enables us to evaluate and develop applications for TI C67XX DSP
family. An on-board AIC23 codec allows the DSP to transmit and receive analog signals.
McBSP0 is used for the codec control interface and McBSP1 is used for data. Analog audio
I/O is done through four 3.5mm audio jacks that correspond to microphone input, line input,
line output and headphone output. The codec can select the microphone or the line i/p as the
active i/p.The analog o/p is driven to both line out and headphone connectors. McBSP1 can
be re-routed to the expansion connectors in software.A programmable logic device, CPLD is
used to implement glue logic that ties the board components together. The CPLD has a
register based user interface that lets the user configure the board by reading and writing to
the CPLD registers. The DSK includes 4 LEDs and 4 DIP switches to provide the user with
interactive feedback, accessed by reading and writing to the CPLD registers.
Code Composer Studio communicates with the DSK through an embedded JTAG
emulator with a USB host interface. The DSK can also be used with an external emulator
through the external JTAG connector.
Fig 1 .2:TMS320C6713 DSK Overview Block Diagram

DSP Lab Manual
Fig 1.3 TMS320C6713 DSK
Introduction to CCS
Code Composer Studio is the DSP industry's first fully integrated development environment
(IDE) with DSP-specific functionality. Code Composer Studio lets us edit, build, debug,
profile and manage projects from a single unified environment. Other unique features include
graphical signal analysis, injection/extraction of data signals via file I/O, multi-processor
debugging, automated testing and customization via a C-interpretive scripting language and
much more.
Code Composer Studio features:
 IDE
 Debug IDE
 Advanced watch windows
 Integrated editor
 File I/O, Probe Points, and graphical algorithm scope probes
 Advanced graphical signal analysis
 Interactive profiling
 Automated testing and customization via scripting
 Visual project management system
 Compile in the background while editing and debugging
 Multi-processor debugging
 Help on the target DSP

DSP Lab Manual
TMS320C67XX Architecture:
The block diagram for TMS320C67xx DSP is shown the figure below. The C6000
devices come with program memory, which, on some devices, can be used as a program
cache. The devices also have varying sizes of data memory. Peripherals such as a direct
memory access (DMA) controller, power-down logic, and external memory interface (EMIF)
usually come with the CPU, while peripherals such as serial ports and host ports are on only
certain devices.
Fig 1.4: TMS320C67XX Block Diagram
Central Processing Unit (CPU):
The TMS320C67X CPU showed above contains Program fetch unit, Instruction decode unit,
Two data paths, each with four functional units, thirty two 32-bit registers, Control registers,
Control logic and Test, emulation, and interrupt logic.The program fetch, instruction dispatch
and instruction decode units can deliver upto eight 32-bit instructions to the functional units
every CPU clock cycle.
The processing of instructions occurs in each of the two data paths, A&B each of
which contains four functional units.L, .S, .M, and .D and sixteen 32-bit general-purpose
registers for TMS320C67xx. A control register file provides the means to configure and
control various processor operations.

DSP Lab Manual
Internal Memory:
The TMS320C67x have a 32-bit, byte-addressable address space. Internal (on-chip)

memory is organized in separate data and program spaces. When off-chip memory is used,
these spaces are unified on most devices to a single memory space via the external memory
interface (EMIF). The TMS320C67xx have two 32-bit internal ports to access internal data
memory. The TMS320C67x have a single internal port to access internal program memory,
with an instruction-fetch width of 256 bits.
Memory and Peripheral Options:
A variety of memory and peripheral options are available for the C6000 platform.
Large on-chip RAM up to 7Mb, Program cache and 2-level caches. 32-bit EMIF supports
SDRAM, SBSRAM, SRAM and other asynchronous memories for a broad range of external
memory requirements and maximum system performance.
DMA Controller transfers data between address ranges in the memory map without
intervention by the CPU. The DMA controller has four programmable channels and a fifth
auxiliary channel. EDMA Controller performs the same functions as the DMA controller.
The EDMA has 16 programmable channels, as well as a RAM space to hold multiple
configurations for future transfers.
HPI is a parallel port through which a host processor can directly access the CPU’s
memory space. The host device has ease of access because it is the master of the interface.
The host and the CPU can exchange information via internal or external memory. In addition,
the host has direct access to memory-mapped peripherals.Expansion bus is a replacement for
the HPI, as well as an expansion of the EMIF. The expansion provides two distinct areas of
functionality (host port and I/O port) which can co-exist in a system.
McBSP (multichannel buffered serial port) is based on the standard serial port
interface found on the TMS320C2000 and C5000 platform devices. In addition, the port can
buffer serial samples in memory automatically with the aid of the DMA/EDNA controller. It
also has multichannel capability compatible with the T1, E1, SCSA, and MVIP networking
standards.
Timers in the C6000 devices are two 32-bit general-purpose timers used for time events,
count events, generate pulses, interrupt the CPU, send synchronization events to the
DMA/EDMA controller and power-down logic allows reduced clocking to reduce power
consumption.
Paths and Control:
The components of the data path for TMS320C67X™ are:
1. Two general-purpose register files (A and B)

DSP Lab Manual
2. Eight functional units (.L1, .L2, .S1, .S2, .M1, .M2, .D1, and .D2)
3. Two load-from-memory data paths (LD1 and LD2)
4. Two store-to-memory data paths (ST1 and ST2)
5. Two data address paths (DA1 and DA2)
6. Two register file data cross paths (1X and 2X).
Fig1.5: TMS320C67xx CPU Data Path
General-Purpose Register Files:
There are two general-purpose register files A & B in the C6000data paths. For the
C67x™ DSPs, each of these files contains 16 32-bit registers, A0-A15 for file A and B0-B15
for file B. The general-purpose registers can be used for data, data address pointers, or
condition registers. The C67x general-purpose register files support data ranging in size from
packed 16-bit data through 40-bit fixed-point and 64-bit floating point data. Values larger
than 32 bits, such as 40-bit long and 64-bit float quantities, are stored in register pairs.
In these the 32 LSBs of data are placed in an even-numbered register and the
remaining 8 or 32 MSBs in the next upper register (which is always an odd-numbered
register). Packed data types store either four 8-bit values or two 16-bit values in a single 32-
bit register, or four 16-bit values in a 64-bit register pair.There are 16 valid register pairs for
DSP Lab Manual
40-bit and 64-bit data in the C67x cores In assembly language syntax, a colon between the
register names denotes the register pairs, and the odd-numbered register is specified first.
Functional Units:
The eight functional units in the C6000 data paths can be divided into two groups of
four; each functional unit in one data path is almost identical to the corresponding unit in the
other data path.
Most data lines in the CPU support 32-bit operands, and some support long (40-bit)
and double word (64-bit) operands. Each functional unit has its own 32-bit write port into a
general-purpose register file. All units ending in 1 (for example, .L1) write to register file A,
and all units ending in 2 write to register file B. Each functional unit has two 32-bit read ports
for source operands src1 and src2. Four units (.L1, .L2, .S1, and .S2) have an extra 8-bit-wide
port for 40-bit long writes, as well as an 8-bit input for 40-bit long reads. Because each unit
has its own 32-bit write port, when performing 32-bit operations all eight units can be used in
parallel every cycle.
Register File Cross Paths:
Each functional unit reads directly from and writes directly to the register file within
its own data path. That is, the .L1, .S1, .D1, and .M1 units write to register file A and the .L2,
.S2, .D2, and .M2 units write to register file B. The register files are connected to the
opposite-side register file’s functional units via 1X and 2X cross paths. These cross paths
allow functional units from one data path to access a 32-bit operand from the opposite side
register file. The 1X cross path allows the functional units of data path A to read their source
from register file B, and 2X cross path allows the functional units of data path B to read their
source from register file A.
On C67X6 of the 8 functional units have access to register file on the opposite side,
via a cross path. The .M1, .M2, .S1 and .S2 units’ src2 units are selectable between the cross
path and the same side register file. In case of .L1 and .L2, both src1 and src2 inputs are also
selectable between the cross path and the same-side register file.
Only two cross paths, 1X and 2X exist in the C6000 architecture. Thus the limit is one
source read from each data path’s opposite register file per cycle, or a total of two cross path
source reads per cycle. In the C67x only one functional unit per data path, per execute packet,
can get an operand from the opposite register file.
Memory, Load, and Store Paths:
The C67x has a second 32-bit load path for both register files A and B. This allows
the LDDW instruction to simultaneously load two 32-bit values into register file A and two
32-bit values into register file B. For side A, LD1a is the load path for the 32 LSBs and LD1b
is the load path for the 32 MSBs. For side B, LD2a is the load path for the 32 LSBs and
LD2b is the load path for the 32 MSBs. There are also two 32-bit paths, ST1 and ST2, for

DSP Lab Manual
storing register values to memory from each register file.
Data Address Paths:
The data address paths DA1 and DA2 are each connected to .D units in both data
paths. Data addresses generated by any one path can access data to or from any register. The
DA1 and DA2 resources and their associated data paths are specified as T1 and T2
respectively. T1 consists of the DA1 address path and the LD1 and ST1 data paths.
Addressing Mode Register (AMR):
For each of the eight registers (A4–A7, B4–B7) that can perform linear or circular
addressing, the AMR specifies the addressing mode. A 2-bit field for each register selects the
address modification mode: linear (the default) or circular mode. With circular addressing,
the field also specifies which BK (block size) field to use for a circular buffer. In addition, the
buffer must be aligned on a byte boundary equal to the block size
Legend: R Readable by the MVC instruction W Writeable by the MVC instruction +0

Value is zero after reset
TMS320C67x Fixed-Point Instruction Set:
The TMS320C62x™, TMS320C64x™, and the TMS320C67x™ share an instruction

set. All of the instructions valid for the C62x™ are also valid for the C64x™ and C67x™.
However, because the C67x is a floating-point device, there are some instructions that are
unique to it and do not execute on the fixed-point device.
DEVELOPMENT ENVIRONMENT
Code Composer Studio is TI’s flagship development tool. It consists of an assembler,

a C compiler, an integrated development environment (IDE, the graphical interface to the
tools) and numerous support utilities like a hex format conversion tool. The DSK includes a
special version of Code Composer specially tailored to features on the 6713 DSK board.
Other versions of Code Composer are available that fully support each of TI’s processor
families on a wide variety of hardware targets.
The Code Composer IDE is the piece you see when you run Code Composer. It
consists of an editor for creating source code, a project manager to identify the source files
and options necessary for your programs and an integrated source level debugger that lets you
examine the behavior of your program while it is running. The IDE is responsible for calling
other components such as the compiler and assembler so developers don’t have to deal with
the hassle of running each tool manually.
The 6713 DSK includes a special device called a JTAG emulator on-board that can
directly access the register and memory state of the 6713 chip through a standardized JTAG
interface port. When a user wants to monitor the progress of his program, Code Composer

DSP Lab Manual
sends commands to the emulator through its USB host interface to check on any data the user
is interested in.
This debugging method is extremely powerful because programs can be debugged

unobtrusively on real hardware targets without making any special provisions for debug like
external probes, software monitors or simulated hardware. When designing your own
hardware around the 6713 you can debug your application with the same rich functionality of
the DSK simply by using Code Composer with an external emulator and including a header
for the JTAG interface signals.
You should always be aware that the DSK as a different system than your PC, when
you recompile a program in Code Composer on your PC you must specifically load it onto
the 6713 on the DSK. Other things to be aware of are:
· When you tell Code Composer to run, it simply starts executing at the current
program counter. If you want to restart the program, you must reset the program counter by
using Debug à Restart or re-loading the program which sets the program counter implicitly.
· After you start a program running it continues running on the DSP indefinitely. To
stop it you need to halt it with Debug à Halt.
Result: TMS320C6713DSK Architecture is studied.
Outcome: students are able to know about TMS320c54XX processor architecture and
working also learn about different types of DSP processors.

DSP Lab Manual
EXPERIMENT NO: 2
VERIFY LINEAR CONVOLUTION
AIM: To compute the response of a discrete a LTI system with input sequence x[n] and
impulse response h[n] by using linear convolution.
EQUIPMENT REQUIRED:
Operating System – Windows XP Service Pack 3
Constructor - Simulator
Software - CC Studio V3.1& MATLAB R2010a
THEORY: Convolution is a formal mathematical operation, just as multiplication, addition,

and integration. Addition takes two numbers and produces a third number, while convolution
takes two signals and produces a third signal. Convolution is used in the mathematics of
many fields, such as probability and statistics. In linear systems, convolution is used to
describe the relationship between three signals of interest: the input signal, the impulse
response, and the output signal.
Linear Convolution involves the operations, 1.Folding, 2.Multiplication 3. Addition and

4.Shifting. These operations are represented by a mathematical expression,

y[n]   x[k ]h[n  k ]
k  
where x[k]= Input signal Samples
h[k] = Impulse response co-efficient.
y[n]= Convolution output.
Algorithm:
Step 1: Enter the sequence x[n].
Step 2: Find the length of sequence,N1.
Step 3: Enter another sequence h[n].
Step 4: Find the length of sequence N2.
Step 5: Find N=N1+N2-1.
Step 6: Append N2-1 zeros to x[n].
Step 7: Append N1-1 zeros to h[n].
Step 8: Fold the h[n] and shift by delay l.
Step 9: Multiply h[n-l] by x[n] and sum all the values to obtain y[n]
Step 10: Repeat the steps 8& 9 for values of l=N1+N2-1.
Step 11: Plot the output y[n].

DSP Lab Manual
Flowchart:
MATLAB program for linear convolution without using conv function:

%linear convolution program
clc;
clear all;
close all;
disp('linear convolution program');
x=input('enter i/p x(n):');
m=length(x);
h=input('enter i/p h(n):');
n=length(h);
x=[x,zeros(1,n)];
subplot(2,2,1), stem(x);
title('i/p sequence x(n)is:');
xlabel('---->n');
ylabel('---->x(n)');grid;
h=[h,zeros(1,m)];
subplot(2,2,2), stem(h);
title('i/p sequence h(n)is:');
xlabel('---->n');

DSP Lab Manual
ylabel('---->h(n)');grid;
disp('convolution of x(n) & h(n) is y(n):');
y=zeros(1,m+n-1);
for i=1:m+n-1
y(i)=0;
for j=1:m+n-1
if(j<i+1)
y(i)=y(i)+x(j)*h(i-j+1);
end
end
end
y
subplot(2,2,[3,4]),stem(y);
title('convolution of x(n) & h(n) is :');
xlabel('---->n');
ylabel('---->y(n)');grid;
RESULT
MATLAB program for linear convolution by using conv function:
x= input ('enter the first sequence');

subplot(3,1,1);
stem(x);
ylabel('amp..');
xlabel('(a)n..');
title('stem x');
grid on;
h=input ('enter the second sequence');
subplot(3,1,2);
DSP Lab Manual
stem(h);
ylabel('amp..');
xlabel('(b)n..');
title('stem h');
grid on;
y=conv(x,h);
subplot(3,1,3);
stem(y);
ylabel('amp..');
xlabel('(c)n..');
title('stem y');
grid on;
PROCEDURE:
1) Double click on the MATLAB icon.
2) Go to FILE----> NEW----> BLANK M file.
3) Enter the program and save the file with .m extension.
4) Go to DEBUG----> RUN.
In put :
Enter the first sequence [1 2 3 4 5 6]
Enter the second sequence [6 5 4 3 2]
x= 1 2 3 4 5 6
h= 6 5 4 3 2
Out put:
y = 6 17 32 50 70 90 68 47 28 12
Waveform:
stem x
10
amp..
0
1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
(a)n..
stem h
10
amp..
0
1 1.5 2 2.5 3 3.5 4 4.5 5
(b)n..
stem y
100
amp..
50
0
1 2 3 4 5 6 7 8 9 10
(c)n..
FIG: linear convolution of two sequences
Result: Linear convolution of two sequences using MATLAB is obtained.

DSP Lab Manual
LINEAR CONVOLUTION USING TMS320C6713 KIT
AIM: To implement linear convolution in c language using CCStudio
APPARATUS: DSK 6713 DSP Trainer kit.

USB Cable
Power supply
PROGRAM 1:
// Linear convolution program in c language using CCStudio
#include<stdio.h>
int x[15],h[15],y[15];
main()
{
inti,j,m,n;
printf("\n enter value for m");
scanf("%d",&m);
printf("\n enter value for n");
scanf("%d",&n);
printf("Enter values for i/p x(n):\n");
for(i=0;i<m;i++)
scanf("%d",&x[i]);
printf("Enter Values for i/p h(n) \n");
for(i=0;i<n; i++)
scanf("%d",&h[i]);
for(i=m;i<=m+n-1;i++)
x[i]=0;
for(i=n;i<=m+n-1;i++)
h[i]=0;
/* convolution operation */
for(i=0;i<m+n-1;i++)
{
y[i]=0;
for(j=0;j<=i;j++)
{
y[i]=y[i]+(x[j]*h[i-j]);
}}
//displaying the o/p
printf("\n The Value of output y[%d]=%d",i,y[i]);
}

DSP Lab Manual
Result:
enter value for m4
enter value for n4
Enter values for i/p
1234
Enter Values for n
1234
The Value of output y[0]=1
Program 2:
#include<stdio.h>
int y[20];
main()
{ int m=6; /*Lenght of i/p samples sequence*/
int n=6; /*Lenght of impulse response Co-efficients */
int i=0,j;
int x[15]={1,2,3,4,5,6,0,0,0,0,0,0}; /*Input Signal Samples*/
int h[15]={1,2,3,4,5,6,0,0,0,0,0,0}; /*Impulse Response Co-efficients*/
{
y[i]=0;

DSP Lab Manual
for(j=0;j<=i;j++)
y[i]+=x[j]*h[i-j];
}
printf("%d\n",y[i]);
}
Procedure:
 Open code composer studio, make sure the DSP kit is turned on.
 Start a new project using ‘project-new’ pull down menu, save it in a separate directory
(c:\ccstudio\myprojects) with the name ‘file name. pjt’.
 Add the source file of linear convolution to the project using ‘project-add files to
project’ pull down menu.
 Add the linker command file ‘hello. cmd’
(c\ccstudio\tutorials\dsk6713\hello1\hello.cmd)
 Add the run time support library file rts6700.lib
(c\ccstudio\c6000\cgtools\lib\rts6700.lib)
 Compile program using the ‘project-compile’ pull down menu or by clicking the short
cut icon on the left side of program window.
 Build the program using ‘project-build’ pull down menu or by clicking the icon on the
left side of the program window.
 Load the program in program memory of DSP chip using the ‘file-load program’ pull
down menu.
 To view o/p graphically, select View –graph-time and frequency.

DSP Lab Manual
Precautions:
 SwitchON the computer only after connecting USB cable and make sure
the DSP kit is ON.
 Perform the diagnostic check before opening code composer studio.
 All the connections must be tight.
Result: The linear convolution is obtained and the graphs are plotted.
Outcome: Student can able to write and implement linear convolution function on
MATLAB software and DSP processors hardware kit.
VIVA QUESTIONS:
1. What is the purpose of using convolution?

Convolution is a mathematical operation on two functions (f and g); it produces
a third function that is typically viewed as a modified version of one of the
original functions, giving the integral of the pointwise multiplication of the two
functions
2. Give the formula for calculating linear convolution.

g(x) =  f (s)h( x  s)  f ( x) * h( x)
S  
3. What are the properties of linear convolution?

Identity, associative, distributive, commutative
4. What do you understand by linear convolution?
Understanding of signals and convolution, it shows the similarities of two signals

DSP Lab Manual
EXPERIMENT NO: 3
VERIFY CIRCULAR CONVOLUTION

AIM: To compute circular convolution of the two input sequences x[n] and h[n].
EQUIPMENT REQUIRED:
Software - CC Studio V3.1& MATLAB R2010a
THEORY: The circular convolution of two sequences is given as

N 1
y n    xm  hn  m N
m 0
Where hn  mN is a circular shift of h(n).

Algorithm:
Step 1: Enter the sequence x[n].

Step 2: Find the length of sequence (N1).
Step 3: Enter another sequence h[n].
Step 4: Find the length of sequence (N2).
Step 5: Find N = maximum of N1 and N2.
Step 6: if N2>N1, append N2-N1 zeros to x[n].
Step 7: if N1>N2, append N1-N2 zeros to h[n].
Step 8: Fold h[n] and apply circular shift by a number l.
Step 9: Multiply h[n-l] by x[n] and sum all the values to obtain y[n]
Step 10: Repeat the steps 8 & 9 for values of l=N1+N2-1.
Step 11: Plot the output y[n].
Flow chart:

DSP Lab Manual
MATLAB Program :
clc;
clear all;
close all;
disp('circular convolution program');
x=input('enter i/p x(n):');
m=length(x);
h=input('enter i/p sequence h(n)');
n=length(h);
subplot(2,2,1), stem(x);
title('i/p sequencce x(n)is:');
xlabel('---->n');
ylabel('---->x(n)');grid;
subplot(2,2,2), stem(h);
title('i/p sequencce h(n)is:');
xlabel('---->n');
ylabel('---->h(n)');grid;
disp('circular convolution of x(n) & h(n) is y(n):');
if(m-n~=0)
if(m>n)
h=[h,zeros(1,m-n)];
n=m;
end
x=[x,zeros(1,n-m)];
m=n;
end
y=zeros(1,n);
y(1)=0;
a(1)=h(1);
for j=2:n
a(j)=h(n-j+2);
end
%ciruclarconv
for i=1:n
y(1)=y(1)+x(i)*a(i);
end
for k=2:n
y(k)=0;
% circular shift
for j=2:n
x2(j)=a(j-1);
end
x2(1)=a(n);

DSP Lab Manual
for i=1:n
if(i<n+1)
a(i)=x2(i);
y(k)=y(k)+x(i)*a(i);
end
end
end
y
subplot(2,2,[3,4]),stem(y);
title('convolution of x(n) & h(n) is:');
xlabel('---->n');
ylabel('---->y(n)');grid;
PROCEDURE:

OUT PUT WAVE FORM:
Result: circular convolution of two sequences using MATLAB is obtained.

DSP Lab Manual
CIRCULAR CONVOLUTION USING TMS320C6713 KIT
AIM: To implement the circular convolution by using c language.
APPARATUS: DSK 6713 DSP Trainer kit.

USB Cable
Power supply
C Program:
/* prg to implement circular convolution */
#include<stdio.h>
int m,n,x[30],h[30],y[30],i,j,temp[30],k,x2[30],a[30];
void main()
{
printf("enter the length of first seq");
scanf("%d",&m);
printf("enter the length of second seq");
scanf("%d",&n);
printf("enter the first seq");
for(i=0;i<m;i++)
scanf("%d",&x[i]);
printf("enter the second seq");
for(j=0;j<n;j++)
scanf("%d",&h[j]);
if(m-n!=0) /*Iflenght of both sequences are not equal*/
{
if(m>n) /* Pad the smaller sequence with zero*/
{
for(i=n;i<m;i++)
h[i]=0;
n=m;
}
for(i=m;i<n;i++)
x[i]=0;
m=n;
}
y[0]=0;
a[0]=h[0];
for(j=1;j<n;j++) /*folding h(n) to h(-n)*/
a[j]=h[n-j];

DSP Lab Manual
/*Circular convolution*/
for(i=0;i<n;i++)
y[0]+=x[i]*a[i];
for(k=1;k<n;k++)
{
y[k]=0;
/*circular shift*/
for(j=1;j<n;j++)
x2[j]=a[j-1];
x2[0]=a[n-1];
for(i=0;i<n;i++)
{
a[i]=x2[i];
y[k]+=x[i]*x2[i];
}
}
/*displaying the result*/
printf(" the circular convolution is\n");
for(i=0;i<n;i++)
printf("%d \t",y[i]);
Procedure:
(c-ccstudio\c6000\cgtools\lib\rts6700.lib)
down menu.

DSP Lab Manual
Output:-
Enter the length of the first sequence
4
Enter the length of the second sequence
3
Enter the first sequence
1234
Enter the second sequence
123
The circular convolution is
18 16 10 16
OUTPUT WAVEFORM:
Precautions :
 switch ON the computer only after connecting USB cable and make sure
the DSP kit is ON.
Result: The circular convolution is obtained and the graphs are plotted.
Outcome: student can able to write and implement Circular convolution function on
MATLAB software and DSP processors hardware kit.

DSP Lab Manual
VIVA QUESTIONS:
1.What is the different between Circular and Linear convolution?
Linear convolution takes two functions of an independent variable, which I

will call time but where as in Circular convolution is only defined for finite
length functions (usually, maybe always, equal in length), continuous or
discrete in time.
2. What is the function in MATLAB used for padding zeros to a sequence?
Zero padding xZeroPadded = [x zeros(1,512-64)];
3. What is the use of following functions in MATLAB?
i. length( ) ii)max( ) iii)min( )

sequence length calculation, maximum and minimum values of
length
4. Give the steps to get the result of linear convolution from the method
Of circular convolution
Obtain the DFT of both vectors, multiply the DFTs, and obtain the inverse
DFT of the product.
5. What is the circular convolution?
The circular convolution, also known as cyclic convolution, of two aperiodic

functions (i.e. Schwartz functions) occurs when one of them is convolved in the
normal way with a periodic summation of the other function

DSP Lab Manual
EXPERIMENT NO: 4
DESIGN OF FIR FILTER (LP/HP) USING WINDOWING TECHNIQUES
AIM:To design of FIR( LP/HP) filters using rectangular, triangular ,Kaiser window.
Requirements: Computer with MATLAB software

THEORY:
A Finite Impulse Response (FIR) filter is a discrete linear time-invariant systemwhose output
is based on the weighted summation of a finite number of past inputs.An FIR transversal
filter structure can be obtained directly from the equation fordiscrete-time convolution.These
coefficients aregenerated by using FDS (Filter Design Software or Digital filter design
package).FIR – filter is a finite impulse response filter. Order of the filter should be
specified.Infinite response is truncated to get finite impulse response. placing a window
offinite length does this. Types of windows available are Rectangular, Barlett,Hamming,
Hanning, Blackmann window etc. This FIR filter is an all zero filter.
Algorithm:
Step 1: take pass band, stop band and attenuation.
Step 2: find cut off frequency and order of the filter by using functions (in case of MATLAB
use this function) buttord().
Step 3: Calculate the system functions ( a and b coefficients ) using a functions (incase of
MATLAB use this function ) butter(). Specify the type of filter (LPF,HPF or BPF).
Step4: obtain the frequency response using the function freqz().
Step5: plot the output.
Flow chart:1.Rectangular window

DSP Lab Manual
2. hamming window
3. hanning window

DSP Lab Manual
MATLAB PROGRAM1:
% MATLAB program for FIR Filter using windowing Techniques
clc;
clear all;
close all;
rp=input('enter passband ripple');
rs=input('enter the stopband ripple');
fp=input('enter passbandfreq');
fs=input('enter stopbandfreq');
f=input('enter sampling freq ');
wp=2*fp/f;
ws=2*fs/f;
num=-20*log10(sqrt(rp*rs))-13;
dem=14.6*(fs-fp)/f;
n=ceil(num/dem);
n1=n+1;
if(rem(n,2)~=0)
n1=n;
n=n-1;
end
c=input('enter your choice of window function 1. rectangular 2. triangular 3.kaiser: \n ');
if(c==1)
y=rectwin(n1);
disp('Rectangular window filter response');
end
if (c==2)
y=triang(n1);

DSP Lab Manual
disp('Triangular window filter response');
end
if(c==3)
y=kaiser(n1);
disp('kaiser window filter response');
end
%LPF
b=fir1(n,wp,y);
[h,o]=freqz(b,1,256);
m=20*log10(abs(h));
subplot(2,2,1);plot(o/pi,m);
title('LPF');
ylabel('Gain in dB-->');
xlabel('(a) Normalized frequency-->');
%HPF
b=fir1(n,wp,'high',y);
[h,o]=freqz(b,1,256);
m=20*log10(abs(h));
title('HPF');
xlabel('(b) Normalized frequency-->');
%BPF
wn=[wpws];
b=fir1(n,wn,y);
[h,o]=freqz(b,1,256);
m=20*log10(abs(h));
title('BPF');
xlabel('(c) Normalized frequency-->');
%BSF
b=fir1(n,wn,'stop',y);
[h,o]=freqz(b,1,256);
DSP Lab Manual
m=20*log10(abs(h));
title('BSF');
xlabel('(d) Normalized frequency-->');
PROCEDURE:
Result:
Enter Passband Ripple : 0.02
Enter Stopband Ripple : 0.01
Enter Passband Frequency: 1000
Enter Stopband Frequency : 1500
Enter Sampling Frequency : 10000
Outputs:
Graph:
Rectangular Window Filter Response
Rectangular window

DSP Lab Manual
Triangular Window Filter Response
Triangular window
Kaiser Window Filter Response
Kaiser window
MATLAB Program 2(FIR Low Pass Filter):

clc;
clear all;
wc=input('enter the value of cut off frequency');
N=input('enter the value of filter');
alpha=(N-1)/2;
eps=0.001;
%Rectangular Window

DSP Lab Manual
n=0:1:N-1;
hd=sin(wc*(n-alpha+eps))./(pi*(n-alpha+eps));
hn=hd
w=0:0.01:pi;
h=freqz(hn,1,w);
plot(w/pi,abs(h));
hold on
%Hamming Window
n=0:1:N-1;
wh=0.54-0.46*cos((2*pi*n)/(N-1));
hn=hd.*wh
w=0:0.01:pi;
h=freqz(hn,1,w);
plot(w/pi,abs(h),'ms');
hold off;
hold on
%Hanning Window
n=0:1:N-1;
wh=0.5-0.5*cos((2*pi*n)/(N-1));
hn=hd.*wh
w=0:0.01:pi;
h=freqz(hn,1,w);
plot(w/pi,abs(h),'blue');
hold off;
hold on
%Blackman Window
n=0:1:N-1;
wh=0.42-0.5*cos((2*pi*n)/(N-1))+0.08*cos((4*pi*n)/(N-1));
hn=hd.*wh
w=0:0.01:pi;
h=freqz(hn,1,w);
plot(w/pi,abs(h),'green');
hold off;
Graph For Lpf:

DSP Lab Manual
Matlab Program for FIR HIGH PASS FILTER:

clc;
clear all;
wc=input('enter the value of cut off frequency');
N=input('enter the value of filter');
alpha=(N-1)/2;
eps=0.001;
%Rectangular Window
n=0:1:N-1;
hd=(sin(pi*(n-alpha+eps))-sin((n-alpha+eps)*wc))./(pi*(n-alpha+eps));
hn=hd
w=0:0.01:pi;
h=freqz(hn,1,w);
plot(w/pi,abs(h));
hold on
%Hamming Window
n=0:1:N-1;
wh=0.54-0.46*cos((2*pi*n)/(N-1));
hn=hd.*wh
w=0:0.01:pi;
h=freqz(hn,1,w);
plot(w/pi,abs(h),'ms');
hold off;
hold on
%Hanning Window
n=0:1:N-1;
wh=0.5-0.5*cos((2*pi*n)/(N-1));
hn=hd.*wh
w=0:0.01:pi;
h=freqz(hn,1,w);
plot(w/pi,abs(h),'blue');
hold off;
hold on
%Blackman Window
n=0:1:N-1;
wh=0.42-0.5*cos((2*pi*n)/(N-1))-0.08*cos((4*pi*n)/(N-1));
hn=hd.*wh
w=0:0.01:pi;
h=freqz(hn,1,w);
DSP Lab Manual
plot(w/pi,abs(h),'green');
hold off;
Output For High Pass Filter:
enter the value of cut off frequency1.6
enter the value of filter11
Graph For FIR High Pass Filter:
RESULT: Design of FIR( LP/HP) filters using rectangular, triangular ,Kaiser

windowing techniques is performed .
Outcome: Students are able to design FIR filter with various window functions and
observe it frequency and phase response of the filter by using MATLAB software.
VIVAQUESTIONS:
1. What are the uses of function ceil and for?
Rounding the next higher value in the order function
2. Define boxcar
a boxcar function is any function which is zero over the entire real line except
for a single interval where it is equal to a constant
3. Define Kaiser
The Kaiser window is an approximation to the pro late-spheroidal window, for
which the ratio of the main lobe energy to the side lobe energy is maximized
4. Define Bartlett
a window function (also known as an apodization function or tapering function) is
a mathematical that is zero-valued outside of some chosen interval.

DSP Lab Manual
5. What is an FIR system? Compare FIR and IIR system?

a finite impulse response (FIR) filter is a filter whose impulse response (or
response to any finite length input) is of finite duration, because it settles to zero
in finite time. FIR filter consume less power than IIR, FIR is less efficient but IIR
are more efficient, FIR have no analog equivalent but IIR is analog equivalent.
6. What are effects of windowing?
Infinite-duration signal into a finite-duration signal through windowing, implies as
wide a window as possible, high frequency side lobes
7. Explain the process of windowing
Application of a window to a dataset will alter the spectral properties of that dataset.
In a rectangular window, for instance, all the data points outside the window are
truncated and therefore assumed to be zero. The cut-off points at the ends of the
sample will introduce high-frequency components.
8. What is the reason that fir filter is always stable?
FIR filters are always stable i.e. for a finite input, the output is always finite.
9. What are properties of fir filters?
Stable, recursive, more gain.
10. What are the design techniques of designing fir filters?
A desired or ideal response is chosen, usually in the frequency domain. (ii) An
allowed class of filters is chosen (e.g. the length N for a FIR filters). (iii) A measure
of the quality of approximation is chosen. (iv) A method or algorithm is selected to
find the best filter transfer function.

DSP Lab Manual
EXPERIMENT NO: 5
IMPLEMENTATION OF IIR FILTER (LOW PASS & HIGH PASS) ON DSP
PROCESSORS
AIM: To design and implement IIR (LPF/HPF) filters using Butterworth (Analog and digital)
approximation and Cheybshev (Digital) Type-I & II approximations.
EQUIPMENTS:
Operating System – Windows XP
Software - CCStudio V3.1& MATLAB R2011a
Algorithm:
Step4: obtain the frequency response using the function freqz().
Flow chart: 1.Butterworth filter(LPF/HPF)

DSP Lab Manual
C PROGRAM:
//iirfilters
#include<stdio.h>
#include<math.h>
int i,w,wc,c,n;
float h[100];
float mul(float,int);
void main()
{
printf("\n enter order of filter");
scanf("%d",&n);
printf("\n enter the cutoff freq");
scanf("%d",&wc);
printf("\n enter the choice for iir filter 1.lpf 2.hpf");
scanf("%d",&c);
switch(c)
{
case 1:
for(w=0;w<=100;w++)
{
h[w]=1/sqrt(1+mul((w/(float)wc),2*n));
printf("h[%d]=%f\n",w,h[w]);
}
break;
case 2:
for(w=0;w<=100;w++)
{
h[w]=1/sqrt(1+mul((float)wc/w,2*n));
printf("h[%d]=%f\n",w,h[w]);
}
break;
}
}
float mul(float a,int x)
{
for(i=0;i<x-1;i++)
a*=a;
return(a);
}
Result:

DSP Lab Manual
MATLAB PROGRAM(Digital IIR Butterworth Filter):

clc;
close all;
clear all;
format long
rp=input('enter the passband ripple');
rs=input('enter stopband ripple');
wp=input('enter passbandfreq');
ws=input('enter stopbandfreq');
fs=input('enter sampling freq');
w1=2*wp/fs;
w2=2*ws/fs;
DSP Lab Manual
%digital lpf
[n,wn]= buttord(w1,w2,rp,rs);
[b,a]=butter(n,wn);
w=0:.01:pi;
[h,om]=freqz(b,a,w);
m=20*log10(abs(h));
an=angle(h);
subplot(4,2,1);
plot(om/pi,m);
ylabel('gain in db...>');
xlabel('normalised freq..>');
subplot(4,2,2);
plot(om/pi,an);
ylabel('phase in radians...>');
n
wn
%hpf
[n,wn]= buttord(w1,w2,rp,rs);
[b,a]=butter(n,wn,'high');
w=0:.01:pi;
[h,om]=freqz(b,a,w);
m=20*log10(abs(h));
an=angle(h);
subplot(4,2,3);
plot(om/pi,m);
ylabel('gain in db...>');
subplot(4,2,4);
plot(om/pi,an);
n
wn
Input:
Assume:
enter the passband ripple.5
enter stopband ripple50
enter passband freq1200
enter stopband freq2400
enter sampling freq10000

DSP Lab Manual
PROCEDURE:
Output:
n = 8 wn = 0.27304774860912
Waveform:
phase in radians...>
gain in db...> gain in db...> gain in db...>
500 5
0 0
-500 -5
0 0.5 1 0 0.5 1
normalised freq..> normalised freq..>
500 5
0 0
-500 -5
0 0.5 1 0 0.5 1
normalised freq..> phase in radians...> normalised freq..>
0 5
-100 0
-200 -5
0 0.5 1 0 0.5 1
500 5
gain in db...>
0 0
-500 -5
0 0.5 1 0 0.5 1
Result:
Butter worth Digital and analog (low pass & high pass) IIR filters are designed using MATLAB
and Code Composer Studio
Flow chart: 2 Chebyshev filter type-I &II

DSP Lab Manual
MATLAB Program To design Chebyshev type-I and Chebyshev type-II filters ( IIR
digital filters of LPF/HPF)
clc;
close all;
clear all;
alphap=1
alphas=15
wp=0.2*pi;
ws=0.3*pi;
%type1 lpf
%to find cut-off frequency and order
[n,wn]= cheb1ord(wp/pi,ws/pi,alphap,alphas);
%system function
[b,a]=cheby1(n,alphap,wn);
w=0:0.01:pi;
[h,ph]=freqz(b,a,w);
m=20*log10(abs(h));
an=angle(h);
subplot(4,2,1);
plot(ph/pi,m);
grid;ylabel('gain in db...>');
xlabel('(a)normalised freq..>');
subplot(4,2,2);

DSP Lab Manual
plot(ph/pi,an);
grid;xlabel('(b)normalised freq..>');
%type1 hpf
[n,wn]= cheb1ord(wp/pi,ws/pi,alphap,alphas);
%system function
[b,a]=cheby1(n,alphap,wn,'high');
w=0:0.01:pi;
m=20*log10(abs(h));
an=angle(h);
subplot(4,2,3);
plot(ph/pi,m);
subplot(4,2,4);
plot(ph/pi,an);
%type2 lpf
[n,wn]= cheb2ord(wp/pi,ws/pi,alphap,alphas)
%system function
[b,a]= cheby2(n,alphas,wn);
w=0:0.01:pi;
m=20*log10(abs(h));
an=angle(h);
subplot(4,2,5);
plot(ph/pi,m);
subplot(4,2,6);
plot(ph/pi,an);
%type2 hpf
[n,wn]= cheb2ord(wp/pi,ws/pi,alphap,alphas)
%system function
[b,a]= cheby2(n,alphas,wn,'high');
w=0:0.01:pi;

DSP Lab Manual
m=20*log10(abs(h));
an=angle(h);
subplot(4,2,7);
plot(ph/pi,m);
subplot(4,2,8);
plot(ph/pi,an);
ylabel('phase in radians...>')
Input:
alphap = 1
alphas =15
Output:
n= 4
wn = 0.30000000000000
Out Put Wave Forms:

gain in db...>
0 5
-200 0
-400 -5
0 0.5 1 0 0.5 1
(a)normalised freq..> (b)normalised freq..>

gain in db...>
0 5
-200 0
-400 -5
0 0.5 1 0 0.5 1

gain in db...>
100 5
0 0
-100 -5
0 0.5 1 0 0.5 1
0 5
gain in db...>
-50 0
-100 -5
0 0.5 1 0 0.5 1

DSP Lab Manual
Result:
Cheybshev Type-1 and Type-II Digital (low pass & high pass) IIR filters are designed using
MATLAB.
Outcome: After finishing this experiment the students are able to:
1. Able to Implement LP/HP IIR filter for a given frequency and gain
specifications
2. Analyze the frequency and phase response of the filter.
Viva Questions:
1) What are the advantages of IIR filters?
Require fewer coefficients to execute similar filtering operations, that IIR filters work
faster, and require less memory space.
2) Why is the impulse response infinite?
This is in contrast to a finite impulse response(FIR) in which the impulse
response h(t) does become exactly zero at times t > T for some finite T, thus being of
finite duration.
3) What is the alternative to IIR filters?
Recursive filter
4) Compare cheybshev and butter worth filters?
Butterworth filter have maximum pass band flatness is required. Whereas cheybshev
filter will allow ripples in the pass band amplitude response

DSP Lab Manual
EXPERIMENT NO: 6
FIND THE FFT OF 1-D SIGNAL AND PLOT
AIM :To find the FFT of given one dimensional signal and plot its frequency spectrum.
Requirements : Computer with MATLAB software
THEORY:
The Fast Fourier Transform is useful to map the time-domain sequence into a continuous
function of a frequency variable. The FFT of a sequence {x(n)} of length N is given by a
complex-valued sequence X(k).
The above equation is the mathematical representation of the DFT. As the number of
computations involved in transforming a N point time domain signal into its corresponding
frequency domain signal was found to be N2 complex multiplications, an alternative
algorithm involving lesser number of computations is opted. When the sequence x(n) is
divided into 2 sequences and the DFT performed separately, the resulting number of
computations would be N2/2 (i.e.)
Consider x(2n) be the even sample sequences and x(2n+1) be the odd sample sequence
derived form x(n).The time burden created by this large number of computations limits the
usefulness of DFT in many applications. Tremendous efforts devoted to develop more
efficient ways of computing DFT resulted in the above explained Fast Fourier Transform
algorithm. This mathematical shortcut reduces the number of calculations the DFTrequires
drastically. The above mentioned radix-2 decimation in time FFT is employed for domain
transformation. Dividing the DFT into smaller DFTs is the basis of the FFT. A radix-2 FFT
divides the DFT into two smaller DFTs, each of which is divided into smaller DFTs and so
on, resulting in a combination of two-point DFTs. The Decimation -In-Time (DIT) FFT
divides the input (time) sequence into two groups, one of even samples and the other of odd
samples. N/2 point DFT are performed on the these sub-sequences and their outputs are combined
to form the N point DFT.
The above shown mathematical representation forms the basis of N point FFT and is
Called Butterfly Structure.

DSP Lab Manual
Algorithm:
1) Get the input sequence

2) Number of DFT point (m) is 8
3) Find out the FFT function using MATLAB function.
4) Display the input & outputs sequence using stem function

DSP Lab Manual
Flowchart:
MATLAB Program1:
clc;close all;
clear all;
x=input('enter the sequence');
n=input('enter the length of FFT');
a=1:1:n;
y=fft(x,n)
subplot(2,1,1);
stem(y);
ylabel('imaginary axis ..');
xlabel('real axis...');
title('IMG')
grid on;
subplot(2,1,2);
stem(a,y);
title('REAL')
grid on;
x
n

DSP Lab Manual
a
y
Input:
Enter the sequence [1 2 3 4 5 6 7 8]
Enter the length of FFT 8
x= 1 2 3 4 5 6 7 8
n= 8
a= 1 2 3 4 5 6 7 8
Output:
y =Columns 1 through 3
36.0000 -4.0000 + 9.6569i -4.0000 + 4.0000i
Columns 4 through 6
-4.0000 + 1.6569i -4.0000 -4.0000 - 1.6569i
Columns 7 through 8
-4.0000 - 4.0000i -4.0000 - 9.6569i
Wave form:
IMG
10
imaginary axis ..
-5
-10
1 2 3 4 5 6 7 8
real axis...
REAL
40
imaginary axis ..
20
-20
1 2 3 4 5 6 7 8
real axis...
MATLAB Program2:
%To find the FFT of a given 1-D signal and plot
N=input ('enter the length of the sequence=');
M=input ('enter the length of the DFT=');
u=input ('enter the sequence u (n) =');
U=fft (u, M)
A=length (U)
t=0:1: N-1;
subplot (2, 2, 1);
stem (t, u);
title ('ORIGINAL TIME DOMAIN SEQUENCE');
DSP Lab Manual
xlabel ('---->n');
ylabel ('-->Amplitude');
subplot (2, 2, 2);
k=0:1:A-1;
stem (k, abs (U));
disp ('abs (U) =');
disp (abs (U))
title ('MAGNITUDE OF DFT SAMPLES');
xlabel ('---->k');
ylabel ('-->Amplitude');
subplot (2, 1, 2);
stem (k, angle (U));
disp ('angle (U) =')
disp (angle (U))
title ('PHASE OF DFT SAMPLES');
xlabel ('---->k');
ylabel ('-->phase');
Output:
Enter the length of the sequence=3
Enter the length of the DFT=3
Enter the sequence u (n) = [1 2 3]
abs (U) = 6.0000 1.7321 1.7321
angle (U) = 0 2.6180 -2.6180
Graph:

DSP Lab Manual
MATLAB Programto perform Inverse Fast Fourier Transform:

clc;close all;
x=input('enter the sequence');
n=input('enter the length of FFT');
y=ifft(x,n)
stem(y);
grid on;title('ifft');
x
n
y
x = Columns 1 through 4
36.0000 -4.0000 + 9.6569i -4.0000 + 4.0000i -4.0000 + 1.6569i
Columns 5 through 8
-4.0000 -4.0000 - 1.6569i -4.0000 - 4.0000i -4.0000 - 9.6569i
n= 8
y =Columns 1 through 7
1.0000 2.0000 3.0000 4.0000 5.0000 6.0000 7.0000
Column 8
8.0000
ifft
9
6
imaginary axis ..
0
1 2 3 4 5 6 7 8
real axis...
Result: FFT and IFFT of given one dimensional signal is obtained and plotted using
MATLAB.
1.Able to implement FFT of given sequence .
2.Identify the reduction of computations using FFT.

DSP Lab Manual
Viva questions:
1) What are the applications of FFT algorithms?
Video and audio signal processing ,communications, speech and image processing
2) What is meant by radix-2 FFT?
The implementation is based on a well- known algorithm, called the Radix 2 FFT, and
requires that its' input data be an integral power of two in length.
3) What is an FFT radix?
The split-radix FFT is a fast Fourier transform (FFT) algorithm for computing the
discrete Fourier transform (DFT)
4) What are twiddle factors?
A twiddle factor, in fast Fourier transform (FFT) algorithms, is any of the
trigonometric constant coefficients that are multiplied by the data
5) What is an in place FFT?
In-place algorithm is an algorithm which transforms input using no auxiliary data
structure. However a small amount of extra storage space is allowed for auxiliary
variables.
6) What is bit reversal?
Bit reversal is most important for radix-2 FFT algorithms bit reversal of the inputs or
outputs.

DSP Lab Manual
EXPERIMENT NO: 7
SUM OF SINUSOIDL SIGNALS USING MATLAB
AIM: To verify Sum of Sinusoidal Signals using MATLAB.
Requirements: Computer with MATLAB software
EQUIPMENTS:
Software - MATLAB R2010a
Algorithm:
Step 1 : Get the no. of samples for different sinusoids.
Step 2 : Take the input values, number of cycles of all sinusoids
Step 3 : Generate the sinusoids using function sin(x).
Step 4 : Add the generated sinusoidal signals..
Step 5 : Plot the output.
THEORY:
To generate fourier series of a signal by observing sum of sinusoidal signals & observing
gibbs phenomenon effect. Sinusoidal sequence:
X (n) = cos (w 0n + n)
Where is the phase in radians. A MATLAB function cos (or sin) is used to generate
sinusoidal sequences. Signal addition: This is a sample-by-sample addition given by
{X1 (n)} + {x 2(n)} = {x 1(n) + x 2(n)}
It is implemented in Matlab by the arithmetic operator ''+''. However, the lengths of x 1 (n)
and x 2 (n) must be the same. If sequences are of unequal lengths, or if the sample positions
are different for equal length sequences, then we cannot directly use the operator + . We have
to first augment x 1 (n) and x 2 (n) so that they have the same position vector n (and hence
the same length). This requires careful attention to MATLab's indexing operations. In
particular, logical operation of intersection ''&'' relational operations like ''<='' and ''=='' and
the find function are required to make x 1(n) amd x 2 (n) of equal length

DSP Lab Manual
Flow chart:
PROGRAM CODE 1 :
clc;
clear all;
close all;
tic;% of giving linear spaces
t=0:0.01:pi;
%t=linespace(0,pi,20);
% generation of sine signals
y1=sin(t);
y2=sin(3*t)/3;
y3=sin(5*t)/5;
y4=sin(7*t)/7;
y5=sin(9*t)/9;
y=sin(t)+sin(3*t)/3+sin(5*t)/5+sin(7*t)/7+sin(9*t)/9;
plot(t,y,t,y1,t,y2,t,y3,t,y4,t,y5);
legend('y','y1','y2','y3','y4','y5');
title('generation of sum of sinusoidal signals');
grid;
ylabel('--->amplitude');
xlabel('--->t');
toc;
Elapsed time is 1.342418 seconds.

DSP Lab Manual
Graph:
PROGRAM CODE 2:
clc;
Clear all;
Close all;
t=0:0.001:0.1;
f1=50;
x1=2*pi*f1*t;
y1=sin(x1);
figure;
subplot (3,1,1);
plot (t,y1);
title('sin(x1');
f2=100;
x2=2*pi*f2*t;
y2=sin(x2);
subplot(3,1,2);
plot(t,y2);
title('sin(x2)');
y=y1+y2;
subplot(3,1,3);
plot(t,y);
title('sinx1=sinx2')

DSP Lab Manual
PROCEDURE:
Out Put Wave Form:
Result: Thus the MATLAB program for sum of two sinusoidal signals was performed and
the output was verified.
Outcome: By implementing this experiment student will generate a signal with a addition of
two different signals using time and amplitude values.
Viva questions:
1) What is deterministic signal? Give example?

A. Deterministic signals are a special class of stationary signals, and they have a
relatively constant frequency and level content over a long time period. Deterministic
signals are generated by rotating machines, musical instruments, and electronic
function generators.
2) What is energy signal and power signal?
The average power of signal is defined by; A signal can be categorized into energy
signal or power signal: An energy signal has a finite energy, 0 < E < ∞. In other
words, energy signals have values only in the limited time duration. For example,
signal having only one square pulse is energy signal.
3).Define Periodic Signal
A signal is a periodic signal if it completes a pattern within a measurable time frame,

called a period and repeats that pattern over identical subsequent periods. The
completion of a full pattern is called a cycle. A period is defined as the amount of
time (expressed in seconds) required to complete one full cycle.

DSP Lab Manual
EXPERIMENT NO: 8
POWER SPECTRUM DENSITY OF A GIVEN SEQUENCE

AIM: To compute power density spectrum of a given sequence
EQUIPMENTS:
Software - CC Studio V3.1& MATLAB R2010a.
Algorithm:
Step 1 : Clear Command Window
Step 2 : Assign x equal to sum of two sinusoidal signals of size t.
Step 3 : Assign y equal to x + 2* randn(size(t)).
Step 4 : Caliculate fft of y.
Step 5 : Plot the signal corrupted with zero mean random noise.
Step 6 : Calculate Power Density Spectrum at various frequencies.
Step 7 : Plot frequency content of y.
THEORY:
The power spectral density (P.S.D) is a measurement of the energy at various frequencies.
In statistical signal processing the power spectral density is a positive real function of a
frequency variable associated with a stationary stochastic process, or a deterministic
function of time, which has dimensions of power per Hz, or energy per Hz. It is often
called simply the spectrum of the signal. Intuitively, the spectral density captures the
frequency content of a stochastic process and helps identify periodicities. The PSD is the
FT of autocorrelation function, R(τ) of the signal if the signal can be treated as a wide-
sense stationary random process.
PROGRAM CODE:
clc;
clear all;
close all;
t=0:0.001:0.6;
x=sin(2*pi*50*t);
y=x+(2*randn(size(t)));
figure,plot(1000*t(1:50),y(1:50))
title('Signal corrupted with zero mean random noise');
xlabel('time(msec)');
y=fft(y,512);
pyy=y.*conj(y)/512;
f=1000*(0:256)/512;
figure,plot(f,pyy(1:257))

DSP Lab Manual
title('frequency content of y');

xlabel('frequency(hz)');
Graph:
C PROGRAM:
# include <math.h>
#define PTS 64
#define PI 3.14159265358979
typedef struct {float real,imag;}COMPLEX;
void psd1234(COMPLEX *Y, int n);
float iobuffer[PTS];
float x1[PTS],x[PTS];
short i;
short buffercount = 0;
short flag = 0;
COMPLEX w[PTS];
COMPLEX samples[PTS];
main( )
{
float sum=0.0;
int n,k,i;
for (i = 0 ; i<PTS ; i++)
{
w[i].real = cos(2*PI*i/(PTS*2.0));
DSP Lab Manual
w[i].imag =-sin(2*PI*i/(PTS*2.0));
}
/*Input signal X(n) */
for(i=0;i<PTS;i++)
{
x[i] = sin(2*PI*5*i/PTS);
samples[i].real=0.0;
samples[i].imag=0.0;
/*Auto Correlation of X(n)=R(t) */
for(n=0;n<PTS;n++)
{
sum=0;
for(k=0;k<PTS-n;k++)
{
sum=sum+(x[k]*x[n+k]);
}
iobuffer[n] = sum;
}
/*FFT of R(t) */
for(i = 0 ; i < PTS ; i++)

{
samples[i].real=iobuffer[i];
}
for(i = 0 ; i < PTS ; i++)

samples[i].imag = 0.0;
psd1234(samples,PTS);
/*Power Spectral Density */
for (i = 0 ; i < PTS ; i++)

{
x1[i] = sqrt(samples[i].real*samples[i].real
+samples[i].imag*samples[i].imag);
}

DSP Lab Manual
FFT SUBPROGRAM (FFT.C):

#include<math.h>
#define PTS 64
typedef struct {float real,imag;}COMPLEX;
extern COMPLEX w[PTS];
void psd1234(COMPLEX *Y, int N)

{
COMPLEX temp1,temp2;
int i,j,k;
int upper_leg, lower_leg;
int leg_diff;
int num_stages = 0;
int index, step;
i = 1;
do
{
num_stages += 1;
i= i*2;
}
while (i!=N);
leg_diff = N/2;
step = (PTS*2)/N;
for (i= 0;i < num_stages; i++)

{
index = 0;
for (j=0;j<leg_diff;j++)
{
for( upper_leg = j; upper_leg < N; upper_leg += (2*leg_diff))
{
lower_leg = upper_leg+leg_diff;
temp1.real = (Y[upper_leg]).real + (Y[lower_leg]).real;
temp1.imag = (Y[upper_leg]).imag + (Y[lower_leg]).imag;
temp2.real = (Y[upper_leg]).real - (Y[lower_leg]).real;
temp2.imag = (Y[upper_leg]).imag - (Y[lower_leg]).imag;
(Y[lower_leg]).real = temp2.real*(w[index]).real
-temp2.imag*(w[index]).imag;
(Y[lower_leg]).imag = temp2.real*(w[index]).imag
+temp2.imag*(w[index]).real;
(Y[upper_leg]).real = temp1.real;
(Y[upper_leg]).imag = temp1.imag;
}
index += step;
}
leg_diff = leg_diff/2;
step *= 2;

DSP Lab Manual
}
j = 0;
for (i= 1 ; i< (N-1 ); i++)
{
k = N/2;
while (k <= j)
{
j = j - k;
k = k/2;
}
j = j + k;
if (i<j)
{
temp1.real = (Y[j]).real;
temp1.imag = (Y[j]).imag;
(Y[j]).real = (Y[i]).real;
(Y[j]).imag = (Y[i]).imag;
(Y[i]).real = temp1.real;
(Y[i]).imag = temp1.imag;
}
}
return;
}
Procedure:
down menu.
Input:

DSP Lab Manual
Output:

DSP Lab Manual
Precautions:
 Switch ON the computer only after connecting USB cable and make sure
the DSP kit is ON.
Result: The power density spectrum is obtained and the graphs are plotted.
Outcome: At the end of the experiment the students are able to find the power spectral
density of given sequence.
Viva questions:
1. Define power spectral Density?

The power spectral density (PSD) of the signal describes the power present in the
signal as a function of frequency, per unit frequency. ... Sometimes one encounters an
amplitude spectral density (ASD), which is the square root of the PSD; the ASD of a
voltage signal has units of V Hz−1/2.
2. What is the need for spectral estimation?

Spectral density estimation (SDE) is to estimate thespectral density (also known as the
power spectral density) of a random signal from a sequence of time samples of the
signal. Intuitively speaking, the spectral density characterizes the frequency content of
the signal.
3. What is the relation between auto correlation & spectral density?

DSP Lab Manual
 R ( )e
T
 j 2ft
Sx ( f )  x dt
T
4. Give the estimation of auto correlation function & power density for random Signals?
The PSD is the Fourier transform of the auto-correlation function.
5. Explain power spectrum estimation using the Bartlett window?
The periodogram is therefore the convolution of the true spectral density and the
Fourier transform of the Bartlett window, resulting in a smoothing operation, and the
introduction of Gibbs effect ripple adjacent to transitions in the spectrum
6. Give the formula for PSD?
T
T Rx ( )e
 j 2ft
Sx ( f )  dt
Rx ( )  Ex(t ) x * (t   )

DSP Lab Manual
EXPERIMENT NO: 9
N-Point FFT Algorithm
AIM: To find the N-point FFT of a given signal.
EQUIPMENTS:
Software - CC Studio V3.1
THEORY:
A fast Fourier transform (FFT) is an efficient algorithm to compute the discrete
Fourier transform (DFT) and its inverse. FFTs are of great importance to a wide variety of
applications, from digital signal processing and solving partial differential equations to
algorithms for quick multiplication of large integers. Evaluating the sums of DFT directly
would take O(N 2) arithmetical operations. An FFT is an algorithm to compute the same
result in only O(N log N) operations. In general, such algorithms depend upon the
factorization of N, but there are FFTs with O(N log N) complexity for all N, even for prime N.
Since the inverse DFT is the same as the DFT, but with the opposite sign in the exponent and
a 1/N factor, any FFT algorithm can easily be adapted for it as well.
The Fast Fourier transform is a highly efficient procedure for computing the DFT of a finite
series and requires less no of computations than that of direct evaluation of DFT. It reduces
the computations by taking the advantage of the fact that the calculation of the coefficients of
the DFT can be carried out iteratively. Due to this, FFT computation technique is used in
digital spectral analysis, filter simulation, autocorrelation and pattern recognition. The FFT is
based on decomposition and breaking the transform into smaller transforms and combining
them to get the total transform. FFT reduces the computation time required to compute a
discrete Fourier transform and improves the performance by a factor 100 or more over direct
evaluation of the DFT. The fast fourier transform algorithms exploit the two basic properties
of the twiddle factor (symmetry property: w N k N w N k, periodicity property: w N k N w N
k) and reduces the number of complex multiplications required to perform DFT from to N/2 .
In other words, for N=1024, this implies about 5000 instead of 10 multiplications - a
reduction factor of 200. FFT algorithms are based on the fundamental principal of
decomposing the computation of discrete fourier transform of a sequence of length N into
successively smaller discrete fourier transform of a sequence of length N into successively
smaller discrete fourier transforms. There are basically two classes of FFT algorithms. They
are decimation-in-time and decimation-in-frequency. In decimation-in-time, the sequence for
which we need the DFT is successively divided into smaller sequences and the DFTs of
these subsequences are combined in a certain pattern to obtain the required DFT of the entire
sequence. In the decimation-in-frequency approach, the frequency samples of the DFT are
decomposed into smaller and smaller subsequences in a similar manner.
Radix - 2 DIT - FFT algorithm
1. The number of input samples N=2 M , where, M is an integer.
2. The input sequence is shuffled through bit-reversal.

DSP Lab Manual
3. The number of stages in the flow graph is given by M=log 2 N.

4. Each stage consists of N/2 butterflies.
5. Inputs/outputs for each butterfly are separated by 2m-1 samples, where m
represents the stage index, i.e., for first stage m=1 and for second stage m=2 so on.
6. The no of complex multiplications is given by N/2 log 2 N.
7. The no of complex additions is given by N log 2 N.
8. The twiddle factor exponents are a function of the stage index m and is given
by k1. 2
9. The no of sets or sections of butterflies in each stage is given by the formula
2 M-m.
10. The exponent repeat factor (ERF), which is the number of times the exponent
associated with m is repeated is given by 2 M-n
Radix - 2 DIF - FFT Algorithm
11. The number of input samples N=2 , where M is number of stages.
12. The input sequence is in natural order.
13. The number of stages in the flow graph is given by M=log 2 N.
14. Each stage consists of N/2 butterflies.
15. Inputs/outputs for each butterfly are separated by 2 M-n samples, Where m
represents the stage index i.e., for first stage m=1 and for second stage m=2 so on.
16. The number of complex multiplications is given by N/2 log 2 N.
17. The number of complex additions is given by N log 2 N.
18. The twiddle factor exponents are a function of the stage index m
19. The number of sets or sections of butterflies in each stage is given by the
formula 2m-1.
20. The exponent repeat factor (ERF),Which is the number of times the exponent
sequence associated with m repeated is given by 2 m-1.
C PROGRAM:
/*FFT256c.cFFT implementation calling a C-coded FFT function*/
#include<math.h>
#define PTS 128
typedef struct {float real,imag; }COMPLEX;
extern COMPLEX w[PTS];
void FFT(COMPLEX *Y, int N)

{
COMPLEX temp1,temp2;
int i,j,k;
int upper_leg, lower_leg;
int leg_diff;
int num_stages = 0;
int index, step;
i = 1;
do
{

DSP Lab Manual
num_stages += 1;
i= i*2;
}
while (i!=N);
leg_diff = N/2;
step = (PTS*2)/N;
for (i= 0;i < num_stages; i++)

{
index = 0;
for (j = 0; j < leg_diff; j++)
{
{
temp2.real = (Y[upper_leg]).real - (Y[lower_leg]).real;
temp2.imag = (Y[upper_leg]).imag - (Y[lower_leg]).imag;
}
index += step;
}
step *= 2;
}
j = 0;
for (i= 1 ; i< (N-1 ); i++)
{
k = N/2;
while (k <= j)
{
j = j - k;
k = k/2;
}
j = j + k;
if (i<j)
{

DSP Lab Manual
(Y[i]).imag = temp1.imag;
}
}
return;
} /*end of main*/
FFT SUBPROGRAM (FFT.C):
#define PTS 64 /*number of points for FFT*/

typedefstruct {float real,imag; }COMPLEX;
extern COMPLEX w[PTS]; /*twiddle constants stored in w*/
void FFT(COMPLEX Y, int N) /*input sample array, # of points*/

{
COMPLEX temp1,temp2; /*Temporary storage variables*/
inti,j,k; /*loop counter variables */
intupper_leg, lower_leg; /*index of upper/lower butterfly leg*/
intleg_diff; /*difference between upper/lower leg */
intnum_stages = 0; /* number of FFT stages (iterations) */
int index, step; /*index/step through twiddle constant */
i = 1; /* log(base2) of N points= # of stages */
do
{
num_stages += 1;
i= i*2;
}
while (i! = N);
leg_diff = N/2; /* difference between upper & lower legs*/
step = (PTS*2)/N; /* step between values in twiddle.h */
for (i= 0;i <num_stages; i++) /*for N-point FFT*/

{
index = 0;
for (j = 0; j <leg_diff; j++)
{
{
temp2.real = (Y[upper_leg]).real – (y[lower_leg]).real;
DSP Lab Manual
temp2.imag = (Y[upper_leg]).imag – (Y[lower_leg]).imag;
}
index += step;
}
step *= 2;
}
j = 0;
for (i= 1 ; i< (N-1 ); i++) /*bit reversal for resequencing data*/
{
k = N/2;
while (k <= j)
{
j = j – k;
k = k/2;
}
j = j + k;
if (i<j)
{
(Y(i]).imag = temp1.imag;
}
}
return;
}
Procedure:

DSP Lab Manual
down menu.
Input:

DSP Lab Manual
Output:
Precautions :
 switch ON the computer only after connecting USB cable and make sure
the DSP kit is ON.
Result: The N-point FFT is obtained and the graphs are plotted.
1. Able to Implement FFT of given sequence on DSP processor hardware kit.
2. Identify the reduction of computations using FFT algorithm.

DSP Lab Manual
Viva questions:
1. What is the need for FFT algorithm?
FFT algorithm is used to compute DFT with less number of computations
2. Why FFT is called so?
It reduces the number of computations.
3.what is the main advantage of FFT calculate the number of multiplications needed in the
calculation of DFT using FFT algorithm with 32 point sequence?
The DFT takes N^2 operations for N points. Since at any stage the computation required to
combine smaller DFTs into larger DFTs is proportional to N, and there are log2(N) stages
(for radix 2), the total computation is proportional to N * log2(N). Therefore, the ratio
between a DFT computation and an FFT computation for the same N is proportional to N /
log2(n). In cases where N is small this ratio is not very significant, but when N becomes
large, this ratio gets very large. (Every time you double N, the numerator doubles, but the
denominator only increases by 1.)
4. What is an FFT “radix”?

The “radix” is the size of an FFT decomposition. In the example above, the radix was 2. For
single-radix FFTs, the transform size must be a power of the radix. In the example above, the
size was 32, which is 2 to the 5th power.
5. What are “twiddle factors”?

“Twiddle factors” are the coefficients used to combine results from a previous stage to
form inputs to the next stage.
6. What is an “in place” FFT?

An “in place” FFT is simply an FFT that is calculated entirely inside its original sample
memory. In other words, calculating an “in place” FFT does not require additional buffer
memory (as some FFTs do.)
7. What is “bit reversal”?

“Bit reversal” is just what it sounds like: reversing the bits in a binary word from left to right.
Therefore the MSBs become LSBs and the LSBs become MSBs. But what does that have to
do with FFTs? Well, the data ordering required by radix-2 FFTs turns out to be in “bit
reversed” order, so bit-reversed indexes are used to combine FFT stages. It is possible
(but slow) to calculate these bit-reversed indices in software; however, bit reversals are trivial
when implemented in hardware. Therefore, almost all DSP processors include a hardware bit-
reversal indexing capability (which is one of the things that distinguishes them from other
microprocessors.)
8. What is “decimation-in-time” versus “decimation-in-frequency”?

FFTs can be decomposed using DFTs of even and odd points, which is called a Decimation-
In-Time (DIT) FFT, or they can be decomposed using a first-half/second-half approach,
which is called a “Decimation-In-Frequency” (DIF) FFT. Generally, the user does not need to
worry which type is being used.

DSP Lab Manual
EXPERIMENT NO: 10
MATLAB Program to find the frequency response of Analog (LP/HP)
Filters
AIM: To find the frequency response of analog LPF & HPF using MATLAB.
EQUIPMENTS:
Software - MATLAB R2010a.
Algorithm:
Step4: obtain the frequency response using the function freqs().
THEORY:
Analog Low pass filter & High pass filter are obtained by using butterworth or chebyshev
filter with coefficients are given. The frequency – magnitude plot gives the frequency
response of the filter.
Flow Chart:

DSP Lab Manual
PROGRAM 1:
clc;
clear all;
close all;
disp('Enter the specification of analog filter');
rp=input('Enter pass band Ripples');
rs=input('Enter stop band ripples');
fp=input('Enter pass band frequency');
fs=input('Enter stop band frequency');
f=input('Enter sampling frequency');
w1=2*fp/f;
w2=2*fs/f;
[n,wn]=buttord(w1,w2,rp,rs,'s');
c=input('Enter the choice of filter 1.LPF 2.HPF');
if(c==1)
disp('frequency response of analog LPF is');
[b,a]=butter(n,wn,'low','s');
end;
if(c==2)
disp('frequency response of analog HPF is');
[b,a]=butter(n,wn,'high','s');
end;
w=0:.01:pi;
[h,om]=freqs(b,a,w);
m=20*log10(abs(h))
an=angle(h);
subplot(2,1,1);
plot(om/pi,m);
title('magnitude response of analog filter is');
xlabel('(a) normalized frequency--->');
ylabel('gain in dB--->');
subplot(2,1,2);
plot(om/pi,an);
title('phase response of analog filter is');
xlabel('normalized frequency--->');
ylabel('phase in radians--->');
Output:
Enter the specification of analog filter
Enter pass band Ripples 0.15
Enter stop band ripples 60
Enter pass band frequency 500
Enter stop band frequency 3000

DSP Lab Manual
Enter sampling frequency 7000

Enter the choice of filter 1.LPF 2.HPF 1
frequency response of analog LPF is
Analog Low Pass Filter Graph:
Output:
Enter the specification of analog filter

Enter pass band Ripples 0.15
Enter stop band ripples 60
Enter pass band frequency 500
Enter stop band frequency 3000
Enter sampling frequency 7000
Enter the choice of filter 1.LPF 2.HPF 2
frequency response of analog HPF is

DSP Lab Manual
Analog High Pass Filter Graph:
PROGRAM 2(Analog Low Pass Filter):-

clc;
close all;
clear all;
f=100:20:8000;
fh=900;
k=length(f);
for i=1:k;
m(i)=1/sqrt(1+(f(i)/fh)^2);
mag(i)=20*log10(m(i));
end;
figure;
semilogx(f,mag);
title('magnitude response of analog of low pass filter')
xlabel('frequency----->');
ylabel('magnitude in db');
grid on;

DSP Lab Manual
Output:-
PROGRAM 3 (Analog High Pass Filter):-
clc;
close all;
clear all;
f=100:20:8000;
fl=400;
k=length(f);
for i=1:k;
m(i)=1/sqrt(1+(fl/f(i))^2);
mag(i)=20*log10(m(i));
end;
figure;
semilogx(f,mag);
title('magnitude response of analog of high pass filter');
xlabel('frequency----->');
ylabel('magnitude in db');
grid on;

DSP Lab Manual
Output:
Result: Thus the MATLAB programs for analog low pass and high pass filters were written
and magnitude responses also plotted.
Outcome:
After finishing this experiment the students are able to:
1. Able to implement analog LP/HP filter for a given sequence
2. Calculate the filter coefficients.
Viva questions:
1) Give any two properties of Butterworth low pass filter?
 Monotonic amplitude response in both pass band and stop band.
 Quick roll-off around the cutoff frequency, which improves with increasing
order.
 Considerable overshoot and ringing in step response, which worsens with
increasing order.
 Slightly non-linear phase response.
2) How one can design digital filters from analog filters?
A digital filter with infinite impulse response (IIR), can be designed by first transforming it
into a prototype analog filter and then design this analog filter using a standard procedure.
DSP Lab Manual
Once the analog filter is properly designed, it is then mapped back to the discrete-time
domain to obtain a digital filter that meets the specifications. The commonly used analog
filters are 1. Butterworth filters – no ripples at all, 2. Cheybshev filters - ripples in the pass
band OR in the stop band, and 3. Elliptical filters - ripples in BOTH the pass and stop bands.
The design of these filters is well documented in the literature. A disadvantage of IIR filters
is that they usually have nonlinear phase. Some minor signal distortion is a result. · There are
two main techniques used to design IIR filters: 1. The Impulse Invariant method, and 2. The
Bilinear transformation method.
3) What are the properties of cheybshev filter?
Cheybshev filters are analog or digital filters having a steeper roll-off and more pass band
ripple than Butterworth filters. Cheybshev filters have the property that they minimize the
error between the idealized filter characteristic and the actual over the range of the filter, but
with ripples in the pass band. This type of filters is named in honor of Pafnuty Cheybshev
because their mathematical characteristics are derived from Cheybshev polynomials.
4) What is the difference between cheybshev and Butterworth filters?
Butterworth: Flattest pass-band but a poor roll-off rate. Cheybshev: Some pass-band ripple
but a better (steeper) roll-off rate

DSP Lab Manual
EXPERIMENT-11
Verify Down Sampling and Up Sampling by a Factor 20.
PROGRAM TO VERIFY DECIMATION (Down Sampling)
AIM: To verify Decimation and Interpolation of a given Sequences
SOFTWARE REQUIRED: MAT LAB 7.0
PROGRAM DESCRIPTION: The sampling rate alteration that is employed to generate a

new sequence with a sampling rate lower than that of a given sequence. Thus, if x[n] is a
sequence with a sampling rate of FT Hz and it is used to generate another sequence y[n] with
a desired sampling rate of FT' Hz, then the sampling rate alteration ratio is given by FT'/ FT =
R.
If R < 1, the sampling rate is decreased by a process called decimation and it results in a
sequence with a lower sampling rate.
The decimation can be carried out by using the pre-defined commands decimate.
Flow chart:
PROGRAM CODE:
% DECIMATION
clc;
clear all;
close all;
disp('Let us take a sinusoidal sequence which has to be decimated: ');

DSP Lab Manual
fm=input('Enter the signal frequency fm: ');

fs=input('Enetr the sampling frequnecy fs: ');
T=input('Enter the duration of the signal in seconds T: ');
dt=1/fs;
t=dt:dt:T
M=length(t);
m=cos(2*pi*fm*t);
r=input('Enter the factor by which the sampling frequency has to be reduced r: ');
md=decimate(m,r);
figure(1);
subplot(3,1,1);
plot(t,m);
grid;
xlabel('t-->');
ylabel('Amplitude-->');
title('Sinusoidal signal before sampling');
subplot(3,1,2);
stem(m);
grid;
xlabel('n-->');
ylabel('Amplitudes of m -->');
title('Sinusoidal signal after sampling before decimation');
subplot(3,1,3);
stem(md);
grid;
title('Sinusoidal after decimation');
xlabel('n/r-->');
ylabel('Amplitude of md-->');
Output:
Let us take a sinusoidal sequence which has to be decimated:
Enter the signal frequency fm: 2
Enetr the sampling frequnecy fs: 100
Enter the duration of the signal in seconds T: 1
Enter the factor by which the sampling frequency has to be reduced r: 2

DSP Lab Manual
Graphs:
Sinusoidal signal before sampling

Amplitude--> 1
-1
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t-->
Amplitudes of m -->
Sinusoidal signal after sampling before decimation

1
-1
0 10 20 30 40 50 60 70 80 90 100
n-->
Amplitude of md-->
Sinusoidal after decimation

1
-1
0 5 10 15 20 25 30 35 40 45 50
n/r-->
Inference: The only constraint about the program is that the factors of decimation or
interpolation should be integers. If we want to change the sampling frequency by a factor
which is not an integer it can be done by using the command resample by which we can
change the sampling rate by a factor I / D. For this we have to interpolate by an integer factor
I and then decimate by an integer factor D
Result: The Decimation of given sequences is verified and graphs are plotted.
PROGRAM TO VERIFY INTERPOLATION
AIM: To verify Interpolation of a given Sequence.
SOFTWARE REQUIRED: MAT LAB 7.12.0
PROGRAM DESCRIPTION: The sampling rate alteration that is employed to generate a

new sequence with a sampling rate higher than that of a given sequence. Thus, if x[n] is a
sequence with a sampling rate of FT Hz and it is used to generate another sequence y[n] with
a desired sampling rate of FT' Hz, then the sampling rate alteration ratio is given by FT' / FT =
R.
If R > 1, the process is called interpolation and results in a sequence with a higher sampling
rate.
The interpolation can be carried out by using the pre-defined command interp respectively.

DSP Lab Manual
Flow Chart:
PROGRAM CODE:
%INTERPOLATION
clc;
clear all;
close all;
disp('Let us take a sinusoidal sequence which has to be interpolated: ');
fm=input('Enter the signal frequency fm: ');
fs=input('Enetr the sampling frequnecy fs: ');
T=input('Enter the duration of the signal in seconds T: ');
dt=1/fs;
t=dt:dt:T
M=length(t);
m=cos(2*pi*fm*t);
r=input('Enter the factor by which the sampling frequency has to be increased r: ');
md=interp(m,r);
figure(1);
subplot(3,1,1);
plot(t,m);
grid;
xlabel('t-->');
ylabel('Amplitude-->');
title('Sinusoidal signal before sampling');
subplot(3,1,2);
stem(m);
grid;
xlabel('n-->');

DSP Lab Manual
ylabel('Amplitudes of m -->');
title('Sinusoidal signal after sampling before interpolation');
subplot(3,1,3);
stem(md);
grid;
title('Sinusoidal after interpolation');
xlabel('n x r-->');
ylabel('Amplitude of md-->');
Output:
Let us take a sinusoidal sequence which has to be interpolated:
Enter the signal frequency fm: 2
Enetr the sampling frequnecy fs: 100
Enter the duration of the signal in seconds T: 1
Enter the factor by which the sampling frequency has to be increased r: 2
Graphs:
Sinusoidal signal before sampling

1
Amplitude-->
-1
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t-->
Amplitude of md--> Amplitudes of m -->
Sinusoidal signal after sampling before interpolation

1
-1
0 10 20 30 40 50 60 70 80 90 100
n-->
Sinusoidal after interpolation
2
-2
0 20 40 60 80 100 120 140 160 180 200
n x r-->
Result: The Interpolation of given sequences is verified and graphs are plotted.
Outcome: Student able to simulate decimation and interpolation of a given signal
Viva questions:
1. What is down sampling?
"Down sampling" is a process of removing some samples, without the low pass filtering. A
signal is down sampled only when it is "oversampled"(i.e. sampling rate > Nyquist rate).
2. What is up sampling?
"Up sampling" is the process of inserting zero-valued samples between original samples to
increase the sampling rate. (This is called "zero-stuffing"). Given a sequence x[n]
3. Define sampling.
Sampling is the process which converts analog signal to discrete time signal.

DSP Lab Manual
4. What is sampling rate conversion?

Sample-rate conversion is the process of changing the sampling rate of a discrete signal to
obtain a new discrete representation of the underlying continuous signal. Application areas
include image scaling, and audio/visual systems, where different sampling-rates may be used
for engineering, economic, or historical reasons.

DSP Lab Manual
EXPERIMENT-12
Generation of AM & FM
AIM: -. To write a MATLAB program to generate amplitude modulated and frequency
modulated signals.
SOFTWARE REQURIED :
MATLAB R2010a(7.1 Versions).
PROCEDURE:-
 Open MATLAB Software
 Open new M-file
 Type the program
 Save in current directory
 Run the program
 For the output see command window\ Figure window.
Algorithm
Step:1 enter the amplitude of the message signals
Step: 2 enter the amplitude of the carrier signals
Step:3 Calculate the modulation index
Step:4 plot the waveforms
Flow chart:

DSP Lab Manual
MATLAB Program for Amplitude Modulation:
clc;
clear all;
close all;
t=0:0.001:0.5;
am=1;
ac=2;
fm=10;
fc=100;
wc1=2*pi*fm;
wc2=2*pi*fc;
k=am/ac;
ct=ac*sin(wc2*t);
mt=am*sin(wc1*t);
s=(1+k*mt).*ct;
subplot(4,1,1);
plot(t,mt);
xlabel('---->Time period');
ylabel('---->Amplitude');
title('MODULATING SIGNAL');
subplot(4,1,2);
plot(t,ct);
title('CARRIER SIGNAL');
subplot(4,1,3);
plot(t,s,t,ac+mt,t,-ac-mt);
DSP Lab Manual
title('MODULATING SIGNAL WITH ENVELOPE');
subplot(4,1,4);
s2=(1/pi)*(ac+mt);
plot(t,mt,t,s2);
title('DEMODULATING SIGNAL');
MATLAB Program for Frequency Modulation:
clc;
clear all;
close all;
t=0:0.001:2;
am=0.1;
ac=0.2;
fm=2;
fc=10;
wc1=2*pi*fm;
wc2=2*pi*fc;
k=am/ac;
ct=ac*cos(wc2*t);
mt=am*cos(wc1*t);
s=ac*cos(wc2*t+k*sin(wc1*t));
subplot(4,1,1);
plot(t,mt);
DSP Lab Manual
title('MODULATING SIGNAL');
subplot(4,1,2);
plot(t,ct);
title('CARRIER SIGNAL');
subplot(4,1,3);
plot(t,s,t,mt);
title('MODULATING SIGNAL W.R.T TO MESSAGE SIGNAL');
subplot(4,1,4);
s2=ac*(wc2+k*mt);
plot(t,s2);
title('DEMODULATING SIGNAL');

DSP Lab Manual
Model Graph: AM
Model Graph: FM
Result: The amplitude modulated and frequency modulated waves are generated by using
MATLAB software.

DSP Lab Manual
Outcome: Student able to simulate amplitude modulation and frequency modulation of a

given signal
Viva questions:
1. What is AM?
Amplitude modulation (AM): modulation in which the amplitude of a carrier wave is varied
in accordance with some characteristic of the modulating signal
2. What is FM?
Frequency modulation (FM): modulation in which the frequency of a carrier wave is varied in
accordance with some characteristic of the modulating signal
3. Define modulation index.
The modulation index (or modulation depth) of a modulation scheme describes by how much
the modulated variable of the carrier signal varies around its unmodulated level. It
is defined differently in each modulation scheme.
4. What is base band signal?
Baseband refers to the original frequency range of a transmission signal before it is

converted, or modulated, to a different frequency range. For example, an audio signal may
have a baseband range from 20 to 20,000 hertz.

DSP Lab Manual
EXPERIMENT-13(a)
ZEROS AND POLES IN S- PLANE
AIM: -.To Write a MATLAB program to draw Pole-Zero map in S-Plane
SOFTWARE REQURIED :
MATLAB R2010a(7.1 Versions).
PROCEDURE:-
 Open new M-file
 Run the program
Algorithm
Step:1enter the numerator and denominator polynomial vector
Step: 2 Calculate the transfer function
Step:3 Determine the poles and zeros of the system
Step:4 Check if all the poles are located left hand side of the S-plane
Step: 5: Then say that the given LTI system is stable
Step:6: Otherwise the system is unstable.
Flow chart:
PROGRAM CODE:-
clc; clear all; close all;
num=input('enter the numerator polynomial vector\n'); % [1 -2 1]
den=input('enter the denominator polynomial vector\n'); % [1 6 11 6]
H=tf(num,den)
DSP Lab Manual
[p z]=pzmap(H);
disp('zeros are at ');
disp(z);
disp('poles are at ');
disp(p);
pzmap(H);
if max(real(p))>=0
disp(' All the poles do not lie in the left half of S-plane ');
disp(' the given LTI systen is not a stable system ');
else
disp('All the poles lie in the left half of S-plane ');
disp(' the given LTI systen is a stable system ');
end;
Results: - Thus the MATLAB program to draw pole-zero map in S-plane is successfully
completed.
Output:-
Enter the numerator polynomial vector = [1 -2 1]
Enter the denominator polynomial vector [1 6 11 6]
Transfer function:
s^2 - 2 s + 1
----------------------
s^3 + 6 s^2 + 11 s + 6
Zeros are at
1
1
Poles are at
-3.0000
-2.0000
-1.0000
All the poles lie in the left half of S-plane
The given LTI system is a stable system

DSP Lab Manual
EXPERIMENT-13(b)
ZEROS AND POLES IN Z- PLANE
AIM: -. To Write a MATLAB program to draw Pole-Zero map in Z-Plane
SOFTWARE REQURIED :-
MATLAB R2010a (7.1 Version)
PROCEDURE:-

 Open new M-file
 Run the program
Algorithm:
Step:1enter the numerator and denominator polynomial vector
Step: 2 Calculate the transfer function
Step:3 Determine the poles and zeros of the system
Step:4 Check if all the poles are inside the unit circle of the Z-plane.

DSP Lab Manual
Step: 5: Then say that the given LTI system is stable
Step:6:Otherwise the system is unstable.
PROGRAM CODE:-
clc; clear all; close all;

num=input('enter the numerator polynomial vector \n'); %[1 0 0]
den=input('enter the denominator polynomial vector \n');%[1 1 0.16]
H=filt(num,den)
z=zero(H);
disp('the zeros are at ');
disp(z);
[r p k]=residuez(num,den);
disp('the poles are at ');
disp(p);
zplane(num,den);
title('Pole-Zero map in the Z-plane');
if max(abs(p))>=1
disp('all the poles do not lie with in the unit circle');
disp('hence the system is not stable');
else
disp('all the poles lie with in the unit circle');
disp('hence the system is stable');
end;
Output:
Enter the numerator polynomial vector
[1 0 0]
Enter the denominator polynomial vector
[1 1 0.16]
Transfer function:
1
--------------------
1 + z^-1 + 0.16 z^-2
The zeros are at
0
0
The poles are at
-0.8000
-0.2000
All the poles lie with in the unit circle
Hence the system is stable

DSP Lab Manual
Result: - Thus the MATLAB program to draw pole-zero map in S-plane is successfully
completed.
Outcome: Student can able to draw the pole-zero plots for Z-plane and S-Plane
Viva questions:
1) What do you mean by S-plane?

The s-plane is the complex plane on which Laplace transforms are graphed.
2) Explain the difference between Z transform and S transform
The Laplace transforms is continuous (integral) transforms of continuous functions.
The Laplace transform maps a function f(t) to a function F(s) of the complex variable
s, where s=σ+jω
The Z transform is essentially a discrete version of the Laplace transform and, thus,
can be useful in solving difference equations, the discrete version
of differential equations. The Z transform maps a sequence f[n] to a continuous
function F(z) of the complex variable z=rejΩ
3) What is transfer function?
A Transfer Function is the ratio of the output of a system to the input of a system, in
the Laplace domain considering its initial conditions and equilibrium point to be zero.
This assumption is relaxed for systems observing transience. If we have an input
function of X(s), and an output function Y(s), we define the transfer function H(s) to
be:
4) What are the properties of ROC?
“Region of Convergence “in an S-Complex Plane. The ROC of the Laplace
Transform is always determined by the Re(s). The ROC in general gives us an idea of
the stability of a system and is also a representation of the poles-zero plot of a system.
It is essential to note that the ROC never includes poles.

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LENDI INSTITUTE OF ENGINEERING AND TECHNOLOGY

(Approved by A.I.C.T.E & Affiliated to JNTU, Kakinada)

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

DSP LABORATORY MANUAL

Accredited by NAAC with ’A’ grade

Department of Electronics & Communication Engineering

Digital Signal Processing Laboratory

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

DSP LABORATORY MANUAL

(Approved by A.I.C.T.E & Affiliated to JNTU,Kakinada)

PROGRAM EDUCATIONAL OBJECTIVES (PEOs)

PROGRAM OUTCOMES (POs)

4. Conduct investigations of complex problems: Use research-based knowledge and

7. Environment and sustainability: Understand the impact of the professional engineering

9. Individual and team work: Function effectively as an individual, and as a member or

10. Communication: Communicate effectively on complex engineering activities with the

PROGRAM SPECIFIC OUTCOMES (PSOs)

DIGITAL SIGNAL PROCESSING LAB

2. To verify linear convolution.

3. To verify the circular convolution.

4. To design FIR filter (LP/HP) using windowing technique

a) Using rectangular window

b) Using triangular window

c) Using Kaiser window

5. To Implement IIR filter (LP/HP) on DSP Processors

6. N-point FFT algorithm.

7. MATLAB program to generate sum of sinusoidal signals.

8. MATLAB program to find frequency response of analog LP/HP filters.

9. To compute power density spectrum of a sequence.

10. To find the FFT of given 1-D signal and plot.

Instructions to Laboratory Teachers:-

LENDI INSTITUTE OF ENGINEERING AND TECHNOLOGY

COURSE DATA SHEET

PROGRAM: Electronics and Communication DEGREE: B.Tech (U.G)

[Type text] Page 9

C306 PULSE & DIGITAL LINEAR WAVE III YEAR

Lendi Institute of Engineering and Technology –ECE Page 10

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1 Need more experiments on image Topics to be PO1,PO2,PO3,PO4,PO5, PSO1,PSO2

Lendi Institute of Engineering and Technology –ECE Page 12

LCD/SMART STUD. SEMINARS ADD-ON ☐ WEBNIARS

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S.NO NAME OF THE EXPERIMENT PAGE NO

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Lendi Institute of Engineering and Technology –ECE Page 15

Fig.1. graphical interface to the mat lab workspace

Symbol Operation Example

Lendi Institute of Engineering and Technology –ECE Page 16

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APPARATUS REQUIRED: TMS320C6713 DSK kit

Fixed versus Floating Point:

ARCHITECTURE OF 6713 DSP PROCESSOR:

How fast are DSPs?

Lendi Institute of Engineering and Technology –ECE Page 19

The TMS320C6000™ digital signal processor (DSP) platform is part of the

 Instruction packing: reduced code size

The TMS320™ DSP family consists of fixed-point, floating-point, and multipro-

Features and Options of TMS320C67X:

Lendi Institute of Engineering and Technology –ECE Page 20

TMS320C6713 DSKPackage Contents:

Fig1.1 DSK Accessories

High-Performance Stereo Codec

90-dB SNR Multibit Sigma-Delta ADC (A-weighted at 48 kHz)