Академический Документы
Профессиональный Документы
Культура Документы
6408/N
I
FACULTY OF INFORMATICS
B.E. 4/4 (LT.) I-Semester (New) (Main) Examination,
November/December, 2009
Subject : VLSI DESIGN
Note: Answer all questions from Part - A, Answer any, ~e"'questions from Pafl~C' \
Ill. \ 0
.~ { liB R A RY 1 0-
PART - A ~ \ Jro· (25 Marks)
v ·G'-
" ,/./..•~/ .
1. (a) State Moore's law. ~f1dip;-MYd-;~&~~// 2
(b) Draw a CMOS logic circuit of a 2-input XOR gate:~_ :::;;..-
•..•
2. Consider an n-channel MOSFET with the following characteristic tox = 10nm fJ-n= 500 2
.
-::,
6. An inverter uses FETs with I3n = 2.1 mA/V2 and I3p = 1.8 mA/V2. The threshold voltages 3
are given as VTn = 0.6V and VTp = - 0.65V and the power supply has a value of
VDD = 5V. The parasitic FET capacitance at the output node is estimated to be
~) CFET = 70fF. Find the mid poi11:tvoltage. . .
:?),Z~
7.
C:~~::~~erive an expression for the low output voltage VOLpseudo n MOS inverter.
(c) Draw a tristate inverter circuit and explain its functioning.
15. (a) Draw a 4: 1 MVR using nFET pass transistors and explain. Give verilog code for
it.
(b) With a suitable diagram explain the function of a 4 bit ripple carry adder. 'IVrite
the verilog code to construct the same.
16. (a) Considering logic gates as basic cells explain the creation of new cell using basic
gates.
(b) Derive the expressions for the rise time and fall time calculation of a CMOS
inverter.
(c) Draw the cross section and mask set of n Wells, n+ region and p+ region.
5 Note: Ans,uer all questions from Part - A. Answer any five questions from Part - B.
5
13. L\:;:->:r the operation of QPSK transmitter and receiver with neat diagrams. 10
(b) For a T,;\·o-R2~.·:-:-~del deI"ive the expression for the received power at a distance 7
'd' from the IT2T.src,it::e::-.
15. What are the major differences ::-e:' ...·ee:--. TIJ:"<.-\. CD\IA and FDMA? Explain in 10
detail about each multiple access '.'.-i:::___. i.eat cii2g-r2Ds.
16. Explain hO\\' tunneling 'works in gei.er2: 2nd es?eci::.12~:£~)::- mo":Ji:e IF using IF-in-IF, 10
minimal and generic routing encapsulation respecti':el;:; Discuss the ad :antages and 1
disadvantages of these three methods.
17. Explainbife-edge diffraction model in detail with the help of suitable diagrams. . 10
Answer all questions from Part - A. Answer any five questions from
Part- B.
_,'I
~ ,.-~---.....:
-....
01'
""
~
J'f)."
C'~ (2)
:: \ -:)
lO \;1 LIBRARY )<2..,
7. Compare DCOM and CORBA. t\
.' ().......
til'J'd;- __
./. /.
--tp...·
.. I~,
T./~
(3)
(2)
JC~2)
11 . Explain the following:
(a) SOA (4)
(b) SOAP (3)
(c) WSDL (3)
12. (a) Explain the servlet lifecycle in detail with the help of API.
(b) What is struts Framework?
13. (a) Explain Entity beans in detail.
(b) What are Callback Methods of session beans? Explain.
(5)
(3)
(2)
FACULTY OF INFORMATICS
B.E.JVIIV (IT) I SEMESTER (New) (Main) Examination, Nov.lDec., 2009
DATA WAREHOUSING & DATA MINING (ELECTIVE - II)
Time: 3 Hours] [ Max. Marks: 75
Note: Answer all questions from Part - A. Answer any five questions from
Part - B.
PART-A (Marks: 25)
Define data mining and data warehouse. 2M
12. (a) Write the differences between operational databases and data
warehousing. 5M
(b) Explain normalization techniques in Data Transformation. 5M
P.T.O.
Code No. : 6413/N
13. (a) How does the NaIve Bayesian classification work? Explain. 5M
(b) Explain classifier accuracy. 5M
15. (a) Explain how to construct spatial Data Cube and spatial OLAP. 5M
(b) Explain Spatial Associations and co-location patterns. 5M
16. Explain how to mine the frequent items using Apriori Algorithm with
example. 10M
1. What are the differences between early grid activities and current grid
activities? 3
11. EX~lain about the grid computing toolkits and the frameworks.
b) What are the major difference .'- between grid computing and p2p
computing? lr 2
13.a) Write complete details of the OGSI common management model (CMM)? 7
F)
F)
14.a) Describe the method of detecting a line (horizontal, vertical 445 degrees
slant) with masks. .
b) Give the expressions for the conversion of R & 8 colour model to HIS
colour model.
B. E. 4/4 (I.T.) I - Semester (Old) Examination, November 1 December 2009
Note: Answer all questions from Part - A. Answer any five questions from Part-B.
(b) Clearly explain the terms "via" and 'action contact'. Draw the diagnnn. (5)
\ '6
12.(a) Draw the volta~e transfer characteristics of a invertor circuit. Define noise
~ 'S margins for high and low voltages, (5)
(b) Derive an expression for the midpoint voltage of an inverter circuit. What
'L is a symmetrical inverter? (5)
"9 13.(a) Explain the difficulty of driving a large capacitance load. (5)
(b) How the delay can be minimized in an inverter cascade and derive an
'9 expression for the number of stages for the design? (5)
'17
14.(a) Draw the circuit of a 6T-SRAM cell and explain its function. I (5)
(b) Draw the general structure of a SRAM array. Explain the different blocks
'f;
and circuits used to achieve the, functionality. . (5)
'l
15.(a) Derive the RC model of an interconnect. (3)
,~
(b) Explain the principle of operation of a power supply distribution grid. (2)
(c) Vvhat is dynamic switching power? (5)
I
,•
for the two-ray ground reflection model and explain.
(b) Define Fresnel-Kirchoof diffraction parameter, y. Describe Knife-edge
(5)
r 16., fC'i\
j
n~~t'cl~','hD
,-,,,,vv ""v Qnnnpinn
"",-"WIIV",",, U~~
Tr'D hrinainn
M"Jli •••••i!lI~VU.'~
t"\"~
"V"U~
thp ""rlw::lnh;"n.,Q~
II.~~""" Ij;,A,~W~Ii~i.~~'_V
'ii;\. LIBRARY
' ,;:.\
••••••••. ".'
'i:,./.
r.:~
\0 ",,'- /. %;/
':\;, Q~-_ _ ..•• ~·i>".it.:
Compare stateful and stateless session beans."~Pet,-Hvdel~/Z
"'-~.~~~,#.
b) What isORB? 2
-
~._-
..
-- -_.- --- -_.- - -----
csrr
FACULTY OF INFORMATICS
B.E.IV!IV Year (IT) I Semester (Main) Examination, November(Dece:mber 2008
VLSI DESIGN
2. What are the advantages and disadvantages of'a transmission gate. tn\ \nstit.ute ~
1:
. . . -----
<0:,...-
1)/
\:\"3t8 _-- _
- Of
(90
,~
3. DesIgn a CMOS lOgICgate for the functIOn f=a.b+a.b. 0 . . \?cz.. t
.~\ l 1 BRA RY J~
';>-')" '\-
.I••..
(. " ./. "r
f<f, .~_ oJ./ "30'
'- \,'Qn '-:---- '0'0
.. d,pet, Hydet
~ :::=
6, Differentiate between ripple-carry adder and carry look-ahead adder?
12. (a) Define latch up. Why latch up occurs in CMOS circuits and explain the
remedies of this latch up problem?
(b) Derive the expression for nFET current-voltage equation.
, :l B::-ief1yexplain how to determine FET capacitances. How is this going to affect
-::-_=' sTT.-i-::::hing
speed in CMOS circuit? 5 B.
~ ==-=--;:.::~-:, .::~=- CC::"J:lst Veeilog HDL and VHDL. What is the difference between
,=-.-..: ==-..::-.::_: =-=--=:::.-:': :=_:::d behavioral model? 5
6. '
7. 1
8. 1
9. ~
10. ,
1 I.E
1-
12 (c
o
13.E
h
14.D
15. E.
16. D
17. W
(a
(b
CSI1J
FACULTY OF INFORMATICS
J H.E. IV/N Year (IT) I Semester (Main) Examination, November/December 2008
WIRELESS & MOBILECOMMUNICATIONS
--
9. What are the problems with traditional TCP?
10. \Vhat is the need of agent advertisement?
"~,,r~\, ".:,
t(
I
Part B - (Marks : 50)
,.-
11. Explajn about various Handoff strategies and how priorities can be given to
Handoffs. 10
12 (a) Explain about the ground reflection model. 5
(b) Explain about the radar cross section model. 5
13. Explain about direct - sequence and frequency hopping spread spectrum
techniques. 10
14. Describe the architecture of GSM. 10
IS. Explain in detail the different approaches of mobile TCP. 10
16. Discuss about the evolution of wireless networks 10
17. Write short notes on:
(a) CDMA 6
(b) BPSK 4 .
FACULTY OF INFORMATICS
:::;:. r~,- I',· -;r;:;ar lIT! IS';:L:i.ester (l'\'Iain) Examination, November/December 2008
= ::..~:::=;-=- SER\'ER PROGRAMMING
Lectii:e-II)
6. What are the two ways of creating a thread and which one is preferable? 3
J 7. Vlhat is the difference between equals ( ) method in object class and string class? 2
~ ;;.
- -,~,-:.-:::.-= :~ ::-.::- ::::-:-::-:-e:'-.:e'ce:-xee:: s:2.:e~ess sess:o:: bean and stateful session bean?2
10. What are the mechanisms of time-out freezing, and its advantages
and disadvantages? 3
11. (a) What are the different motivations for a specialized MAC
fail'Jres ? 5
Code No. : 4271
12. Name the main elements of the GSM system architecture and
describe their functions. 10
16. Explain Traditional TCP, Indirect TCP, and S,'iCoqr~2 TCP in mobile
transport layer, with a neat diagram for each. 10
Note: Answer all questions of Part-A and answer any five questions from Part-B.
14. (a) What are the types of JOSC drivers and explain each. (6)
(b) How do you save a Java Object in database? (4)
17. (8) is
(b) Explain MVC architecture.
1. What is Moore's Law.
2. Draw the XNOR Gate.
3. Give the structure ofMOS system.
4. What is meant by Propagation Del(lY~
5. What is the functionality of CMOS inverter.
6. Describe about 'Tri-state inverter'.
7. What is 'TG circuit'.
8. Explain about 'Ripple-Carry Adders'.
9. What is 'Crosstalk'.
10. Briefly explain about' Clock Stabilization' .
2. Define modulation? What are the methods of analog and digital Data schemes? 3
3. Define cellular system? What are the advantages of cellular System? 2
4. How can MACA still fail in case of hidden/ exposed Terminals? 3.
5. What are the basic reasons for a hand over? 2
6. Define broadcasting? What are the basic transport mechanisms in DAB? 2
7. What are the fundamental differences between wired-networks and Ad-hoc
wireless networks related to routing? 3
8. Define HIPERLAN and what are its different phases? 3
9. Give two advantages and two disadvantages of WLAN's? 2
10. Give neat sketch on UMTS system architecture? 2
15. Describe basics and different classes of satellite systems and applications? 10
16. (a) Explain IEEE 802.11 system architecture and protocol architecture? 7
2. Defil
3. Wha
4. Defi,
5. Wha
6. Exp:
7. Whc
8. Whc
9. WhE
10. Sim
11. Exp
12. (a)
\
(b)
13. (a)
(b)
l4. (a)
(b)
FACUL TV OF INFORMATICS
B. E. 4/4 (IT) I Semester (Main) Examination, November, 2007
".
1.
2.
What is inheritance
Describe inter process communication
/tj"" . """""':~
~ ~"a.~~~~~ut9 ()I'~
2
3. Distinguish between LPC and RPC J ~;.,,... "''.,,,~ '
3
4. What is RMI I :~(, ,~ 3
5. What is a semaphore "'§\ L,BRARY) 2.. \
3
6.
7.
What are try I catch statements
What is DDE_
'" 6:,"
q-1~''-''
" -~ •
J~ ~ • '
2
2
8. What is a DEe thread '/let, Hyderabao .•1 2
9, List any four server operating systems 2
10. What are ORBs 3'
3
PART B - (Marks: 5 X 10 = 50)
16(a)
Explain different types of 1/0 streams
FACULTY OF INFORMATICS
B.E. 4/4 (IT) I Semester (Supplementary) Examination May / June 2007
p= a (b.""c + c.d)
15. (a) Design a 4-bit Multiplier. Realize the same with CMOS Gates.
(b) Design 16-bit ROM Array.
16. (a) Design a tristate circuit that is in a high impedance state when the control
=
signal T 1 and acts as a non-inverting buffer when T = O.
(b) What are different design considerations.8t system level physical design
stage.
. /l~gical expression.
a) Eliminate useless svmhols r; - nrn+wtinnc Hn~ 'mit nroonctions from tbe f(\!Jowing CFG
nnd r~nt""1>-~]f"rt ~'-, r"';-~Tr} "-"
14(a) Expl.
15(a) Expl:
16(a) Expl;
(b) Writ~
Il(a) Pn1wthe block diagram of basic cellular system and explain how
calls are made.
-/1~gica1 expression.
ay useless E - jlTOduetlOns and unit
glalYtillar
S -> AB 13,_
FACULTY OF \NFORMAT\CS
Write short notes on'- (i) Web Object (ii) CORBA-style (iii) JDSC