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FQP60N03L

May 2001

QFET TM

FQP60N03L
30V LOGIC N-Channel MOSFET

General Description Features


These N-Channel enhancement mode power field effect • 60A, 30V. RDS(on) = 0.0135Ω @VGS = 10 V
transistors are produced using Fairchild’s proprietary, • Low gate charge ( typical 18.5 nC)
planar stripe, DMOS technology. • Low Crss ( typical 155 pF)
This advanced technology has been especially tailored to • Fast switching
minimize on-state resistance, provide superior switching • 100% avalanche tested
performance, and withstand high energy pulse in the • Improved dv/dt capability
avalanche and commutation mode. These devices are well • 175°C maximum junction temperature rating
suited for low voltage applications such as DC/DC
converters, high efficiency switching for power
management in portable and battery operated products.

D
!

"

! " "
G! "
G
DS TO-220
FQP Series !
S

Absolute Maximum Ratings TC = 25°C unless otherwise noted

Symbol Parameter FQP60N03L Units


VDSS Drain-Source Voltage 30 V
ID Drain Current - Continuous (TC = 25°C) 60 A
- Continuous (TC = 100°C) 42.5 A
IDM Drain Current - Pulsed (Note 1) 240 A
VGSS Gate-Source Voltage ± 20 V
EAS Single Pulsed Avalanche Energy (Note 2) 220 mJ
IAR Avalanche Current (Note 1) 60 A
EAR Repetitive Avalanche Energy (Note 1) 10.0 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 7.0 V/ns
PD Power Dissipation (TC = 25°C) 100 W
- Derate above 25°C 0.67 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +175 °C
Maximum lead temperature for soldering purposes,
TL 300 °C
1/8" from case for 5 seconds

Thermal Characteristics
Symbol Parameter Typ Max Units
RθJC Thermal Resistance, Junction-to-Case -- 1.50 °C/W
RθCS Thermal Resistance, Case-to-Sink 0.5 -- °C/W
RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001


FQP60N03L
Electrical Characteristics TC = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 30 -- -- V
∆BVDSS Breakdown Voltage Temperature ID = 250 µA, Referenced to
-- 0.02 -- V/°C
/ ∆TJ Coefficient 25°C
IDSS VDS = 30 V, VGS = 0 V -- -- 1 µA
Zero Gate Voltage Drain Current
VDS = 24 V, TC = 150°C -- -- 10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA

On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 1.0 -- 2.5 V
RDS(on) Static Drain-Source VGS = 10 V, ID = 30 A -- 0.011 0.0135

On-Resistance VGS = 5 V, ID =30 A -- 0.015 0.019
gFS Forward Transconductance VDS = 15 V, ID = 30 A (Note 4) -- 33 -- S

Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, -- 875 1140 pF
Coss Output Capacitance f = 1.0 MHz -- 570 740 pF
Crss Reverse Transfer Capacitance -- 155 200 pF

Switching Characteristics
td(on) Turn-On Delay Time -- 17 45 ns
VDD = 15 V, ID = 30 A,
tr Turn-On Rise Time -- 155 320 ns
RG = 25 Ω
td(off) Turn-Off Delay Time -- 10 30 ns
tf Turn-Off Fall Time (Note 4, 5) -- 75 160 ns
Qg Total Gate Charge VDS = 24 V, ID = 60 A, -- 18.5 24 nC
Qgs Gate-Source Charge VGS = 5 V -- 7 -- nC
Qgd Gate-Drain Charge (Note 4, 5) -- 9.5 -- nC

Drain-Source Diode Characteristics and Maximum Ratings


IS Maximum Continuous Drain-Source Diode Forward Current -- -- 60 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 240 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 60 A -- -- 1.5 V
trr Reverse Recovery Time VGS = 0 V, IS = 60 A, -- 40 -- ns
Qrr Reverse Recovery Charge dIF / dt = 100 A/µs (Note 4) -- 35 -- nC

Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 60µH, IAS = 60A, VDD = 15V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 60A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001


FQP60N03L
Typical Characteristics

VGS
Top : 10.0 V
8.0 V
2
6.0 V 10
2
10 5.0 V
4.5 V
4.0 V
3.5 V
Bottom : 3.0 V
ID, Drain Current [A]

ID, Drain Current [A]


1
10
1
10 175℃

※ Notes : 25℃ ※ Notes :


1. 250μ s Pulse Test 1. VDS = 15V
2. TC = 25℃ 2. 250μ s Pulse Test
-55℃
0
10
-1 0 1
10 10 10 0 2 4 6 8 10

VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V]

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

40

2
10

30
Drain-Source On-Resistance

IDR, Reverse Drain Current [A]

VGS = 5V
R DS(ON) [mΩ ],

20 VGS = 10V

1
10

10

※ Notes :
175℃ 25℃ 1. VGS = 0V
※ Note : TJ = 25℃
2. 250μ s Pulse Test
0
0 40 80 120 160 200 240 0
10
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID, Drain Current [A]
VSD, Source-Drain voltage [V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage


Drain Current and Gate Voltage Variation vs. Source Current
and Temperature

3000 12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
VDS = 15V
2500 10

VDS = 24V
V GS , Gate-Source Voltage [V]

Coss 8
2000
Capacitance [pF]

※ Notes :
Ciss 1. VGS = 0 V
2. f = 1 MHz 6
1500

4
1000 Crss

2
500
※ Note : ID = 60A

0
0 0 5 10 15 20 25 30 35
-1 0 1
10 10 10
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001


FQP60N03L
Typical Characteristics (Continued)

1.2 2.5

2.0
Drain-Source Breakdown Voltage

1.1

Drain-Source On-Resistance
BV DSS , (Normalized)

RDS(ON) , (Normalized)
1.5

1.0

1.0

0.9 ※ Notes :
1. VGS = 0 V 0.5 ※ Notes :
2. ID = 250 μ A 1. VGS = 10 V
2. ID = 30 A

0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation


vs. Temperature vs. Temperature

3
10 70
Operation in This Area
is Limited by R DS(on)
60

100 µ s
2 50
10
1 ms
ID , Drain Current [A]

ID , Drain Current [A]

10 ms
40
DC

1
30
10

20
※ Notes :
o
1. TC = 25 C 10
o
10
0 2. TJ = 175 C
3. Single Pulse
0
10
-1
10
0
10
1 25 50 75 100 125 150 175

VDS, Drain-Source Voltage [V] TC, Case Temperature [℃]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
(t), T h e rm a l R e s p o n s e

0
10
D = 0 .5

0 .2
※ N otes :
1 . Z θ J C ( t ) = 1 . 5 0 ℃ /W M a x .
0 .1 2 . D u t y F a c t o r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C( t )
-1
10 0 .0 5

0 .0 2 PDM
0 .0 1 t1
JC

s in g le p u ls e t2
θ
Z

-2
10
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10

t1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]

Figure 11. Transient Thermal Response Curve

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001


FQP60N03L
Gate Charge Test Circuit & Waveform

VGS
Same Type
50KΩ
as DUT Qg
12V 200nF
300nF 5V
VDS
VGS Qgs Qgd

DUT
3mA

Charge

Resistive Switching Test Circuit & Waveforms

RL VDS
VDS 90%

VGS VDD
RG

10%
VGS
5V DUT
td(on) tr td(off)
tf
t on t off

Unclamped Inductive Switching Test Circuit & Waveforms

L 1 BVDSS
VDS EAS = ---- L IAS2 --------------------
2 BVDSS - VDD
BVDSS
ID
IAS
RG
VDD ID (t)

10V DUT VDD VDS (t)


tp
tp Time

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001


FQP60N03L
Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

I SD
L

Driver
RG
Same Type
as DUT VDD

VGS • dv/dt controlled by RG


• ISD controlled by pulse period

Gate Pulse Width


VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current


I SD
( DUT ) di/dt

IRM

Body Diode Reverse Current


VDS
( DUT ) Body Diode Recovery dv/dt

VSD VDD

Body Diode
Forward Voltage Drop

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001


FQP60N03L
Package Dimensions

TO-220
9.90 ±0.20 4.50 ±0.20
1.30 ±0.10

(8.70)

2.80 ±0.10
(1.70)

+0.10
ø3.60 ±0.10 1.30 –0.05

18.95MAX.
(3.70)

15.90 ±0.20
9.20 ±0.20

(1.46)

(3.00)
(45°
)
(1.00)
13.08 ±0.20

10.08 ±0.30

1.27 ±0.10 1.52 ±0.10

0.80 ±0.10 +0.10


0.50 –0.05 2.40 ±0.20
2.54TYP 2.54TYP
[2.54 ±0.20] [2.54 ±0.20]

10.00 ±0.20

©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001


TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.

ACEx™ FAST® OPTOPLANAR™ SuperSOT™-3


Bottomless™ FASTr™ PACMAN™ SuperSOT™-6
CoolFET™ FRFET™ POP™ SuperSOT™-8
CROSSVOLT™ GlobalOptoisolator™ PowerTrench® SyncFET™
DenseTrench™ GTO™ QFET™ TinyLogic™
DOME™ HiSeC™ QS™ UHC™
EcoSPARK™ ISOPLANAR™ QT Optoelectronics™ UltraFET®
E2CMOS™ LittleFET™ Quiet Series™ VCX™
EnSigna™ MicroFET™ SLIENT SWITCHER®
FACT™ MICROWIRE™ SMART START™
FACT Quiet Series™ OPTOLOGIC™ Stealth™

DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems 2. A critical component is any component of a life support
which, (a) are intended for surgical implant into the body, device or system whose failure to perform can be
or (b) support or sustain life, or (c) whose failure to perform reasonably expected to cause the failure of the life support
when properly used in accordance with instructions for use device or system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to
result in significant injury to the user.

PRODUCT STATUS DEFINITIONS


Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In This datasheet contains the design specifications for
Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and


supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product


that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

©2001 Fairchild Semiconductor Corporation Rev. H2