Mb95M Idtv: Service Manual

MB95M IDTV
SERVICE MANUAL
Table of Contents
1. INTRODUCTION .......................................................................................................................................................... 2
2. TUNER ........................................................................................................................................................................... 3
3. AUDIO AMPLIFIER STAGES ..................................................................................................................................... 7
A. MAIN AMPLIFIER (TAS5719)(6-8 W option)......................................................................................................... 7
B. MAIN AMPLIFIER (TS4962M)(2.5 W option) ...................................................................................................... 11
C. HEADPHONE AMPLIFIER STAGE ...................................................................................................................... 13
4. POWER STAGE .......................................................................................................................................................... 13
5. MICROCONTROLLER (MSTAR MSD8WB9BX/BWK) ......................................................................................... 20
6. 1GB DDR3 SDRAM .................................................................................................................................................... 24
7. 1GB G-DIE DDR3 SDRAM ........................................................................................................................................ 26
8. 2GBIT (256M X 8 BIT) NAND FLASH MEMORY .................................................................................................. 28
9. 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM ............................................................................................ 31
10. USB INTERFACE........................................................................................................................................................ 34
11. CI INTERFACE ........................................................................................................................................................... 36
12. DEMODULATOR STAGE .......................................................................................................................................... 37
13. LNB SUPPLY AND CONTROL IC ............................................................................................................................ 40
14. SOFTWARE UPDATE ................................................................................................................................................ 43
15. TROUBLESHOOTING................................................................................................................................................ 43
A. NO BACKLIGHT PROBLEM ............................................................................................................................... 43
B. CI MODULE PROBLEM...................................................................................................................................... 45
C. STAYING IN STAND-BY MODE .......................................................................................................................... 47
D. IR PROBLEM ....................................................................................................................................................... 47
E. KEYPAD TOUCHPAD PROBLEMS .................................................................................................................... 48
F. USB PROBLEMS .................................................................................................................................................. 49
G. NO SOUND PROBLEM ....................................................................................................................................... 49
H. STANDBY ON/OFF PROBLEM ........................................................................................................................... 50
İ. NO SIGNAL PROBLEM ....................................................................................................................................... 50
16. SERVICE MENU SETTINGS ..................................................................................................................................... 50
17. GENERAL BLOCK DIAGRAM ................................................................................................................................. 56
1
1. INTRODUCTION
17MB95M main board is driven by MStar SOC. This IC is a single chip iDTV solution that supports channel
decoding, MPEG decoding, and media-center functionality enabled by a high performance AV CODEC and
CPU.
Key features includes,
 Combo Front-End Demodulator
 A multi standart A/V format decoder
 The MACEpro video processor
 Home theatre sound processor
 Internet and Variety of Connectivity Support
 Dual-stream decoder for 3D contents
 Mılti-purpose CPU for OS and multimedia
 Peripheral and power management
Supported peripherals are:

 1 RF input VHF I, VHF III, UHF
 1 Satellite input
 1 Side AV (CVBS, R/L_Audio)
 1 SCART socket(Common)
 1 Side YPbPr
 1 PC input(Common)
 3 HDMI input
 1 Common interface(Common)
 1 S/PDIF output
 1 Headphone(Common)
 2 USB
 1 Ethernet-RJ45
 1 External Touchpad(Common)
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2. TUNER
A. SI2158 Terrestrial and Cable TV Tuner:
A.1. Description:
The Si2158 integrates a complete hybrid TV tuner supporting all worldwide terrestrial and cable TV
standards. Leveraging Silicon Labs’ field proven digital low-IF architecture, the Si2158 maintains the
unmatched performance and design simplicity of the Si2153 while further reducing footprint size and bill of
materials cost. No external LNAs, tracking filters, wirewound inductors, or SAW filters are used.
Compared with competing silicon tuners and discrete MOPLL-based tuners, the Si2158 delivers superior
picture quality and a higher number of received stations in crowded and near/far real-world reception
conditions. The high linearity and low noise RF front-end delivers superior blocking performance and higher
sensitivity in the presence of strong undesired channels and interference.
The Si2158 integrates the complete signal path from antenna input to IF outputs for both analog and digital
transmission standards. Compared to traditional discrete MOPLL-based tuners, the Si2158 eliminates hundreds
of external components including external LNAs, tracking filter varactors and inductors (unlike competing
silicon tuners), and SAW filters, resulting in the simplest, lowest-cost BOM for a hybrid TV tuner.
A.2. Features:
- Worldwide hybrid TV tuner
- Analog TV: NTSC, PAL/SECAM
- Digital TV: ATSC/QAM, DVB-T/T2/C/C2, ISDB-T/C, DTMB
- 42-1002 MHz frequency range
- Compliance to A/74, NorDig, DTG, ARIB, EN55020, OpenCable™ specifications
- Best-in-class real-world reception
- Exceeds discrete MOPLL-based tuners
- Highly integrated, lowest BOM
- No SAW filters or wirewound inductors required
- Integrated LNAs and complete tracking filters
- No alignment, tuning or calibration required
- Digital low-IF architecture
- Integrated channel select filters
- Flexible output interface
- ALIF to analog TV demodulator or SoC
- DLIF to digital TV demodulator or SoC
- 3.3 and 1.8 V power supplies
3
- Standard CMOS process technology
- 4 x 4 mm, 28-pin QFN package
- RoHS compliant
Figure 1: Pin description
4
Table 1: Pin functions
5
B. M88TS2022 Satellite Tuner
B.1. Features and General Description
B.2. Pin Assigment
6
B.3. Absolute Maximum Ratings and Recommended Operating Conditions
3. AUDIO AMPLIFIER STAGES
A. MAIN AMPLIFIER (TAS5719)(6-8 W option)

a. General Description
The TAS5717/TAS5719 is a 10-W/15-W, efficient,digital audio-power amplifier for driving stereo bridge-
tied speakers. One serial data input allows processing of up to two discrete audio channels and seamless
integration to most digital audio processors and MPEG decoders. The device accepts a wide of input data and
data rates. A fully programmable data path routes these channels to the internal speaker drivers.
The TAS5717/9 is a slave-only device receiving all clocks from external sources. The TAS5717/TAS5719
operates with a PWM carrier between a 384-kHz switching rate and a 352-KHz switching rate, depending on
the input sample rate. Oversampling combined with a fourth-order noise shaper provides a flat noise floor and
excellent dynamic range from 20 Hz to 20 kHz.
b. Features
• Audio Input/Output
– TAS5717 Supports 2×10 W and TAS5719 Supports 2×15 W Output
– Wide PVDD Range, From 4.5 V to 26 V
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– Efficient Class-D Operation Eliminates Need for Heatsinks
– Requires Only 3.3 V and PVDD
– One Serial Audio Input (Two Audio Channels)
– I2C Address Selection via PIN (Chip Select)
– Supports 8-kHz to 48-kHz Sample Rate (LJ/RJ/I2S)
– External Headphone-Amplifier Shutdown Signal
– Integrated CAP-Free Headphone Amplifier
– Stereo Headphone (Stereo 2-V RMS Line Driver) Outputs
• Audio/PWM Processing
– Independent Channel Volume Controls With 24-dB to Mute
– Programmable Two-Band Dynamic Range Control
– 14 Programmable Biquads for Speaker EQ
– Programmable Coefficients for DRC Filters
– DC Blocking Filters
– 0.125-dB Fine Volume Support
• General Features
– Serial Control Interface Operational Without MCLK
– Factory-Trimmed Internal Oscillator for Automatic Rate Detection
– Surface Mount, 48-Pin, 7-mm × 7-mm HTQFP Package
– AD, BD, and Ternary PWM-Mode Support
– Thermal and Short-Circuit Protection
• Benefits
– EQ: Speaker Equalization Improves Audio Performance
– DRC: Dynamic Range Compression. Can Be Used As Power Limiter. Enables Speaker Protection,
Easy Listening, Night-Mode Listening
– DirectPath Technology: Eliminates Bulky DC Blocking Capacitors
– Stereo Headphone/Stereo Line Drivers: Adjust Gain via External Resistors, Dedicated Active Headpone
Mute Pin, High Signal-to-Noise Ratio
8
– Two-Band DRC: Set Two Different Thresholds for Low- and High-Frequency Content
c. Pin descriptions and functions
9
10
Table 3: Recomnended operating conditions
B. MAIN AMPLIFIER (TS4962M)(2.5 W option)

The TS4962M is a differential Class-D BTL power amplifier. It is able to drive up to 2.3W into a 4Ω load
and 1.4W into a 8Ω load at 5V. It achieves outstanding efficiency (88%typ.) compared to classical Class-AB
audio amps. The gain of the device can be controlled via two external gain-setting resistors. Pop & click
reduction circuitry provides low on/off switch noise while allowing the device to start within 5ms. A standby
function (active low) allows the reduction of current consumption to 10nA typ.
b. Features
- Operating from VCC = 2.4V to 5.5V

- Standby mode active low
- Output power: 3W into 4Ω and 1.75W into 8Ω
- with 10% THD+N max and 5V power supply.
- Output power: 2.3W @5V or 0.75W @ 3.0V
- into 4Ω with 1% THD+N max.
- Output power: 1.4W @5V or 0.45W @ 3.0V
- into 8Ω with 1% THD+N max.
- Adjustable gain via external resistors
- Low current consumption 2mA @ 3V
- Efficiency: 88% typ.
- Signal to noise ratio: 85dB typ.
- PSRR: 63dB typ. @217Hz with 6dB gain
- PWM base frequency: 250kHz
- Low pop & click noise
- Thermal shutdown protection
- Available in flip-chip 9 x 300μm (Pb-free)
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c. Pin descriptions and functions:
Table 4: Recommended operating conditions
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C. HEADPHONE AMPLIFIER STAGE
Headphone is a SoC (single on chip) configuration in mainboard, design scheme is shown in figure 4.
Figure 4: Headphone
4. POWER STAGE
Figure 5: Power socket and power options
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Power socket is used for taking voltages which are 3.3V, 12V, 5V and 24V(VDD_Audio). These voltages
are produced in power card. Also socket is used for giving dimming, backlight and standbye signals with power
card. İt is shown in figure 5.
24V(VDD_Audio) goes directly to the audio side, through power socket other incoming voltages from
power card are converted several voltages.
Figure 6: Power steps
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FDC642P
a. General Description and Features
TPS65251
The TPS65251 features three synchronous wide input range high efficiency buck converters. The converters
are designed to simplify its application while giving the designer the option to optimize their usage according to
the target application.
The converters can operate in 5-, 9-, 12- or 15-V systems and have integrated power transistors. The output
voltage can be set externally using a resistor divider to any value between 0.8 V and close to the input supply.
Each converter features enable pin that allows a delayed start-up for sequencing purposes, soft start pin that
allows adjustable soft-start time by choosing the soft-start capacitor, and a current limit (RLIMx) pin that
enables designer to adjust current limit by selecting an external resistor and optimize the choice of inductor.
The current mode control allows a simple RC compensation.
The switching frequency of the converters can either be set with an external resistor connected to ROSC pin
or can be synchronized to an external clock connected to SYNC pin if needed. The switching regulators are
designed to operate from 300 kHz to 2.2 MHz. 180° out of phase operation between Buck 1 and Buck 2, 3
(Buck 2 and 3 run in phase) minimizes the input filter requirements.
TPS65251 features a supervisor circuit that monitors each converter output. The PGOOD pin is asserted
once sequencing is done, all PG signals are reported and a selectable end of reset time lapses. The polarity of
the PGOOD signal is active high.
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TPS65251 also features a light load pulse skipping mode (PSM) by allowing the LOW_P pin tied to V3V.
The PSM mode allows for a reduction on the input power supplied to the system when the host processor is in
stand-by (low activity) mode.
b. Features
• Wide Input Supply Voltage Range (4.5 V - 18 V)
• 0.8 V, 1% Accuracy Reference
• Continuous Loading: 3 A (Buck 1), 2 A (Buck 2 and 3)
• Maximum Current: 3.5 A (Buck 1), 2.5 A (Buck 2 and 3)
• Adjustable Switching Frequency 300 kHz - 2.2 MHz Set By External Resistor
• Dedicated Enable for Each Buck
• External Synchronization Pin for Oscillator
• External Enable/Sequencing and Soft Start Pins
• Adjustable Current Limit Set By External Resistor
• Soft Start Pins
• Current-Mode Control With Simple Compensation Circuit
• Power Good
• Optional Low Power Mode Operation for Light Loads
• QFN Package, 40-Pin 6 mm x 6 mm RHA
APPLICATIONS
• Set Top Boxes
• Blu-ray DVD
• Security Camera
• Car Audio/Video
• DTV
• DVR
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17
APL5910
The APL5910 is a 1A ultra low dropout linear regulator. The IC needs two supply voltages, one is a control
voltage (VCNTL) for the control circuitry, the other is a main supply voltage (VIN) for power conversion, to
reduce power dissipation and provide extremely low dropout voltage. The APL5910 integrates many functions.
A Power-On- Reset (POR) circuit monitors both supply voltages on VCNTL and VIN pins to prevent erroneous
operations. The functions of thermal shutdown and current-limit protect the device against thermal and current
over-loads. A POK indicates that the output voltage status with a delay time set internally. It can control other
converter for power sequence. The APL5910 can be enabled by other power systems. Pulling and holding the
EN voltage below 0.4V shuts off the output.
The APL5910 is available in a SOP-8P package which features small size as SOP-8 and an Exposed Pad to
reduce the junction-to-case resistance to extend power range of applications.
b. Features
 Ultra Low Dropout
- 0.12V (Typical) at 1AOutput Current
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 0.8V Reference Voltage
 High Output Accuracy
- ±1.5%over Line, Load, and Temperature Range
 Fast Transient Response
 Adjustable Output Voltage
 Power-On-Reset Monitoring on Both VCNTL and VIN Pins
 Internal Soft-Start
 Current-Limit and ShortCurrent-Limit Protections
 Thermal Shutdown with Hysteresis
 Open-Drain VOUT Voltage Indicator (POK)
 Low Shutdown Quiescent Current (< 30mA )
 Shutdown/Enable Control Function
 Simple SOP-8P Package with Exposed Pad
 Lead Free and Green Devices Available (RoHS Compliant)
APPLICATIONS
 Motherboards, VGA Cards
 Notebook PCs
 Add-in Cards
Figure 8: Pin configuration

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Table 8: Pin description
5. MICROCONTROLLER (MSTAR MSD8WB9BX/BWK)

The MSD8WB9BX/MSD8WB9BWK is MStar’s most up-to-date system-on-chip flagship for flat panel
integrated digital television products. Building on the success of MStar’s current solutions, the
MSD8WB9BX/MSD8WB9BWK hosts the most advanced picture processing engine, MStarACEPRO, for all
the Experts in various fields of TV video quality tuning to develop the state-of-the-art TV and DTV system.
MStarACEPRO, the Professional Edition of MStar color processor, includes all MStar’s successful color-
tuning tools and a newly added multi-dimensional color/sharpening/NR formula that can quickly reflect
subtle or sudden changes in even darker, brighter or mixture scenes. With this ultimate color processor, a
specially designed color remapping system for modern wider gamut displays and an easy-to-use color-tool
UI, developers can quickly and easily identify PQ characteristic from the most high-end panel models to the
most conventional panel models.
The MSD8WB9BX/MSD8WB9BWK integrates DTV/multi-media all-purpose AV decoder, DVB-T/DVB-
C demodulator(MSD8WB9BWK is including also DVB-T2 demod), VIF demodulator and Sound/Video
processor into a single device. This allows the overall BOM to be reduced significantly making the
MSD8WB9BX/MSD8WB9BWK a very cost effective multi-media DTV solution.
The MSD8WB9BX/MSD8WB9BWK enables feature rich products that bring differentiation to the iDTV
market. By the use of AV decoder capable of decoding a plethora of high definition content with Ethernet,
USB 2.0 connectivity and a powerful CPU/GPU, an MSD8WB9BX/MSD8WB9BWK based system can
provide a high quality networking application and media-center experience.
For standard users, the MSD8WB9BX/MSD8WB9BWK provides multi-standard analog TV support with
adaptive 3D video decoding and VBI data extraction. The build-in audio decoder is capable of decoding
FM, AM, NICAM, A2, BTSC and EIA-J sound standards. The MSD8WB9BX/MSD8WB9BWK supplies
all the necessary A/V inputs and outputs to complete a receiver design including a multi-port HDMI
receiver and component video ADC. All input selection multiplexed for video and audio are integrated,
including full SCART support with CVBS output.
To meet the increasingly popular energy legislative requirements without the use of additional hardware,
the MSD8WB9BX/MSD8WB9BWK has an ultra low power standby mode during which an embedded
MCU can act upon standby events and wake up the system as required.
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b. Features
21
22
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6. 1GB DDR3 SDRAM

Hynix H5TQ1G630FA
a. Description
The H5TQ1G6(8)3DFR-xxx series are a 1,073,741,824-bit CMOS Double Data Rate III (DDR3) Synchro-
nous DRAM, ideally suited for the main memory applications which requires large memory density and high
bandwidth. Hynix 1Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and
falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK
(falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling
edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.
24
b. Features
• DQ Power & Power supply : VDD & VDDQ = 1.5V +/- 0.075V
• DQ Ground supply : VSSQ = Ground
• Fully differential clock inputs (CK, CK) operation
• Differential Data Strobe (DQS, DQS)
• On chip DLL align DQ, DQS and DQS transition with CK transition
• DM masks write data-in at the both rising and falling edges of the data strobe
• All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the
clock
• Programmable CAS latency 6, 7, 8, 9, 10, 11, 12, 13 and 14 supported
• Programmable additive latency 0, CL-1, and CL-2 supported
• Programmable CAS Write latency (CWL) = 5, 6, 7, 8, 9, 10
• Programmable burst length 4/8 with both nibble sequential and interleave mode
• Programmable PASR(Partial Array Self-Refresh) for Digital consumer Applications.
• Programmable BL=4 supported (tCCD=2CLK) for Digi-tal consumer Applications.
• Programmable ZQ calibration supported
• BL switch on the fly
• 8banks
• Average Refresh Cycle (Tcase of 0 oC~ 95 oC)
- 7.8 μs at -40oC ~ 85 oC
- 3.9 μs at 85oC ~ 95 oC
- Commercial Temperature ( 0oC ~ 85 oC)
- Industrial Temperature ( -40oC ~ 85 oC)
• Auto Self Refresh supported
• JEDEC standard 78ball FBGA(x8), 96ball FBGA(x16)
• Driver strength selected by EMRS
• Dynamic On Die Termination supported
• Asynchronous RESET pin supported
• TDQS (Termination Data Strobe) supported (x8 only)
• Write Levelization supported
• On Die Thermal Sensor supported
• 8 bit pre-fetch
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7. 1GB G-DIE DDR3 SDRAM

Samsung K4B1G1646G
a. Key Features
• JEDEC standard 1.5V ± 0.075V Power Supply
• VDDQ = 1.5V ± 0.075V
• 400 MHz fCK for 800Mb/sec/pin, 533MHz fCK for 1066Mb/sec/pin, 667MHz fCK for 1333Mb/sec/pin,
800MHz fCK for 1600Mb/sec/pin 900MHz fCK for 1866Mb/sec/pin
• 8 Banks
• Programmable CAS Latency(posted CAS): 5,6,7,8,9,10,11,13
• Programmable Additive Latency: 0, CL-2 or CL-1 clock
• Programmable CAS Write Latency (CWL) = 5 (DDR3-800), 6 (DDR3-1066), 7 (DDR3-1333), 8 (DDR3-
1600) and 9 (DDR3-1866)
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4
which does not allow seamless read or write [either On the fly using A12 or MRS]
• Bi-directional Differential Data-Strobe
• Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95 °C • Asynchronous
Reset
• Package : 96 balls FBGA - x4/x8
• All of Lead-Free products are compliant for RoHS
• All of products are Halogen-free
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Table 11: 1Gb DDR3 G-die Speed bins
b. Description
The 1Gb DDR3 SDRAM G-die is organized as a 32Mbit x 4 I/Os x 8banks, 16Mbit x 8 I/Os x 8banks
device. This synchronous device achieves high speed double-data-rate transfer rates of up to 1866Mb/sec/pin
(DDR3- 1866) for general applications.
The chip is designed to comply with the following key DDR3 SDRAM fea-tures such as posted CAS,
Programmable CWL, Internal (Self) Calibration, On Die Termination using ODT pin and Asynchronous Reset.
All of the control and address inputs are synchronized with a pair of exter-nally supplied differential clocks.
Inputs are latched at the crosspoint of dif-ferential clocks (CK rising and CK falling). All I/Os are synchronized
with a pair of bidirectional strobes (DQS and DQS) in a source synchronous fash-ion. The address bus is used
to convey row, column, and bank address information in a RAS/CAS multiplexing style. The DDR3 device
operates with a single 1.5V ± 0.075V power supply and 1.5V ± 0.075V VDDQ. The 1Gb DDR3 G-die device is
available in 78ball FBGAs(x4/x8).
Table 12: Absolute Maximum DC Ratings
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8. 2GBIT (256M X 8 BIT) NAND FLASH MEMORY
H27U2G8F2CTR-BC
a. Key Features
DENSITY
- 2Gbit: 2048blocks
Nand FLASH INTERFACE
- NAND Interface
- ADDRESS / DATA Multiplexing
SUPPLY VOLTAGE
- Vcc = 3.0/1.8V Volt core supply voltage for Program,
Erase and Read operations.
MEMORY CELL ARRAY
- X8: (2K + 64) bytes x 64 pages x 2048 blocks
- X16: (1k+32) words x 64 pages x 2048 blocks
PAGE SIZE
- X8: (2048 + 64 spare) bytes
- X16:(1024 + 32spare) Words
Block SIZE
- X8: (128K + 4K spare) bytes
- X16:(64K + 2K spare) Words
PAGE READ / PROGRAM
- Random access: 25us (Max)
- Sequential access: 25ns / 45ns (3.0V/1.8V, min.)
- Program time(3.0V/1.8V): 200us / 250us (Typ)
- Multi-page program time (2 pages):
200us / 250us (3.0V/1.8V, Typ.)
BLOCK ERASE / MULTIPLE BLOCK ERASE
- Block erase time: 3.5 ms (Typ)
- Multi-block erase time (2 blocks):
3.5ms/ 3.5ms (3.0V/1.8V, Typ.)
SEQURITY
- OTP area
- Serial number (unique ID)
- Hardware program/erase disabled during Power transition
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- Multiplane Architecture:
Array is split into two independent planes.
Parallel operations on both planes are available, having
program and erase time.
- Single and multiplane copy back program with automatic
EDC (error detection code)
- Single and multiplane page re-program
- Single and multiplane cache program
- Cache read
- Multiplane block erase
Reliability
- 100,000 Program / Erase cycles (with 1bit /528Byte ECC)
- 10 Year Data retention
ONFI 1.0 COMPLIANT COMMAND SET
ELECTRONICAL SIGNATURE
- Maunufacture ID: ADh
- Device ID
PACKAGE
- Lead/Halogen Free
- TSOP48 12 x 20 x 1.2 mm
- FBGA63 9 x 11 x 1.0 mm
b. Description
H27(U_S)2G8_6F2C series is a 256Mx8bit with spare 8Mx8 bit capacity. The device is offered in 3.0/1.8
Vcc Power Supply, and with x8 and x16 I/O interface Its NAND cell provides the most cost-effective solution
for the solid state mass storage market. The memory is divided into blocks that can be erased independently so
it is possible to preserve valid data while old data is erased.
The device contains 2048 blocks, composed by 64 pages. Memory array is split into 2 planes, each of them
consisting of 1024 blocks. Like all other 2KB - page NAND Flash devices, a program operation allows to write
the 2112-byte page in typical 200us(3.3V) and an erase operation can be performed in typical 3.5ms on a 128K-
byte block.
In addition to this, thanks to multi-plane architecture, it is possible to program 2 pages at a time (one per each
plane) or to erase 2 blocks at a time (again, one per each plane). As a consequence, multi-plane architecture
allows program time to be reduced by 40% and erase time to be reduction by 50%. In case of multi-plane
operation, there is small degradation at 1.8V application in terms of program/erase time.
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The multiplane operations are supported both with traditional and ONFI 1.0 protocols. Data in the page can
be read out at 25ns (3V version) and 45ns (1.8V version) cycle time per byte. The I/O pins serve as the ports for
address and data input/output as well as command input. This interface allows a reduced pin count and easy
migration towards different densities, without any rearrangement of footprint. Commands, Data and Addresses
are synchronously introduced using CE#, WE#, ALE and CLE input pin. The on-chip Program/Erase Controller
automates all read, program and erase functions including pulse repetition, where required, and internal
verification and margining of data.
A WP# pin is available to provide hardware protection against program and erase operations.
The output pin RB# (open drain buffer) signals the status of the device during each operation. In a system
with multiple memories the RB# pins can be connected all together to provide a global status signal. Each block
can be programmed and erased up to 100,000 cycles with ECC (error correction code) on. To extend the
lifetime of Nand Flash devices, the implementation of an ECC is mandatory. The chip supports CE# don't care
function. This function allows the direct download of the code from the NAND Flash memory device by a
microcontroller, since the CE# transitions do not stop the read operation. In addition, device supports ONFI 1.0
specification.
The copy back function allows the optimization of defective blocks management: when a page program
operation fails the data can be directly programmed in another page inside the same array section without the
time consuming serial
data insertion phase. Copy back operation automatically executes embedded error detection operation: 1 bit
error out of every 528-byte (x8) or 1 bit error out of every 264-word (x16) can be detected. With this feature it
is no longer necessary to use an external to detect copy back operation errors. Multiplane copy back is also
supported, both with traditional and ONFI 1.0 protocols. Data read out after copy back read (both for single and
multiplane cases) is allowed. In addition, Cache program and multi cache program operations improve the
programing throughput by programing data using the cache register.
The devices provide two innovative features: page re-program and multiplane page re program. The page re-
program allows to re-program one page. Normally, this operation is performed after a previously failed page
program operation.Similarly, the multiplane page re-program allows to re-program two pages in parallel, one
per each plane. The first page must be in the first plane while the second page must be in the second plane; the
multiplane page re-program operation is performed after a previously failed multiplane page program operation.
The page re-program and multiplane page re-program guarantee imporve performance, since data insertion can
be omitted during re-program operations, and save ram buffer at the host in the case of program failure. The
devices, available in the TSOP48 (12X20mm) package, support the ONFI1.0 specfication and come with four
sequrity features:
- OTP (one time programmable) area, which is a restricted access area where sensitive data/code can be
stored permantely.
30
- Serial number (unique identifier), which allows the devices to be uniquely indentified.
- Read ID2 extention
These security features are subject to an NDA (non-disclosure agreement) and are, therefore, no described in
the datasheet. For more details about them, contact your nearest Hynix sales office.
Table 14: DC and operating characteristic
9. 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM

MX25L1602 Mstar SPI Flash
a. Key Features
HIGH DENSITY NAND FLASH MEMORIES
GENERAL
• 16,777,216 x 1 bit structure
• 256 Equal Sectors with 8K-byte each
- Any sector can be erased
• 4096 Equal Segments with 512-byte each
- Provides sequential output within any segment
• Single Power Supply Operation
- 3.0 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
31
• Low Vcc write inhibit is equal to or less than 2.5V
PERFORMANCE
• High Performance
- Fast access time: 20MHz serial clock (50pF + 1TTL Load)
- Fast program time: 5ms/page (typical, 128-byte per page)
- Fast erase time: 300ms/sector (typical, 8K-byte per sector)
• Low Power Consumption
- Low active read current: 10mA (typical) at 17MHz
- Low active programming current: 10mA (typical)
- Low active erase current: 10mA (typical)
- Low standby current: 30uA (typical, CMOS)
• Minimum 100,000 erase/program cycle
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code, 3-byte address, 1-byte byte address
• 512-byte Sequential Read Operation
• Built in 9-bit (A0 to A8) pre-settable address counter to support the 512-byte sequential read operation
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected sector
- Automatically programs and verifies data at selected page by an internal algroithm that automatically
times the program pulse widths (Any page to be programed should have page in the erased state first)
• Status Register Feature
- Provides detection of program and erase operation completion.
- Provides auto erase/ program error report
HARDWARE FEATURES
• SCLK Input
- Serial clock input
• SI Input
- Serial Data Input
• SO Output
- Serial Data Output
• PACKAGE
- 28-pin SOP (330mil)
32
b. General Description
The MX25L1602 is a CMOS 16,777,216 bit serial Flash EEPROM, which is configured as 2,097,152 x 8
internally. The MX25L1602 features a serial peripheral interface and software protocol allowing operation on a
simple 3- wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data
output (SO). SPI access to the device is enabled by CS input.
The MX25L1602 provide sequential read operation on whole chip. The sequential read operation is executed
on a segment (512 byte) basis. User may start to read from any byte of the segment. While the end of the
segment is reached, the device will wrap around to the beginning of the segment and continuously outputs data
until CS goes high.
After program/erase command is issued, auto program/ erase algorithms which program/erase and verify the
specified page locations will be executed. Program command is executed on a page (128 bytes) basis, and erase
command is executed on both chip and sector (8K bytes) basis.
To provide user with ease of interface, a status register is included to indicate the status of the chip. The
status read command can be issued to detect completion and error flag status of a program or erase operation.
When the device is not in operation and CS is high, it is put in standby mode and draws less than 30uA DC
current.
The MX25L1602 utilizes MXIC's proprietary memory cell which reliably stores memory contents even after
100,000 program and erase cycles.
Figure: Pin configuration.
33
Table 15: Pin description
10. USB INTERFACE
Mstar IC has two input port for USB, therefore air mause, internal wi-fi interface and USB2 are combined
with HUB. This property is optional. If air mause and wi-fi interfaces are not alined, two USB are connected
directly to main IC.
Figure 9: USB description
34
USB2512B
The SMSC USB251xB/xBi hub is a family of low-power, configurable, MTT (multi transaction translator) hub
controller IC products for embedded USB solutions. The x in the part number indicates the number of
downstream ports available, while the B indicates battery charging support. The SMSC hub supports lowspeed,
full-speed, and hi-speed (if operating as a hispeed hub) downstream devices on all of the enabled downstream
ports.
b. Features
- USB251xB/xBi products are fully footprint compatible with USB251x/xi/xA/xAi products as direct
drop-in replacements
 Cost savings include using the same PCB components and application of USB-IF Compliance
by Similarity
- Full power management with individual or ganged power control of each downstream port
- Fully integrated USB termination and pull-up/pulldown resistors
- Supports a single external 3.3 V supply source; internal regulators provide 1.2 V internal core voltage
- Onboard 24 MHz crystal driver, ceramic resonator, or external 24/48 MHz clock input
- Customizable vendor ID, product ID, and device ID
- 4 kilovolts of HBM JESD22-A114F ESD protection (powered and unpowered)
- Supports self- or bus-powered operation
- Supports the USB Battery Charging specification Rev. 1.1 for Charging Downstream Ports (CDP)
- 36-pin QFN (6x6 mm) Lead-free RoHS compliant package
- USB251xBi products support the industrial temperature range of -40ºC to +85ºC
- USB251xB products support the extended commercial temperature range of 0ºC to +85ºC
c. Applications
- LCD monitors and TVs
- Multi-function USB peripherals
- PC motherboards
- Set-top boxes, DVD players, DVR/PVR
- Printers and scanners
- PC media drive bay
- Portable hub boxes
- Mobile PC docking
- Embedded systems
35
Figure 10: Pin configurations
11. CI INTERFACE
17MB95M Digital CI ve Smart Card Interface Block diagram:
Figure 11: CI interface
36
12. DEMODULATOR STAGE
A-MSTAR DVB-T/T2 C Demodulators
37
M88DS3103 DVB-S/S2 Demodulator
a. Key Features and General Description
38
b. Block Diagram
c. Pin Information
39
d. Absolute Maximum Ratings and Recommended Operating Conditions
13. LNB SUPPLY AND CONTROL IC

a. General Description and Block Diagram
40
APPLICATIONS
• LNB Power Supply and Control for Satellite Set Top Boxes
b. Main Features
41
c. Pin Information
d. Absolute Maximum Ratings and Recommended Operating Conditions
42
14. SOFTWARE UPDATE
MAIN SW UPDATE
In MB95M project there is only one software. From following steps software update procedure can be seen:
1. MB90_en.bin, mboot.bin and usb_auto_update_A1.txt documents should copy directly inside of a flash
memory(not in a folder).
2. Insert flash memory to the tv when tv is powered off.
3. While pushing the OK button in remote control, power on the and wait. TV will power-up itself.
4. If First Time Installation screen comes, it means software update procedure is successful.
15. TROUBLESHOOTING
A. NO BACKLIGHT PROBLEM
Problem: If TV is working, led is normal and there is no picture and backlight on the panel.
Possible couses: Backlight pin, dimming pin, backlight supply, stby on/off pin
BACKLIGHT_ON/OFF pin should be high when the backlight is ON. R119 must be low when the backlight is
OFF. If it is a problem, please check Q10 and the panel cables. Also it can be tested in TP50 in main board.
Dimming pin should be high or square wave in open position. If it is low, please check S60 for Mstar side and
panel or power cables, connectors.
43
Backlight power supply should be in panel specs. Please check Q33, shown below; also it can be checked
TP53.
STBY_ON/OFF_NOT should be low for tv on condition, please check Q11’s collector.
44
B. CI MODULE PROBLEM
Problem: CI is not working when CI module inserted.
Possible couses: Supply, suply control pin, detect pins, mechanical positions of pins.
 CI supply should be 5V when CI module inserted. If it is not 5V please check CI_PWR_CTRL, this pin
should be low.
 Please check mechanical position of CI module. Is it inserted properly or not?

 Detect ports should be low. If it is not low please check CI connector pins, CI module pins.
45
46
C. STAYING IN STAND-BY MODE
Problem: Staying in stand-by mode, no other operation
This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation. When
there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV set
and control voltage points with a multimeter to find the shorted voltage to ground.
D. IR PROBLEM
Problem: LED or IR not working
Check LED card supply on MB95M chasis.
47
E. KEYPAD TOUCHPAD PROBLEMS
Problem: Keypad or Touchpad is not working
Check keypad supply on MB95M.
48
F. USB PROBLEMS
Problem: USB is not working or no USB Detection.
Check USB Supply, It should be nearly 5V. Also USB Enable should be logic high.
G. NO SOUND PROBLEM
Problem: No audio at main TV speaker outputs.
Check supply voltages of 24V VDD_AUDIO, 3.3V AUDIO_AVDD and AUDIO_DVDD with a voltage-
meter. There may be a problem in headphone connector or headphone detect circuit (when headphone is
connected, speakers are automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v.
49
H. STANDBY ON/OFF PROBLEM
Problem: Device can not boot, TV hangs in standby mode.
There may be a problem about power supply. Check main supplies with a voltage-meter. Also there may be a
problem about SW. Try to update TV with latest SW. Additionally it is good to check SW printouts via
Teraterm. These printouts may give a clue about the problem. You can use Scart-1 for terraterm connection.
İ. NO SIGNAL PROBLEM
Problem: No signal in TV mode.
Check tuner supply voltage; 5V_VCC, 3V3_TUNER and 1V8_TUNER. Check tuner options are correctly set
in Service menu. Check AGC voltage at IF_AGC pin of tuner.
16. SERVICE MENU SETTINGS

In order to reach service menu, first Press “MENU” buton, then write “4725” by uisng remote controller.
You can see the service menu main screen below. You can check SW releases by using this menu. In addition,
you can make changes on video, audio etc. by using video settings, audio settings titles.
50
Service Menu Main Screen
Video Settings
51
Audio Settings
Options-1 Menu
52
Options-2 Menu
Options-3 Menu
53
Tuner Settings Menu
Source Settings Menu
54
Diagnostic Menu
55
17. GENERAL BLOCK DIAGRAM
1V5_VCC 1V5_VCC 2x6W or 2x8W MB95 MB95S MB95M
5V_VCC DVB-T2 (internal demod) X
2x2.5W
24V_VCC DDR3 RAM DDR3 RAM

DVB-T2 (external demod) X
12V_VCC (64Mx16bit or (64Mx16bit or DVB-S/S2 X X
5V_VCC SHORT CCT 128Mx16bit) 128Mx16bit) 3V3_VCC
3V3_VCC_TUNER
PROTECTION
PROTECT (1600 MT/s) (1600 MT/s) SC AUDIO_OUT 12V_VCC or OPTICAL SPDIF OPTICAL SPDIF X X
3V3_VCC 24V_VCC ACTIVE HOTEL TV X
TAS5719 (95S/95M)
(95/95S) Audio Amp (6/8W)
TS496 DRV 632
1V8_VCC_TUNER 5V_VCC
(Audio Amp) (2Vrms Amp) & 2Vrms Amp Max 2 USB & Internal Wifi X
(95/95S)
2V5_VCC Max 1 USB & Internal Wifi X X
SPDIF OUT
MAIN_L/R_OUT
I2S AUD_OUT
ETHERNET
SC_L/R_OUT
DVD_SPDIF
UART
3V3_STBY KEYBOARD 3V3_VCC
2V5_VCC
1V5_VCC ACTIVE HOTEL TV Internal Wifi INTERNAL
3V3_STBY (95M) (95M)
1V2_VCC WI-FI
MAGIC
KEYBOARD 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 INTERFACE
BUTTON 3V3_STBY
.
A
LINE I2S SPDIF ETHER
SPI 5V_VCC /
RAM INTERFACE POWER NET SPI (16Mbit) 3V3_VCC
OUT GPIO I/O I/O B W/HUB (95M)
FLASH WO/HUB(95/95S)
3V3_STBY TOUCHPAD C USB2512B

USB Host (USB2 AND EXTERNAL WIFI)
Interface D
USB1
E
IRIN IR_IN LED 5V_VCC 5V_VCC
F TPS2553 TPS2553
USB Power USB Power
G Supply Switch Supply Switch
GPIO
5V_STBY
H
AZ099-4S AZ099-4S
I2C J ESD ESD
I2C MB95/95S Protection Protection
HW Reset K
RESET
Block CIRCUIT
3V3_STBY
HP_DETECT L
PROTECT CEC
M
KEYBOARD
N
BACKLIGHT_DIMMING Dimming
Dimming
Dimming Main
MSD8WB9BX
Circuitry P
GPIO
HDMI 3
TMDS_3
R
POWER
HDMI INTERFACE
LM1117
SC_Pin8 I2C_3 HDMI3_5V 5V_VCC
(95/95S)
3V3_VCC_TUNER (Common) BLOCK
Polarizer (Passive) Glass T
DVD_SENSE
5V_VCC or
HDMI 2
12V_VCC U TMDS_2 LM1117
HDMI2_5V 3V3_VCC 1V8_VCC_TUNER (Common)
(95/95S)
DISPLAY 2D/3D V
I2C_2
Panel Vcc W 3V3_VCC

SW (3V3_VCC_ BC807(95M) 1V8_VCC_TUNER (Common)
I2C_1
HDMI 1
Y TUNER)
HDMI1_5V
TMDS_1
LVDS INTERFACE
LVDS 1V2_VCC
AA ARC
(SINGLE & DUAL)
12V_VCC TPS6251 1V5_VCC (Common)
AB
XTAL 3V3_VCC
XIN/XOUT AC (24 Mhz)
AD 3V3_VCC APL5910 2V5_VCC (Common)
NAND CI TS0 TS1 HP DVB-T2 ANALOG AUDIO/VIDEO AE

Front-End
FLASH INTERFACE Input I/O OUT (only 95M) INTERFACE 5V_STBY
AP2111H
3V3_STBY (Adapter, ips, pw03, pw07, pw25, ips10, pw06)
3V3_VCC (95/95S)
NAND Flash NAND_CONTROL
SAV/VGA/YPbPr Audio_In
(128Mx8bit /
HP_L/R
MST_TS0
256Mx8bit)
YPbPr/SOY
PCM/NAND_DATA TLV70033
I/O_TS1
5V_STBY 3V3_STBY (Adapter, ips, pw03, pw07, pw25, ips10, pw06)
CVBS_IN .
(95M)
RGB/HS/VS
DVD_CVBS
SC1 CVBS_OUT
12V_VCC or
5V_VCC
PCM_ADDRESS
1V5_VCC
DIGITAL IF_T/C
DIGITAL IF_T/C
CI_TS0 or APL5910(95) 1V25_VCC (Satellite)

CI_TS1 3V3_VCC
HP_DETECT DVD_SENSE
(95M)
SC AUDIO_IN
SC CVBS_IN
SC RGB/FB
YPbPr DVD_SPDIF 12V_VCC 5V_VCC (pw03, pw07, pw82)
or TPS5428 or
VGA 12V_STBY 5V_STBY (Adapter, ips, pw06)
VIDEO
12V_STBY 12V_VCC (Adapter, ips, pw06)
S2_TS1
AMP. FDC642P
DVB-T2 / 5V_STBY FDC642P 5V_VCC (Adapter, ips, pw06)

T2_TS1
DVB-S/S2
1V25_VCC
3V3_VCC
BLOCK 12V_VCC (95M)

SI2156(95/95S)
I2C
SI2158(95M)
SPI XTAL RESET_TUN
(95M)
3V3_VCC (8Mbit) (24 Mhz) I2C_TUNER Silicon Tuner
(95) AGC_MAIN
LNBP M88D3002
(95) (95) (95)
MP8125(95)
LNBH29EPTR(95M)
M88DS3103
(95M)
SCART
MB95
SC_Pin8
DVB-S/S2
Demodulator RESET_IC DVB_T2 DEMOD I2C_DVB_T2
SC AUDIO_OUT MB95S
3V3_VCC_TUMER
1V8_VCC_TUMER
-
M88TS2022 I2C MSB1231 AGC_DVB_T2
LNB_Voltage H/V Selection Digital
Satellite
(95)
XTAL
(24 Mhz) MB95M
LNB Power Enable Tuner
DISEQC
LNB Overload
1V2_VCC
3V3_VCC
2V5_VCC
Block Diagram
56
1 2 3 4 5 6 7 8
CN6 HDMI0_5V
21 CN5
20 HDMI0_RX0N M1 RXA0N 21
R62 R82
1 1
HDMI0_RX2P HDMI0_HPDIN 1 2
HDMI0_RX0P N3 RXA0P RXC0N R1 20
10R 2
1k R97
2 HDMI0_RX1N N1 RXA1N RXC0P T3 1 1
HDMI2_RX2P
R69 10R
3 1 2
HDMI0_RX2N HDMI0_RX1P N2 RXA1P RXC1N T1 2
10R R141
R10
1k2
4 10R HDMI0_RX1P HDMI0_RX2N P3 RXA2N RXC1P T2 3 1 2
HDMI2_RX2N
1
2
10R
5 R67 HDMI0_RX2P P2 RXA2P RXC2N U3 4 10R HDMI2_RX1P
R70 3 1
HDMI0_CLKN M3 U2 R112
A 6 1
10R
2
HDMI0_RX1N R83 RXACKN RXC2P 5 R158 A
HDMI1
7 10R HDMI0_RX0P Q2 2 1 2
HDMI0_CLKP M2 RXACKP RXCCKN R3 6 1 2
HDMI2_RX1N
1k 10R
HDMI3
1
2
R68 BC848B HDMI0_SCL V5 R2 10R

8
9 1
R66
10R
2
10R
HDMI0_RX0N
1
C14
HDMI0_SDA V4
AD1
DDCDA_CK
DDCDA_DA HDMI / USB RXCCKP
DDCDC_CK V6
W6
7
8 R106
2
R124
HDMI2_RX0P
HDMI2_5V
1 2
10 1
2
HDMI0_CLKP HOTPLUGA DDCDC_DA 9 10R HDMI2_RX0N
11 R65 HDMI0_ARC N4 ARC0 3 HOTPLUGC AD4 10 10R HDMI2_CLKP
R71 1
12 1
10R
2
HDMI0_CLKN 1u 11 R160 R100
J1 F1
HDMI1_RX0N U4
HDMI1_5V
1 2
13 CEC 6V3 RXB0N RXD0N HDMI2_RX0N 12 10R HDMI2_CLKN
14 HDMI1_RX0P K3 RXB0P RXD0P G3 13 CEC
R64 HDMI2_RX0P
K1 G1
15 1
10R
2
HDMI0_SCL HDMI1_RX1N
K2
RXB1N MSD8WB9BX RXD1N
G2
HDMI2_RX1N 14 R99 HDMI0_ARC
16 1
10R 2
HDMI0_SDA HDMI1_RX1P RXB1P RXD1P HDMI2_RX1P R39 15 1
10R
2
HDMI2_SCL
17 R63 HDMI1_RX2N L3 RXB2N RXD2N H3 2 1
HDMI2_HPDIN 16 10R
HDMI2_RX2N 1k 1
2
HDMI2_SDA
18 HDMI1_RX2P L2 RXB2P RXD2P H2 17 R98
HDMI0_5V HDMI2_RX2P
19 10R HDMI1_HPDIN HDMI1_CLKN J3 RXBCKN RXDCKN F3 18
HDMI0_HPDIN R85 HDMI2_CLKN HDMI2_5V
GPIO55/LED[0]
GPIO56/LED[1]
1 2
1k2
R33
R72 1 2
HDMI1_CLKP J2 RXBCKP RXDCKP F2 19 10R
1k HDMI2_CLKP 1 2 HDMI2_HPDIN
2
HDMI1_SCL U5 DDCDB_CK DDCDD_CK R6 R166

HDMI2_SCL 3
2
R19
47k
R25
47k
R14
47k
HDMI1_SDA U6 DDCDB_DA DDCDD_DA T4 HDMI2_SDA R40
1k2
R31
47k
R30
47k
R32
47k
T5 R5 Q4
R8
2 1 2
HOTPLUGB HOTPLUGD 1k
DM_P0
DP_P0
DM_P1
DP_P1
BC848B
1
3
R86
T6
TN
TP
RP
RN
1
B CEC
1
CN4 Q5 2 1
R84
2
CEC 100R B
1k
BC848B
AD12
AC13
21 3V3_VCC
D1
D2
B5
B4
C5
C4
C6
A6
1
20 R61
1
1 10R HDMI1_RX2P
R130
R125
5k1
5k1
2 R54
1 2
3 10R HDMI1_RX2N ETH_RXN
USB_HUB_DN
USB_HUB_DP
USB1_DN
USB1_DP
4 1
10R HDMI1_RX1P ETH_RXP
5 R53 R56 ETH_YEL
1 2
6 10R HDMI1_RX1N ETH_TXP
HDMI2
7 2
10R HDMI1_RX0P ETH_GRN
8 R57 R55 ETH_TXN
1 2
9 10R HDMI1_RX0N
10 10R HDMI1_CLKP
R116
R122
1
5k1
5k1
11 R52 R58
1 2
12 10R HDMI1_CLKN
13 CEC
14 R59
1 2
15 10R HDMI1_SCL
C 16 1
10R 2
HDMI1_SDA C
17 R60
18 HDMI1_5V
19 1
10R 2 HDMI1_HPDIN
R51 R611
2
2
33k
1
24V_VCC_AU
R23
47k
R24
47k
R22
47k
R887
39k 10k
BAW56
24V_VCC_AU 1 2
D26
R188
1
3V3_STBY
R107 1
10k 2
12V_VCC
15k 12V_VCC R185
10k
3V3_STBY
3V3_STBY
3V3_STBY
3V3_STBY
3V3_STBY
3V3_STBY
1 2
2
R258 3V3_STBY R186
3V3_STBY
R13
4k7
220R 5V_VCC
R192
10k
1
2 1
U28 10k 1 2 3V3_VCC_TUNER
MAX809LTR R712
PROTECT
3
BAW56
C562
R108
10k
D24
VCC 100n
RST GND
2
2
D 16V 5V_VCC D
R129
R123
R142
TP7
4k7
4k7
4k7
2 1 BC858B 1
10k 2
Q35R191 R195
2
1
10k
1
1 2
10k
R128
R144
1 2
4k7
R93
4k7
4k7
R12
AUX_RESET 4k7 R194
C52 2
1
100n R190
USB_ENABLE C7 GPIO36 GPIO6 K5 10V
1
1 2
LED1 10k
FLASH_WP_T2 E3 GPIO37 GPIO7/PM_UART1_TX M5 TX_HOTEL Q8
DVD_IR_ON/OFF F5 GPIO38 GPIO8 K6 BC848B
LED2
PCM_CD1 R110 B6 GPIO39 GPIO12/CSZ1 L5 SPI_CS
2
3V3_STBY 1 2 E2 GPIO40 GPIO10 J4
4k7 STBY_ON/OFF_NOT
R189
10k
EXT_RESET D5 GPIO41 GPIO11/PM_UART1_RX M4 1
4k7 2 DVD_WAKEUP
PROTECT B7 GPIO42 GPIO13 M7 S12 R11
4k7 M6
1
3V3_STBY 1 2 GPIO14 FLASH_WP RX_HOTEL
AMP_MUTE R126 D4 GPIO43/UART2_TX GPIO15 K4 R114 TOUCHPAD_SCL
S2_RESET E4 GPIO44/UART2_RX GPIO16 D3 100R AUX_RESET
HP_DETECT D7 GPIO45 GPIO17 L6 R261 TOUCHPAD_SDA
D6 GPIO46 GPIO18 N6 100R HP_MUTE
1V2 -1V5 - 2V5 - 3V3 FROM ICs POWER GOOD PINS
B8
E CI_PWR_CTRL GPIO47/UART4_TX R127 E
R697
1k 3V3_VCC 1
4k7
R103
2
A8
F7
GPIO48/UART4_RX
GPIO49 9
1
4k7
2
3V3_STBY
SHORT CCT PROTECTION
R715 RESET_USB A9 GPIO51 PWM0 N24 PWM0
F4 U4 N25
PANEL_VCC 2k7
R168
GPIO52
MSD8WB9BX
PWM1
PWM2 P23
PWM1
3D_EN T2 DEMOD SPI FLASH
TP107
3V3_VCC 18k R662 C3 GPIO58 PWM3 N23 BACKLIGHT_DIM
HDMI2_5V
A3 F6 1N5819
HDMI1_5V R663 18k GPIO61
GPIO PWM_PM PWM_OUT_LED3
TP111
C32
18k B3 GPIO62 3V3_VCC
HDMI0_5V
2
D10
BACKLIGHT_ON/OFF
R121
4k7
TUNER_RST AA18 GPIO131 R4

U6
6V3
U22 G5
22u
PANEL_VCC_ON/OFF GPIO132 SAR0 3V3_VCC 4k7
AB22 H5 MX25L512
1
R119 GPIO133 SAR1 KEYBOARD SPI_CS_T2 C48

T22 H6 1 8
NC_7
NC_6
NC_5
NC_4
NC_3
NC_2
NC_1
NC_0
4k7 GPIO134 SAR2 SC_PIN8 CS# VCC R3

W21 GPIO135 SAR3 J6 DVD_SENSE 33R 2 SO HOLD# 7 4k7 100n 10V
SPI_DO_T2
R151 3 WP# SCLK 6
2
Q10 4 5
AE25
2 1
FLASH_WP_T2 33R GND SI 33R
AE1
U23
T25
T24
T23
A25
4k7 SPI_CLK_T2
R614
R613
R214
R111
A1
R109
R294
R143
R283
33k
33k
33k
4k7
4k7
4k7
4k7
4k7
BC848B R120 R260 R219

6V3 1u
C29
TP1
TP65
33R SPI_DI_T2
R181
2
10k
F
1
R218 F
R140
4k7
TP118
C5V6
D19
SPI_CS_T2
SPI_DO_T2
SPI_DI_T2
SPI_CLK_T2
3V3_VCC
3V3_VCC
1
TP112
3V3_STBY
3V3_VCC
3V3_VCC
VESTEL PROJECT NAME : 17mb95m-r2 A3

3V3_VCC
SCH NAME :01_HDMI_GPIO_PORT T. SHT:10

DRAWN BY :<YOUR NAME HERE> 15-11-2013_16:31
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
1V5_VCC 1V5_VCC
C257 C258 C259 C260 C261 C262 C264 C265 C266 C268
1k DDR0_VREFCA 1k DDR1_VREFDQ 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n
R410 R408 F12 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
1V5_VCC 1V5_DDR0
R411
C247
C323
R409
C246
C322
100n
16V
50V
100n
16V
50V
60R
1k
1k
A C248 C249 C250 C251 C252 C253 C254 C255 C256 A
1n
1n
C213
10u 100n 100n 100n 100n 100n 100n 100n 100n 100n
1V5_VCC 10V 16V 16V 16V 16V 16V 16V 16V 16V 16V
1V5_VCC
1k DDR0_VREFDQ
R414 1k DDR1_VREFCA
R413
R415
C267
C325
100n
16V
50V
1k
1n
R412
C263
C324
100n
16V
50V
1k
C278 C279 C280 C281 C282 C283 C284 C285 C286 C287
1n
100n 100n 100n 100n 100n 100n 100n 100n 100n 100n
F13 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
1V5_VCC 1V5_DDR1
60R C214 C269 C270 C271 C272 C273 C274 C275 C276 C277
10u 100n 100n 100n 100n 100n 100n 100n 100n 100n PL1
10V 16V 16V 16V 16V 16V 16V 16V 16V 16V
GROUND TERMINALS
PL4
B B
PL3
PL2
1V5_DDR0
U4 1V5_DDR1
MSD8WB9BX
DDR0_A00 A11 A_DDR3_A0 B_DDR3_A0 B23 DDR1_A00
C14 1 D25
DDR0_A01 A_DDR3_A1 B_DDR3_A1 DDR1_A01
B11 F22
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9

F12 G22
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
N3 C15 E24
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
DDR0_A00
P7
A0 DDR0_A04
E12
A_DDR3_A4
DDR3 B_DDR3_A4
F21
DDR1_A04
N3
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
C DDR0_A01
P3
A1 DDR0_A05
A14
A_DDR3_A5 B_DDR3_A5
E23
DDR1_A05 DDR1_A00
P7
A0 C
DDR0_A02 A2 DDR0_A06 A_DDR3_A6 B_DDR3_A6 DDR1_A06 DDR1_A01 A1
DDR0_A03 N2 A3 DDR0_A07 D11 A_DDR3_A7 B_DDR3_A7 D22 DDR1_A07 DDR1_A02 P3 A2
DDR0_A04 P8 A4 VREF_DQ H1 DDR0_VREFDQ DDR0_A08 B14 A_DDR3_A8 B_DDR3_A8 D24 DDR1_A08 DDR1_A03 N2 A3
DDR0_A05 P2 A5 VREF_CA M8 DDR0_VREFCA DDR0_A09 D12 A_DDR3_A9 B_DDR3_A9 D21 DDR1_A09 DDR1_A04 P8 A4 VREF_DQ H1 DDR1_VREFDQ
DDR0_A06 R8 A6 DDR0_A10 C16 A_DDR3_A10 B_DDR3_A10 C24 DDR1_A10 DDR1_A05 P2 A5 VREF_CA M8 DDR1_VREFCA
DDR0_A07 R2 A7 DQL0 E3 DDR0_DQL0 DDR0_A11 C13 A_DDR3_A11 B_DDR3_A11 C25 DDR1_A11 DDR1_A06 R8 A6
DDR0_A08 T8 A8 DQL1 F7 DDR0_DQL1 DDR0_A12 A15 A_DDR3_A12 B_DDR3_A12 F23 DDR1_A12 DDR1_A07 R2 A7 DQL0 E3 DDR1_DQL0
DDR0_A09 R3 A9 DQL2 F2 DDR0_DQL2 DDR0_A13 E11 A_DDR3_A13 B_DDR3_A13 E21 DDR1_A13 DDR1_A08 T8 A8 DQL1 F7 DDR1_DQL1
DDR0_A10 L7 A10/AP DQL3 F8 DDR0_DQL3 B13 A_DDR3_A14 B_DDR3_A14 D23 DDR1_A09 R3 A9 DQL2 F2 DDR1_DQL2
DDR0_A11 R7 A11 DQL4 H3 DDR0_DQL4 DDR1_A10 L7 A10/AP DQL3 F8 DDR1_DQL3
DDR0_A12 N7 A12/BC DQL5 H8 DDR0_DQL5 DDR0_DQL0 D17 A_DDR3_DQL0 B_DDR3_DQL0 L23 DDR1_DQL0 DDR1_A11 R7 A11 DQL4 H3 DDR1_DQL4
DDR0_A13 T3 A13 DQL6 G2 DDR0_DQL6 DDR0_DQL1 G15 A_DDR3_DQL1 B_DDR3_DQL1 J24 DDR1_DQL1 DDR1_A12 N7 A12/BC DQL5 H8 DDR1_DQL5
DQL7 H7 DDR0_DQL7 DDR0_DQL2 B21 A_DDR3_DQL2 B_DDR3_DQL2 L24 DDR1_DQL2 DDR1_A13 T3 A13 DQL6 G2 DDR1_DQL6
J1 NC1 DDR0_DQL3 F15 A_DDR3_DQL3 B_DDR3_DQL3 J23 DDR1_DQL3 DQL7 H7 DDR1_DQL7
L1 NC2 DQU0 D7 DDR0_DQU0 DDR0_DQL4 B22 A_DDR3_DQL4 B_DDR3_DQL4 M24 DDR1_DQL4 J1 NC1
M7 NC3 DQU1 C3 DDR0_DQU1 DDR0_DQL5 F14 A_DDR3_DQL5 B_DDR3_DQL5 H23 DDR1_DQL5 L1 NC2 DQU0 D7 DDR1_DQU0
L9 C8 A22 M23 M7 C3
NC4 U7 DQU2 DDR0_DQU2 DDR0_DQL6 A_DDR3_DQL6 B_DDR3_DQL6 DDR1_DQL6 NC3 DQU1 DDR1_DQU1
DDR0_CKB
T7 C2 D15 K23 L9 C8
U8
DDR0_CK
NC5 DQU3 DDR0_DQU3 DDR0_DQL7 A_DDR3_DQL7 B_DDR3_DQL7 DDR1_DQL7 NC4 DQU2 DDR1_DQU2
DDR1_CKB
J9 A7 T7 C2
H5TQ2G63BFR-PB
DDR1_CK
D NC6 DQU4
A2
DDR0_DQU4
G16 G21 J9
NC5 DQU3
A7
DDR1_DQU3 D
M2
DQU5
B8
DDR0_DQU5 DDR0_DQU0
B20
A_DDR3_DQU0 B_DDR3_DQU0
L22
DDR1_DQU0 NC6 H5TQ2G63BFR-PB DQU4
A2
DDR1_DQU4
DDR0_BA0 BA0 DQU6 DDR0_DQU6 DDR0_DQU1 A_DDR3_DQU1 B_DDR3_DQU1 DDR1_DQU1 DQU5 DDR1_DQU5
DDR0_BA1 N8 BA1 DQU7 A3 DDR0_DQU7 DDR0_DQU2 F16 A_DDR3_DQU2 B_DDR3_DQU2 H22 DDR1_DQU2 DDR1_BA0 M2 BA0 DQU6 B8 DDR1_DQU6
DDR0_BA2 M3 BA2 DDR0_DQU3 C21 A_DDR3_DQU3 B_DDR3_DQU3 K20 DDR1_DQU3 DDR1_BA1 N8 BA1 DQU7 A3 DDR1_DQU7
DQSL_0 F3 DDR0_DQSL DDR0_DQU4 E16 A_DDR3_DQU4 B_DDR3_DQU4 H20 DDR1_DQU4 DDR1_BA2 M3 BA2
J7 CK_0 DQSL_1 G3 DDR0_DQSLB DDR0_DQU5 A20 A_DDR3_DQU5 B_DDR3_DQU5 L21 DDR1_DQU5 DQSL_0 F3 DDR1_DQSL
K7 CK_1 DDR0_DQU6 D16 A_DDR3_DQU6 B_DDR3_DQU6 H21 DDR1_DQU6 J7 CK_0 DQSL_1 G3 DDR1_DQSLB
DQSU_1 B7 DDR0_DQSUB DDR0_DQU7 C20 A_DDR3_DQU7 B_DDR3_DQU7 K21 DDR1_DQU7 K7 CK_1
DDR0_CKE K9 CKE DQSU_0 C7 DDR0_DQSU DQSU_1 B7 DDR1_DQSUB
R321
R322
56R
56R
DDR0_CASB A12 A_DDR3_CASZ B_DDR3_CASZ B24 DDR1_CASB DDR1_CKE K9 CKE DQSU_0 C7 DDR1_DQSU
R323
R324
56R
56R
L2 CS DML E7 DDR0_DML DDR0_RASB B12 A_DDR3_RASZ B_DDR3_RASZ B25 DDR1_RASB
DMU D3 DDR0_DMU DDR0_WEB C12 A_DDR3_WEZ B_DDR3_WEZ A24 DDR1_WEB L2 CS DML E7 DDR1_DML
DDR0_RASB J3 RAS DDR0_DML E15 A_DDR3_DML B_DDR3_DML H24 DDR1_DML DMU D3 DDR1_DMU
DDR0_CASB K3 CAS ODT K1 DDR0_ODT DDR0_DMU A21 A_DDR3_DMU B_DDR3_DMU L20 DDR1_DMU DDR1_RASB J3 RAS
C342
16V
L3 E14 D20 K3 K1
10n
DDR0_WEB WE DDR0_ODT A_DDR3_ODT B_DDR3_ODT DDR1_ODT DDR1_CASB CAS ODT DDR1_ODT
C343
16V
F13 G20 L3
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
10n
DDR0_BA0 A_DDR3_BA0 B_DDR3_BA0 DDR1_BA0 DDR1_WEB WE
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
T2 B15 F24
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
DDR0_RESETB RESET DDR0_BA1 A_DDR3_BA1 B_DDR3_BA1 DDR1_BA1
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
R418 L8 ZQ DDR0_BA2 E13 A_DDR3_BA2 B_DDR3_BA2 F20 DDR1_BA2 DDR1_RESETB T2 RESET
F11 E20 L8
E 240R DDR0_RESETB
B16
A_DDR3_RESET B_DDR3_RESET
F25
DDR1_RESETB R421 ZQ E
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DDR0_CKE A_DDR3_CKE B_DDR3_CKE DDR1_CKE 240R

C17 G25
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DDR0_CK A_DDR3_MCLK B_DDR3_MCLK DDR1_CK
DDR0_CKB A17 A_DDR3_MCLKZ B_DDR3_MCLKZ G23 DDR1_CKB
DDR0_DQSL B19 A_DDR3_DQSL B_DDR3_DQSL K24 DDR1_DQSL
DDR0_DQSLB C18 A_DDR3_DQSLB B_DDR3_DQSLB K25 DDR1_DQSLB
DDR0_DQSU B18 A_DDR3_DQSU B_DDR3_DQSU J21 DDR1_DQSU
DDR0_DQSUB A18 A_DDR3_DQSUB B_DDR3_DQSUB J20 DDR1_DQSUB
F F

SCH NAME :02_MSTAR_DDR3 T. SHT:10
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
Ethernet lines must be 100ohm differential pairs

NAND_ALE R21 NF_ALE PCM_D[0]/NF_AD[0] V20 PCMNANDD0
5
1 NC1 NC29 48 NAND_WPZ W20 NF_WPZ PCM_D[1]/NF_AD[1] AD22 PCMNANDD1
Y20 AB21 Place these resistors
CDA4C16GTH
3V3_NAND
NAND_CEZ NF_CEZ PCM_D[2]/NF_AD[2] PCMNANDD2
2 47 AC21 AE17 close to MSTAR
D12
NC2 NC28 NAND_CLE NF_CLE PCM_D[3]/NF_AD[3] PCMNANDD3
NAND_REZ P21 NF_REZ PCM_D[4]/NF_AD[4] AC18 PCMNANDD4
3 NC3 NC27 46 NAND_WEZ P22 NF_WEZ PCM_D[5]/NF_AD[5] AE18 PCMNANDD5 C21
NAND_RBZ Y21 NF_RBZ PCM_D[6]/NF_AD[6] AA19 PCMNANDD6 100n
R169
R170
1
47R
47R
4 45 P20 AD18 16V
A NC4 NC26 NF_CEZ1 PCM_D[7]/NF_AD[7] PCMNANDD7 CN10 A
R883 S14
5 NC5 I/O7 44 75R PCM_A[0] AA21 PCMA0 ETH_TXP 1 TD+
PCM_NAND_D7
R574
S16
3k9
Y22
6 NC6 I/O6 43
R882
75R
R881
PCM_NAND_D6 CI/NAND 4
PCM_A[1]
PCM_A[2]
PCM_A[3]
R20
W19
PCMA1
PCMA2
PCMA3
RX_HOTEL
ETH_TXN
TX_HOTEL
S13
S17
2 TD-
NAND_RBZ
7 RB I/O5 42 75R PCM_NAND_D5 PCM_A[4] T20 PCMA4 Place these capacitors 3 TCT
AA22 close to transformer
8 41
R880 U4 PCM_A[5]
V21
PCMA5
speed nets, except for the 4
NAND_REZ R I/O4 75R PCM_NAND_D4 PCM_A[6] PCMA6 ETH_RXP RD+
MSD8WB9BX PCM_A[7] AB16 PCMA7 chassis ground.
9 E NC25 40 PCM_A[8] W22 PCMA8 Also keep traces short and ETH_RXN 5 RD-
NAND_CEZ
SPI_CLK A2 SPI_CK PCM_A[9] AE20 PCMA9 route as matched length
10 NC7 NC24 39 SPI_DI B2 SPI_DI PCM_A[10] AD19 PCMA10 differential pairs. Do not place 6 RCT
R171
R172
47R
47R
B1 AB17
11 38
SPI_DO
C2
SPI_DO PCM_A[11]
AB20
PCMA11 any parts or traces under the S18 7
NC8 NC23 TEST1 PCM_A[12] PCMA12 transformer. HOTEL_IR NC1
C1 SPI_CZ PCM_A[13] AC20 PCMA13 Place these resistors
12
U13 37 AE21 BC848B close to MSTAR C22 8
3V3_NAND VDD1 VDD2 3V3_NAND PCM_A[14] PCMA14 NC2
R240
10k
Q24
NAND128-A 100n
13 VSS1 VSS2 36 PCM_IRQA_N Y19 HOTEL_IR IR_IN 16V ETH_GRN 510R 9 GR+
PCMIRQA 1 3
AD20
B 14 35
PCM_OE_N
AC19
PCMOE R134
10 B
NC9 NC22 PCM_IORD_N PCMIORD 2
F52 TP32 GR-
PCM_CE_N AB18 PCMCE 2V5_VCC
15 34 AD21 60R 11
NC10 NC21 PCM_WE_N PCMWE 1u C127 C20ETH_YEL 510R YL+
3V3_STBY
PCM_CD_N AB19 4k7 F23 100n R137
PCMCD2 1 2 5V_STBY
16 CL NC20 33 PCM_RST T21 PCMRST R102 5V_STBY 16V 16V 12 YL-
NAND_CLE
R879 PCM_REG_N AA20 PCMREG 60R
17 AL I/O3 32 75R PCM_IOWR_N Y18 PCMIOWR 13 SHLD1
NAND_ALE PCM_NAND_D3
U21
TP64
BSH103
R878 PCM_WAIT_N PCMWAIT
18 W I/O2 31 75R 14 SHLD2
NAND_WEZ PCM_NAND_D2
Q30
R877
19 WP I/O1 30 75R F15
NAND_WPZ PCM_NAND_D1
1
R876
MSTAR SPI FLASH 5V_VCC CI_PWR R586
C101
100n
2
3
20 29 60R
10V
NC11 I/O0 75R PCM_NAND_D0 C3 C99 C100 TS0CLK 33R TS0_CLK
C149
6V3
220u
2 2
1N5819 10u 100n 100n
1
TP113
21 28 10V
1 1
1
NC12 NC19 3V3_STBY 10V 10V R504
3V3_STBY D5 TS1CLK 33R TS1_CLK
22 NC13 NC18 27 C98
TP114
C44810p R590
R153
4k7
23 26 6V3
C NC14 NC17 100n 22u
12V_VCC 1
R316
2 1
R317
2 8
33R
1 C
10V 47k 47k 50V TS0D3 R1 TS0_D3
24 NC15 NC16 25 R507
U10
33R
MX25L512 3
7 R2 2 TS0_D4
SPI_CS C4 R242 TS0D4
R506 1 CS# VCC 8 R808 CI_PWR_CTRL 1 2 2
Q31
10k
33R 2 SO HOLD# 7 4k7 R509 BC847B 6 R3 3 TS0_D5
SPI_DO TS0D5
3 WP# SCLK 6 33R
1
SPI_CLK R585
F51 3V3_NAND TP115 4 GND SI 5 1
TP110 33R 5 R4 4 TS0_D6
TS0D6
3V3_VCC TP116 8 1 TS1_D5
TS1D5 R1
60R R505 TP117 R508
100n C291 100n C292 R589
FLASH_WP 33R 33R 7 R2 2 TS0_VLD 33R
16V 16V
R152 1
TP109
SPI_DI
RESET TS0VLD
TS1D7
6 R3 3 TS1_D7
TS0D7
8
7 R2 2
R1
1 TS0_D7
3V3_STBY 4k7 TS1SYNC TS1_SYNC

5 R4 4 TS1_D6
S221 TS1D6
R331 6 R3 3 TS1_D0
TS1D0
3V3_STBY 1k
5 R4 4 TS1_D1
3V3_VCC TS1D1
C103
2
100n
10V
R510
D
1
PCMCD2 33R PCM_CD2 C394 R587 R588 D
R243
10k
22u 33R 33R
R577 R584 CN9 16V TS0SYNC
8
R1
1 TS0_SYNC TS1D2
8
R1
1 TS1_D2
33R 33R R503 35 1 RESET
1 8 PCM_NAND_D2 1 8 PCM_A6 PCM_CD1 33R 36 2 7 R2 2 TS0_D0 7 R2 2 TS1_D3
PCMNANDD2 R1 PCMA6 R1 PCM_NAND_D3 TS0D0 TS1D3
1N4148
TS0_D3 37 3 PCM_NAND_D4 C102
R245
10k
2 R2 7 2 R2 7 2
6 R3 3 6 R3 3
D3
PCMNANDD1 PCM_NAND_D1 PCMA7 PCM_A7 TS0_D4 38 4 PCM_NAND_D5 100n TS0D1 TS0_D1 TS1D4 TS1_D4
1
TS0_D5 39 5 PCM_NAND_D6 10V

3 R3 6 PCM_NAND_D0 PCMIRQA 3 R3 6 40 6 5 R4 4 TS0_D2 5 R4 4 TS1_VLD
PCMNANDD0 PCM_IRQA TS0_D6 PCM_NAND_D7 TS0D2 TS1VLD
3V3_VCC 4k7 TS0_D7 41 7 PCM_CE
C390
50V
4 R4 5 4 R4 5
33p
PCMA0 PCM_A0 PCMA12 PCM_A12 R76 42 8 PCM_A10 TP211
4k7 43 9 PCM_OE RESET 2
100R 1
R184 44 10 R361 N5 RESET TS1_D[0] AC14 TS1D0

R578 PCM_IORD PCM_A11 CI_PWR
33R 45 11 24MHz TS1_D[1] AD14 TS1D1
R583 PCM_IOWR PCM_A9
1 8 PCM_NAND_D6 33R 4k7 46 12 TS1_D[2] AE14 TS1D2
PCMNANDD6 R1 3V3_VCC TS1_SYNC PCM_A8
R154
R395
3 2
4k7
1 8 AE3 AD15
1M
PCMWE R1 PCM_WE R716 TS1_D0 47 13 PCM_A13 XIN TS1_D[3] TS1D3
2 R2 7 4 1 AE2 AC15
PCMNANDD5 PCM_NAND_D5 3V3_VCC 4k7 TS1_D1 48 14 PCM_A14 XOUT TS1_D[4] TS1D4
33p C391
2 R2 7 PCM_A14 R735 49 15 X10 TS1_D[5] AD16 TS1D5
PCMA14 TS1_D2 PCM_WE
3 R3 6 PCM_NAND_D4 50 16 PCM_IRQA TS1_D[6] AD17 TS1D6
PCMNANDD4 TS1_D3
50V
3 R3 6 100R G4 AC17
E 4 R4 5
PCMA13 PCM_A13 CI_PWR 51 17 CI_PWR IR_IN 2
R362
1 IRIN TS1_D[7]
AC16
TS1D7 E
PCMNANDD3 PCM_NAND_D3 52 18 D36 8 TS1_CLK TS1CLK
4 R4 5 PCM_A8 53 19
1 2
TS1_VLD AE15 TS1VLD
PCMA8 TS1_D4 TS1_VLD
AD13
R579 TS1_D5 54 20 TS1_CLK C5V6 U4 TS1_SYNC TS1SYNC
33R R582 TS1_D6 55 21 PCM_A12
1 8 Y16
PCMA1 R1 PCM_A1
1
33R
8
TS1_D7 56 22 PCM_A7 3V3_VCC 1 4k7 2 MSD8WB9BX TS0_D[0]
AA17
TS0D0
PCMA9 R1 PCM_A9 TS0_CLK 57 23 PCM_A6 R295 TS0_D[1] TS0D1
2 R2 7 PCM_A2 58 24 UART-RX-SC P5 DDCA_CK/UART0_RX TS0_D[2] AA16 TS0D2
PCMA2 PCM_RST PCM_A5
2 R2 7 PCM_IOWR PCM_WAIT 59 25 UART-TX-SC R4 DDCA_DA/UART0_TX TS0_D[3] Y13 TS0D3
PCMIOWR PCM_A4
3 R3 6 PCM_A3 60 26 R23 UART3_RX/GPIO64 TS0_D[4] AA13 TS0D4
PCMA3 PCM_A3
3 R3 6 PCM_A11 61 27 3D_SYNC_OUT P24 UART3_TX/GPIO65 TS0_D[5] AA14 TS0D5
PCMA11 PCM_REG PCM_A2
R155
4k7
4 R4 5 PCM_REG 62 28 TP209 TS0_D[6] AB14 TS0D6

PCMREG TS0_VLD PCM_A1
4 R4 5 PCM_OE 63 29 TP210 TS0_D[7] AA15 TS0D7
PCMOE TS0_SYNC PCM_A0
64 30 TS0_CLK AB15 TS0CLK
R580 TS0_D0 PCM_NAND_D0
33R CI_PWR 65 31 SYS_SCL R24 DDCR_CK TS0_VLD Y15 TS0VLD
R581 TS0_D1 PCM_NAND_D1
PCMWAIT 1 8 33R 66 32 SYS_SDA R25 DDCR_DA TS0_SYNC Y14 TS0SYNC
R1 PCM_WAIT TS0_D2 PCM_NAND_D2
1 8 PCM_IORD PCM_CD2 67 33 4k7
PCMIORD R1 CI_PWR
1
2 R2 7 PCM_A4 68 34 R320
PCMA4
R157
R156
4k7
4k7
2 R2 7 PCM_A10
PCMA10
R244
10k
3 R3 6
F PCMA5 PCM_A5
3 R3 6 F
2
PCMCE PCM_CE
4 R4 5 PCM_RST 3V3_VCC
PCMRST
4 R4 5 PCM_NAND_D7
PCMNANDD7 3V3_VCC

SCH NAME :03_CI_ETH_NAND T. SHT:10
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
3V3_VCC_TUNER
24MHz 3R3
3V3_VCC_TUNER
R381
2R2
A I2C ADDR: C0 C158 X1 C161 30051799
1 TP96
USB & WIFI A
1
22p 27MHz 22p 30010731 60R
2
C344 Q131
50V 50V 4
R113
100R
2 1 2
BC858B
F6
3
1n2 3
560nH
1
50V 1V8_VCC_TUNER TP91 R74
L107
1
6 IO4 IO1 1
12n
1 2
C348 C471 2 10R USB2_DP
C360
50V
21
20
19
18
17
16
15
1n2
50V 1u 2u2 1 TP92 U1
180p 6V3 6V3 1
1 2
USB_VCC 5 VDD GND 2
C12 330R
VDD_H3
VDD_H2
GND2
XTAL_O
XTAL_I
XOUT
LDO_ADJ
C143 USB_VCC AZ099-04S R311
1
8 6 4 2 22 14 4 IO3
C352 RF_REF VDD_L CN17 10u 10u F69 IO2 3 1
10R
2
USB2_DN
C350 C351
TP97
R308 10V 10V
JK11 1 23 RF_IP ALIF_P 13 470R R309
C353 R73 R312 1
10R
2
USB1_DN
47p 68p 24 12 60R
50V 50V RF_IN ALIF_N 470R 820R 1 2 R310
9 7 5 3
L109 180p 25
U18 11
4 1 TP98 F5 1
10R
2
USB1_DP
12n
180nH 50V RF_SHLD DLIF_P 1 TP100
390n
SI2158
L1
L110 3
26 10
B 12n
ADDR VDD_H1 3V3_VCC_TUNER 1 TP101 B
C113 R187 2
180p TUNER_RST 560nH 27 RSTB DLIF_N 9 F70 330R
33R
VDD_IO
1 2
50V 1 USB_VCC
GPIO1
GPIO2
28 8
AGC2
GND1
AGC1 VDD_D 1V8_VCC_TUNER C114
SCL
SDA
1
CN18 10u C115
R196
10k
50V
DIGITAL_IF_N
DIGITAL_IF_P
C1
12p
TP99
10V 10u
C349
50V
1n2
10V
7
D_IF_AGC 3V3_VCC_TUNER
R118 C160 16V
TUNER_SCL 100R
R150 100n
TUNER_SDA 100R 5V_VCC 1 IN OUT 6 USB_VCC
U2
2 GND ILIM 5 560R
TPS2553-1 R193
3 EN FAULT 4
C USB_ENABLE 560R C
R75
F86 R333
60R 60R 3V3_VCC 10k IF_AGC
3V3_VCC 3V3_VCC_TUNER 60R
C110
1 2 1 2
100n 10V
100n 10V
100n 10V
100n 10V
100n
10V
F68 C157 F24
C156
C163
10u 10u
C164
C144
C153
C154
47p
6V3 6V3
S100 R307
IF_AGC 100R D_IF_AGC
C162
C159
16V
10V
100n
22n
C234
RESET_USB
100n
10V Close To Concept IC
Close To SI2156
D R291 D
3V3_USB
OPTIONAL RESISTORS
S7
3V3_USB 100k
16V 1u
C233
R292
100k
R293
100k
2
R556
R557
R558
OPTIONAL
2
75R
75R
75R
R560
75R
16V R596
47n Y3 Y5 C188
1
68R RIN0M VCOM 68R
C186 16V47n W2 47n
27
26
25
24
23
22
21
20
19
1
VGA_R R595 33R RIN0P 16V R513
C196 16V W1 Y4 C187 SC_CVBS_IN
68R R519 GIN0M CVBS0 33R R517
C185 47n W3 W5 47n C195
VBUS_DET
RESET_N
CFG_SEL1
SCL/CFG_SEL0
VDD33_4
SDA
NC_4
NC_3
OCS_N3
R287 VGA_G R594 33R GIN0P CVBS1 R520 33R SAV_CVBS

28 18 C184 16V V2 W4 C197
100k LOCAL_PWR PRTPWR3 68R R512 BIN0M CVBS2 33R R518 SC_R
R593 33R
C183 47n V3 BIN0P CVBS3 AB5 47n 16V C198 33R
VGA_B C182 16V 47n DVD_CVBS
3V3_USB 29 VDDA33_5 OCS_N2 17 R511 V1 SOGIN0
VGA_G
C326 1n AC1 HSYNC0
VGA_HSNC CVBS0_OUT
30 USBDM_UP PRTPWR2 16 AC2 VSYNC0 CVBSOUT1 AA4 C106
USB_HUB_DN VGA_VSNC 50V
C229 CVBSOUT2 AB4 DIGITAL_IF_P
31 15 47n AB2
USB_HUB_DP USBDP_UP VDD33_3 3V3_USB 68R RIN1M 5 100n 10V
C231 C190 16V47n AB1 AE6
18p 24MHz
32
U15 14
SC_R R597 33R
C189 16V AB3
RIN1P
U4 IP
AD6
C107
E 50V XTALOUT CRFILT 68R R514 GIN1M IM DIGITAL_IF_N E
R286
3 2 C191 47n AA1

1M
USB2512B 1u 6V3 SC_G R598 33R GIN1P MSD8WB9BX 100n 10V

C235
4 1 33 13 C192 16V AA3 AD7

10u
16V
XTALIN/CLKIN OCS_N1 330R 5V_VCC 68R R515 BIN1M VIFP 24MHz

C230 C232 C193 47n Y2 AC7
C17827p
18p
X4
R285 1u 6V3
34 PLLFILT PRTPWR1 12
TP137 1 CN19 F25
3V3_VCC
SC_B
SC_CVBS_IN
R599 33R
R516
C194 16V
C329 1n
AA2
AC3
BIN1P
SOGIN1
HSYNC1
VIDEO VIFM
SIFP AC8 C17727p

3
4
2
1
USBDM_DN1
USBDP_DN1
USBDM_DN2
USBDP_DN2
USBDM_DN3
USBDP_DN3
35 11 330R AC4 AD8

50V 12k RBIAS TEST USB_BT_DP 1 2 SC_FB VSYNC1 SIFM X2
VDD33_1
36 10
1 TP132
F17
47n AA8 AC5 T2 XTAL
NC_1
NC_2
3V3_USB VDD33_6 VDD33_2 3V3_USB USB_BT_DN 3 4 68R RIN2M IFAGC IF_AGC

C200 16V47n Y7 AD5
TP138 1
PR_IN R600 33R RIN2P RFAGC
C199 16V AA7
5 6 3D_SYNC_OUT 68R R521 GIN2M
C201 47n Y6
TP133 R601 33R GIN2P
1
1
Y_IN C202 16V
USB_WIFI_DN 7 8 68R R522 AB6 BIN2M TGPIO0/GPIO73 AD3 R117
S27 C203 47n AA6 AD2 1 2
USB2_DP USB_HUB_DP 1
TP135 PB_IN R602 33R BIN2P TGPIO1/GPIO74 4k7 3V3_VCC
C204 16V AA5 AC6
S26 USB_WIFI_DP 9 10 Y_IN 470R R523 SOGIN2 TGPIO2/GPIO75 TUNER_SCL
USB2_DN
USB2_DP
USB_WIFI_DN
USB_WIFI_DP
3V3_USB
USB_BT_DN
USB_BT_DP
TP134 R888 AB8 HSYNC2 TGPIO3/GPIO76 AE5

USB2_DN USB_HUB_DN 1
1n TUNER_SDA
S23 C327
1
USB_WIFI_DP USB_HUB_DP
R161
R162
4k7
4k7
S24
F USB_WIFI_DN USB_HUB_DN F
2
S33 F26
USB_BT_DP USB_HUB_DP 3V3_VCC 3V3_USB 3V3_VCC
60R C228 C227 C226 C225 C224 C223 C222
S32
USB_BT_DN USB_HUB_DN 10u 100n 100n 100n 100n 100n 100n
10V 16V 16V 16V 16V 16V 16V
SCH NAME :04_TUNER_USB_WIFI T. SHT:10
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
3V3_STBY
W/B2CABLE LDO1
C477
C473
50V
50V
4n7
4n7
A A
12V_STBY
R822 DC/DC1
R647
R646
20k
20k
U21 30069495 560R 50V 50V
CN2 LM1117 4n7 4n7
TP72
3 IN OUT 2 50V
FB1
FB3
TP119 2 1 5V_STBY 3V3_STBY
R821
R658
390k
18k
C1213 C1214 C119 4n7
TP120
4 3
TP121
6V3
22u
ADJ
1
VOUT
4
6V3
22u
10V
100n C1207
C475
R394
100k
C472
R644
120k 50V
4n7
DC/DC3
6 5 DIMMING FB1
10
TP122
1
8 7 BACKLIGHT_ON/OFF
C478
R255
C1208
50V
10k
4n7
RLIM1
SS1
CMP1
FB1
ROSC
SYNC
FB3
CMP3
SS3
RLIM3
TP123 C460
10 9 STBY_ON/OFF 10u 16V EN1 EN3 16V
47n 11 40 47n
S25 VIN1 16V
12 11
S8
VDDC
S85 F53 C205
12 BST BST3 39
C207 60R
VIN3
1 2
VIN1 VIN3 12V_VCC
C1212
24V_VCC_AU 12V_VCC 13 38 2 1
6V3
60R
VOUT1
22u
F60
C1209
C1210
6V3
6V3
22u
22u
PIN11 14 LX1_0 LX3_1 37
L39 L38
B TP124 F1 60R 3V3_VCC B
1V2_VCC
10u 15 LX1_1 TPS65251 LX3_0 36 4u7
1 2
TP105 TP90
LX2_0 U19 GND_2 C463
R167
16 35
5k6
TP106 L40 10u
CN3 1V5_VCC 17 LX2_1 VIN_2 34 16V
4u7
C1211
VOUT3
6V3
VOUT2
22u
12 11 12V_STBY 18 VIN2 VIN_1 33
C206
60R
10 9 BST2 VIN_0 12V_VCC
R257
C483
19 32 2 1
10k
50V
C1206
4n7
INVERTER SOCKET F58
RLIM2
COMP2
LOW_P
GND_0
PGOOD
47n
AGND
8 7 DIMMING 1V5_DDR0 16V EN2 GND_1
SS2
FB2
V7V
V3V
20 31
CN8 C461 4n7 C1190
6 5 BACKLIGHT_ON/OFF FS4 10u 50V 10u FB3
C479
R256
50V
10k
4n7
21
22
23
24
25
26
27
28
29
30
1 12V_INV 16V 16V
DC/DC2
2
4 3 STBY_ON/OFF TP38 7A/32VDC R645
R335
F59
60R
4k7
2 1 PIN11
2
! FB2
120k
C488
FB2
C480 10u
1
3 R652
S216
16V
C TP51 220R C
R651
7k5
W/B2B 4
VIN2 4n7 C30
12V_VCC
50V 4u7
R648
20k
5 DIMMING R101 10V
560R
6 BACKLIGHT_ON/OFF
PROTECT
C481
50V
4n7
TP37
TP50
TP52
NC
S91
LDO2 2V5_VCC STBY_ON/OFF
S90 5V_VCC
S81 R290 R2 R288 STBY_ON/OFF_NOT MOSFET_CONTROL 5V_STBY C137
6
PROTECT 1 POK GND 8 22k 100R 220u
U5 C152 R289 6V3
FDC642P
R45 R197
1
5V_VCC 2 1 2 EN FB 7 47k R1 1 2
STBY_ON/OFF
Q32
10k 3V3_STBY 10k
C135
R217
2
220n
33k
D 60R APL5910 100n 25V D
C24
6V3
3V3_VCC 3 VIN VOUT 6 10V 2V5_VCC
1
1 2
22u R198
2
1 2
F63 TP108 STBY_ON/OFF_NOT 10k
5V_VCC
C25
6V3
1
4 VCNTL NC 5
22u
Q11
5V_VCC R174
1 2
C151 BC848B 47R
C5V6
D20
10u
R42
1k
10V
3V3_VCC SW2
2
Q47 R176 R47

R139
10k
TPS_ENABLE 1
10k
2
STBY_ON/OFF MOSFET_CONTROL
2
10k
1 Q22
R284 BC848B
R164
1
1 2
5V_STBY BC848B 12V_STBY 10k 3k9
2
10k 1 R282
R884 1
10k
2
STBY_ON/OFF_NOT
TP89
2
10k 1
S15
4
R163 Q46
2k2 BC848B
FDC642P
E ADAPTER SOCKET R77 S10 FS2 E

Q27
F4
12V_VCC
1 2
DC/DC4 12V_STBY 7A/32VDC

12V_VCC
6
60R
4A
6
F3 0R
FDC642P
1
TP33
1 2
C139 22p 50V
FDC642P
Q29
12V_STBY
C134
R216
2
220n
25V
33k
60R VFB
Q43
C131 C130 C55

12V_VCC
1
R49 22u 22u 100n R96 R15 R38
4
W_ADAPTER 16V 16V 16V
2
2 1
12V_VCC 10k 120k 4k7 22k R173
1
TP48
2 1 1 2
F14
FDC642P
5 12V_STBY 10k 47R

1
1 2
R48 5V_VCC
Q28
SW1
1
60R F62
TP36
TPS_ENABLE
!
R215
4
33k
1 EN VIN 8
1 2
3 U9 C92 L3 10u F7 60R

3
JK2 2 VFB VBST 7

1 2
2
TP35 R44 FS1 VFB 16V 5V_STBY
6
R37
22k
R36
22k
1
10k
2
12V_STBY TPS54528 100n C132 C133 60R
2 3 VREG5
TP34 SSW 6 22u 22u F10
FDC642P
7A/32VDC R46
6V3 6V3
1 2 2 1 Q21
Q44
1 MOSFET_CONTROL 10k
12V_INV 4 VSS GND 5 60R BC848B
R41 C128
Q19
30049469 1.13k
F 1
1k
2
1u C1229 F
C129
50V
BC848B
8n2
16V 22u
1
C5 6V3
12V_STBY
R34
1k2
R35
2k2
Q6 220n 10V
TPS54528
BC848B VESTEL PROJECT NAME : 17mb95m-r2 A3
SCH NAME :05_POWER T. SHT:10
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
OPTIONS TABLE PANEL SUPPLY SWITCH

FHD 50Hz 3D FFC R298
TP53
3V3_VCC
1
10k
2
OP_PIN4 C140
C96
100n
16V
OP_PIN43
OP_PIN42
OP_PIN27
OP_PIN26
OP_PIN11
OP_PIN10
100u
OP_PIN9
OP_PIN8
OP_PIN7
OP_PIN6
OP_PIN5
OP_PIN4
R297 16V
3D_SYNC_OUT 33k F29
1
1 2
A A
TX_2_CLK_P
TX_2_CLK_N
TX_1_CLK_P
TX_1_CLK_N
R239 12V_VCC PANEL_VCC
PANEL_VCC OP_PIN5 60R
TX_2_4_P
TX_2_4_N
TX_2_3_P
TX_2_3_N
TX_2_2_P
TX_2_2_N
TX_2_1_P
TX_2_1_N
TX_2_0_P
TX_2_0_N
TX_1_4_P
TX_1_4_N
TX_1_3_P
TX_1_3_N
TX_1_2_P
TX_1_2_N
TX_1_1_P
TX_1_1_N
TX_1_0_P
TX_1_0_N
33k
6
R89 F16
2
1 2 1 2
FDC642P
10k 5V_VCC
C136
R249
2
220n
25V
33k
60R
Q33
1
1
R299
PANEL_VCC 3V3_VCC
1
10k
2
1
R236 R175
PANEL_VCC 33k OP_PIN6 1
47R
2
CN11
R88
1
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
LG BASED 30070519 1 2
9
8
7
6
5
4
3
2
1
10k
R253
1
33k
R94
10k
OP_PIN45
OP_PIN43
OP_PIN42
R235
PANEL_VCC OP_PIN7
2
33k
2
R81 3
1 2
10k S57 R95
PANEL_VCC PANEL_VCC_ON/OFF
1 2 2
10k
1 2
Q23
1
S39 2 BC848B
MEGA_DCR_IN
1
B PANEL_VCC
R221
OP_PIN8
B
CN12
33k C141
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
SAM BASED 30070519 1n
9
8
7
6
5
4
3
2
1
R80
1
10k
2
50V
2
S56 1
MEGA_DCR_OUT OP_PIN9
R220
PANEL_VCC 33k OP_PIN9
19" TO 22" DOUBLE LVDS FFC OPTIONS 1
R79
10k
2
LVDS OUT
PANEL_VCC
U4
TX_2_CLK_P
TX_2_CLK_N
TX_1_CLK_P
TX_1_CLK_N
R241
OP_PIN9
PANEL_VCC OP_PIN10
TX_2_3_P
TX_2_3_N
TX_2_2_P
TX_2_2_N
TX_2_1_P
TX_2_1_N
TX_2_0_P
TX_2_0_N
TX_1_3_P
TX_1_3_N
TX_1_2_P
TX_1_2_N
TX_1_1_P
TX_1_1_N
TX_1_0_P
TX_1_0_N
33k MSD8WB9BX
R87
1 2
6 LVB0P V23 TX_2_0_P
10k
LVB0N U24 TX_2_0_N
R248 LVB1P V25 TX_2_1_P
PANEL_VCC 33k OP_PIN11 LVB1N V24 TX_2_1_N
W25 TX_2_2_P OP_PIN8
C R91 LVB2P TP125 C
FFC
W23 TX_2_2_N TX_1_0_N
CN13
1 2
10k LVB2N TP88 TX_2_0_N TP80
Y23
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
LVBCKP TX_2_CLK_P TX_1_0_P TP87 TP78
1
TX_2_0_P
R238 LVBCKN W24 TX_2_CLK_N TX_1_1_N TP86 TX_2_1_N TP77
33k OP_PIN27 LVB3P AA23 TX_2_3_P TX_1_1_P TP85 TX_2_1_P TP76
PANEL_VCC
LVB3N Y24 TX_2_3_N TX_1_2_N TP84 TP75
R90 TX_2_2_N
1 2
LVB4P AA25 TX_2_4_P TX_1_2_P TP83 TP74
10k TX_2_2_P
WXGA FFC LVB4N AA24 TX_2_4_N
TX_1_CLK_N
TX_1_CLK_P
TX_1_CLK_N
R296 TP82 TX_2_CLK_N TP79

OP_PIN26 AB25 TX_1_0_P TX_1_CLK_P
OP_PIN11
OP_PIN27
TX_1_3_P
TX_1_3_N
TX_1_2_P
TX_1_2_N
TX_1_1_P
TX_1_1_N
TX_1_0_P
TX_1_0_N
OP_PIN10
3D_EN 33k LVA0P TP81 TX_2_CLK_P TP73
PANEL_VCC
OP_PIN7
OP_PIN8
OP_PIN9
OP_PIN6
OP_PIN5
LVA0N AB23 TX_1_0_N
LVA1P AC25 TX_1_1_P TX_1_3_N TP71 TP67
R78 TX_2_3_N
1 2
OP_PIN42 LVA1N AB24 TX_1_1_N TX_1_3_P TP70 TP66
10k TX_2_3_P
LVA2P AD25 TX_1_2_P TX_1_4_N TP68 TP57
TX_2_4_N
AC24
SAM 1
R50
10k
2
OP_PIN43
LVA2N
LVACKP AE24
TX_1_2_N
TX_1_CLK_P
TX_1_4_P TP69 TX_2_4_P TP62
LVACKN AD24 TX_1_CLK_N
PANEL_VCC
LVA3P AE23 TX_1_3_P
LVA3N AC23 TX_1_3_N
FFC
AC22
D TX_1_4_P
10_BIT PANEL D
CN14
LVA4P
AD23
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
LVA4N TX_1_4_N
1
R246 S217 S220

1 2 2
PANEL_VCC 33k OP_PIN45 TX_1_4_N 1 TX_2_4_N

1
S218 2
S219 2
R92 TX_1_4_P 1 TX_2_4_P

1 2
10k
FFC
CN16
LG
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1
DIMMING 3V3_VCC
E 1 E
R18
1 2 Q34
4k7 2
2
BC858B
R43
1k
C124 3
MEGA_DCR_OUT 1 2 R254
1
220p 100R
8 1
50V R1
S58
7 R2 2
3
S60 R17 DIMMING

BACKLIGHT_DIM 1 2 2
Q25 6 R3 3
4k7
BC848B
C123 1 5 R4 4
S61 3
MEGA_DCR_IN 1
TP128 1 2 R16 C142
1
4k7
2 2
Q26 10u
220p BC848B
50V 16V
C122 1
1 2
F 220p 50V F

SCH NAME :06_LVDS T. SHT:10
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
TP93 1 1
S28 2
U4 DSP_MAIN_L_OUT MAIN_L HP_L
CLOSE TO MSTAR IC
MSD8WB9BX 6
C453 TP94 1
R607
200k
LINEIN_L0 Y12 3n3 C1200 R653
7 AA12 50V 3
LINEIN_R0 DSP_SC_L_OUT 5k6 SC_L_OUT HP_R
LINEIN_L2 AA11
1u C548
2
AB11 C586 4
A LINEIN_R2 6V3 1n C1226 C1227 A
R707
R205
R206
S31
8k2
10k
10k
LINEIN_L3 AE8 C587 SC_AUD_L_IN 50V 10n 10n TP95 1
DSP_MAIN_R_OUT MAIN_R JK1
LINEIN_R3 AC9 C591 SC_AUD_R_IN 16V 16V 5
Y8 2u2 C590 SAV_L_IN
1
LINEIN_L4 C454
R608
200k
Y9 2u2 7
LINEIN_R4 2u2 SAV_R_IN 3n3
AA10 1
S20 2
C1201
LINEIN_L5 2u2 50V R654
AB9 1
S22 2
LINEIN_R5 VDDC DSP_SC_R_OUT 5k6 SC_R_OUT R329
1u C549 HP_DETECT 1k 4k7 1 3V3_VCC
EAR_OUTL AA9 R202 1n R147
OUT_HP_L 6V3
R708
C5V6
8k2
D28
EAR_OUTR Y10 SAV_AUD_L_IN 10k SAV_L_IN 50V
OUT_HP_R
HEADPHONE OUTPUT
TP8
LINEOUT_L0 AC12 SAV_AUD_R_IN 10k SAV_R_IN
DSP_SC_L_OUT
LINEOUT_R0 AE12 R201
DSP_SC_R_OUT
LINEOUT_L2 AC11
DSP_MAIN_L_OUT
R398
R397
12k
12k
LINEOUT_R2 AD10 L21 C618 L22 C619
DSP_MAIN_R_OUT
LINEOUT_L3 AD11
OUT_HP_L HP_L OUT_HP_R HP_R
LINEOUT_R3 AE11 10u 10u
100u 100u
16V 16V
R803
220R
R804
220R
AUVRP AD9 R265 R266
AC10 Q41 Q42
B AUVAG
AE9
680R
BC848B
680R
BC848B B
AUVRM C554 C27 C209 C53 HP_MUTE HP_MUTE
10V
10V
1u 4u7 10u 100n Layoutta ust ustte yerlestirilecek...
C1170
R262
C1171
R263
10k
10k
SPDIF_IN E6 50V 10V 10V 10V
DVD_SPDIF
E5
10u
10u
SPDIF_OUT SPDIF_OUT
1N4148
3V3_VCC
3V3_STBY
R717
S36
VDD_AUDIO
10k
C8
D1
1 2
I2S_IN_BCK TP129 F28 60R
I2S_IN_SD D8 TP130
D9 1
S38 2
16V
I2S_IN_WS TP131 12V_VCC
2
R703 100u
R207
S37
10k
B10 5V_VCC 1 2
OPTINAL FOR LINE_OUT

2 1
I2S_OUT_BCK R709 22R I2S_OUT_BCK
I2S_OUT_MCK C9 22R R710 I2S_OUT_MCK C546
2
C10
1
I2S_OUT_WS R711 22R I2S_OUT_WS C147 C148
R208
2
NC NC
10k
I2S_OUT_SD B9 22R 180p 1 INR_P INL_P 14 180p
I2S_OUT_SD
R718
R213
15k
10k
C23 R274 50V R269 R268 50V R275 C19
C145 2 13 C146
POP NOISE CIRCUIT
50V 22p
50V 22p
50V 22p
50V 22p
SC_R_OUT SC_L_OUT
1
15k 47k INR_N INL_N 47k 15k
C614
C615
C616
C617
1
AUMCK_OUT 1u 16V R280 R279 16V 1u
30k 47p 50V 3 OUTR OUTL 12 47p 50V 30k
BC858B
AUBCK_OUT Q37 SC_AUD_R_OUT C9 U16 R270 SC_AUD_L_OUT
AMP_EN 4 11
C GND UVP 47k C
2
R27110u DRV632
R210
2
10k
C888 AMP_EN 1 2 5 MUTE GND1 10
R209 10k
R573
3k9
R211 100n Q12 2
10k
1
AMP_MUTE Q13 BC848B 6 9
1
1 2
10k 10V VSS VDD
R278
3k3
BC848B
1
7 CN CP 8
C18
2
CLOSE TO PIN46 1u F2
R393
100k
CLOSE TO PIN35 16V C17 3V3_VCC
S2 60R
12V_VCC VDD_AUDIO
C7
10u
C8
10u
1
100u 100u C54 C31 1u
S1 C561 C563 10u 10u
24V_VCC_AU 35V 35V 10V 10V
AUDIO_AVDD
S3 C467
5V_VCC
SC_AUD_R_OUT
SC_AUD_L_OUT
8W 30067972
2w5 30069845 C466
LINE_R_IN
LINE_L_IN
10k
C181 4n7
2 1
50V R199
470k SC_R_OUT R655 C520 SC_AUD_R_OUT
C1804n7
D 50V 47n R696 5k6
10k
D
470k 16V C612 C613 220p 2 1
47n R695 1u LINE_R_IN 50V R200

C521 CN15
16V 50V 50V SC_L_OUT R656 SC_AUD_L_OUT
1u 5k6 R_AUDIO_P 1
C594
100n
12
11
10
50V
AUDIO_AVDD TP177
1
1
220p
LINE_L_IN 50V R_AUDIO_N 2
VR_ANA
PLL_FLTP
PLL_FLTM
AVSS
HPVDD
CPP
CPN
HPVSS
HPR_IN
HPR_OUT
HPL_OUT
HPL_IN
TP176 1
3V3_VCC 4k7 13 AVDD HP_PWML 48 L_AUDIO_P 3
C1217
R145 VDD_AUDIO TP178 1
C556
ADRES SECIMI
50V
50V
4k7 A_SEL HP_PWMR 50V L_AUDIO_N 4
1u
1u
14 47 330p
U12 PT2333 R146 R802 F54 60R TP175 1
I2S_OUT_MCK 15 MCLK PVDD_AB 46 18R

LEFT
GNDA
OUTN
VDDA
VDD1
GNDB
OUTP
R798 C607 L2 15u

INP
INN
SDB
C611
18k2 16 OSC_RES BST_A 45 L_AUDIO_P
33n 50V A_OUT1A F11 60R
A1
A2
A3
B1
B2
B3
C1
C2
C3
17 DVSSO OUT_A 44
C118 R21 A_OUT1B L13 15u
MAIN_L 4k7 18 VR_DIG TAS5719 PGND_AB 43 C610
L_AUDIO_N
E 220n A_OUT1A C28 C242 R801 E
R26
4k7
AMP_EN
10V 4u7 100n AMP_EN

16V
19 PDN U35 OUT_B 42 18R
C13 10V C606 33n
C558
C555 50V
C1218
50V 50V
2 330p
1u
1u
A_OUT1B 100n LRCLK BST_B 50V
20 41
C1220
1
10V I2S_OUT_WS
C111
220n
10V
50V
I2S_OUT_BCK SCLK BST_C 50V
1u
1u
21 40 330p
VDD_AUDIO C60533n R800 F27 60R
I2S_OUT_SD 22 SDIN OUT_C 39 18R
C609 L12 15u
GVDD_OUT
SYS_SDA 100R SDA PGND_CD R_AUDIO_P
SSTIMER
PVDD_CD
23 38
AUDIO AMP for <=24"
RESETN
R351 A_OUT2A F30 60R

STEST
HP_SD
BST_D
DVDD
DVSS
AGND
VREG
SYS_SCL 100R SCL OUT_D
GND
24 37
U3 PT2333 R350 C604 A_OUT2B L11 15u
33n R_AUDIO_N
RIGHT C608
GNDA
OUTN
VDDA
VDD1
GNDB
OUTP
25
26
27
28
29
30
31
32
33
34
35
36
F8 50V R799
INP
INN
SDB
3V3_VCC AUDIO_DVDD 18R

60R C597 C244 EXT_RESET C245 C1202
C557
50V
C1219
50V
330p
A1
A2
A3
B1
B2
B3
C1
C2
C3
1u
1u
10u 100n 100n 1u 50V
C125 R20 6V3 16V 16V 16V C240
AUDIO_DVDD
F MAIN_R 4k7 C537 100n

50V
F
A_OUT2A 2n2
R225
220n
4k7
AMP_EN
10V F71 50V

C16 3V3_VCC AUDIO_AVDD
VDD_AUDIO
A_OUT2B 10V 330R C596 C243 C595 C241

100n
1
10u 100n 10u 100n VESTEL PROJECT NAME : 17mb95m-r2 A3

C116
AUDIO AMP for >=26"

220n
10V
6V3 16V 6V3 16V I2C Address**pin A_SEL=Low AMP_EN

0x54 SCH NAME :07_AUDIO_HEADPHONE T. SHT:10
VDD_AUDIO
I2C Address**pin A_SEL=High
0x56 DRAWN BY :<YOUR NAME HERE> 20-11-2013_10:51
1 2 3 4 5 6 7 8 AX M
F
E
D
C
B
A
3V3_STBY
VDDC
D163
TP102
K12 AVDDLV_USB GND_20 G10
C5V6
E2
30067087
1
1
G9 VDDC_0 GND_21 G11

CN26 H9 G12
R182 TP6 VDDC_1 GND_22
TP2
4 K10 G13
10k 1 VDDC_2 GND_23
3V3_STBY
3V3_STBY
60R
F41
TOUCH_PAD_OPTION
TP5 K11 VDDC_3 GND_24 G14
G4 3 L10 G17
+
2 VDDC_4 GND_25
M12 VDDC_5 GND_26 G18
G3 C M13 G19
TP104 3 VDDC_6 GND_27
SW1
2k N12 VDDC_7 GND_28 G24
G2 T
60R
F45
60R
F46
R701 4 P14 VDDC_8 GND_29 H8
6V3
10u
SOURCE
C443
R706 TP4 P15 VDDC_9 GND_30 H10
G1 2 R10 H11
470R 5 VDDC_10 GND_31
1
TP3 R14 VDDC_11 GND_32 H12
1 R15 H13
6 VDDC_12 GND_33
10V
C69
-
47R
R793
100n
D17 T10 VDDC_13 GND_34 H14
E1
10V
C74
10V
C75
2
1 2
100n
100n
P10 AVDD12 GND_35 H15
KEYBOARD_ONBOARD
C5V6 GND_36 H16
C5V6
1k
F137
MAGIC BUTTON
R16 H17
AU33
2 1
AVDDL_MOD GND_37
1k
10V
C70
TP103
F140
100n
D162 GND_38 H18
GND_39 H19
1k
F138
P19 J5
AVDD_EAR33
FB_CORE GND_40
1k
VDDC
F139
J7
2
2
GND_41
J8
AVDD_DVI
F32 60R GND_42
L11 AVDD_LAN12 GND_43 J9
F33 60R GND_44 J10
1
2
M14 DVDD_DDR GND_45 J11
2
2
KEYBOARD_ONBOARD
J12
3V3_STBY
GND_46
10V
3V3_STBY
3V3_STBY
100n
C630
V8 AVDD_ADC25_0 GND_47 J13
ADC2P5
3V3_STBY
D35
D34
C5V6
C5V6
W7 AVDD_ADC25_1 GND_48 J14
1
1
W8 AVDD_ADC25_2 GND_49 J15
W9 AVDD_REF25 GND_50 J16
AVDD25_REF
J18
KEYBOARD
GND_51
60R
F44
60R
F43
W14 AVDD_LAN25 GND_52 J19
AVDD25_LAN
60R
F42
GND_53 J25
V16 K9
TOUCHPAD_SDA
TOUCHPAD_SCL
AVDD_MOD AVDD_MOD_0 GND_54
W16 AVDD_MOD_1 GND_55 K13
K14
KEYBOARD
GND_56
W11 AVDD_PGA25 GND_57 K18
AVDD25_PGA
10V
C73
10V
C72
100n
100n
W12 PGA_COM GND_58 K19
PGA_VCOM
10V
C71
100n
GND_59 K22
GND_60 L9
N7 AVDD_ALIVE GND_61 L12
AVDD_NODIE
3
3
GND_62 L13
AVDD_MPLL
K7 L14
AVDD_NODIE
AVDD_DVI AVDD_DVI_USB_0 GND_63
L7 L18
AVDD_DMPLL
AVDD_DVI_USB_1 GND_64
M8 AVDD_MPLL GND_65 L19
AVDD_MPLL
P6 AVDD_DMPLL GND_66 M9
AVDD_DMPLL
1V5_VCC
GND_67 M10
LED2
M19 BYPASS GND_68 M11
GND_69 M15
1u
GND_70 M16
1
C5V6
16V
D165 T7 AVDD_AU33 GND_71 M18

AU33
C1203
R7 AVDD_EAR33 GND_72 M20

AVDD_EAR33
1V2_VCC
10k
60R
F49
R227
GND_73 M21
2
M22
5V_STBY
GND_74
M25
2
GND_75
R19 VDDP_0 GND_76 N10
VDD33
1
3
T19 VDDP_1 GND_77 N11
60R
F31
CN27 1
CN1 N13
TP181 GND_78
22u
22u
6V3
6V3
C401
C400
1 1 GND_79 N14
Q17
1 N15
R272 TP182 GND_80
BC848B
1
10k 2 150R 2 2 W17 AVDD_LPLL_0 GND_81 N16
AVDD_LPLL
4
4
1 W18 N17
R229 TP183 AVDD_LPLL_1 GND_82
6V3
10u
6V3
10u
C447
C446
N19
2
3 3 GND_83
2
BC858B
1 N20
TP184 GND_84
1
3
1
220R 2 1
220R 2 4 4 GND_85 N21
1
U4 N22
R721 R722 TP127 GND_86
1
6V3
10u
10V
C87
10V
C81
Q39
C441
100n
100n
5 5 GND_87 P7
MSD8WB9BX
2
C419
GND_88 P8
Q38
220R 220R V19 P9
1
3
1 2 1 2 6 VDD33 VDDP_2 GND_89
27p 50V
R720 R719 TP13 GND_90 P11
1k
10V
C56
10V
C86
10V
C80
1
S50 2
2
F143
100n
100n
100n
TOUCHPAD_SCL 7 GND_91 P12

1
10k 2 GND_92 P13
1
S51TP12 2
BC858B
R228 TOUCHPAD_SDA 8 GND_93 P16
J17 AVDD_DDR0_0 GND_94 P17
AVDD_DDR0
10V
C57
10V
C91
10V
C85
100n
100n
100n
9 K15 AVDD_DDR0_1 GND_95 P18

K16 AVDD_DDR0_2 GND_96 R8
BC848B
Q18
10 L15 AVDD_DDR0_3 GND_97 R9
1k
F144
R11
1
3
GND_98
10V
C58
10V
C90
10V
C84
1
S46 2
100n
100n
100n
11 GND_99 R12
2
K17 AVDD_DDR1_0 GND_100 R13
12 L16 AVDD_DDR1_1 GND_101 R17
1
IR_IN
L17 R18
5
5
AVDD_DDR1_2 GND_102
10V
10V
C89
10V
C83
100n
100n
100n
M17 AVDD_DDR1_3 GND_103 T8

C1230
10k
R226
GND_104 T9
2
GND_105 T11
1k
F146
LED1 GND_106 T12

10V
10V
C88
10V
C82
100n
100n
100n
GND_107 T13
R222
C1231
2 1 E9 T14
2V5_VCC 10k TEST2 GND_108
GND_109 T15
GND_110 T16
D164
C5V6
GND_111 T17
AVDD_DDR0
AVDD_DDR0
BC848B
Q16
GND_112 T18
5V_STBY
U7
1
3
VDDC
GND_113
2V5_VCC
GND_114 U8
2
D166 A5 GND_0 GND_115 U9

LED&VFD&RF
C420 A23 U10

2
GND_1 GND_116
B17 GND_2 GND_117 U11
C5V6
1
3
C11 GND_3 GND_118 U12

1
1n
2V5_VCC
C19 GND_4 GND_119 U13

50V
Q1
C22 GND_5 GND_120 U14

10k
R224
C23 GND_6 GND_121 U15

2
BC848B
D14 GND_7 GND_122 U16
6
6
D18 GND_8 GND_123 U17

60R
F38
60R
F36
60R
F35
D19 GND_9 GND_124 V9

E8 GND_10 GND_125 V10
E17 V11
KEYBOARD
GND_11 GND_126
E18 GND_12 GND_127 V12
E19 GND_13 GND_128 V14
E22 GND_14 GND_129 V15
6V3
10u
10V
C65
C442
100n
F8 GND_15 GND_130 V17

PWM_OUT_LED3
F17 GND_16 GND_131 V18

F18 GND_17 GND_132 W10
F19 W13
PGA_VCOM
GND_18 GND_133
10V
C67
100n
G8 GND_19 GND_134 W15
R138
2 1
4k7
AVDD25_PGA
AVDD25_LAN
3V3_VCC
D167
3V3_VCC
7
7
R131
2V5_VCC
2V5_VCC
2 1
PWM_OUT_LED3
4k7 C5V6
2V5_VCC
60R
F48
60R
F47
60R
F34
60R
F37
C445
AUBCK_OUT
60R
F40
R132 R133 22u

2 1 2 1
4k7 4k7 3V3_VCC
10V
C78
6V3
100n
DRAWN BY :<YOUR NAME HERE>

NC
10V
C63
10V
C66
100n
100n
10V
C68
10V
C79
10V
C77
100n
100n
100n
SCH NAME :08_MST_SUPPLY_KEY_TOUCH

AUMCK_OUT
10V
C64
100n
R135
2 1
AVDD25_REF
4k7
10V
C76
100n
AVDD_MOD
ADC2P5
AVDD_LPLL
MSTAR BOOT CONFIG
8
8
PWM1
VDD33
R136
2 1
VESTEL PROJECT NAME : 17mb95m-r2
4k7
PWM0
A3
T. SHT:10
11-10-2013_13:14
F
E
D
C
B
A
AX M
1 2 3 4 5 6 7 8
INDIA OPTION
SC_CVBS_IN 4 R419 5V_VCC
YEL 12V_VCC 220R
SCART 1
5
C854 TP43
BAV70
1
CDA4C16GTH
5
D32
SCART_AUD_L_IN 3 10u
VGA INPUT
CDA4C16GTH
CDA4C16GTH
R728
390R
R730
JK4
68k
WHT 16V C97
2
2
D6
C383 100n
R230
R231
R232
D29
10k
10k
10k
SCART_AUD_R_IN
D4
1
A 33p 2 10V VGA_DDC_5V A
R533
BC858B
75R
50V 1 RED Q40
4
50V 24C02 option
1
21
1
33p C211 10k 8 VCC A0 1
2
1 TP63 15 R688 2 1
SC_CVBS_IN Q20 CVBS0_OUT 100R R693 U34

20 BC848B 8 1 7 WP
1 TP26 C385 10u 14 R1 A1 2
SC_CVBS_OUT R416 10V 24LC02
19 7 R2 2 6 SCL
1 TP25 SC_CVBS_OUT 68R 100R 13 A2 3
50V R794
18 6 R3 3 5 SDA
33p 12 VSS 4
R618
R355
100R
R619
33k
33k
75R C809
1
2 1
17 R531 5 R4 4
C386 11
TP39
TP40
TP41
TP42
2
47R 1 SC_FB 100p R237
16 R373 1 2
1 TP24 50V 10 1 2 10k
50V S59 F160 VGA_DDC_5V R569
15 SC_R
1 TP23 33p 1 TP14 9 510R VGA_VSNC
75R
1 2 2
75R 1 UART-TX-SC 1 1k R570
14 R534 R532
C382 8 TP47 510R VGA_HSNC
2
75R 1
50V R731
13
SCART LT1
R535 33p
B D33 7 2k4 B
SC1
12
C384 C15V 6
27p 50V
27p 50V
27p 50V
SC_G
11
TP15 TP16 5
C425
C427
C426
1 1
2
2
75R 1 UART-RX-SC 1 TP46
10
1
R723 R530 4
2
75R 1 22k SC_PIN8 F163
9 R538 R725 3 VGA_B
4k7 1 TP49 F161 1k
8
1 TP17 2 VGA_G
SC_B C95 1 TP44 F162 1k
7 50V
1 TP19 1 TP18 2 1
1 VGA_R
33p 1 TP45 1k
6 100n
10V CN29
C503 C381
2 NUP4004M5
5
1
3
4
5
330p VIN 3 SPDIF_COAX
50V SCART_AUD_L_IN
D7
IR1
4
F148 R353 VCC 2
C 1
100R
2
SC_AUD_L_OUT C
3 1k
1 TP20 GND 1
2
1 TP21
SCART_AUD_R_IN C468
SPDIF OUT INTERFACE
50V
4n7 F9
1 5V_VCC
1 TP22
60R
YPBPR INPUT
SPDIF_COAX
C504 C328
5
330p F150 R354 10u
CDA4C16GTH
50V 1
100R
2
SC_AUD_R_OUT 10V
R148
4k7
1k
D31
C469 3
C94
1
R352
SPDIF_OUT 2
100R
1 2
Q14
4n7 2 1
4
BC848B F152 NC
C523
50V 100n
2
220p
50V
1
PR_IN
R149
S34 10V
4k7
C93100n 1k
2
TP9
2 TP54
S35 3 2
S44
1 2 1
3
1
1
R223 10V JK3
2
Q15 1
AMP_MUTE 10k R330
D SCART AUDIO FILTER 1
BC848B 2
1k
1
2 D
R233
SCART_AUD_L_IN 10k SC_AUD_L_IN 1 TP56 F154
4
PB_IN
SCART_AUD_R_IN 10k SC_AUD_R_IN 1 TP55 1k
6
R234
3
R402
R401
12k
12k
5
JK15
BC848B DVD_IR
Q3 1
R9
IR_IN 1 3
2
4k7
1
3V3_VCC F155
Y_IN
2 1k
2
50V
50V
50V
27p
27p
27p
2
4k7
75R
75R
75R
R7
C1232
C430
C429
R548
R550
R549
2
2
R29
47k
E E
SLIM SIDE AV
1
2
1
1
DVD_IR_ON/OFF
2
C5V6
C526
R551
2
D21
220p
50V
75R
1
1
TP61
DVD CONNECTION
1
1
TP60 F159
2
1k C513
SAV_CVBS OPTIONAL
R203 TP11 FS3
6 75R CN7
1 2
5V_VCC GASGET POSITIONS
1
TP59 F158 330p R177 4A/24VDC
3
TP10
50V SAV_AUD_L_IN DVD_CVBS 180R 1 2 GS1

1k
4
F156
1k R27 TP27
3 4
C26
10u
16V
!
FS5
GS2
1
JK10 5 1 2 1 2
DVD_SENSE 100R 5 6 12V_VCC GS3
100n 10V
F157 TP28 TP29 4A/24VDC

1
7
F SAV_AUD_R_IN 7 8 GS4 F
C5V6
C120
C5V6
1 2
2
D15
4k7
D13
1k C514 S21
R6
DVD_WAKEUP
NC
1
1
TP58 9 10 DVD_IR GS5
2
TP31 TP30
C126
330p
2
50V
27p
50V 50V
220p
1
R28
DVD_SPDIF 1
100R
2
C121 SCH NAME :09_AV_INOUT_DVD T. SHT:10

1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
R250
3V3_SAT_DEMOD 33R SYS_SCL
R251 12V_VCC C165
33R SYS_SDA C216 100n C112 220n
3V3_SAT_DEMOD
C172 C167 10u 10V
4k7
4k7
10V100n
VDDI_1V25
16V
R1
R2
A 10p 10p 16V A
1N5819
50V 50V
C22V
C38
D11
D9
12
11
10
1
1
C34
9
50V
10V100n 220n
100n 10V
VCC
NC3
BYP
GND
S2_SCL 10k 3V3_VCC D2 C220 R281
R178 LNB_OUT 13 VOUT ISEL 8 22k
C35
S2_SDA VDDI_1V25 1N5819 1N5819 R105
1
S6 2 14 7
R273 S2_RESET VUP U14 SDA 100R SYS_SDA
S2_AGC 2k D178 R104
S19 15 NC4
LNBH29EPTR SCL 6 100R SYS_SCL
S9
C49
10n
1 2
16V 10V100n EXT_RESET 1N5819
P-GND
16 5
13
14
15
16
17
18
19
20
21
22
23
24
EXTM
C39 C218 C219 C217 25V LX ADDR
NC1
NC2
D8 10u 10u 10u 2u2
AAGC
SCLT
SDAT
VCC1
SDA
SCL
VDDD0
ADDR_SEL
VCC2
VCC3
CKXTAL
RESET_
L5 1N5819 25V 25V 25V C221
12V_VCC
4
10u D174
10V100n R267 DISEQC_OUT

50V
VDDI_1V25 C33 VCC0 M_DATA0 8 R1 1 TS1_D0 10V100n
12 25 7 R2 2
B 10p TS1_D1 C47 B
R115
10k
NC M_DATA1 6 R3 3 TS1_D2
11 26 5 R4 4
C46 C171 TS1_D3
S2_QP 10 QP M_DATA2 27 33R
100n C45 C36
S2_QN C170 9 QN M_DATA3 28 10V100n
50V
100n
M88DS3103
10p
10p 8 GNDA1 VCC4 29 VDDI_1V25
C44 50V
8 R1 1
U56
S2_IN C169 7 IN M_DATA4 30 TS1_D4
100n C43 7 R2 2 TS1_D5
S2_IP IP M_DATA5 6 R3 3 TS1_D6
6 31 5
100n C168 R4 4 TS1_D7
5 VDDA M_DATA6 32 33R
VDDA_3V3_SAT_DEMOD 10p 10V100n R264
C174 C42 XTAL_OUT M_DATA7
50V 4 33
C173 R247
27p 3 XTAL_IN M_VAL 34 33R TS1_VLD
27p 50V
C 50V 1
S5 2
2 GNDA0 VCC5 35 VDDI_1V25 C
CLKO_TS2022 R204
1 FSKTX_OUT M_SYNC 36 33R TS1_SYNC
10V100n
C37
DISEQC_IN
S2_TUN_3V3
S2_TUN_3V3
FSKRX_IN
SH1
M_CKOUT
DISEQC
LNB_EN
VDDD1
M_ERR
VCC6
VSEL
LOCK
GNDD
OLF
C175
2
50V 50V
C176
C166
48
47
46
45
44
43
42
41
40
39
38
37
27p X3 27p
R212 10p C59
1 4
33R 50VTS1_CLK C105 27MHz
100n 10V
100n 10V
10n 16V 2 3 R183 10n 16V

TP126
10n 470R CLKO_TS2022

C40
C41
DISEQC_OUT
16V
3V3_SAT_DEMOD
C51
14
13
12
11
10
8
VDDA4
TEST1
TEST2
TEST3
VDDA3
XTALN
XTALP
S2_TUN_3V3
VDDI_1V25
D D
R277 C60
3k3 15 RES VDDA2 7
10n 10n 16V
16V 16 CAP CK_OUT 6
C109
17 CKDIV_OPT U11 IP 5 S2_IP
2 1
18 RFBYPASS M88TS2022 IN 4 S2_IN
S11
3V3_VCC 10k 19 RESET VDDA1 3 S2_TUN_3V3
R179 L4 C61
20 LNA_IN QN 2 S2_QN
50V 4n7 10n 16V
Q7 C212 0p5 TEST QP S2_QP
BC848B
21 1
S2_RESET 10k
VDD_DIG
VDD_REG
R180
VDAA5
VDDA6
C108
SDA
SCL
AGC
F22 C215
E 1V2_VCC VDDI_1V25 CN20 10n E
60R
22
23
24
25
26
27
28
C150 3p3 16V
10u 50V S2_TUN_3V3 S2_TUN_3V3
6V3 R159 R276
C210
100p
50V 1k 2k S2_AGC
C104
C50
10n
10n
F21 R259 16V 16V
3V3_SAT_DEMOD VDDA_3V3_SAT_DEMOD 33R S2_SCL
50V
60R R252 R165

1n
C138
10u LNB_OUT 33R S2_SDA 10k
C179
C208
18p
18p
6V3 C10 1n 1n 1n 1n
C15
C11
C6
C2 50V 50V
C62
10n
50V 50V 50V 50V 16V
F20
3V3_VCC 3V3_SAT_DEMOD
60R C117
10u F19
6V3 3V3_VCC S2_TUN_3V3
60R
F C155 F
10u
6V3

SCH NAME :10_SAT T. SHT:10
1 2 3 4 5 6 7 8 AX M

Mb95M Idtv: Service Manual

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Mb95M Idtv: Service Manual

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MB95M IDTV

Supported peripherals are:

Figure 1: Pin description

B.2. Pin Assigment

3. AUDIO AMPLIFIER STAGES

A. MAIN AMPLIFIER (TAS5719)(6-8 W option)

– TAS5717 Supports 2×10 W and TAS5719 Supports 2×15 W Output

– Wide PVDD Range, From 4.5 V to 26 V

– Requires Only 3.3 V and PVDD

– One Serial Audio Input (Two Audio Channels)

– I2C Address Selection via PIN (Chip Select)

– Supports 8-kHz to 48-kHz Sample Rate (LJ/RJ/I2S)

– External Headphone-Amplifier Shutdown Signal

– Integrated CAP-Free Headphone Amplifier

– Stereo Headphone (Stereo 2-V RMS Line Driver) Outputs

– Independent Channel Volume Controls With 24-dB to Mute

– Programmable Two-Band Dynamic Range Control

– 14 Programmable Biquads for Speaker EQ

– Programmable Coefficients for DRC Filters

– 0.125-dB Fine Volume Support

– Serial Control Interface Operational Without MCLK

– Factory-Trimmed Internal Oscillator for Automatic Rate Detection

– Surface Mount, 48-Pin, 7-mm × 7-mm HTQFP Package

– AD, BD, and Ternary PWM-Mode Support

– Thermal and Short-Circuit Protection

– EQ: Speaker Equalization Improves Audio Performance

– DirectPath Technology: Eliminates Bulky DC Blocking Capacitors

c. Pin descriptions and functions

Figure 2: Pin description

B. MAIN AMPLIFIER (TS4962M)(2.5 W option)

- Operating from VCC = 2.4V to 5.5V

Figure 3: Pin description

Table 4: Recommended operating conditions

Figure 5: Power socket and power options

Figure 6: Power steps

a. General Description and Features

Table 5: Recommended operating conditions

Figure 8: Pin configuration

Table 7: Recommended operating conditions

5. MICROCONTROLLER (MSTAR MSD8WB9BX/BWK)

6. 1GB DDR3 SDRAM

7. 1GB G-DIE DDR3 SDRAM

Table 12: Absolute Maximum DC Ratings

Table 13: Recommended operating conditions

Table 14: DC and operating characteristic

9. 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM

Figure: Pin configuration.

10. USB INTERFACE

Figure 9: USB description

Figure 11: CI interface

13. LNB SUPPLY AND CONTROL IC

d. Absolute Maximum Ratings and Recommended Operating Conditions

STBY_ON/OFF_NOT should be low for tv on condition, please check Q11’s collector.

 Please check mechanical position of CI module. Is it inserted properly or not?

16. SERVICE MENU SETTINGS

Source Settings Menu

24V_VCC DDR3 RAM DDR3 RAM

3V3_STBY TOUCHPAD C USB2512B

Panel Vcc W 3V3_VCC

NAND CI TS0 TS1 HP DVB-T2 ANALOG AUDIO/VIDEO AE

5V_STBY 3V3_STBY (Adapter, ips, pw03, pw07, pw25, ips10, pw06)

CI_TS0 or APL5910(95) 1V25_VCC (Satellite)

DVB-T2 / 5V_STBY FDC642P 5V_VCC (Adapter, ips, pw06)