Game Boy 33c3 PDF

Is That a Demo in
Your Pocket?
Code Snorpung
Music Nordloef
Is That a Demo in
Your Pocket?
Code Snorpung
Music Nordloef
33C3 2016-12-30
Michael Steil
The Ultimate
Game Boy Talk @pagetable
http://www.pagetable.com/
33C3 2016-12-30
Michael Steil
The Ultimate
Game Boy Talk @pagetable
http://www.pagetable.com/
The Ultimate Talk Series
33C3 2016
Michael Steil
The Ultimate
Game Boy Talk
25C3 2008
Michael Steil
The Ultimate
Commodore 64 Talk
33C3 2016
Michael Steil
The Ultimate
Game Boy Talk
25C3 2008 26C3 2009
Michael Steil Sven Oliver ('SvOlli') Moll
The Ultimate The Ultimate

Commodore 64 Talk Atari 2600 Talk
33C3 2016
Michael Steil
The Ultimate
Game Boy Talk
25C3 2008 26C3 2009 29C3 2012
Michael Steil Sven Oliver ('SvOlli') Moll Tomaž Šolc
The Ultimate The Ultimate The Ultimate

Commodore 64 Talk Atari 2600 Talk Galaksija Talk
33C3 2016
Michael Steil
The Ultimate
Game Boy Talk
25C3 2008 26C3 2009 29C3 2012

32C3 2015 33C3 2016
rahra Michael Steil

Amiga 500 Talk Game Boy Talk
118 M Game Boy &
Game Boy Color
118 M Game Boy &
Game Boy Color
79 M Game Boy Advance
118 M Game Boy &
Game Boy Color
197 M total
118 M Game Boy &
Game Boy Color
197 M total
1049 Game Boy Games

576 Game Boy Color Games
118 M Game Boy &
Game Boy Color
197 M total
1989 - 2003 Game Boy &

Game Boy Color
1049 Game Boy Games
118 M Game Boy &
Game Boy Color
197 M total
1989 - 2003 Game Boy &

Game Boy Color
1049 Game Boy Games
1989 - 2009 including
Game Boy Advance
Nintendo Game Boy
Apr 1989
Wikimedia Commons
Nintendo Game Boy Atari Lynx
Apr 1989 Sep 1989
SEGA Game Gear NEC TurboExpress

Oct 1990 Dec 1990
Wikimedia Commons
Game Boy Game Boy Game Boy
Game Boy
Pocket Light Color
DMG-01 MGB-001 MGB-101 CGB-001
1989 1996 1998 1998

Advance Advance SP Advance SP
AGB-001 AGS-001 AGS-101
2001 2003 2005

Advance Advance SP Advance SP
AGB-001 AGS-001 AGS-101
2001 2003 2005

Super Super Game Boy
Game Boy Game Boy 2 Player
SHVC-027 SHVC-042
DOL-017
SGB SGB2
1994 1998 2003

Battery Indicator
66 mm (2.6") Screen
Joypad
Speaker
Game Pak
On Switch
External Power
Link Connector
Volume Contrast
Headphones
Game Pak
Four AA Batteries
Game Boy NES Commodore 64 Atari 2600 SNES
1 MHz* 1.8 MHz 1 MHz 1.2 MHz 3.6 MHz

CPU
8 bit 8 bit 8 bit 8 bit 16 bit

CPU
RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB


CPU
RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB
16 KB 
VRAM 8 KB 2 KB 0 64 KB
(shared)

CPU
RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB
16 KB 
(shared)
256x224
Resolution 160x144 256x240 320x200 160x192
512x448

CPU
RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB
16 KB 
(shared)
256x224
Resolution 160x144 256x240 320x200 160x192
512x448
Simultaneous
4 25 16 128 32768
Colors

CPU
RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB
16 KB 
(shared)
256x224
Resolution 160x144 256x240 320x200 160x192
512x448
Simultaneous
4 25 16 128 32768
Colors
Sprites/Line 10 8 8 3 32

CPU
RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB
16 KB 
(shared)
256x224
Resolution 160x144 256x240 320x200 160x192
512x448
Simultaneous
4 25 16 128 32768
Colors
Sprites/Line 10 8 8 3 32
Year 1989 1983 1982 1977 1990

Game Boy
RAM
DMG
VRAM
Game Boy
RAM
DMG
SoC
VRAM
Super Game Boy
SGB
Game Boy Pocket
MGB
Game Boy Light
MGB
Super Game Boy 2
SGB2
Game Boy Color
CGB
GB Boy
RAM
SoC
VRAM
DMG–CPU
DMG–CPU
CPU
Joypad Input
Interrupt Controller
Serial Data Transfer
Timer
Sound Controller
Memory
Pixel Processing Unit
Boot ROM
CPU
Game Boy
1989
Wikimedia Commons
NES Game Boy
1983 1989
Wikimedia Commons
NES Game Boy SNES
1983 1989 1990
Wikimedia Commons
NES Game Boy SNES
1983 1989 1990
6502
Wikimedia Commons
NES Game Boy SNES
1983 1989 1990
6502 65816
Wikimedia Commons
NES Game Boy SNES
1983 1989 1990
6502 LR35902 65816

Wikimedia Commons
1989
LR35902
Wikimedia Commons
http://www.oldcomputers.net/
1974 1989 1976
8080 LR35902 Z80
Wikimedia Commons
1974 1989 1976
Altair 8800
IMSAI 8080 8080 LR35902 Z80
Wikimedia Commons
1974 1989 1976
8080 LR35902 Z80
Osborne 1
Altair 8800
TRS-80
IMSAI 8080
Spectrum
Wikimedia Commons
80
80
80
80
Z8
0
80
80
LR
35
90
2
Z8
0
Z8
80
0
80
supported
core features
2
90
35
LR
unsupported
Z8
8080 features
80
0
80
supported
core features
2
90
35
LR
unsupported
Z8
8080 features
80
0
80
Z80 features
supported
supported
core features
2
90
35
LR
80
80
supported
core features
unsupported
8080 features
LR supported
35
90 Z80 features
2
unsupported
Z8
0
Z80 features
unsupported
Z8
8080 features
80
0
80
unsupported
Z80 features
Z80 features
supported
supported
core features
2
90
new features
35
LR
Supported Core Features
Registers
A F
B C
D E
H L
SP
PC
Registers
A F
B C
D E
H L
SP
PC
Registers
A F
B C
D E
H L
SP
PC
*
Flags
Z N H C - - - -
* different layout than 8080
Registers
A F
B C
D E
H L
SP
PC
*
Flags
Z N H C - - - -
Registers
A F
B BC C
D E
H L
SP
PC
*
Flags
Z N H C - - - -
Registers
A F
B C
D DE E
H L
SP
PC
*
Flags
Z N H C - - - -
Registers
A F
B C
D E
H HL L
SP
PC
*
Flags
Z N H C - - - -
Registers
A F
r16
B C
bc
D E de
hl
H L
sp
SP
PC
*
Flags
Z N H C - - - -
Registers
r8
a A F
b r16
B C
c bc
d D E de
e hl
H L
h sp
l SP
(hl)
PC
*
Flags
Z N H C - - - -
Registers
A F
B C
D E
H L
SP
PC
r8 r16
a (hl) bc
b c de
d e hl
h l sp
Registers Load/Store
A F ld r8, d8
ld r8, r8
B C ld a, (bc)
D E ld a, (de)
ld a, (a16) *
H L ld (bc), a
SP ld (de), a
ld (a16), a *
PC ld r16, d16
r8 r16
a (hl) bc
b c de
d e hl
h l sp
* different opcode than 8080
Registers Load/Store
A F ld r8, d8
ld r8, r8
B C ld a, (bc)
D E ld a, (de)
ld a, (a16) *
H L ld (bc), a
SP ld (de), a
ld (a16), a *
PC ld r16, d16
r8 r16 Stack
a (hl) bc
b c de ld sp, hl
d e hl push r16
h l sp pop r16
Registers Load/Store Artih/Logical
A F ld r8, d8 add
ld r8, r8 adc
B C ld a, (bc) sub
a, d8
D E ld a, (de) sbc
a, r8
ld a, (a16) * and
H L ld (bc), a xor
SP ld (de), a or
ld (a16), a * cp
PC ld r16, d16 inc
r8
dec
r8 r16 Stack daa
a (hl) bc cpl
b c de ld sp, hl
add hl, r16
d e hl push r16
h l
inc r16
sp pop r16
dec r16 * different opcode than 8080
Registers Load/Store Artih/Logical Rotate
A F ld r8, d8 add rlca

ld r8, r8 adc rla
B C ld a, (bc) sub rrca
a, d8
D E ld a, (de) sbc rra
a, r8
ld a, (a16) * and
H L ld (bc), a xor
SP ld (de), a or
ld (a16), a * cp
PC ld r16, d16 inc
r8
dec
r8 r16 Stack daa
a (hl) bc cpl
b c de ld sp, hl
add hl, r16
d e hl push r16
h l
inc r16
sp pop r16
dec r16 * different opcode than 8080
Registers Load/Store Artih/Logical Rotate
A F ld r8, d8 add rlca

ld r8, r8 adc rla
B C ld a, (bc) sub rrca
a, d8
D E ld a, (de) sbc rra
a, r8
ld a, (a16) * and
H L ld (bc), a xor
Control Flow
SP ld (de), a or
ld (a16), a * cp jp a16
PC ld r16, d16 inc jp hl
r8 jp f, a16
dec
r8 r16 call a16
Stack daa
a (hl) bc cpl call f, a16
b c de ld sp, hl ret
add hl, r16
d e hl push r16 ret f
h l
inc r16
sp pop r16
dec r16 rst n
Registers Load/Store Artih/Logical Rotate Rotate

Misc
A F ld r8, d8 add rlca ccf

ld r8, r8 adc rla scf
B C ld a, (bc) sub rrca nop
a, d8
D E ld a, (de) sbc rra halt
a, r8
ld a, (a16) * and di
H L ld (bc), a xor ei
Control Flow
SP ld (de), a or
ld (a16), a * cp jp a16
PC ld r16, d16 inc jp hl
r8 jp f, a16
dec
r8 r16 call a16
Stack daa
a (hl) bc cpl call f, a16
b c de ld sp, hl ret
add hl, r16
d e hl push r16 ret f
h l
inc r16
sp pop r16
dec r16 rst n
0000
0008
0010
0018
0020
0028
0030
0038
0040
0048
0050
0058
0060
.
.
.
0000
0008
0010
0018
0020
0028
0030
0038
0040 irq service routine #0
.
.
.
0000 rst $00

0008 rst $08
0010 rst $10
0018 rst $18
0020 rst $20
0028 rst $28
0030 rst $30
0038 rst $38
.
.
.
0000 rst $00 RESET

0008 rst $08
0010 rst $10
0018 rst $18
0020 rst $20
0028 rst $28
0030 rst $30
0038 rst $38
.
.
.
Unsupported 8080 Features
Flags
Z N H C - - - -
Flags
S
Z N
Z H
- H
C - P- - C
-
Flags
S
Z N
Z H
- H
C - P- - C
-
Sign & Parity

ret po
jp po, nn
call
ret pe
Flags jp
pe, nn
call
S
Z N
Z H
- H
C - P- - C
- ret p
jp
p, nn
call
ret m
jp m, nn
call
Sign & Parity Load/Store HL

ret po ld (a16), hl
jp po, nn ld hl, (a16)
call
ret pe
Flags jp
pe, nn
call
S
Z N
Z H
- H
C - P- - C
- ret p
jp
p, nn
call
ret m
jp m, nn
call

ret po ld (a16), hl
call
ret pe
Exchange
Flags jp
pe, nn
call ex (sp), hl
S
Z N
Z H
- H
C - P- - C
- ret p ex de, hl
jp
p, nn
call
ret m
jp m, nn
call
X
ret po ld (a16), hl
X
call
ret pe
Exchange
Flags jp
pe, nn
call ex (sp), hl
S
Z N
Z H
- H
C - P- - C
- ret p ex de, hl
jp
p, nn
call
Port I/O
ret m
jp out (a8), a
m, nn
call in a, (a8)
Supported Z80 Features
Shift & Bit Ops

rlc r8
rl r8
rrc r8
rr r8
sla r8
sra r8
srl r8
bit n, r8
set n, r8
res n, r8
CB Prefix
Shift & Bit Ops Relative Jump

rlc r8 jr a8
rl r8 jr nz, a8
rrc r8 jr z, a8
rr r8 jr nc, a8
sla r8 jr c, a8
sra r8
srl r8
bit n, r8
set n, r8
res n, r8
CB Prefix
Shift & Bit Ops Relative Jump

rlc r8 jr a8
rl r8 jr nz, a8
rrc r8 jr z, a8
rr r8 jr nc, a8
sla r8 jr c, a8
sra r8
srl r8
bit n, r8 Interrupt Return
set n, r8 reti*
res n, r8
CB Prefix
* different opcode than Z80

Unsupported Z80 Features
Registers
A’
A F’
F
B’
B C’
C
D’
D E’
E
H’
H L’
L
SP
PC
Registers
A F A’ F’
B C B’ C’
D E D’ E’
H L H’ L’
SP
PC
Registers
A F A’ F’
B C B’ C’
D E D’ E’
H L H’ L’
SP
PC
IX
IY
Unsupported Z80 Features Alternate Regs
ex af, af'
X
Auto-Inc/Dec, Loop exx
X
cpi/cpir/cpd/cpdr Registers
X
ini/inir/ind/indr Load/Store 16b
outi/outir/outd/outr
A F A’ F’
ld r16, (a16)
ldi/ldir/ldd/lddr B C B’ C’ ld (a16), r16
djnz
D E D’ E’
Control Flow 4-bit Rotate
H L H’ L’
retn rld
SP
rrd
SPR PC
im 0/1/2
X
Arithmetic
ld a, i IX
ld i, a adc hl, r16
IY
ld a, r sbc hl, r16
ld r, a neg
New Features
New Features
Postinc/Predec
ld (hl+), a
ld a, (hl+)
ld (hl-), a
ld a, (hl-)
New Features
Postinc/Predec
ld (hl+), a mem[hl] = a; hl++;

ld a, (hl+) a = mem[hl]; hl++;
ld (hl-), a hl--; mem[hl] = a;
ld a, (hl-) hl--; a = mem[hl];
New Features
New Features
Zero Page
ld ($ff00+a8), a
ld a, ($ff00+a8)
ld ($ff00+c), a
ld a, ($ff00+c)
New Features
Zero Page
ld ($ff00+a8), a
ld a, ($ff00+a8)
ld ($ff00+c), a
ld a, ($ff00+c)
0 KB 64 KB
New Features
Zero Page
ld ($ff00+a8), a
ld a, ($ff00+a8)
ld ($ff00+c), a
ld a, ($ff00+c)
FF00 FFFF
0 KB 64 KB
New Features
Zero Page
ld ($ff00+a8), a fa 40 ff ld a, ($ff40) 4 cycles

ld a, ($ff00+a8)
ld ($ff00+c), a
ld a, ($ff00+c)
FF00 FFFF
0 KB 64 KB
New Features
Zero Page
ld ($ff00+a8), a fa 40 ff ld a, ($ff40) 4 cycles

ld a, ($ff00+a8) f0 40 ld a, ($ff40) 3 cycles
ld ($ff00+c), a
ld a, ($ff00+c)
FF00 FFFF
0 KB 64 KB
New Features
Stack
add sp, r8
ld hl, sp+r8
New Features
Stack
Store SP
add sp, r8
ld (a16), sp*
ld hl, sp+r8
* Z80 has a more generic version

New Features
Stack
Store SP Swap Nibbles
add sp, r8
ld (a16), sp* swap r8
ld hl, sp+r8

New Features
Stack
Store SP Swap Nibbles Power Saving
add sp, r8
ld (a16), sp* swap r8 stop
ld hl, sp+r8

x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
NOP LD BC,d16 LD (BC),A INC BC INC B DEC B LD B,d8 RLCA LD (a16),SP ADD HL,BC LD A,(BC) DEC BC INC C DEC C LD C,d8 RRCA
0x 1 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 3 20 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
STOP 0 LD DE,d16 LD (DE),A INC DE INC D DEC D LD D,d8 RLA JR r8 ADD HL,DE LD A,(DE) DEC DE INC E DEC E LD E,d8 RRA
1x 2 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
JR NZ,r8 LD HL,d16 LD (HL+),A INC HL INC H DEC H LD H,d8 DAA JR Z,r8 ADD HL,HL LD A,(HL+) DEC HL INC L DEC L LD L,d8 CPL
2x 2 12/8 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - Z - 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 1 1 -
JR NC,r8 LD SP,d16 LD (HL-),A INC SP INC (HL) DEC (HL) LD (HL),d8 SCF JR C,r8 ADD HL,SP LD A,(HL-) DEC SP INC A DEC A LD A,d8 CCF
3x 2 12/8 3 12 1 8 1 8 1 12 1 12 2 12 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 1 - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 C
LD B,B LD B,C LD B,D LD B,E LD B,H LD B,L LD B,(HL) LD B,A LD C,B LD C,C LD C,D LD C,E LD C,H LD C,L LD C,(HL) LD C,A
4x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
LD D,B LD D,C LD D,D LD D,E LD D,H LD D,L LD D,(HL) LD D,A LD E,B LD E,C LD E,D LD E,E LD E,H LD E,L LD E,(HL) LD E,A
5x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
LD H,B LD H,C LD H,D LD H,E LD H,H LD H,L LD H,(HL) LD H,A LD L,B LD L,C LD L,D LD L,E LD L,H LD L,L LD L,(HL) LD L,A
6x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
LD (HL),B LD (HL),C LD (HL),D LD (HL),E LD (HL),H LD (HL),L HALT LD (HL),A LD A,B LD A,C LD A,D LD A,E LD A,H LD A,L LD A,(HL) LD A,A
7x 1 8 1 8 1 8 1 8 1 8 1 8 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
ADD A,B ADD A,C ADD A,D ADD A,E ADD A,H ADD A,L ADD A,(HL) ADD A,A ADC A,B ADC A,C ADC A,D ADC A,E ADC A,H ADC A,L ADC A,(HL) ADC A,A
8x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C Z 0 H C
SUB B SUB C SUB D SUB E SUB H SUB L SUB (HL) SUB A SBC A,B SBC A,C SBC A,D SBC A,E SBC A,H SBC A,L SBC A,(HL) SBC A,A
9x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
AND B AND C AND D AND E AND H AND L AND (HL) AND A XOR B XOR C XOR D XOR E XOR H XOR L XOR (HL) XOR A
Ax 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Z 0 1 0 Z 0 1 0 Z 0 1 0 Z 0 1 0 Z 0 1 0 Z 0 1 0 Z 0 1 0 Z 0 1 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0
OR B OR C OR D OR E OR H OR L OR (HL) OR A CP B CP C CP D CP E CP H CP L CP (HL) CP A
Bx 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 1 H C Z 1 H C Z 1 H C Z 1 H C Z 1 H C Z 1 H C Z 1 H C Z 1 H C
RET NZ POP BC JP NZ,a16 JP a16 CALL NZ,a16 PUSH BC ADD A,d8 RST 00H RET Z RET JP Z,a16 PREFIX CB CALL Z,a16 CALL a16 ADC A,d8 RST 08H
Cx 1 20/8 1 12 3 16/12 3 16 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 1 4 3 24/12 3 24 2 8 1 16
- - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - - - - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - -
RET NC POP DE JP NC,a16 CALL NC,a16 PUSH DE SUB d8 RST 10H RET C RETI JP C,a16 CALL C,a16 SBC A,d8 RST 18H
Dx 1 20/8 1 12 3 16/12 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 3 24/12 2 8 1 16
- - - - - - - - - - - - - - - - - - - - Z 1 H C - - - - - - - - - - - - - - - - - - - - Z 1 H C - - - -
LDH (a8),A POP HL LD (C),A PUSH HL AND d8 RST 20H ADD SP,r8 JP (HL) LD (a16),A XOR d8 RST 28H
Ex 2 12 1 12 2 8 1 16 2 8 1 16 2 16 1 4 3 16 2 8 1 16
- - - - - - - - - - - - - - - - Z 0 1 0 - - - - 0 0 H C - - - - - - - - Z 0 0 0 - - - -
LDH A,(a8) POP AF LD A,(C) DI PUSH AF OR d8 RST 30H LD HL,SP+r8 LD SP,HL LD A,(a16) EI CP d8 RST 38H
Fx 2 12 1 12 2 8 1 4 1 16 2 8 1 16 2 12 1 8 3 16 1 4 2 8 1 16
- - - - Z N H C - - - - - - - - - - - - Z 0 0 0 - - - - 0 0 H C - - - - - - - - - - - - Z 1 H C - - - -
http://pastraiser.com
0x 1 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 3 20 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
1x 2 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
2x 2 12/8 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - Z - 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 1 1 -
3x 2 12/8 3 12 1 8 1 8 1 12 1 12 2 12 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 1 - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 C
4x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
7x 1 8 1 8 1 8 1 8 1 8 1 8 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
9x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Ax 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Bx 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Cx 1 20/8 1 12 3 16/12 3 16 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 1 4 3 24/12 3 24 2 8 1 16
- - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - - - - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - -
Dx 1 20/8 1 12 3 16/12 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 3 24/12 2 8 1 16
- - - - - - - - - - - - - - - - - - - - Z 1 H C - - - - - - - - - - - - - - - - - - - - Z 1 H C - - - -
Ex 2 12 1 12 2 8 1 16 2 8 1 16 2 16 1 4 3 16 2 8 1 16
- - - - - - - - - - - - - - - - Z 0 1 0 - - - - 0 0 H C - - - - - - - - Z 0 0 0 - - - -
Fx 2 12 1 12 2 8 1 4 1 16 2 8 1 16 2 12 1 8 3 16 1 4 2 8 1 16
- - - - Z N H C - - - - - - - - - - - - Z 0 0 0 - - - - 0 0 H C - - - - - - - - - - - - Z 1 H C - - - -
0x 1 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 3 20 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
1x 2 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
2x 2 12/8 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - Z - 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 1 1 -
3x 2 12/8 3 12 1 8 1 8 1 12 1 12 2 12 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 1 - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 C
PREFIX CB
4x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1 4
7x 1 8 1 8 1 8 1 8 1 8 1 8 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
9x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - -
Ax 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Bx 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Cx 1 20/8 1 12 3 16/12 3 16 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 1 4 3 24/12 3 24 2 8 1 16
- - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - - - - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - -
Dx 1 20/8 1 12 3 16/12 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 3 24/12 2 8 1 16
- - - - - - - - - - - - - - - - - - - - Z 1 H C - - - - - - - - - - - - - - - - - - - - Z 1 H C - - - -
Ex 2 12 1 12 2 8 1 16 2 8 1 16 2 16 1 4 3 16 2 8 1 16
- - - - - - - - - - - - - - - - Z 0 1 0 - - - - 0 0 H C - - - - - - - - Z 0 0 0 - - - -
Fx 2 12 1 12 2 8 1 4 1 16 2 8 1 16 2 12 1 8 3 16 1 4 2 8 1 16
- - - - Z N H C - - - - - - - - - - - - Z 0 0 0 - - - - 0 0 H C - - - - - - - - - - - - Z 1 H C - - - -
CB x0
RLC B
x1
RLC C
x2
RLC D
x3
RLC E
x4
RLC H
x5
RLC L
x6
RLC (HL)
x7
RLC A
x8
RRC B
x9
RRC C
xA
RRC D
xB
RRC E
xC
RRC H
xD
RRC L
xE
RRC (HL)
xF
RRC A
0x 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C
RL B RL C RL D RL E RL H RL L RL (HL) RL A RR B RR C RR D RR E RR H RR L RR (HL) RR A
1x 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C
SLA B SLA C SLA D SLA E SLA H SLA L SLA (HL) SLA A SRA B SRA C SRA D SRA E SRA H SRA L SRA (HL) SRA A
2x 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0
SWAP B SWAP C SWAP D SWAP E SWAP H SWAP L SWAP (HL) SWAP A SRL B SRL C SRL D SRL E SRL H SRL L SRL (HL) SRL A
3x 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 0 Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C Z 0 0 C
BIT 0,B BIT 0,C BIT 0,D BIT 0,E BIT 0,H BIT 0,L BIT 0,(HL) BIT 0,A BIT 1,B BIT 1,C BIT 1,D BIT 1,E BIT 1,H BIT 1,L BIT 1,(HL) BIT 1,A
4x 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 - Z 0 1 -
5x 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
6x 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
7x 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
RES 0,B RES 0,C RES 0,D RES 0,E RES 0,H RES 0,L RES 0,(HL) RES 0,A RES 1,B RES 1,C RES 1,D RES 1,E RES 1,H RES 1,L RES 1,(HL) RES 1,A
8x 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
9x 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Ax 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Bx 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
SET 0,B SET 0,C SET 0,D SET 0,E SET 0,H SET 0,L SET 0,(HL) SET 0,A SET 1,B SET 1,C SET 1,D SET 1,E SET 1,H SET 1,L SET 1,(HL) SET 1,A
Cx 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Dx 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Ex 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Fx 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 16 2 8
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
0x 1 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 3 20 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
1x 2 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
2x 2 12/8 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - Z - 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 1 1 -
3x 2 12/8 3 12 1 8 1 8 1 12 1 12 2 12 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 1 - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 C
4x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
7x 1 8 1 8 1 8 1 8 1 8 1 8 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
9x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Ax 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Bx 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Cx 1 20/8 1 12 3 16/12 3 16 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 1 4 3 24/12 3 24 2 8 1 16
- - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - - - - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - -
Dx 1 20/8 1 12 3 16/12 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 3 24/12 2 8 1 16
- - - - - - - - - - - - - - - - - - - - Z 1 H C - - - - - - - - - - - - - - - - - - - - Z 1 H C - - - -
Ex 2 12 1 12 2 8 1 16 2 8 1 16 2 16 1 4 3 16 2 8 1 16
- - - - - - - - - - - - - - - - Z 0 1 0 - - - - 0 0 H C - - - - - - - - Z 0 0 0 - - - -
Fx 2 12 1 12 2 8 1 4 1 16 2 8 1 16 2 12 1 8 3 16 1 4 2 8 1 16
- - - - Z N H C - - - - - - - - - - - - Z 0 0 0 - - - - 0 0 H C - - - - - - - - - - - - Z 1 H C - - - -
0x 1 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 3 20 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
1x 2 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
2x 2 12/8 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - Z - 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 1 1 -
3x 2 12/8 3 12 1 8 1 8 1 12 1 12 2 12 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 1 - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 C
4x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
7x 1 8 1 8 1 8 1 8 1 8 1 8 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
9x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Ax 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Bx 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Cx 1 20/8 1 12 3 16/12 3 16 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 1 4 3 24/12 3 24 2 8 1 16
- - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - - - - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - -
Dx 1 20/8 1 12 3 16/12 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 3 24/12 2 8 1 16
- - - - - - - - - - - - - - - - - - - - Z 1 H C - - - - - - - - - - - - - - - - - - - - Z 1 H C - - - -
Ex 2 12 1 12 2 8 1 16 2 8 1 16 2 16 1 4 3 16 2 8 1 16
- - - - - - - - - - - - - - - - Z 0 1 0 - - - - 0 0 H C - - - - - - - - Z 0 0 0 - - - -
Fx 2 12 1 12 2 8 1 4 1 16 2 8 1 16 2 12 1 8 3 16 1 4 2 8 1 16
- - - - Z N H C - - - - - - - - - - - - Z 0 0 0 - - - - 0 0 H C - - - - - - - - - - - - Z 1 H C - - - -
0x 1 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 3 20 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
1x 2 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
2x 2 12/8 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - Z - 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 1 1 -
3x 2 12/8 3 12 1 8 1 8 1 12 1 12 2 12 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 1 - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 C
LD A,(a16)
4x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 16
7x 1 8 1 8 1 8 1 8 1 8 1 8 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
9x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - -
Ax 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Bx 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Cx 1 20/8 1 12 3 16/12 3 16 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 1 4 3 24/12 3 24 2 8 1 16
- - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - - - - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - -
Dx 1 20/8 1 12 3 16/12 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 3 24/12 2 8 1 16
- - - - - - - - - - - - - - - - - - - - Z 1 H C - - - - - - - - - - - - - - - - - - - - Z 1 H C - - - -
Ex 2 12 1 12 2 8 1 16 2 8 1 16 2 16 1 4 3 16 2 8 1 16
- - - - - - - - - - - - - - - - Z 0 1 0 - - - - 0 0 H C - - - - - - - - Z 0 0 0 - - - -
Fx 2 12 1 12 2 8 1 4 1 16 2 8 1 16 2 12 1 8 3 16 1 4 2 8 1 16
- - - - Z N H C - - - - - - - - - - - - Z 0 0 0 - - - - 0 0 H C - - - - - - - - - - - - Z 1 H C - - - -
0x 1 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 3 20 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
1x 2 4 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - 0 0 0 C
2x 2 12/8 3 12 1 8 1 8 1 4 1 4 2 8 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - Z - 0 C - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 1 1 -
3x 2 12/8 3 12 1 8 1 8 1 12 1 12 2 12 1 4 2 12/8 1 8 1 8 1 8 1 4 1 4 2 8 1 4
- - - - - - - - - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 1 - - - - - 0 H C - - - - - - - - Z 0 H - Z 1 H - - - - - - 0 0 C
LD A,(a16)
4x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
5x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
3 16 4
7x 1 8 1 8 1 8 1 8 1 8 1 8 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
8x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
bytes clocks clocks

9x 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
@ 4 MHz @ 1 MHz
- - - -
Ax 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Bx 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4 1 4 1 4 1 4 1 4 1 4 1 4 1 8 1 4
Cx 1 20/8 1 12 3 16/12 3 16 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 1 4 3 24/12 3 24 2 8 1 16
- - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - - - - - - - - - - - - - - - - - - - - - - - - - - Z 0 H C - - - -
Dx 1 20/8 1 12 3 16/12 3 24/12 1 16 2 8 1 16 1 20/8 1 16 3 16/12 3 24/12 2 8 1 16
- - - - - - - - - - - - - - - - - - - - Z 1 H C - - - - - - - - - - - - - - - - - - - - Z 1 H C - - - -
Ex 2 12 1 12 2 8 1 16 2 8 1 16 2 16 1 4 3 16 2 8 1 16
- - - - - - - - - - - - - - - - Z 0 1 0 - - - - 0 0 H C - - - - - - - - Z 0 0 0 - - - -
Fx 2 12 1 12 2 8 1 4 1 16 2 8 1 16 2 12 1 8 3 16 1 4 2 8 1 16
- - - - Z N H C - - - - - - - - - - - - Z 0 0 0 - - - - 0 0 H C - - - - - - - - - - - - Z 1 H C - - - -
System Clocks
System Clocks
CPU 4 MHz
System Clocks
CPU 4 MHz
RAM 1 MHz
System Clocks
CPU 4 MHz
RAM 1 MHz
PPU 4 MHz
System Clocks
CPU 4 MHz
RAM 1 MHz
PPU 4 MHz
VRAM 2 MHz
System Clocks
CPU 4,194,304
4 MHz Hz
RAM 1,048,576
1 MHz Hz
PPU 4,194,304
4 MHz Hz
VRAM 2,097,152
2 MHz Hz
System Clocks
CPU 4,194,304
4 MHz Hz
RAM 1,048,576
1 MHz Hz
PPU 4,194,304
4 MHz Hz
VRAM 2,097,152
2 MHz Hz
“machine cycle” @ 1 MHz

0 KB 64 KB
ROM
0000 8000
0 KB 64 KB
BOOT ROM
ROM
0000 8000
0 KB 64 KB
BOOT ROM
Video
ROM
RAM
0000 8000 A000
0 KB 64 KB
BOOT ROM
Video External
ROM
RAM RAM
0000 8000 A000
0 KB 64 KB
BOOT ROM
Video External
ROM RAM
RAM RAM
0000 8000 A000 C000 E000
0 KB 64 KB
BOOT ROM
Video External
ROM RAM
RAM RAM
0000 8000 A000 C000 E000
0 KB 64 KB
BOOT ROM
Video External
ROM RAM
RAM RAM
0000 8000 A000 C000 E000
0 KB 64 KB
BOOT ROM
Video External
ROM RAM
RAM RAM
0000 8000 A000 C000 E000
0 KB 64 KB
OAM RAM
BOOT ROM
FE00 FEA0
Video External
ROM RAM
RAM RAM
0000 8000 A000 C000 E000
0 KB 64 KB
OAM RAM
BOOT ROM
FE00 FEA0 FF00
Video External
ROM RAM
RAM RAM
0000 8000 A000 C000 E000
0 KB 64 KB
OAM RAM I/O
BOOT ROM
FE00 FEA0 FF00 FF80
Video External
ROM RAM
RAM RAM
0000 8000 A000 C000 E000
0 KB 64 KB
OAM RAM I/O HRAM
BOOT ROM
FE00 FEA0 FF00 FF80
Video External
ROM RAM
RAM RAM
0000 8000 A000 C000 E000
0 KB 64 KB
ROM
0000 8000
32 KB?
32 KB
https://gekkio.fi/blog/
32 KB
128 KB
128 KB
MBC
ROM ROM
ROM
Bank 0 Bank 1
0000 8000
ROM ROM
Bank 0 Bank 1
0000 4000 8000
ROM
Bank 3
ROM
Bank 2
ROM ROM
Bank 0 Bank 1
0000 4000 8000
OAM RAM I/O HRAM
FE00 FEA0 FF00 FF80

BOOT ROM
ROM ROM Video External

RAM
Bank 0 Bank 1-n RAM RAM
0000 8000 A000 C000 E000
0 KB 64 KB
Video External
RAM
RAM RAM 0
A000 C000
External
RAM 2
External
RAM 1
Video External
RAM
RAM RAM 0
A000 C000
OAM RAM I/O HRAM
BOOT ROM
FE00 FEA0 FF00 FF80
Video External
ROM RAM
RAM RAM
0000 8000 A000 C000 E000
0 KB 64 KB
OAM RAM I/O HRAM
FE00 FEA0 FF00 FF80
BOOT ROM Video External

ROM RAM
RAM RAM
0000
0000-00FF
8000 A000 C000 E000
0 KB 64 KB
https://www.youtube.com/watch?v=QyvBNhzshKQ
https://www.youtube.com/watch?v=QyvBNhzshKQ
ld sp,$fffe addr_0055: ld c,a
Boot ROM xor a

ld hl,$9fff
addr_0007:
ld h,a
ld a,$64
ld d,a
ld b,$04
addr_0098:
push bc
ld (hl-),a ld ($ff00+$42),a rl c
bit 7,h ld a,$91 rla
jr nz, addr_0007 ld ($ff00+$40),a pop bc
ld hl,$ff26 inc b rl c
ld c,$11 addr_0060: rla
ld a,$80 ld e,$02 dec b
ld (hl-),a addr_0062: jr nz, addr_0098
ld ($ff00+c),a ld c,$0c ld (hl+),a
inc c addr_0064: inc hl
ld a,$f3 ld a,($ff00+$44) ld (hl+),a
ld ($ff00+c),a cp $90 inc hl
ld (hl-),a jr nz, addr_0064 ret
ld a,$77 dec c addr_00a8:
ld (hl),a jr nz, addr_0064 .db $ce,$ed,$66,$66,$cc,$0d,$00,$0b
ld a,$fc dec e .db $03,$73,$00,$83,$00,$0c,$00,$0d
ld ($ff00+$47),a jr nz, addr_0062 .db $00,$08,$11,$1f,$88,$89,$00,$0e
ld de,$0104 ld c,$13 .db $dc,$cc,$6e,$e6,$dd,$dd,$d9,$99
ld hl,$8010 inc h .db $bb,$bb,$67,$63,$6e,$0e,$ec,$cc
addr_0027: ld a,h .db $dd,$dc,$99,$9f,$bb,$b9,$33,$3e
ld a,(de) ld e,$83 addr_00d8:
call $0095 cp $62 .db $3c,$42,$b9,$a5,$b9,$a5,$42,$3c
call $0096 jr z, addr_0080 addr_00e0:
inc de ld e,$c1 ld hl,$0104
ld a,e cp $64 ld de,$00a8
cp $34 jr nz, addr_0086 addr_00e6:
jr nz, addr_0027 addr_0080: ld a,(de)
ld de,$00d8 ld a,e inc de
ld b,$08 ld ($ff00+c),a cp (hl)
addr_0039: inc c jr nz,$fe
ld a,(de) ld a,$87 inc hl
inc de ld ($ff00+c),a ld a,l
ld (hl+),a addr_0086: cp $34
inc hl ld a,($ff00+$42) jr nz, addr_00e6
dec b sub b ld b,$19
jr nz, addr_0039 ld ($ff00+$42),a ld a,b
ld a,$19 dec d addr_00f4:
ld ($9910),a jr nz, addr_0060 add (hl)
ld hl,$992f dec b inc hl
addr_0048: jr nz, addr_00e0 dec b
ld c,$0c ld d,$20 jr nz, addr_00f4
addr_004a: jr addr_0060 add (hl)
dec a jr nz,$fe
jr z, addr_0055 ld a,$01
ld (hl-),a ld ($ff00+$50),a
dec c
jr nz, addr_004a
ld l,$0f
jr addr_0048
Boot ROM xor a

ld hl,$9fff
ld h,a
ld a,$64
ld b,$04
addr_0098:
Init RAM
addr_0007:
ld (hl-),a
ld d,a
ld ($ff00+$42),a
push bc
rl c
ld ($ff00+c),a ld c,$0c ld (hl+),a
inc c addr_0064: inc hl
ld a,$f3 ld a,($ff00+$44) ld (hl+),a
ld a,$fc dec e .db $03,$73,$00,$83,$00,$0c,$00,$0d
call $0095 cp $62 .db $3c,$42,$b9,$a5,$b9,$a5,$42,$3c
ld (hl+),a addr_0086: cp $34
dec a jr nz,$fe
ld (hl-),a ld ($ff00+$50),a
dec c
jr nz, addr_004a
ld l,$0f
jr addr_0048
Boot ROM xor a

ld hl,$9fff
ld h,a
ld a,$64
ld b,$04
addr_0098:
Init RAM
addr_0007:
ld (hl-),a
ld d,a
ld ($ff00+$42),a
push bc
rl c
Init Sound
ld ($ff00+c),a
inc c
ld a,$f3
ld c,$0c
addr_0064:
ld a,($ff00+$44)
ld (hl+),a
inc hl
ld (hl+),a
ld a,$fc dec e .db $03,$73,$00,$83,$00,$0c,$00,$0d
call $0095 cp $62 .db $3c,$42,$b9,$a5,$b9,$a5,$42,$3c
ld (hl+),a addr_0086: cp $34
dec a jr nz,$fe
ld (hl-),a ld ($ff00+$50),a
dec c
jr nz, addr_004a
ld l,$0f
jr addr_0048
Boot ROM xor a

ld hl,$9fff
ld h,a
ld a,$64
ld b,$04
addr_0098:
Init RAM
addr_0007:
ld (hl-),a
ld d,a
ld ($ff00+$42),a
push bc
rl c
pop bc
Decode logo
jr nz, addr_0007 ld ($ff00+$40),a
Init Sound
ld ($ff00+c),a
inc c
ld a,$f3
ld c,$0c
addr_0064:
ld a,($ff00+$44)
ld (hl+),a
inc hl
ld (hl+),a
ld a,$fc dec e .db $03,$73,$00,$83,$00,$0c,$00,$0d
call $0095 cp $62 .db $3c,$42,$b9,$a5,$b9,$a5,$42,$3c
cp $34
Set up Logo
ld (hl+),a addr_0086:
dec a jr nz,$fe
ld (hl-),a ld ($ff00+$50),a
dec c
jr nz, addr_004a
ld l,$0f
jr addr_0048
Boot ROM xor a

ld hl,$9fff
ld h,a
ld a,$64
ld b,$04
addr_0098:
Init RAM
addr_0007:
ld (hl-),a
ld d,a
ld ($ff00+$42),a
push bc
rl c
pop bc
Decode logo
jr nz, addr_0007 ld ($ff00+$40),a
Init Sound
ld ($ff00+c),a
inc c
ld c,$0c
addr_0064:
ld (hl+),a
inc hl
ld (hl+),a
Scroll logo
ld a,$f3 ld a,($ff00+$44)
ld a,$fc dec e .db $03,$73,$00,$83,$00,$0c,$00,$0d
call $0095 cp $62 .db $3c,$42,$b9,$a5,$b9,$a5,$42,$3c
cp $34
Set up Logo
ld ($9910),a
ld hl,$992f
addr_0048:
Scroll logo
jr nz, addr_0060
dec b
jr nz, addr_00e0
add (hl)
inc hl
dec b
dec a jr nz,$fe
ld (hl-),a ld ($ff00+$50),a
dec c
jr nz, addr_004a
ld l,$0f
jr addr_0048
Boot ROM xor a

ld hl,$9fff
ld h,a
ld a,$64
ld b,$04
addr_0098:
Init RAM
addr_0007:
ld (hl-),a
ld d,a
ld ($ff00+$42),a
push bc
rl c
pop bc
Decode logo
jr nz, addr_0007 ld ($ff00+$40),a
Init Sound
ld ($ff00+c),a
inc c
ld c,$0c
addr_0064:
ld (hl+),a
inc hl
ld (hl+),a
Scroll logo
ld a,$f3 ld a,($ff00+$44)
ld a,$fc dec e .db $03,$73,$00,$83,$00,$0c,$00,$0d
call $0095 cp $62 .db $3c,$42,$b9,$a5,$b9,$a5,$42,$3c
addr_0039:
ld a,(de)
Play Sound
inc c
ld a,$87
jr nz,$fe
inc hl
cp $34
Set up Logo
ld ($9910),a
ld hl,$992f
addr_0048:
Scroll logo
jr nz, addr_0060
dec b
jr nz, addr_00e0
add (hl)
inc hl
dec b
dec a jr nz,$fe
ld (hl-),a ld ($ff00+$50),a
dec c
jr nz, addr_004a
ld l,$0f
jr addr_0048
Boot ROM xor a

ld hl,$9fff
ld h,a
ld a,$64
ld b,$04
addr_0098:
Init RAM
addr_0007:
ld (hl-),a
ld d,a
ld ($ff00+$42),a
push bc
rl c
pop bc
Decode logo
jr nz, addr_0007 ld ($ff00+$40),a
Init Sound
ld ($ff00+c),a
inc c
ld c,$0c
addr_0064:
ld (hl+),a
inc hl
ld (hl+),a
Scroll logo
ld a,$f3 ld a,($ff00+$44)
ld a,$fc dec e .db $03,$73,$00,$83,$00,$0c,$00,$0d
.db $00,$08,$11,$1f,$88,$89,$00,$0e
Logo data
ld ($ff00+$47),a jr nz, addr_0062
call $0095 cp $62 .db $3c,$42,$b9,$a5,$b9,$a5,$42,$3c
Compare logo
addr_0039:
ld a,(de)
Play Sound
inc c
ld a,$87
jr nz,$fe
inc hl
cp $34
Set up Logo
ld ($9910),a
ld hl,$992f
addr_0048:
Scroll logo
jr nz, addr_0060
dec b
jr nz, addr_00e0
add (hl)
inc hl
dec b
dec a jr nz,$fe
ld (hl-),a ld ($ff00+$50),a
dec c
jr nz, addr_004a
ld l,$0f
jr addr_0048
Boot ROM xor a

ld hl,$9fff
ld h,a
ld a,$64
ld b,$04
addr_0098:
Init RAM
addr_0007:
ld (hl-),a
ld d,a
ld ($ff00+$42),a
push bc
rl c
pop bc
Decode logo
jr nz, addr_0007 ld ($ff00+$40),a
Init Sound
ld ($ff00+c),a
inc c
ld c,$0c
addr_0064:
ld (hl+),a
inc hl
ld (hl+),a
Scroll logo
ld a,$f3 ld a,($ff00+$44)
ld a,$fc dec e .db $03,$73,$00,$83,$00,$0c,$00,$0d
.db $00,$08,$11,$1f,$88,$89,$00,$0e
Logo data
ld ($ff00+$47),a jr nz, addr_0062
call $0095 cp $62 .db $3c,$42,$b9,$a5,$b9,$a5,$42,$3c
Compare logo
addr_0039:
ld a,(de)
Play Sound
inc c
ld a,$87
jr nz,$fe
inc hl
cp $34
Set up Logo
ld ($9910),a
ld hl,$992f Scroll logo
jr nz, addr_0060
dec b
Checksum
add (hl)
inc hl
ld c,$0c
addr_004a:
ld d,$20
jr addr_0060 header
jr nz, addr_00f4
add (hl)
jr nz,$fe
dec a
ld (hl-),a ld ($ff00+$50),a
dec c
jr nz, addr_004a
ld l,$0f
jr addr_0048
Boot ROM xor a

ld hl,$9fff
ld h,a
ld a,$64
ld b,$04
addr_0098:
Init RAM
addr_0007:
ld (hl-),a
ld d,a
ld ($ff00+$42),a
push bc
rl c
pop bc
Decode logo
jr nz, addr_0007 ld ($ff00+$40),a
Init Sound
ld ($ff00+c),a
inc c
ld c,$0c
addr_0064:
ld (hl+),a
inc hl
ld (hl+),a
Scroll logo
ld a,$f3 ld a,($ff00+$44)
ld a,$fc dec e .db $03,$73,$00,$83,$00,$0c,$00,$0d
.db $00,$08,$11,$1f,$88,$89,$00,$0e
Logo data
ld ($ff00+$47),a jr nz, addr_0062
call $0095 cp $62 .db $3c,$42,$b9,$a5,$b9,$a5,$42,$3c
Compare logo
addr_0039:
ld a,(de)
Play Sound
inc c
ld a,$87
jr nz,$fe
inc hl
cp $34
Set up Logo
ld ($9910),a
ld hl,$992f Scroll logo
jr nz, addr_0060
dec b
Checksum
add (hl)
inc hl
ld c,$0c
addr_004a:
ld d,$20
jr addr_0060 header
jr nz, addr_00f4
add (hl)
jr nz,$fe
dec a
ld (hl-),a
dec c
jr nz, addr_004a
Turn off ROM
ld ($ff00+$50),a
ld l,$0f
jr addr_0048
Logo Hack
Logo Hack
• Is That a Demo in Your Pocket?

• Gejmbåj
• Oh!
• 20y
by Snorpung
https://vimeo.com/user1849607
Logo Hack
• Is That a Demo in Your Pocket?

• Gejmbåj
• Oh!
• 20y
by Snorpung
https://vimeo.com/user1849607
00f4 86 add (hl)
Game ROM Boot ROM

00f5 23 inc hl
00f6 05 dec b
00f7 20 fb jr nz, $00f4
00f9 86 add (hl)
00fa 20 fe jr nz, $fe
00fc 3e 01 ld a, $01
00fe e0 50 ld ($ff00+$50), a
0100 00 nop
0101 c3 50 01 jp $0150
0104 ...
. ...
. ...
. ...
. ...
00f4 86 add (hl)
Game ROM Boot ROM

00f5 23 inc hl
00f6 05 dec b
00f7 20 fb jr nz, $00f4
00f9 86 add (hl)
00fa 20 fe jr nz, $fe
00fc 3e 01 ld a, $01
00fe e0 50 ld ($ff00+$50), a
0100 00 nop
0101 c3 50 01 jp $0150
0104 ...
. ...
. ...
. ...
. ...
.
00f4 86 ...
add (hl)
ROM
GameROM
.
00f5 23 ...
inc hl
.
00f6 05 ...
dec b
.
00f7 20 fb ...
jr nz, $00f4
.
00f9 86 ...
add (hl)
Game ROM Boot

.
00fa 20 fe ...
jr nz, $fe
.
00fc 3e 01 ...
ld a, $01
.
00fe e0 50 ...($ff00+$50), a
ld
0100 00 nop
0101 c3 50 01 jp $0150
0104 ...
. ...
. ...
. ...
. ...
.
00f4 86 ...
add (hl)
ROM
GameROM
.
00f5 23 ...
inc hl
.
00f6 05 ...
dec b
.
00f7 20 fb ...
jr nz, $00f4
.
00f9 86 ...
add (hl)
Game ROM Boot

.
00fa 20 fe ...
jr nz, $fe
.
00fc 3e 01 ...
ld a, $01
.
00fe e0 50 ...($ff00+$50), a
ld
0100 00 nop
0101 c3 50 01 jp $0150
0104 ...
. ...
. ...
. ...
. ...
ROM Header
0100 - 0103 Entry Point nop, jp $0150
0104 - 0133 Nintendo Logo $CE, $ED, $66, $66, $CC, ...
0134 - 0143 Title “SUPER MARIOLAND”
013F - 0142 Manufacturer Code $00
0143 CGB Flag $00
0144 - 0145 New Licensee Code $00, $00
0146 SGB Flag $00
0147 Cartridge Type $01
0148 ROM Size $01
0149 RAM Size $00
014A Destination Code \
$00
014B Old Licensee Code $01
014C Mask ROM Version number $00
014D Header Checksum $9E
014E - 014F Global Checksum $
$41, $6B
OAM RAM I/O HRAM
FE00 FEA0 FF00 FF80
Video External
ROM RAM
RAM RAM
0000 8000 A000 C000 E000
0 KB 64 KB
I/O HRAM
FEA0 FF00 FF80
FF00 FF0F
FF10 P1 SB SC DIV TIM TMA TAC IF
A
NR10 NR11 NR12 NR13 NR14 NR21 NR22 NR23 NR24 NR30 NR31 NR32 NR33 NR34
NR41 NR42 NR43 NR44 NR50 NR51 NR52
W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 W10 W11 W12 W13 W13 W14
LCD STA SCY SCX LY LYC DMA BGP OBP OBP WY WX
C
BOOT T 0 1
FFF0
HRAM IE
Interrupt Controller Joypad Input
FF0F IF Interrupt Flag (R/W) FF00 P1 Joypad (R/W)
FFFF IE Interrupt Enable (R/W)
Sound Controller FF01 SB Serial transfer data (R/W)
FF10 NR10 Channel 1 Sweep register (R/W) FF02 SC Serial Transfer Control (R/W)
FF11 NR11 Channel 1 Sound length/Wave pattern duty (R/W)
Timer
FF12 NR12 Channel 1 Volume Envelope (R/W)
FF04 DIV Divider Register (R/W)
FF13 NR13 Channel 1 Frequency lo (Write Only)
FF05 TIMA Timer counter (R/W)
FF14 NR14 Channel 1 Frequency hi (R/W)
FF06 TMA Timer Modulo (R/W)
FF16 NR21 Channel 2 Sound Length/Wave Pattern Duty (R/W)
FF17 NR22 Channel 2 Volume Envelope (R/W) FF07 TAC Timer Control (R/W)
FF18 NR23 Channel 2 Frequency lo data (W) Pixel Processing Unit
FF19 NR24 Channel 2 Frequency hi data (R/W) FF40 LCDC LCD Control (R/W)
FF1A NR30 Channel 3 Sound on/off (R/W) FF41 STAT LCDC Status (R/W)
FF1B NR31 Channel 3 Sound Length
FF42 SCY Scroll Y (R/W)
FF1C NR32 Channel 3 Select output level (R/W)
FF43 SCX Scroll X (R/W)
FF1D NR33 Channel 3 Frequency's lower data (W)
FF44 LY LCDC Y-Coordinate (R)
FF1E NR34 Channel 3 Frequency's higher data (R/W)
FF45 LYC LY Compare (R/W)
FF20 NR41 Channel 4 Sound Length (R/W)
FF46 DMA DMA Transfer and Start Address (W)
NR43 Channel 4 Polynomial Counter (R/W) FF47 BGP BG Palette Data (R/W)
FF22
FF23 NR44 Channel 4 Counter/consecutive; Inital (R/W) FF48 OBP0 Object Palette 0 Data (R/W)
FF24 NR50 Channel control / ON-OFF / Volume (R/W) FF49 OBP1 Object Palette 1 Data (R/W)
FF25 NR51 Selection of Sound output terminal (R/W) FF4A WY Window Y Position (R/W)
FF26 NR52 Sound on/off FF4B WX Window X Position minus 7 (R/W)
Joypad Input
↓
↑
←
→
P14 P15
↓
↑
←
→
P14 P15
Joypad Input
↓ P13
FF00 P1 Joypad (R/W)

5 P15
4 P14
3 P13
Select Button Keys
Select Direction Keys
Input Down / Start
↑ P12
2 P12 Input Up / Select

1 P11
0 P10
Input Left / Button B
Input Right / Button A
← P11
→ P10
data →
data →
data ←
data →
data ←
clock ←
→
data →
data ←
clock ←
→

FF01 SB Serial transfer data (R/W)
FF02 SC Serial Transfer Control (R/W)
7 Transfer Start Flag
0 Clock Source (internal/external)
data →
data ←
clock ←
→
clock speeds
out 8,192 kHz
in 0 kHz – 524,288 kHz

FF01 SB Serial transfer data (R/W)
FF02 SC Serial Transfer Control (R/W)
7 Transfer Start Flag
0 Clock Source (internal/external)
Timer
Timer
FF04 DIV Divider Register (R/W) clock speeds
FF05 TIMA Timer counter (R/W) 01 262,144 Hz 4
FF06 TMA Timer Modulo (R/W) 10 65,536 Hz 16
FF07 TAC Timer Control (R/W) 11 16,384 Hz 64
2 Timer Start 00 4,096 Hz 256
1-0 Input Clock Select
FFFF IE Interrupt Enable (R/W)
4 Joypad
3 Serial
2 Timer
1 LCD STAT
0 V-Blank
Interrupt ControllerInterrupt Controller
FFFF IE Interrupt Enable (R/W) FF0F IF Interrupt Flag (R/W)
4 Joypad 4 Joypad
3 Serial 3 Serial
2 Timer 2 Timer
1 LCD STAT 1 LCD STAT
0 V-Blank 0 V-Blank
Interrupt ControllerInterrupt Controller
FFFF IE Interrupt Enable (R/W) FF0F IF Interrupt Flag (R/W)
4 Joypad 4 Joypad RST $60
3 Serial 3 Serial RST $58
2 Timer 2 Timer RST $50
1 LCD STAT 1 LCD STAT RST $48
0 V-Blank 0 V-Blank RST $40
Sound Controller
Sound Controller
FF10 NR10 Channel 1 Sweep register (R/W)
FF11 NR11 Channel 1 Sound length/Wave pattern duty (R/W)
FF13 NR13 Channel 1 Frequency lo (Write Only)
FF14 NR14 Channel 1 Frequency hi (R/W)
FF16 NR21 Channel 2 Sound Length/Wave Pattern Duty (R/W)
FF18 NR23 Channel 2 Frequency lo data (W)
FF19 NR24 Channel 2 Frequency hi data (R/W)
FF1A NR30 Channel 3 Sound on/off (R/W)
FF1B NR31 Channel 3 Sound Length
FF1C NR32 Channel 3 Select output level (R/W)
FF1D NR33 Channel 3 Frequency's lower data (W)
FF1E NR34 Channel 3 Frequency's higher data (R/W)
FF20 NR41 Channel 4 Sound Length (R/W)
FF22 NR43 Channel 4 Polynomial Counter (R/W)
FF23 NR44 Channel 4 Counter/consecutive; Inital (R/W)
FF24 NR50 Channel control / ON-OFF / Volume (R/W)
FF25 NR51 Selection of Sound output terminal (R/W)
FF26 NR52 Sound on/off
Voice 1
Voice 2
Voice 3
Voice 4
4 3 2 1 0
Voice 1
NR14 NR13 NR12 NR11 NR10
Voice 2
Voice 3
Voice 4
Control Frequency Volume Length Sweep
4 3 2 1 0
Voice 1
Voice 2
Voice 3
Voice 4
4 3 2 1 0
Pulse A
Pulse B
Wave
Noise
4 3 2 1 0
Pulse A T L F F F F F F F F F F F V V V V A P P P D D L L L L L L P P P N S S S
L
Pulse B T L F F F F F F F F F F F V V V V A P P P D D L L L L L L
F
Wave T L F F F F F F F F F F F V V L L L L L L L L
Noise T L S S S S W D D D V V V V A P P P L L L L L L
4 3 2 1 0
L
F
4 3 2 1 0
L
F
4 3 2 1 0
4 3 2 1 0
FF30 W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 W10 W11 W12 W13 W13 W14

4 3 2 1 0
Audio samples by @_drmr_

4 3 2 1 0

4 3 2 1 0

4 3 2 1 0

4 3 2 1 0

4 3 2 1 0

4 3 2 1 0
L
F
4 3 2 1 0
L
F
4 3 2 1 0
L
F
4 3 2 1 0
L
F
12.5%
4 3 2 1 0
L
F
12.5% 25%
4 3 2 1 0
L
F
12.5% 25% 50%

4 3 2 1 0
L
F
12.5% 25% 50% 75%

4 3 2 1 0
L
F
4 3 2 1 0
L
F
4 3 2 1 0
L
F
4 3 2 1 0
L
F
4 3 2 1 0
L
F
4 3 2 1 0
L
F
4 3 2 1 0
L
F
4 3 2 1 0
L
F
4 3 2 1 0
L
F
4 3 2 1 0
4 3 2 1 0
4 3 2 1 0
4 3 2 1 0
4 3 2 1 0
L NR14 NR13 NR12 NR11 NR10
NR24 NR23 NR22 F NR21 NR20
4 3 2 1 0
NR50
NR51
NR52
4 3 2 1 0
A L L L B R R R
NR50
N W 2 1 N W 2 1
NR51
P N W 2 1
NR52
4 3 2 1 0
A L L L B R R R
NR50
N W 2 1 N W 2 1
NR51
P N W 2 1
NR52
4 3 2 1 0
A L L L B R R R
NR50
N W 2 1 N W 2 1
NR51
P N W 2 1
NR52
4 3 2 1 0
A L L L B R R R
NR50
N W 2 1 N W 2 1
NR51
P N W 2 1
NR52
Little Sound Dj
Toriena & NNNNNNNNNN
Cheapshot - BrainFreeze Abortifacient remix (NNNNNNNNNN remix)
FF40 LCDC LCD Control (R/W) FF42 SCY Scroll Y (R/W)
7 LCD Display Enable FF43 SCX Scroll X (R/W)
6 Window Tile Map Address FF44 LY LCDC Y-Coordinate (R)
5 Window Enable FF45 LYC LY Compare (R/W)
4 BG & Window Tile Data FF46 DMA DMA Transfer and Start
3 Address
BG Tile Map Address FF47 BGP Address
BG Palette(W)
(R/W)
2 OBJ Size FF48 OBP0 Object Palette 0 (R/W)
1 OBJ Enable FF49 OBP1 Object Palette 1 (R/W)
0 BG Enable FF4A WY Window Y Position (R/W)
FF41 STAT LCDC Status (R/W) FF4B WX Window X Position (R/W)
6 LYC=LY Interrupt
5 Mode 2 OAM Interrupt
4 Mode 1 V-Blank Interrupt
3 Mode 0 H-Blank Interrupt
2 LYC=LY Flag
1-0 Mode
Specifications
• 160x144 pixels
• 4 shades of gray
• 8x8 pixel tile-based, 20x18 tiles
• 40 sprites (10 per line)
• 8 KB VRAM
Specifications
• 160x144 pixels
• 4 shades of gray
• 8x8 pixel tile-based, 20x18 tiles
• 40 sprites (10 per line)
• 8 KB VRAM
20x18 Background Tiles
8x8 Pixel Tiles
0
0
0
1
1
0
1
1
8x8 Pixel Tiles
0 0 0 0 0 0 1 0
1 1 1 1 1 1 1 1
0 1 1 1 0 0 1 1
0 1 0 0 0 1 1 0 0
0 0 1 1 0 0 1 0 1
1 0 0 1 1 0 1 0
0 0 1 0 0 1 0 0 0
1 1 0 1 1 0 1 1 0
1 0 0 0 1 0 0 1 0
0 1 1 1 0 1 1 0 0
0 0 1 0 0 1 1 0
1 1 1 0 1 1 0 0 0
1 1 1 0 0 1 1 1 0
1 0 1 1 0 0 0 0
0 1 1 0 0 0 0 0
1 0 0 0 0 0 0 0
8x8 Pixel Tiles
0 0 0 0 0 0 1 0 02
1 1 1 1 1 1 1 1
0 1 1 1 0 0 1 1
0 1 0 0 0 1 1 0 0
0 0 1 1 0 0 1 0 1
1 0 0 1 1 0 1 0
0 0 1 0 0 1 0 0 0
1 1 0 1 1 0 1 1 0
1 0 0 0 1 0 0 1 0
0 1 1 1 0 1 1 0 0
0 0 1 0 0 1 1 0
1 1 1 0 1 1 0 0 0
1 1 1 0 0 1 1 1 0
1 0 1 1 0 0 0 0
0 1 1 0 0 0 0 0
1 0 0 0 0 0 0 0
8x8 Pixel Tiles
0 0 0 0 0 0 1 0 02
1 1 1 1 1 1 1 1 FF
0 1 1 1 0 0 1 1
0 1 0 0 0 1 1 0 0
0 0 1 1 0 0 1 0 1
1 0 0 1 1 0 1 0
0 0 1 0 0 1 0 0 0
1 1 0 1 1 0 1 1 0
1 0 0 0 1 0 0 1 0
0 1 1 1 0 1 1 0 0
0 0 1 0 0 1 1 0
1 1 1 0 1 1 0 0 0
1 1 1 0 0 1 1 1 0
1 0 1 1 0 0 0 0
0 1 1 0 0 0 0 0
1 0 0 0 0 0 0 0
8x8 Pixel Tiles
0 0 0 0 0 0 1 0 02
1 1 1 1 1 1 1 1 FF
0 1 1 1 0 0 1 1 73
0 1 0 0 0 1 1 0 0 8C
0 0 1 1 0 0 1 0 1 65
1 0 0 1 1 0 1 0 9A
0 0 1 0 0 1 0 0 0 48
1 1 0 1 1 0 1 1 0 B6
1 0 0 0 1 0 0 1 0 12
0 1 1 1 0 1 1 0 0 EC
0 0 1 0 0 1 1 0 26
1 1 1 0 1 1 0 0 0 D8
1 1 1 0 0 1 1 1 0 CE
1 0 1 1 0 0 0 0 B0
0 1 1 0 0 0 0 0 60
1 0 0 0 0 0 0 0 80
8x8 Pixel Tiles
0 0 0 0 0 0 1 0 02
1 1 1 1 1 1 1 1 FF
0 1 1 1 0 0 1 1 73
0 1 0 0 0 1 1 0 0 8C
0 0 1 1 0 0 1 0 1 65
1 0 0 1 1 0 1 0 9A
0 0 1 0 0 1 0 0 0 48
1 1 0 1 1 0 1 1 0 B6 16 bytes
0 0 0 1 0 0 1 0 12 per tile
1
0 1 1 1 0 1 1 0 0 EC
0 0 1 0 0 1 1 0 26
1 1 1 0 1 1 0 0 0 D8
1 1 1 0 0 1 1 1 0 CE
1 0 1 1 0 0 0 0 B0
0 1 1 0 0 0 0 0 60
1 0 0 0 0 0 0 0 80
0
0
0
1
1
0
1
1
Background Palettes
0
FF47 BGP BG Palette (R/W) 0
6-7 Color for 11
0
4-5 Color for 10
1
2-3\ Color for 01
0-1 Color for 00 1
0
00 01 10 11 1
1
Background Palettes
0 0 0 0 0
FF47 BGP BG Palette (R/W) 0 0 0 0 0
6-7 Color for 11
0 0 0 0 0
4-5 Color for 10 1
1 1 1 1
2-3\ Color for 01 …
0-1 Color for 00 1 1 1 1 1
0 0 0 0 0
00 01 10 11 1 1 1 1 1
1 1 1 1 1
256 tiles
Background Tile Data
256 tiles
256 tiles
Tetris
Zelda
Super Mario Land

20 tiles
18 tiles
All Star Tennis
32 tiles
Background Map
32 tiles
32 tiles
Background Map
Scrolling
32 tiles
256x256
pixels

32 tiles
Background Map
Scrolling
32 tiles
256x256
pixels

Window
FF40 LCDC LCD Control (R/W)

5 Window Enable
FF4A WY Window Y Position (R/W)
FF4B WX Window X Position (R/W)
Window

5 Window Enable
Window

5 Window Enable
Window
Window
Window
Sprites

1 OBJ Enable
Sprites

1 OBJ Enable
Sprites
OAM Entry
Position X 0x__
Position Y 0x__
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _

1 OBJ Enable
Sprites
OAM Entry
Position X 0x__
Position Y 0x__
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _

1 OBJ Enable
OAM Entry
Position X 0x__
Position Y 0x__
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x__
0x08
Position Y 0x__
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x__
0x04
0x08
Position Y 0x__
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x__
0x00
0x04
0x08
Position Y 0x__
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x__
0x00
0x04
0x08
Position Y 0x__
0x10
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x__
0x00
0x04
0x08
0x4D
Position Y 0x__
0x10
0x78
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x__
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x__
0x90
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x__
0x90
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority _
Flip X ☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority _
Flip X ☒
☐
Flip Y ☐
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority _
Flip X ☐
Flip Y ☐
☒
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority _
Flip X ☒
☐
Flip Y ☐
☒
Palette _
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority _
Flip X ☐
Flip Y ☐
Palette _
Palette 0 Palette 1
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority _
Flip X ☐
Flip Y ☐
Palette _
FF48 OBP0 Object Palette 0 (R/W)

Palette 0 Palette 1
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority _
Flip X ☐
Flip Y ☐
Palette 1
_

Palette 0 Palette 1
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority _
Flip X ☐
Flip Y ☐
Palette 0
1
_

OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority _
Flip X ☐
Flip Y ☐
Palette 0
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority _
Flip X ☐
Flip Y ☐
Palette 0
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority 1
_
Flip X ☐
Flip Y ☐
Palette 0
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority 1
_
Flip X ☐
Flip Y ☐
Palette 0
BG Palette
0 1 2 3
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority 1
_
Flip X ☐
Flip Y ☐
Palette 0
BG Palette
0 1 2 3
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority 1
_
Flip X ☐
Flip Y ☐
Palette 0
BG Palette
0 1 2 3
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority 1
_
Flip X ☐
Flip Y ☐
Palette 0
BG Palette
0 1 2 3
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority 1
_
Flip X ☐
Flip Y ☐
Palette 0
BG Palette
0 1 2 3
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority 1
_
Flip X ☐
Flip Y ☐
Palette 0
BG Palette
0 1 2 3
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority 1
_
Flip X ☐
Flip Y ☐
Palette 0
BG Palette
0 1 2 3
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority 1
0
_
Flip X ☐
Flip Y ☐
Palette 0
BG Palette
0 1 2 3
Sprite/Sprite Priority
40 sprites total
10 sprites per line
10 sprites per line
10 sprites per line
10 sprites per line
10 sprites per line
10 sprites per line
OAM Entry
Position X 0x4D
Position Y 0x78
Tile Number 0x90
Priority 1
Flip X ☐
Flip Y ☐
Palette 0
Position Y
Position X
Tile Number
Flags
FE00
Position Y
Position X
Tile Number
Flags
0
OAM RAM
Tile Number
Position X
Position Y
Flags
FE00 0
FE04 1
FE08 2
FE0C 3
FE10 4
…
FE9C 39
8x8 or 8x16

2 OBJ Size
Layers

7 LCD Display Enable
5 Window Enable
1 OBJ Enable
0 Background Enable
Layers
LCD Off

5 Window Enable
Off 00 01 10 11 1 OBJ Enable
0 Background Enable
Layers
Off (00)
LCD On

5 Window Enable
0 Background Enable
Layers
LCD Off (00) (01)

On
Background

5 Window Enable
0 Background Enable
Layers
LCD Off (00) (01)

On
Background Window (10)

5 Window Enable
0 Background Enable
Layers
LCD Off (00) (01)

On
Background Window (10)

5 Window Enable
0 Background Enable
VRAM Memory Map
VRAM Memory Map
4 KB Sprite Tiles 256 tiles x 16 bytes

VRAM Memory Map
4 KB BG Tiles 256 tiles x 16 bytes

VRAM Memory Map
1 KB BG Map 32 x 32 indexes

VRAM Memory Map
1 KB Window Map 32 x 32 indexes
1 KB BG Map 32 x 32 indexes

VRAM Memory Map
Window Map
BG Map
BG Tiles
Sprite Tiles
8000 8800 9000 9800

VRAM Memory Map
Window Map
BG Map
BG Tiles
Sprite Tiles
8000 8800 9000 9800

VRAM Memory Map
Window Map
BG Map
Sprite Tiles BG Tiles
8000 8800 9000 9800

VRAM Memory Map
?
Window Map
?
BG Map
Sprite Tiles BG Tiles
8000 8800 9000 9800

VRAM Memory Map
Window Map
BG Map
BG Tiles
Sprite Tiles
8000 8800 9000 9800

VRAM Memory Map
Window Map
BG Map
BG Tiles
Sprite Tiles
8000 8800 9000 9800

VRAM Memory Map
BG Tiles
Sprite Tiles BG Map Window Map
8000 8800 9000 9800

VRAM Memory Map
BG Tiles
8000 8800 9000 9800

VRAM Memory Map

6 Window Tile Map Address
4 BG & Window Tile Data Address
3 BG Tile Map Address
BG Tiles
8000 8800 9000 9800

VRAM Memory Map

BG Tiles
8000 8800 9000 9800

VRAM Memory Map

BG Tiles
Sprite Tiles Window Map BG Map
8000 8800 9000 9800

VRAM Memory Map

BG Tiles BG Map
Sprite Tiles Window Map
8000 8800 9000 9800

VRAM Memory Map

BG Tiles BG Map
Sprite Tiles Window Map
8000 8800 9000 9800

9800
9000
8800
8000
Sprite Tiles
BG Tiles
9800
9000
8800
8000
Sprite Tiles
BG Tiles
Pixel
Vertical
Processing
TimingUnit
Vertical Timing
Timing
Timing
FF41 STAT LCDC Status (R/W)
6 LYC=LY Interrupt
2 LYC=LY Flag
SCX = 0

6 LYC=LY Interrupt
2 LYC=LY Flag
SCX = 0
LYC = 8

6 LYC=LY Interrupt
2 LYC=LY Flag
SCX = 0
LYC = 8

6 LYC=LY Interrupt
2 LYC=LY Flag
LYC Interrupt
SCX = 23

6 LYC=LY Interrupt
2 LYC=LY Flag
LYC Interrupt
SCX = 23
LYC = 42

6 LYC=LY Interrupt
2 LYC=LY Flag
LYC Interrupt
SCX = 23
LYC = 42

6 LYC=LY Interrupt
2 LYC=LY Flag
LYC Interrupt
SCX = ?

6 LYC=LY Interrupt
2 LYC=LY Flag
LYC Interrupt
SCX = ?
LYC = 88

6 LYC=LY Interrupt
2 LYC=LY Flag
LYC Interrupt
SCX = ?
LYC = 88

6 LYC=LY Interrupt
2 LYC=LY Flag
LYC Interrupt

SCX = 0 6 LYC=LY Interrupt
2 LYC=LY Flag
LYC Interrupt
LYC = 8

2 LYC=LY Flag
LYC Interrupt
LYC = 8

2 LYC=LY Flag
LCY = 0
LCY = 0
LCDC.WINON = 1
LCY = 0
LCDC.WINON = 1
LCY = 40
LCY = 0
LCDC.WINON = 1
LCY = 40
LCDC.WINON = 0
Changing SCX
Changing SCX
Changing SCX
Changing SCX
Changing SCX
30
6
0
16
29
SCX =
22
14
18
28
26
Changing SCX
Changing SCX
Changing SCX
Changing SCX
Changing SCX
Changing SCX
60
34
24
16
SCX = 11
7
4
3
2
1
0
Changing SCX
60 01
34 00
24 01
16 00
SCX = 11 01 = PAL
7 00
4 01
3 00
2 01
1 00
0 01
Pixel
Horizontal
Processing
Timing
Unit
Horizontal Timing
PPU Timing
43 clocks
Pixel Transfer
PPU Timing
43 clocks
144
lines Pixel Transfer
PPU Timing
20 clocks 43 clocks 51 clocks
144 OAM
lines Pixel Transfer H-Blank
Search
PPU Timing
144 OAM
Search
10 V-Blank
lines
PPU Timing
144 OAM
Search
10 V-Blank
lines
114 x 154
PPU Timing
144 OAM
Search
10 V-Blank
lines
114 x 154 = 17,556 clocks per screen

PPU Timing
144 OAM
Search
10 V-Blank
lines

1,048,576 / 17,556
PPU Timing
144 OAM
Search
10 V-Blank
lines

1,048,576 / 17,556 = 59.7 Hz refresh rate
PPU Timing
2 3 0
144 OAM
Search

5 Mode 2 OAM Interrupt
4 Mode 1 V-Blank Interrupt
10 1 V-Blank 3 Mode 0 H-Blank Interrupt
lines 1-0 Mode
FF0F IF Interrupt Flag (R/W)
114 x 154 = 17,556 clocks per screen 0 V-Blank
1,048,576 / 17,556 = 59.7 Hz refresh rate FFFF IE Interrupt Enable (R/W)
0 V-Blank
OAM
Pixel Transfer H-Blank
Search
V-Blank
OAM
Search
OAM Search
all Sprites
o o o o o o o o o o o o o o o o o o o o o o o o
OAM
Search
OAM Search
all Sprites
OAM
Search
o o o o o o o
visible Sprites
OAM Search
all Sprites
OAM
Search
o o o o o o o
visible Sprites
oam.x ≠ 0
∧ LY + 16 ≥ oam.y
∧ LY + 16 < oam.y + h
OAM Search CPU Bug
OAM Search CPU Bug
r16 inc/dec FE00 ≤ r16 ≤ FEFF

inc bc dec bc ld a, (hl+)
inc de dec de ld a, (hl-)
inc hl dec hl ld (hl+), a
inc sp dec sp ld (hl-), a
during OAM search

OAM Search CPU Bug
r16 inc/dec FE00 ≤ r16 ≤ FEFF

inc bc dec bc ld a, (hl+)
inc de dec de ld a, (hl-)
inc hl dec hl ld (hl+), a
inc sp dec sp ld (hl-), a
during OAM search
will trash OAM RAM

RAM
8 KB
CPU RAM
8 KB
CPU RAM
8 KB
Video
RAM
8 KB
VRAM Access
CPU RAM
8 KB
Video
PPU
RAM
8 KB
VRAM Access
CPU RAM
8 KB
Video
PPU
RAM
8 KB
OAM RAM __
160 _B
VRAM Access
CPU RAM
8 KB
Video
PPU
RAM
8 KB
OAM RAM __
160 _B
VRAM Access
CPU RAM
8 KB
Video
PPU
RAM
8 KB
OAM RAM __
160 _B
VRAM Access
CPU RAM
8 KB
Video
PPU
RAM
8 KB
OAM RAM __
160 _B
VRAM Access
CPU RAM
8 KB
Video
PPU
RAM
8 KB
OAM RAM __
160 _B
VRAM Access
144 OAM
Search
10 V-Blank
lines
VRAM Access
144 OAM
Search
A M
R
V ess
c c
A AD
B
10 V-Blank
lines
VRAM Access
144 OAM
Search
A M
R
V ess
c A M
c
A AD R
V ess
B c c
A K
O
10 V-Blank
lines
144 OAM
Search
10 V-Blank
lines
OAM Access
144 OAM
Search
10 V-Blank
lines
OAM Access
144 OAM
Search
A M
O ess
c c
A AD
B
10 V-Blank
lines
OAM Access
144 OAM
Search
A M
O ess
c A M
c
A AD O ess
B c c
A K
O
10 V-Blank
lines
OAM
Search
V-Blank 1,140 clocks

Game Timing
OAM
Search

Game Timing
OAM
Search

Game Timing
OAM
Search
V-Blank 1,140 clocks • Move background map

Game Timing
• Player movement
• Enemy AI
• Enemy movement
OAM
Pixel Transfer
• Projectile movement H-Blank
Search • Collisions
• Score

Game Timing
• Player movement
• Enemy AI
*
OAM • Enemy movement
*
Search
Pixel Transfer
• Projectile movement
* H-Blank
*
• Collisions
• Score

Game Timing
• Player movement
• Enemy AI
*
*
Search
Pixel Transfer
* H-Blank
*
• Collisions
• Score
* on shadow OAM

Game Timing
• Player movement
• Enemy AI
*
*
Search
Pixel Transfer
* H-Blank
*
• Collisions
• Score
* on shadow OAM

• Copy shadow OAM
to OAM
Video External
ROM RAM OAM I/O HRAM
RAM RAM
0000 8000 A000 C000 FE00 FF00 FF80
Video External
RAM RAM
0000 8000 A000 C000 FE00 FF00 FF80
OAM DMA
Video External
RAM RAM
0000 8000 A000 C000 FE00 FF00 FF80
ld ($FF46), a 160 clocks
FF46 DMA DMA Transfer and Start

OAM DMA
Video External
RAM RAM
0000 8000 A000 C000 FE00 FF00 FF80

OAM DMA
Video External
RAM RAM
0000 8000 A000 C000 FE00 FF00 FF80

ld a, 40
wait: dec a
jr nz, wait

OAM DMA
ld ($FF46), a
ld a, 40
wait: dec a
jr nz, wait
Video External
RAM RAM
0000 8000 A000 C000 FE00 FF00 FF80

PixelPixel
Processing
PipelineUnit
Pixel Pipeline
Fine Print
A lot of this information is based on experiments with a custom Game Boy
emulator. The results match Game Boy timing traces but could not be verified yet.
Also, some information on the following slides is slightly simplified.
Pixel FIFO
LCD
Pixel FIFO
LCD
Pixel FIFO
LCD
Pixel FIFO
LCD
Pixel FIFO
LCD
Pixel FIFO
LCD
Pixel FIFO
LCD
Pixel FIFO
LCD
Pixel FIFO
LCD
Pixel FIFO
LCD
Pixel FIFO
LCD
Pixel FIFO
LCD
Fetch 9802
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch 9802
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch 9802
Read Tile #
Read Data 0
Read Data 1
Background Map
9802: 04 EA 2E
Pixel FIFO
LCD
Fetch 9802
Read Tile # 04
Read Data 0
Read Data 1
Background Map
9802: 04 EA 2E
Pixel FIFO
LCD
Fetch 9802
Read Tile # 04
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch 9802
Read Tile # 04
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch 9802
Read Tile # 04
Read Data 0
Read Data 1
Tile Data
8040: 02 FE 6A
Pixel FIFO
LCD
Fetch 9802
Read Tile # 04
Read Data 0 02
Read Data 1
Tile Data
8040: 02 FE 6A
Pixel FIFO
LCD
Fetch 9802
Read Tile # 04
Read Data 0 02
Read Data 1
Tile Data
8040: 02 FE 6A
Pixel FIFO
LCD
Fetch 9802
Read Tile # 04
Read Data 0 02
Read Data 1
Tile Data
8040: 02 FE 6A
Pixel FIFO
LCD
Fetch 9802
Read Tile # 04
Read Data 0 02
Read Data 1 FE
Tile Data
8040: 02 FE 6A
Pixel FIFO
LCD
Fetch 9802
Read Tile # 04
Read Data 0 02
Read Data 1 FE
Pixel FIFO
LCD
Fetch 9802
Read Tile #
Read Data 0 02
Read Data 1 FE
Pixel FIFO
LCD
Fetch 9802
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch 9803
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch 9803
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch 9803
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
FIFO Fetch Fetch 9803
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Push
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Push
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Push
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Push
Read Tile # 60
Read Data 0
Read Data 1
Pixel FIFO
LCD
Push
Read Tile # Read Tile # 60
Push
Read Data 0
Read Data 1
Pixel FIFO
LCD
Push
Push
Read Data 0
Read Data 1
Pixel FIFO
LCD
Push
Push
Read Data 0
Push
Read Data 1
Pixel FIFO
LCD
Push
Push
Read Data 0
Push
Read Data 1
Pixel FIFO
LCD
Push
Push
Read Data 0
Push
Read Data 1
Pixel FIFO
LCD
Push
Push
Read Data 0 73
Push Read Data
0
Read Data 1
Push
Pixel FIFO
LCD
Push
Push
Read Data 0 73
Push Read Data
0
Read Data 1
Push
Pixel FIFO
LCD
Push
Push
Read Data 0 73
Push Read Data
Read Tile #
0
Read Data 1
Push
Push
Pixel FIFO
LCD
Push
Push
Read Data 0 73
Push Read Data
Read Tile #
0 Read Data 1
Push
Push
Pixel FIFO
LCD
Push
Push
Read Data 0 73
Push Read Data
Read Tile #
0 Read Data 1
Push
Push
Pixel FIFO
LCD
Push
Read Tile # Read Tile #
Push
Read Data 0
Push Read Data
Read Tile #
0 Read Data 1
Push
Push
Pixel FIFO
LCD
Push
Push
Read Data 0
Push Read Data
Read Tile #
0 Read Data 1
Push
Push
Pixel FIFO
LCD
Push
Push
Read Data 0
Push Read Data
Read Tile #
0 Read Data 1
Push
Push Read Data
Push 1
Pixel FIFO
LCD
Push
Push
Read Data 0
Push Read Data
Read Tile #
0 Read Data 1
Push
Push Read Data
Push 1
Pixel FIFO
LCD
Push
Push
Read Data 0
Push Read Data
Read Tile #
0 Read Data 1
Push
Push Read Data
Read Tile #
Push 1
Pixel FIFO
LCD
Push
Push
Read Data 0
Push Read Data
Read Tile #
0 Read Data 1
Push
Push Read Data
Read Tile #
Push 1
Push
Pixel FIFO
LCD
Push
Push
Read Data 0
Push Read Data
0
Read Data 1
Push
Push Read Data
Push 1
Push
Pixel FIFO
LCD
Push
Push
Read Data 0
Push Read Data
0
Read Data 1
Push
Push Read Data
Push 1
Push
Pixel FIFO
LCD
Push
Push
Read Data 0
Push Read Data
0
Read Data 1
Push
Push Read Data
Push 1
Push
Idle Pixel FIFO
Push
LCD
Push
Push
Read Data 0
Push Read Data
0
Read Data 1
Push
Push Read Data
Push 1
Push
Idle Pixel FIFO
Push
LCD
Push
Push
Read Data 0
Push Read Data
0
Read Data 1
Push
Push Read Data
Push 1
Push
Idle Pixel FIFO
Push
LCD
Push
Push
Read Data 0
Push Read Data
0
Read Data 1
Push
Push Read Data
Push 1
Push
Idle Pixel FIFO
Push
4 MHz 2 MHz
LCD
FIFO 4 MHz Fetch 2 MHz
• pushes one pixel per clock • 3 clocks to fetch 8 pixels
• pauses unless it contains • pauses in 4th clock unless
more than 8 pixels space in FIFO
Pixel FIFO
LCD
Horizontal Scrolling
SCX = 3
Pixel FIFO
LCD
SCX = 3
Pixel FIFO
LCD
SCX = 3
Pixel FIFO
LCD
SCX = 3
Pixel FIFO
LCD
SCX = 3
Pixel FIFO
LCD
SCX = 3
Pixel FIFO
LCD
SCX = 3
Pixel FIFO
LCD
SCX = 3
Pixel FIFO
LCD
Fetch 9816
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch 9816
End of Line
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch 9816
End of Line
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
End of Line
x = 160
LCD
End of Line
H-Blank
End of Line
x = 160
LCD
Fetch 9804
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch 9804
Window
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
Window
WX = 26
LCD
Fetch 9804
Window
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
Window
WX = 26
LCD
Fetch 9C00
9804
Window
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
Window
WX = 26
LCD
Fetch 9C00
9804
Window
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
Window
WX = 26
LCD
Fetch 9C00
9804
Window
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
Window
WX = 26
LCD
Fetch 9C00
9804
Window
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
Window
WX = 26
LCD
Fetch 9C00
9804
Window
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
Window
WX = 26
LCD
Fetch 9C00
9804
Window
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
Window
WX = 26
LCD
Fetch 9804
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch 9804
Sprites
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
OBJ OBJ
oam[0].x = 26 oam[1].x = 40
LCD
Fetch 9804
Sprites
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
OBJ OBJ
oam[0].x = 26 oam[1].x = 40
LCD
Fetch F9804
E02
Sprites
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
OBJ OBJ
oam[0].x = 26 oam[1].x = 40
LCD
Fetch F9804
E02
Sprites
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
OBJ OBJ
oam[0].x = 26 oam[1].x = 40
LCD
Fetch F9804
E02
Sprites
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
OBJ OBJ
oam[0].x = 26 oam[1].x = 40
LCD
Fetch F9804
E02
Sprites
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
OBJ OBJ
oam[0].x = 26 oam[1].x = 40
LCD
Fetch F9804
E02
Sprites
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
OBJ OBJ
oam[0].x = 26 oam[1].x = 40
LCD
Fetch F9804
E02
Sprites
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
OBJ OBJ
oam[0].x = 26 oam[1].x = 40
LCD
Fetch F9804
E02
Sprites
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
OBJ OBJ
oam[0].x = 26 oam[1].x = 40
LCD
Fetch 9804
Sprites
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
OBJ OBJ
oam[0].x = 26 oam[1].x = 40
LCD
t
t
first pixel of the line start of window
pipeline cleared
FIFO paused
t
Fetcher reads
window tiles
pipeline cleared
FIFO paused
t
Fetcher reads
window tiles
pipeline cleared
FIFO paused FIFO resumed
t
first pixel of the line start of window last pixel of the line
Fetcher reads
window tiles
pipeline cleared
43+ clocks
t
Fetcher reads
Game Boy / LCD window tiles
pipeline cleared
43+ clocks
t
Commodore 64 / CRT
t
Fetcher reads
Game Boy / LCD window tiles
pipeline cleared
43+ clocks
t
Commodore 64 / CRT
always exactly 40 clocks
t
first pixel of the line last pixel of the line
144 OAM
Search
10 V-Blank
lines
20 clocks 43
43+ c
clocks
c lo k s 51 clocks
144 OAM
Search
10 V-Blank
lines
20 clocks 43
43+ c loc
clocks k s 51
51- c
clocks
c lo k s
144 OAM
Search
10 V-Blank
lines
20 clocks 43
43+ c loc
clocks k s 51
51- c
clocks
c lo k s
144 OAM
Search
10 V-Blank
lines
Fetch F9804
E02
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch F9804
E02
Pixel Mixing
Read Tile #
Read Data 0
Read Data 1
Pixel FIFO
LCD
Fetch F9804
E02
Pixel Mixing
Read Tile #
Read Data 0
Read Data 1
10 01 01 10 10 11 01 10 00
BG BG BG BG BG BG BG BG BG
Pixel FIFO
LCD
Fetch F9804
E02
Pixel Mixing
Read Tile #
Read Data 0
Read Data 1
00 11 11 01 11 01 11 00
P0
S1 S1 S1 S1 S1 S1 S1 S1
10 01 01 10 10 11 01 10 00
Pixel FIFO
LCD
Fetch F9804
E02
Pixel Mixing
Read Tile #
Read Data 0
Read Data 1
00 11 11 01 11 01 11 00
P0
S1 S1 S1 S1 S1 S1 S1 S1
10 01 01 10 10 11 01 10 00
Pixel FIFO
LCD
Pixel Mixing
00 11 11 01 11 01 11 00
P0
S1 S1 S1 S1 S1 S1 S1 S1
10 01 01 10 10 11 01 10
BG BG BG BG BG BG BG BG
Pixel Mixing
00 11 11 01 11 01 11 00
P0
S1 S1 S1 S1 S1 S1 S1 S1
10 01 01 10 10 11 01 10
Pixel Mixing
00 11 11 01 11 01 11 00
P0
S1 S1 S1 S1 S1 S1 S1 S1
10 01 01 10 10 11 01 10
10
BG
Pixel Mixing
00 11 11 01 11 01 11 00
P0
S1 S1 S1 S1 S1 S1 S1 S1
10 01 01 10 10 11 01 10
10
BG
Pixel Mixing
00 11 11 01 11 01 11 00
P0
S1 S1 S1 S1 S1 S1 S1 S1
10 01 01 10 10 11 01 10
10 11
BG S1
Pixel Mixing
00 11 11 01 11 01 11 00
P0
S1 S1 S1 S1 S1 S1 S1 S1
10 01 01 10 10 11 01 10
10 11 11 01 11 01 11
BG S1 S1 S1 S1 S1 S1
Pixel Mixing
00 11 11 01 11 01 11 00
P0
S1 S1 S1 S1 S1 S1 S1 S1
10 01 01 10 10 11 01 10
10 11 11 01 11 01 11 10
BG S1 S1 S1 S1 S1 S1 BG
Pixel Mixing
00 11 11 01 11 01 11 00
P0
S1 S1 S1 S1 S1 S1 S1 S1
10 01 01 10 10 11 01 10
10 11 11 01 11 01 11 10
Pixel Mixing
10 11 11 01 11 01 11 10
Pixel Mixing
01 01 01 01 01 01 01 01
P0
S0 S0 S0 S0 S0 S0 S0 S0
10 11 11 01 11 01 11 10
Pixel Mixing
01 01 01 01 01 01 01 01
P0
S0 S0 S0 S0 S0 S0 S0 S0
10 11 11 01 11 01 11 10
Pixel Mixing
01 01 01 01 01 01 01 01
P0
S0 S0 S0 S0 S0 S0 S0 S0
10 11 11 01 11 01 11 10
01
S0
Pixel Mixing
01 01 01 01 01 01 01 01
P0
S0 S0 S0 S0 S0 S0 S0 S0
10 11 11 01 11 01 11 10
01
S0
Pixel Mixing
01 01 01 01 01 01 01 01
P0
S0 S0 S0 S0 S0 S0 S0 S0
10 11 11 01 11 01 11 10
01 11
S0 S1
Pixel Mixing
01 01 01 01 01 01 01 01
P0
S0 S0 S0 S0 S0 S0 S0 S0
10 11 11 01 11 01 11 10
01 11 11 01 11 01 11
S0 S1 S1 S1 S1 S1 S1
Pixel Mixing
01 01 01 01 01 01 01 01
P0
S0 S0 S0 S0 S0 S0 S0 S0
10 11 11 01 11 01 11 10
01 11 11 01 11 01 11 01
S0 S1 S1 S1 S1 S1 S1 S0
01 11 11 01 11 01 11 01 00
S0 S1 S1 S1 S1 S1 S1 S0 BG
Pixel FIFO
LCD
Applying the Palettes
BG S0 S1
00 011011 00 011011 00 011011
01 11 11 01 11 01 11 01 00
S0 S1 S1 S1 S1 S1 S1 S0 BG
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
01 11 11 01 11 01 11 01 00
S0 S1 S1 S1 S1 S1 S1 S0 BG
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
01 11 11 01 11 01 11 01 00
S0 S1 S1 S1 S1 S1 S1 S0 BG
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
01 11 11 01 11 01 11 01 00
S0 S1 S1 S1 S1 S1 S1 S0 BG
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
01 11 11 01 11 01 11 01 00
S0 S1 S1 S1 S1 S1 S1 S0 BG
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
11 11 01 11 01 11 01 00 01 11 01 10 10 11 00 01
S1 S1 S1 S1 S1 S1 S0 BG BG BG BG BG BG BG BG BG
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
11 11 01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
11 11 01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
11 11 01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
11 11 01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
11 01 11 01 11 01 00 01 11 01 10 10 11 00 01
S1 S1 S1 S1 S1 S0 BG BG BG BG BG BG BG BG BG
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
11 01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
11 01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
11 01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
11 01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 11 01 00 01 11 01 10 10 11 00 01
S1 S1 S1 S1 S0 BG BG BG BG BG BG BG BG BG
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
11 01 11 01 00 01 11 01 10 10 11 00 01
S1 S1 S1 S0 BG BG BG BG BG BG BG BG BG
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
11 01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 00 01 11 01 10 10 11 00 01
S1 S1 S0 BG BG BG BG BG BG BG BG BG
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
Colorization
BG S0 S1
00 011011 00 011011 00 011011
01 11 01 00 01 11 01 10 10 11 00 01
Pixel FIFO
LCD
End of the
technical part
Development
Rednex Game Boy Development System
$ rgbasm
Usage: rgbasm [-hv] [-b chars] [-Dname[=value]] [-g chars] [-i path]
[-o outfile] [-p pad_value] file.asm
$ rgblink
usage: rgblink [-t] [-m mapfile] [-n symfile] [-o outfile] [-p pad_value]
[-s symbol] file [...]
$ rgbfix
usage: rgbfix [-Ccjsv] [-i game_id] [-k licensee_str] [-l licensee_id]
[-m mbc_type] [-n rom_version] [-p pad_value] [-r ram_size]
[-t title_str] file
https://github.com/bentley/rgbds
BGB Emulator/Debugger
http://bgb.bircd.org/
Everdrive GB
https://krikzz.com/
Game Boy Camera
http://www.blood-is-red.de
Lisa  Dominik 
@ellduin @monkeydom
@_drmr_
Lisa  Dominik  bunnie 
@ellduin @monkeydom Costis Sideris @bunniestudios
Felix 
@_drmr_ Orlando Bassotto
@tmbinc
25C3 2008 26C3 2009 29C3 2012

32C3 2015 33C3 2016
rahra Michael Steil

25C3 2008 26C3 2009 29C3 2012

32C3 2015 33C3 2016
rahra Michael Steil

?
25C3 2008 26C3 2009 29C3 2012

32C3 2015 33C3 2016
rahra Michael Steil

?
?
?
? ?
I nominate for 34C3
? ?
I nominate for 34C3
? ?
I nominate for 34C3
Dominik Wagner
? ?
The Ultimate
Acorn Archimedes Talk
I nominate for 34C3
Dominik Wagner
? Jannis Harder
?
Acorn Archimedes Talk Super Nintendo Talk
I nominate for 34C3
Dominik Wagner Jannis Harder

I nominate for 34C3

I nominate for 34C3

Thank you!

Game Boy 33c3 PDF

Загружено:

Сведения о документе

Оригинальное название

Авторское право

Доступные форматы

Поделиться этим документом

Поделиться или встроить документ

Параметры публикации

Этот документ был вам полезен?

Это неприемлемый материал?

Авторское право:

Доступные форматы

Game Boy 33c3 PDF

Загружено:

Авторское право:

Доступные форматы

Is That a Demo in

Michael Steil Sven Oliver ('SvOlli') Moll

The Ultimate The Ultimate

Michael Steil Sven Oliver ('SvOlli') Moll Tomaž Šolc

The Ultimate The Ultimate The Ultimate

Michael Steil Sven Oliver ('SvOlli') Moll Tomaž Šolc

The Ultimate The Ultimate The Ultimate

rahra Michael Steil

The Ultimate The Ultimate

1049 Game Boy Games

1989 - 2003 Game Boy &

1989 - 2003 Game Boy &

SEGA Game Gear NEC TurboExpress

1989 1996 1998 1998

2001 2003 2005

2001 2003 2005

1994 1998 2003

1 MHz* 1.8 MHz 1 MHz 1.2 MHz 3.6 MHz

1 MHz* 1.8 MHz 1 MHz 1.2 MHz 3.6 MHz

RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB

1 MHz* 1.8 MHz 1 MHz 1.2 MHz 3.6 MHz

RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB

1 MHz* 1.8 MHz 1 MHz 1.2 MHz 3.6 MHz

RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB

1 MHz* 1.8 MHz 1 MHz 1.2 MHz 3.6 MHz

RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB

1 MHz* 1.8 MHz 1 MHz 1.2 MHz 3.6 MHz

RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB

1 MHz* 1.8 MHz 1 MHz 1.2 MHz 3.6 MHz

RAM 8 KB 2 KB 64 KB 0.125 KB 128 KB

Year 1989 1983 1982 1977 1990

6502 LR35902 65816

8080 LR35902 Z80

8080 LR35902 Z80

Registers Load/Store Artih/Logical

Registers Load/Store Artih/Logical Rotate

A F ld r8, d8 add rlca

Registers Load/Store Artih/Logical Rotate

A F ld r8, d8 add rlca

Registers Load/Store Artih/Logical Rotate Rotate

A F ld r8, d8 add rlca ccf

0000 rst $00

0000 rst $00 RESET

Sign & Parity

Sign & Parity Load/Store HL

Sign & Parity Load/Store HL

Shift & Bit Ops

Shift & Bit Ops Relative Jump

Shift & Bit Ops Relative Jump

* different opcode than Z80

ld (hl+), a mem[hl] = a; hl++;

ld ($ff00+a8), a fa 40 ff ld a, ($ff40) 4 cycles

ld ($ff00+a8), a fa 40 ff ld a, ($ff40) 4 cycles

* Z80 has a more generic version

* Z80 has a more generic version

* Z80 has a more generic version

bytes clocks clocks

“machine cycle” @ 1 MHz

FE00 FEA0 FF00

FE00 FEA0 FF00 FF80

FE00 FEA0 FF00 FF80

FE00 FEA0 FF00 FF80

ROM ROM Video External