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S E M I C O N D U C T O R HI-201HS

High Speed Quad SPST


December 1993 CMOS Analog Switch
Features Description
• Fast Switching Times, tON = 30ns, tOFF = 40ns The HI-201HS is a monolithic CMOS Analog Switch featur-
• Low “ON” Resistance of 30Ω ing very fast switching speeds and low ON resistance. The
• Pin Compatible with Standard HI-201 integrated circuit consists of four independently selectable
• Wide Analog Voltage Range (±15V Supplies) of ±15V SPST switches and is pin compatible with the industry stan-
• Low Charge Injection (±15V Supplies) 10pC dard HI-201 switch.
• TTL Compatible Fabricated using silicon-gate technology and the Harris Dielectric
• Symmetrical Switching Analog Current Range of 80mA Isolation process, this TTL compatible device offers improved
performance over previously available CMOS analog switches.
Applications Featuring maximum switching times of 50ns, low ON resistance of
• High Speed Multiplexing 50Ω maximum, and a wide analog signal range, the HI-201HS is
• High Frequency Analog Switching designed for any application where improved switching perfor-
• Sample and Hold Circuits mance, particularly switching speed, is required. (A more
• Digital Filters detailed discussion on the design and application of the
• Operational Amplifier Gain Switching Networks HI-201HS can be found in Application Note 543.)
• Integrator Reset Circuits
Ordering Information
Functional Diagram PART NUMBER TEMP. RANGE PACKAGE
o o
V+ HI1-0201HS-5 0 C to +75 C 16 Lead Ceramic DIP
HI3-0201HS-4 -25oC to +85oC 16 Lead Plastic DIP
SOURCE INPUT o o
HI1-0201HS-2 -55 C to +125 C 16 Lead Ceramic DIP
LEVEL GATE
TTL SWITCH
SHIFTER HI1-0201HS-4 -25oC to +85oC 16 Lead Ceramic DIP
LOGIC AND GATE CELL
INPUT DRIVER HI4P0201HS-5 o
0 C to +75 C o
20 Lead PLCC
DRAIN
HI3-0201HS-5 0oC to +75oC 16 Lead Plastic DIP
OUTPUT HI1-0201HS-7 0oC to +75oC 16 Lead Ceramic DIP
V- o o
HI4-0201HS/883 -55 C to +125 C 20 Lead LCC
LOGIC SWITCH HI9P0201HS-5 0oC to +75oC 16 Lead SOIC (W)
o o
0 ON HI9P0201HS-9 -40 C to +85 C 16 Lead SOIC (W)
1 OFF HI1-0201HS/883 -55oC to +125oC 16 Lead Ceramic DIP
o o
HI1-0201HS -8 -55 C to +125 C 16 Lead Ceramic DIP

Pinouts
HI-201HS (CDIP, PDIP, SOIC) HI201HS (LCC) HI201HS (PLCC)
TOP VIEW TOP VIEW TOP VIEW
OUT 1

OUT 2
OUT 1

OUT 2

A1

A2
A1

A2

3 2 1 20 19
A1 1 16 A2
3 2 1 20 19
OUT1 2 15 OUT2
IN 1 4 18 IN 2 IN 1 4 18 IN 2
IN1 3 14 IN2
V- 5 1 2 17 V+ V- 5 17 V+
V- 4 13 V+
6 16 6 16
GND 5 12 NC
GND 7 15 GND 7 15
4 3
IN4 6 11 IN3
IN 4 8 14 IN 3 IN 4 8 14 IN 3
OUT4 7 10 OUT3
9 10 11 12 13
A4 8 9 A3
A4

A3

OUT 3
OUT 4

9 10 11 12 13
A4

A3
OUT 4

OUT 3

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. File Number 3123
Copyright © Harris Corporation 1993
9-82
HI-201HS

Schematic Diagrams
TTL/CMOS REFERENCE CIRCUIT SWITCH CELL

VCC
MP42 V+ Q
P41 MP43 MP44 MP45

MN31
QN41
QN43
C48
ANALOG ANALOG
QN42 QN45 MP33
R42 QP44 IN OUT
QN44 VR1 MP32 MN32
D41
5V MN33
R41
C49
D42 MP31
5.6V

QP41

QP42 Q

V-

MN42 MN44 MN45


VEE

DIGITAL INPUT BUFFER AND LEVEL SHIFTER

MN46 MP51
MP52
MP4 MP8
QN6 QN8

QN7 QN9 MP3 MP7


IQ IX3 IX4
IX1 VR1 IX2 MP6 MP10
MP5 MP9
MP11 MP12

QN1
IQ
MN11 MN12
C1 R1 Q
VEE
QN4
QN5
VA
QP1 QP4 QN2
VCC
VR1 R3 Q
QP5 R2 C2 MP13
MP14

QP2
IX3
MN5 MN9 MN10
CFF MN6
MN13 MN14
IX1 IX2 QP7
QP9 MN3 MN4 MN7 MN8
QP6
QP8

MN52
MN51

REPEAT FOR EACH


LEVEL SHIFTER

9-83
Specifications HI-201HS

Absolute Maximum Ratings Thermal Information


Supply Voltage (Between Pins 4 and 13) . . . . . . . . . . . . . . . . . . 36V Thermal Resistance θJA θJC
Digital Input Voltage (Pins 1, 8, 9, 16) . . . . . . . . . (V+) +4V, (V-) -4V Ceramic DIP . . . . . . . . . . . . . . . . . . . . . . 80oC/W 24oC/W
Analog Input Voltage (One Switch). . . . . . . . . . . . . . . . . . (V+) +2.0V Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . 100oC/W -
Pins 2, 3, 6, 7, 10, 11, 14, 15 . . . . . . . . . . . . . . . . . . . . . . . (V-) -2.0V PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80oC/W -
Peak Current (S or D) SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100oC/W -
(Pulse at 1ms, 10% Duty Cycle Max.) . . . . . . . . . . . . . . . . . 50mA Operating Temperature
Continuous Current Any Terminal (Except S or D) . . . . . . . . . . 25mA HI-201HS-2,-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . -65oC to +150oC HI-201HS-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to +85oC
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC HI-201HS-5,-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +75oC
HI-201HS-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC
Junction Temperature
Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Electrical Specifications Supplies = +15V, -15V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = +0.8V, GND = 0V, Unless
Otherwise Specified

HI-201HS-2/-8 HI-201HS-5/-4/-9/-7
TEST
PARAMETER CONDITIONS TEMP MIN TYP MAX MIN TYP MAX UNITS

SWITCHING CHARACTERISTICS

tON, Switch On Time (Note 3) +25oC - 30 50 - 30 50 ns

tOFF1, Switch Off Time (Note 3) +25oC - 40 50 - 40 50 ns

tOFF2, Switch Off Time (Note 3) +25oC - 150 - - 150 - ns

Output Settling Time 0.1% +25oC - 180 - - 180 - ns

“Off Isolation” (Note 4) +25oC - 72 - - 72 - dB

Crosstalk (Note 5) +25oC - 86 - - 86 - dB

Charge Injection (Note 6) +25oC - 10 - - 10 - pC

CS(OFF), Input Switch Capacitance +25oC - 10 - - 10 - pF

CD(OFF), +25oC - 10 - - 10 - pF
Output Switch Capacitance
CD(ON), +25oC - 30 - - 30 - pF

CA, Digital Input Capacitance +25oC - 18 - - 18 - pF

CDS(OFF), Drain-To-Source Capacitance +25oC - 0.5 - - 0.5 - pF

DIGITAL INPUT CHARACTERISTICS


VAL, Input Low Threshold Full - - 0.8 - - 0.8 V

VAH, Input High Threshold +25oC 2.0 - - 2.0 - - V

Full 2.4 - - 2.4 - - V

IAL, Input Leakage Current (Low) +25oC - -200 - - -200 - µA

Full - - -500 - - -500 µA

IAH, Input Leakage Current (High) VAH = 4.0V +25oC - 20 - - 20 - µA

Full - - +40 - - +40 µA

ANALOG SWITCH CHARACTERISTICS

VS, Analog Signal Range Full -15 - +15 -15 - +15 V

RON, On Resistance (Note 2) +25oC - 30 50 - 30 50 Ω

Full - - 75 - - 75 Ω

RON Match +25oC - 3 - - 3 - %

9-84
Specifications HI-201HS

Electrical Specifications Supplies = +15V, -15V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = +0.8V, GND = 0V, Unless
Otherwise Specified (Continued)

HI-201HS-2/-8 HI-201HS-5/-4/-9/-7
TEST
PARAMETER CONDITIONS TEMP MIN TYP MAX MIN TYP MAX UNITS
IS(OFF), Off Input Leakage Current +25oC - 0.3 10 - 0.3 10 nA

Full - - 100 - - 50 nA

ID(OFF), Off Output Leakage Current +25oC - 0.3 10 - 0.3 10 nA

Full - - 100 - - 50 nA

ID(ON), On Leakage Current +25oC - 0.1 10 - 0.1 10 nA

Full - - 100 - - 50 nA

POWER SUPPLY CHARACTERISTICS (Note 7)

PD, Power Dissipation +25oC - 120 - - 120 - mW

Full - - 240 - - 240 mW

I+, Current (Pin 13) +25oC - 4.5 - - 4.5 - mA

Full - - 10.0 - - 10.0 mA

I-, Current (Pin 4) +25oC - 3.5 - - 3.5 - mA

Full - - 6 - - 6 mA

NOTES:
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Func-
tional operability under any of these conditions is not necessarily implied.
2. VOUT = ±10V, IOUT = 1mA.
3. RL = 1kΩ, CL = 35pF, VIN = +10V, VA = +3V. (See Switching Waveforms).
4. VA = 3V, RL = 1kΩ, CL = 10pF, VIN = 3VRMS, f = 100kHz.
5. VA = 3V, RL = 1kΩ, VIN = 3VRMS, f = 100kHz.
6. CL = 1000pF, VIN = 0V, RIN = 0V, ∆Q = CL x ∆VO.
7. VA = 3V or VA = 0 for all switches.

Switching Waveforms

V = 3.0V
DIGITAL AH
INPUT
50% 50%
VAL = 0V

tOFF1
tON

90% 90%
0V 10%
SWITCH tOFF2
OUTPUT

TOP: TTL Input (2V/Div.) BOTTOM: Output (5V/Div.)


HORIZONTAL: 100ns/Div.
FIGURE 1A. FIGURE 1B.
FIGURE 1. SWITCH tON AND tOFF TIMES

9-85
HI-201HS

Typical Performance Curves

80 80
V+ = +15V, V- = -15V TA = +25oC
70 70
V+ = +8V, V- = -8V

60 60 V+ = +10V, V- = -10V

ON RESISTANCE (Ω)
ON RESISTANCE (Ω)

50 50

40 +125oC 40
+25oC
30 30
-55oC V+ = +12V, V- = -12V
20 20
V+ = +15V, V- = -15V
10 10

0 0
-15 -10 -5 0 +5 +10 +15 -15 -10 -5 0 +5 +10 +15
ANALOG INPUT (V) ANALOG INPUT (V)

FIGURE 2. “ON” RESISTANCE vs ANALOG SIGNAL LEVEL FIGURE 3. “ON” RESISTANCE vs ANALOG SIGNAL LEVEL
AND TEMPERATURE AND POWER SUPPLY VOLTAGE

100.0 100.0
LEAKAGE CURRENT (nA)

LEAKAGE CURRENT (nA)

10.0 10.0

1.0 1.0

0.10 0.10

0.01 0.01
25 75 125 25 75 125
TEMPERATURE (oC) TEMPERATURE (oC)

FIGURE 4. IS(OFF) OR ID(OFF) vs TEMPERATURE† FIGURE 5. ID(ON) vs TEMPERATURE†

7
V+ = +15V, V- = -15V 100
80 V+ = +15V, V- = -15V
6 I → V = 0V
60 ISOFF → VD = 0V
DOFF S
40
SUPPLY CURRENT (mA)

LEAKAGE CURRENT (pA)

5 20
I+ 0 IDON
4 -20
I- -40
3 -60 ISOFF/IDOFF
-80
2 -100
-120
-140
1
-160
-180
0
-55 -35 -15 5 25 45 65 85 105 125 -200
-14 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14
TEMPERATURE (oC) ANALOG INPUT (V)

FIGURE 6. SUPPLY CURRENT vs TEMPERATURE FIGURE 7. LEAKAGE CURRENT vs ANALOG INPUT VOLTAGE
† Theoretically, leakage current will continue to decrease below +25oC. But due to environmental conditions, leakage measurements below
this temperature are not representative of actual switch performance.

9-86
HI-201HS

Typical Performance Curves (Continued)


60 10
40 VAL = 0V, VAH2 = 3V, VAH1 = 5V IAH1 9 V+ = +15V, V- = -15V, TA = +25oC
20 8 ISOFF → VD = 0V
0 7 IDOFF → VS = 0V
6
LEAKAGE CURRENT (µA)

-20

LEAKAGE CURRENT (nA)


5
-40 4
-60 3
-80 2
-100 1
-120 0
-1
-140
IAH2 -2
-160 -3
-180 -4
-200 -5
IAL -6
-220
-240 -7
-8
-260
-9
-280 -10
25 35 45 55 65 75 85 95 105 115 125 -16.0 -15.5 -15.0 -14.5 -14.0 +14.0 +14.5 +15.0 +15.5 +16.0
TEMPERATURE (oC) ANALOG INPUT (V)

FIGURE 8. DIGITAL INPUT LEAKAGE CURRENT vs FIGURE 9. LEAKAGE CURRENT vs ANALOG INPUT VOLTAGE
TEMPERATURE†

180 350
RL = 1K, CL = 35pF, TA = +25oC
160 tOFF2
300
140
SWITCHING TIME (ns)

SWITCHING TIME (ns)

250
120 V+ = +15V
V- = -15V
100 200 tOFF2
RL = 1kΩ
CL = 35pF
80
150
60
tOFF1 100
40 tOFF1
tON
20 50
tON
0 0
-55 -35 -15 5 25 45 65 85 105 125 ±5 ±6 ±7 ±8 ±9 ±10 ±11 ±12 ±13 ±14 ±15
TEMPERATURE (oC) POSITIVE AND NEGATIVE SUPPLY (V)

FIGURE 10. SWITCHING TIME vs TEMPERATURE FIGURE 11. SWITCHING TIME vs POSITIVE AND NEGATIVE
SUPPLY VOLTAGE

350 350
V- = -15V, RL = 1kΩ V+ = +15V, RL = 1kΩ
CL = 35pF, TA = +25oC CL = 35pF, TA = +25oC
300 300
SWITCHING TIME (ns)
SWITCHING TIME (ns)

250 250

200 200
tOFF2 tOFF2

175 150

150 100
tOFF1
tOFF1
100 50 tON

tON
50 0
5 6 7 8 9 10 11 12 13 14 15 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15
POSITIVE SUPPLY (V) NEGATIVE SUPPLY (V)

FIGURE 12. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE FIGURE 13. SWITCHING TIME vs NEGATIVE SUPPLY VOLTAGE
† Theoretically, leakage current will continue to decrease below +25oC. But due to environmental conditions, leakage measurements below
this temperature are not representative of actual switch performance.

9-87
HI-201HS

Typical Performance Curves (Continued)

350 3.0
V + = +15V, V- = -15V, RL = 1kΩ
CL = 35pF, VAL = 0V, TA = +25oC
300 2.5

INPUT LOGIC THRESHOLD (V)


SWITCHING TIME (ns)

250
2.0
1.8
200
tOFF2 1.5
150
1.0
100

tOFF1 0.5
50
tON
0 0
0 1 2 3 4 5 ±5 ±6 ±7 ±8 ±9 ±10 ±11 ±12 ±13 ±14 ±15
DIGITAL INPUT AMPLITUDE (V) POWER SUPPLY VOLTAGE (V)

FIGURE 14. SWITCHING TIME vs INPUT LOGIC AMPLITUDE FIGURE 15. INPUT SWITCHING THRESHOLD vs POSITIVE AND
NEGATIVE SUPPLY VOLTAGES

40
50
IN OUT ∆VO 35 CDON
40
CHARGE INJECTION (pC)

30 30
CAPACITANCE (pF)

CL
20 VA 25
10 QOUT
20
0 ∆QO = CL x ∆VO
-10 15
CDOFF OR CSOFF
-20
10
-30
V+ = +15V, V- = -15V 5
-40 CDSOFF
CL = 1000pF, RIN = 0Ω
-50 0
-10 -5 0 +5 +10 -15 -10 -5 0 +5 +10 +15
ANALOG INPUT (V) ANALOG INPUT (V)

FIGURE 16. CHARGE INJECTION vs ANALOG INPUT FIGURE 17. CAPACITANCE vs ANALOG INPUT

140 140
V+ = +15V, V- = -15V V+ = +15V, V- = -15V
VIN = 3VRMS, VA = 3V VIN = 3VRMS, VA = 3V
120 120

100
OFF ISOLATION (dB)

100
CROSSTALK (dB)

IN OUT
80 80 VO1
RL = 100Ω
VIN RL = 1kΩ
60 IN OUT 60
VO
RL = VO2
40 VIN RL = 1kΩ 40
1kΩ RL = 1kΩ
20 OFF ISOLATION = 20LOG VIN 20 VO2
VO CROSSTALK = 20LOG
VO1
0 0
10K 100K 1M 10M 10K 100K 1M 10M
FREQUENCY (Hz) FREQUENCY (Hz)

FIGURE 18. OFF ISOLATION vs FREQUENCY FIGURE 19. CROSSTALK vs FREQUENCY

9-88
HI-201HS

Test Circuit
V+ = +15V
13
SWITCH SWITCH
INPUT OUTPUT
3 2
VIN = +10V VO

VA RL CL
1 1kΩ 35pF
HI-201HS
LOGIC
INPUT 5 4 RL
VO = VIN
RL + RON
V- = -15V

GND CL INCLUDES CFIXTURE + CPROBE

FIGURE 20. SWITCHING TEST CIRCUIT (tON, tOFF1, tOFF2)

Switching Characteristics
Typical delay, tON, tOFF, settling time and switching transients in this circuit. If RL or CL is increased, there will be correspond-
ing increases in rise and/or fall RC times..
V+ = +15V

OUT
VO

N RL CL
VA 1kΩ 35pF

LOGIC HI-201HS
INPUT

V- = -15V

GND

FIGURE 21A.

LOGIC INPUT

2
LOGIC INPUT (V)

tO

FIGURE 21B.

FIGURE 21. SWITCHING CHARACTERISTICS vs INPUT VOLTAGE

9-89
HI-201HS

Switching Characteristics (Continued)

+10

+5 +5

0 0

tO tO
22A. VIN = +10V 22B. VIN = +5V

+5

0 0

+5 -5

tO tO
22C. VIN = 0V 22D. VIN = -5V

-5

-10

tO
22E. VIN = -10V

FIGURE 22. VO - OUTPUT SWITCHING WAVEFORMS

9-90
HI-201HS

Application Information Power Supply Considerations

Logic Compatibility The electrical characteristics specified in this data sheet are
guaranteed for power supplies ±VS = ±15V. Power supply volt-
The HI-201HS is TTL compatible. Its logic inputs (Pins 1, 8, ages less than ±15V will result in reduced switch performance.
9, 16) are designed to react to digital inputs which exceed a The following information is intended as a design aid only.
fixed, internally generated TTL switching threshold. The
HI-201HS can also be driven with CMOS logic (0V-15V), POWER SUPPLY
although the switch performance with CMOS logic will be VOLTAGES SWITCH PERFORMANCE
inferior to that with TTL logic (0V-5V). ±12 < ±VS ±15V Minimal Variation
The logic input design of the HI-201HS is largely responsible ±VS < ±12V Parametric variation becomes increas-
for its fast switching speed. It is a design which features a ingly large (increased ON resistance,
unique input stage consisting of complementary vertical longer switching times).
PNP and NPN bipolar transistors. This design differs from ±VS < ±10V Not Recommended.
that of the standard HI-201 product where the logic inputs
±VS > ±16V Not Recommended.
are MOS transistors.
Although the new logic design enhances the switching Single Supply
speed performance, it also increases the logic input leakage
currents. Therefore, the HI-201HS will exhibit larger digital The switch operation of the HI-201HS is dependent upon an
input leakage currents in comparison to the standard HI-201 internally generated switching threshold voltage optimized for
product. ±15V power supplies. The HI-201HS does not provide the
necessary internal switching threshold in a single supply sys-
Charge Injection tem. Therefore, if single supply operation is required, the
Charge injection is the charge transferred, through the inter- HI-300 series of switches is recommended. The HI-300 series
nal gate-to-channel capacitances, from the digital logic input will remain operational to a minimum +5V single supply.
to the analog output. To optimize charge injection perfor- Switch performance will degrade as power supply voltage is
mance for the HI-201HS, it is advisable to provide a TTL reduced from optimum levels (±15V). So it is recommended
logic input with fast rise and fall times. that a single supply design be thoroughly evaluated to
If the power supplies are reduced from ±15V, charge injec- ensure that the switch will meet the requirements of the
tion will become increasingly dependent upon the digital application.
input frequency. Increased logic input frequency will result in For Further Information See Application Notes 520, 521,
larger output error due to charge injection. 531, 532, 543 and 557.

9-91
HI-201HS

Die Characteristics
DIE DIMENSIONS:
2440µm x 2860µm x 485µm ± 25µm
METALLIZATION:
Type: CuAl
Thickness: 16kÅ ± 2kÅ
GLASSIVATION:
Type: Nitride Over Silox
Nitride Thickness: 3.5kÅ ± 1kÅ
Silox Thickness: 12kÅ ± 2kÅ
WORST CASE CURRENT DENSITY:
9.5 x 104A/cm2

Metallization Mask Layout


HI-201HS

A1 A2

OUT1 OUT2

IN1 IN2

V- V+

GND

IN4 IN3

OUT4 OUT3

A4 A3

9-92

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