Вы находитесь на странице: 1из 11

This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2018.2825779, IEEE
Transactions on Power Delivery
1

A Fast DC Fault Detection Method Using


DC Reactor Voltages in HVdc Grids
Chengyu Li, Student Member, IEEE, Aniruddha M. Gole, Fellow, IEEE, Chengyong Zhao, Senior
Member, IEEE
 rapidity [4]. Dc circuit breakers (CB) can be used to isolate the
Abstract—This paper proposes a fast dc short-circuit fault dc fault [4-6]. However, due its rapid rise, the dc current
detection method for HVdc grids, that relies on the voltage across quickly approaches the maximum interrupting capacity of the
the dc fault-current-limiting reactor. In the proposed approach breaker. Hence it is crucial to have a fast and reliable dc fault
primary detection uses only the single-terminal dc reactor voltage
detection system, so that there is time to open the breaker
information and is shown to be able to identify the faulted line as
well as the faulted pole within 1 ms. The backup detection is before its capacity is breached.
primarily required for high resistance faults and uses A current differential method for dc fault detection was
communication between the two sides of the line. Its speed is proposed in [7]. This method has a high selectivity and uses the
dependent on the travel time of signals between the two ends, but measured current information from both sides of the line.
will operate, as shown in the paper, typically in 2 ms or less. The However, the communication has a time delay especially for a
approach is justified using analytical calculations and
long transmission line, and may not be suitable for the fast
exhaustively validated via Electromagnetic Transient (EMT)
Simulation for pole-to-pole and pole-to-ground faults, different primary protection in a dc grid. In [8] and [9], local
fault resistance, fault locations and dc reactor values. The measurements at each HVdc terminal are used to detect dc
validation shows that the method is able to identify all genuine dc faults. The methods can distinguish whether the fault is on the
line faults, but is not prone to misoperation with ac line faults, dc bus or on the line. However, in this communication-less
different loading levels and so on. method the detection criterion is hard to set and can give false
results with high fault resistances. Single-terminal
Index Terms—Dc grid protection, modular multilevel converter
(MMC), dc fault detection, fault resistance.
measurement based protection methods are also proposed in
[10], but these cannot discriminate the faulted line directly, and
I. INTRODUCTION require opening and re-closing healthy lines which can cause
power delivery interruptions.
H IGH voltage direct current (HVdc) grids are attracting
growing attention due to the increasing demand for large
renewable energy sources and the development of enabling
The dc reactor is one of the major components in dc grids and
it limit dc short-circuit fault current [11] and enables the dc
circuit breaker to operate correctly. These reactors at line
technologies such as modular multilevel converter (MMC) [1].
terminations provide a means to detect faults. Reference [12]
HVdc grids are considered to be one of the best solutions for
uses the rate of change of voltage measured at the line side of dc
transferring the energy from fluctuating renewable energy
reactors. However, this method has the drawback of possible
sources over long distances [2]. Furthermore, dc grids can
false detections on un-faulted lines when the CBs on other
interconnect ac systems with different frequency and ac voltage
faulted lines operate. It may also not work for high resistance
levels. One such scheme currently under development is the
faults, particularly if they occur far from any of the dc terminals.
Zhangbei MMC HVdc grid project in China, rated at ±500
A detection method using rate of change of voltage across the
kV/3000 MW [3].
dc reactor is proposed in [13]. In comparison with [12], this
As a relatively new technology, HVdc grids still have many
method does not give spurious detections arising from CB
challenges, with dc fault isolation being at the top of the list.
operation on other faulted line. However, as it considers voltage
When a solid pole-to-pole occurs, all the MMC capacitors
derivatives, it is computationally more complex and single-pole
discharge rapidly and the fault current increases with great
to ground dc fault are not considered. The method also requires
a higher sampling frequency compared with the method in [12].
Manuscript received July 8, 2017. This work was supported in part by the Reference [14] uses high-frequency components of dc reactor
Chinese Scholarship Council (CSC) and in part by National Natural Science voltages. The method is effective, but has a problem with high
Foundation of China (51777072) and in part by the Natural Sciences and
Engineering Council (NSERC) of Canada.
resistance faults, as the high-frequency components decay very
C. Li is with the State Key Laboratory of Alternate Electrical Power System fast for large resistances.
with Renewable Energy Sources, North China Electric Power University, This paper proposes an improved approach that uses the dc
Beijing, 102206, China (e-mail:lichengyu0216@foxmail.com).
A. M. Gole is with the Electrical and Computer Engineering Department,
reactor voltages to detect the dc short-circuit fault. The primary
University of Manitoba, Winnipeg, MB R3T 5V6, Canada (e-mail: detection method is very fast and uses only local information at
Aniruddha.Gole@umanitoba.ca). each terminal. The backup detection method is effective for
C. Zhao is with the State Key Laboratory of Alternate Electrical Power high resistance faults and uses communication between the two
System with Renewable Energy Sources, North China Electric Power
University, Beijing, 102206, China (e-mail: chengyongzhao@ncepu.edu.cn). sides of the line. The proposed approach has excellent

0885-8977 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2018.2825779, IEEE
Transactions on Power Delivery
2

discrimination against false operations. demonstrate the rationality of using the reactor voltages as
Some previous methods [15] using inductor voltage or its discriminatory signals for dc fault detection; and hence the dc
derivate considered only point to point dc overhead overhead lines are approximated as series RL circuits.
transmission, whereas this paper considers the protection of a In Fig. 2, Rmk and Lmk (m,k = 0,1,2,3) are the resistance and
multi-terminal dc system. Also the method proposed in [16] inductance of Line mk. The current in Line mk flowing from
ignored the capacitance of remote converters which has been MMCm to MMCk is imk. LTmk is the dc reactor inductance at the
included in this paper. In this paper, a simple analytical solution m side of branch mk; and Rcm, Lcm and Ccm are the equivalent
is also proposed to explain the basic behavior and show that the circuit resistance, inductance and capacitance of MMCm. The
proposed method is effective and highly sensitive in detecting voltage across capacitor Ccm is ucm.
dc side faults in dc grids. A pole-to-pole dc fault current calculation method was
The remainder of the paper is organized as follows: Section proposed in [22]. The fault currents on all the lines can be
II outlines the dc fault detection indicator and its validation. calculated by the equations shown as below in (1):
Section III presents the primary fault detection method and
Section IV further proposes the backup fault detection method. i10
+ uLT12
The proposed fault detection schemes are validated using i13 L - L10 R10
T12 L20
Rc1 R20
electromagnetic transient (EMT) simulation for multiple LT21
Lc1 +
uLT13 i20
scenarios in Section V and Section VI concludes this paper. LT13 - i23
+
Cc1 uc1 L13 LT23
-
II. DC FAULT DETECTION INDICATOR AND VALIDATION R13 R23 Rc2
L23 Lc2
In VSC-HVdc grids, dc reactors are required at the ends of +
uc2
transmission lines to limit the rate of rise of fault current when a LT31 Cc2 -
LT32
dc short-circuit occurs [1], [17]. These dc reactors can provide a
means for dc fault detection on the line. Many characteristics Rc3

are available to distinguish faulted line and healthy lines. As Lc3


this section shows, the voltage across a dc reactors on a faulted Cc3 +uc3
line is much larger than that on a healthy line. Hence the paper -
proposes a fault identification approach where the dc reactor Fig. 2 RLC circuit of a three-terminal DC network
voltages are chosen as the indicators to identify dc faults.
In a dc grid, only a few milliseconds of time are available for
D  u=R  i  L  i
the dc circuit breaker to operate after a dc short-circuit fault.  (1)
When a pole-to-pole fault occurs, the MMC capacitors u  C  i
discharge fast and cause large fault current. In this short time
scale, the fault current component from the ac side source can Here, D, R, L and C are matrices which consist of the
be ignored [18-19] and the MMC can be represented by the equivalent circuit parameters and are given in (2)-(5) below:
simplified RLC circuit as shown in Fig. 1 [20-22].
T
dc reactor 1 0 1 0 
D = 0 1 0 1 
-
uLTp+
SM1 SM1 SM1 (2)
dc reactor
SM2 SM2 SM2 0 0 1 1
SMN SMN SMN
Cc
reactor  Rc1  2 R10 0 Rc1 0 
group L0 R0  0 Rc2  2 R20 0 Rc2 
Lc
R=  (3)
 Rc1 0 Rc1  Rc3  2 R13 Rc3 
SM1 SM1  
Rc2  Rc3  2 R23 
SM1

SM2 SM2 SM2


Rc  0 Rc2 Rc3

SMN SMN SMN


uLTn
L=
+ -
 Lc1  
 0 Lc1 0 
(a) (b)
 2  LT12  L10  
Fig. 1 (a) Structure of a detailed MMC; (b) Equivalent discharge model.  Lc2  
 0 0 Lc2 
 2  LT21  L20  
  (4)
In Fig. 1, Rc, Lc and Cc are the equivalent MMC resistance,  Lc1  Lc3  
inductance and capacitance respectively.  Lc1 0 Lc3 
 2  LT31  L T13  L13  
Using the equivalent representation, a typical three-terminal  Lc2  Lc3  
 0 Lc2 Lc3 
ring dc grid incorporating a solid pole-to-pole fault at the mid-  2  LT23  LT32  L23  
point of Line 12 is shown in Fig. 2. The purpose of the analysis
in this section is not to do a highly accurate calculation, but to

0885-8977 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2018.2825779, IEEE
Transactions on Power Delivery
3

 1 Cc1 0 1 Cc1 0  equal length, identical MMCs at all terminals and identical
C   0 1 Cc2 0 1 Cc2  (5) values for the current limiting reactors. In the following
 0 0 1 Cc3 1 Cc3  analysis, it is assumed that the pre-fault current is small
compared to the fault current, so it is ignored.
Current and voltage vectors i and u are given by: The above assumptions give equations (14) to (17).

i = i10 i20 i13 i23  x0   0 0 0 0 u u u 


T T
(6) (14)

u = uc1 uc2 uc3  LT12  LT13  LT21  LT31  ...  LT (15)


T
(7)

Lc1  Lc2  Lc3  Lc (16)


Define:

L13  L23  2L10  2L20  Lline (17)


x(t )   i u
T
(8)
The first 4 entries of (14) are zero due the assumed initial
Then (1) can be expressed as (9). The forcing function term currents being negligible, (15) results from the fact that all
(Bu) typically present in state equations is absent because the current limiting reactors are equal, (16) arises because all
source is ignored at this small time-scale where capacitor MMCs are identical, and (17) arises from the fact that all lines
discharges are pre-dominant. have equal length.
From (11) to (17), the initial value of |uLT12/uLT13| can be
x  Ax calculated as in (18).
 L1  R L1  D (9)
where: A   
 C 0  uLT12 3Lc  4 LT  2 Lline 4 L  2 Lline
  3 T (18)
uLT13 Lc Lc
The solution of (9) is as in (10):
In (18), the ratio |uLT12/uLT13| is at least 3 and LT is always
x = eAt  x(0) (10)
larger than Lc. Thus the ratio typically exceeds 7, which clearly
shows that the voltage of reactors on the faulted line is much
where the x(0) is the vector of initial state variables, i.e., larger than that of reactors on the un-faulted lines; suggesting a
independent inductor currents and capacitor voltages, and e At detection method for the faulted line.
is the state transition matrix. If there is no line 23 in the Fig. 2, the ring network becomes
The discharge current from the MMC capacitors into the radial. The value of |uLT12/uLT13| changes to (19).
fault will cause a significant increase in the dc reactor voltages
in the first millisecond. Therefore, (10) can be simplified as (11)
uLT12 2 Lc  4 LT  2 Lline 4 L  2 Lline
based on the first order Taylor expansion:   2 T (19)
uLT13 Lc Lc
x  At  x(0) (11)
The ratio also exceeds 6, which indicates that the
The voltage of dc reactor LT12 which on the faulted line can methodology can be applied to a radial dc network as well.
be given as
III. PRIMARY PROTECTION SCHEME
di This section proposes a fast primary protection scheme,
uLT12  LT12 10  LT12  x1
dt (12) which includes a trigger criterion and a fault identification
where: x1  ( A11  x1 (0)  A12  x 2 (0)   A15  x5 (0))  t criterion. The overall flowchart of the proposed primary
protection scheme is summarized in Fig. 3.
The nearest dc reactor on the healthy line is LT13, and its A. Trigger Criterion
voltage is as in (13). The trigger criterion (20) initiates the protection algorithm:

di13
uLT13  LT13  LT13  x3 uLTp  t   U TH1 or uLTn t   U TH1 (20)
dt (13)
where: x3  ( A31  x1 (0)  A32  x 2 (0)   A35  x5 (0))  t
Where uLTp(t) and uLTn(t) are respectively the positive-pole
Consider the dc grid of Fig. 2, assuming all three dc lines of and negative-pole dc reactor voltages and UTH1 is a threshold

0885-8977 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2018.2825779, IEEE
Transactions on Power Delivery
4

value. The voltage polarities are as shown in Fig. 1(a). The two B. Fault Identification Criterion
dc reactors on the positive and negative poles of a HVdc Following the satisfaction of the trigger criterion, the dc fault
terminal together are referred to as a “reactor group”, as type can be identified. The fault identification criterion
indicated by the dotted ellipse. For clear discrimination, UTH1 is identifies: 1) the fault type and 2) the fault pole.
selected to be larger than its maximum possible voltage value 1) Identification of Fault Type
on the reactors of any un-faulted line; but smaller than its When a pole-to-pole dc fault occurs, the two reactor voltages
minimum value on the faulted line lines. It is obtained from in the same reactor group are almost equal. However, for a
simulation of relevant fault scenarios and operating conditions. pole-to-ground fault, there is a large difference between the two
Here, UTH1 is selected as 0.2 pu (with the rated dc pole voltage dc reactors voltages. Therefore, the difference between the
as base). If the first inequality in (20) causes the trigger, it positive-pole and negative-pole reactor voltage can be utilized
indicates a positive pole fault; and if it is the second, a negative to distinguish the fault type. The fault type criterion is proposed
pole fault is indicated. as in (22):

U LT  uLTp  t   uLTn  t   U TH2


Sampling the group
reactor voltages (22)
uLTp(t) and uLTn (t)

Y |uLTp(t)|>UTH1 N Here uLTp(t) and uLTn(t) are the positive and negative-pole
or
|uLTn (t)|>UTH1
reactor voltages at time t.
Trigger Criterion The voltage difference is re-checked after a small time
|uLTp(t)-uLTn(t)|<UTH2 interval Δt (fraction of a millisecond) to minimize noise or
N
other interference on fault detection and improve the reliability
Y
of the protection scheme as in (23):
Time delay t Time delayt

|uLTp(t+Δt)-
N N uLTp  t  t   uLTn  t  t   U TH2 (23)
|uLTp(t+Δt)|>|uLTn(t+Δt)|
uLTn(t+Δt)|<UTH2

Y Pole-to-ground fault Y The time delay interval is set as Δt= 0.2 ms in this paper.
Pole-to-pole fault
Positive pole-to- Negative pole-to- Theoretically, the steady dc current is a constant, and UTH2 can
ground fault ground fault
be set to zero. However, considering that there is always a
Fig. 3 Flowchart of primary protection for single-end dc reactor group current ripple in practical schemes, the dc reactor voltage is not
strictly zero. So UTH2 should be set to a somewhat larger value,
The trigger criterion is easy to implement. As the reactor typically 0.05 pu.
voltages are measured at the same converter station, If the criterion (22) and (23) are satisfied, then the fault is a
communication delay is not a factor. pole-to-pole fault, otherwise the fault is a pole-to-ground fault.
The trigger Threshold UTH1 can be determined by EMT 2) Primary Fault Pole Identification.
simulations. The following comprehensive simulations should The above fault identification criterion clearly distinguishes
be considered in this setting: the fault type, i.e., pole-to-pole or pole-to-ground. In the case of
a) Solid pole-to-pole faults at the ends and several a pole-to-ground fault, additional steps are necessary to
intermediate locations along each of the lines. The distinguish the pole on which the fault has occurred. In both
maximum dc reactor voltage on healthy line is Uptp is symmetrical monopole and bipolar systems, due to the different
recorded. discharge mechanism for the capacitors, the reactor voltage of
b) Dc CB interruption of solid pole-to-pole faults on the the faulted pole becomes higher than that of the healthy pole.
lines. The maximum dc reactor voltage on healthy line Therefore, identification of the faulted pole can be achieved
Udccb is recorded. with the criterion in (24) and (25):
c) Positive pole-to-ground faults with 0.6 pu fault
resistance at each end and several intermediate uLTp  t  t   uLTn t  t   fault is on positive pole (24)
locations along each of the lines. The minimum dc
reactor voltage on faulted line Uptg is recorded.
The primary protection trigger criteria UTH1 constraint uLTp  t  t   uLTn t  t  fault is on negative pole (25)
conditions are

IV. BACKUP PROTECTION SCHEME


U TH1  U ptp

 If the dc fault resistance is high (e.g., greater than about 2 pu,
U TH1  U dccb (21) using as base, the rated dc pole voltage of 1000kV and rated
 power of 2000MW), the MMC fault current does not rise fast
U TH1  U ptg
 enough to cause significant voltage rise on the dc reactor and
trigger the primary protection. Hence, a backup protection

0885-8977 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2018.2825779, IEEE
Transactions on Power Delivery
5

scheme is necessary. The backup protection scheme requires Sampling the group
M reactor voltages
more time as it relies on communication with the remote uLTpm and uLTnm
converters at the other ends of the connecting transmission
lines. |uLTpm|>UTHB N
The backup protection is triggered if (26) is satisfied: or
|uLTnm|>UTHB
Y

uLTp  t   U THB or uLTn t   U THB (26)


Communication Calculating Dm and Rm
with other end Receiving Dk and Rk

Y N
In (26) uLTp(t) and uLTn(t) are the positive and negative side Rm & Rk=1
dc reactor voltages, and UTHB is an appropriately selected N N
threshold. Since sensitivity to high resistance faults is important, Dm+Dk=0 Dm+Dk=2

the threshold value is set less than that in the primary protection Y Y Pole-to-ground fault
scheme. Here, the backup protection triggering threshold UTHB Positive pole-to- Negative pole-to-
Pole-to-pole fault
ground fault ground fault
is set to around 0.4UTH1.
Consider a line between busses m and k. The fault Fig. 4 Flowchart of backup protection of two-end dc reactor groups
identification procedure uses amplitude information via a
parameter Dj (j=m, k), and directional information via V. VALIDATIONS AND STUDY RESULTS
parameter Rj. Dj (j=m, k) is defined as in (27). In this section the proposed fast dc grid fault detection
method is validated in a four-terminal bipolar dc grid. An
 uLTpj accurate model of the DC grid is essential to determine the
 1  K set trigger threshold accurately. This requires a detailed EMT
 uLTnj
 model of the MMC converter and frequency dependent
 uLTpj 1 representation of the dc lines. The detailed EMT half-bridge
D j  1  (27) MMC model used is as proposed in [23]. For clear
 uLTnj K set discrimination, it is important that the protection not
 mis-operate under transients that are not dc fault related. This
 1 uLTpj
 0   K set aspect is also investigated using EMT simulation.
 K set uLTnj
A. Four-terminal Dc Grid Test System
Fig. 5 shows the four-terminal bipolar HVdc grid as modeled
Here uLTpj and uLTnj are the positive and negative pole dc
on an EMT simulator (PSCAD/EMTDC). The system structure
reactor voltages respectively for group j. Kset and its reciprocal
and parameters are from the dc grid proposed in [2]. The dc
1/Kset are thresholds. In order to distinguish the faulted pole,
reactors are at each end of the dc overhead transmission lines.
Kset should be slightly larger than 1. In this paper, Kset is set 1.2.
The pole parameters of individual MMC converters and the
The direction parameter Rj (j=m, k) is as in (28).
short circuit ratios (SCR) of their respective ac systems are
given in Table I. L0 is the arm inductance; C0 is the SM
1 uLTpj  0 or uLTnj  0 capacitance; NSM is the number of SMs. Converters Cb-A1,
Rj   (28)
0 otherwise Cb-A3 and Cb-A4 control their respective real powers and
reactive powers, while converter Cb-A2 regulates its reactive
power and the dc voltage. The reference positive direction of
The flowchart of the backup protection scheme of dc reactor
real power is from the converter into the ac system.
group m is illustrated in Fig. 4.
The dc reactor group m receives the information from group
k. For a fault on line mk, Rm =Rk = 1. Therefore the processor 220kV
13
Cb-A1 LTx14 1 2 3 LTx41 Cb-A4
750kV
DC AC
can identify the faulted line. To identify the faulted pole, the AC
Line 14 DC
200 km
directional parameter from (27) is utilized. Note that for a fault LTx13 LTx42
on the positive pole of line mk, Dm = Dk =1; and for a negative DC
MMC 4 7
AC
pole fault Dm = Dk = -1. Hence Dm+Dk can be used to identify AC Line 13 Line 42 LTx
the faulted pole. If Rm = Rk =1 and Dm+Dk = 0, it means the Dm Source 200 km 100 km
8 x=p: L on positive pole
Overhead 5
and Dk are both 0 and the fault is a pole-to-pole fault. A value of Line x=n: L on negative pole

2 for Dm+Dk indicates a fault on the positive pole, and a value of DC Reactor
6 9
-2 indicates a fault on the negative pole. Fault Point
LTx31 LTx24 Cb-A2 750kV
220kV
DC AC
LTx32 10 11 12 LTx23
AC DC

Cb-A3 Line 32
200 km

0885-8977 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2018.2825779, IEEE
Transactions on Power Delivery
6

Fig. 5 The test dc grid structure (All lines and converters are bipolar) sensor at LT14 because of the traveling wave delay, and so both
The dc overhead line configuration and parameters are given sides are aware of the fault within, say, 1ms after fault
in the Appendix and all the dc reactors are 150mH. occurrence. It should be noted that in the primary protection,
there is no need for communication from the remote end of the
TABLE I
PARAMETERS OF EACH MMCS
line, as the trip signals for the dc circuit breakers at the two ends
is generated from the local measurements at each end.
Station Control Strategy L0 (mH) NSM C0(μF) Ac SCR One concern is whether the operation of surge arresters
Q= 0MVar might clip the overvoltages and affect the protection. In a
Cb-A1 96 250 7500 4.2 ±500kV HVdc system, the lightning impulse withstand voltage
P= -900MW
Q= 0MVar and switching impulse withstand voltage protection threshold
Cb-A2 48 250 14000 9.7
Udc= 500 kV
are set at 1550kV and 1300kV respectively [24][25]. In the
Q= 0MVar
Cb-A3 96 250 7500 3.8 paper, during a solid pole-to-pole fault, the maximum dc
P= -750MW
Cb-A4
Q= 0MVar
96 250 7500 6.3
reactor voltage is only 680kV. The line surge arresters are
P= 1000MW located at each ends of a line. In fault detection cases, the
B. Primary Protection faulted pole voltage decreases and line surge arresters will not
operate, though they may operate in the healthy pole which sees
In this test system, the primary dc reactor voltage threshold is
an overvoltage. However, it can be shown by detailed
set as UTH1=200kV (i.e., 0.2 pu) for the trigger criterion.
simulation (not included), that the voltage across the reactor
Solid pole-to-pole faults are applied at each ends of lines. For
rises almost immediately after the fault, whereas the line to
each fault, voltage of the nearest dc reactor is obtained by
ground voltage of the healthy pole rises more slowly and the
calculation method mentioned in Section II or EMT simulation.
arrester would only operate well after the inductor overvoltage
The results are shown in Table II.
is detected. Hence arrester operation does not interfere with the
TABLE II fault detection.
DC REACTOR VOLTAGES OBTAINED BY CALCULATION AND EMT SIMULATION
Fault location 1 3 4 6 7 600
Calculation (kV) 364.57 363.21 364.63 365.09 360.07 ULTp14
500
EMT Simulation (kV) 384.61 380.54 384.49 384.55 380.15 400
UTH1 ULTp41
ULTp13
Fault location 9 10 12
ULTp (kV)

300 ULTp42
Calculation (kV) 415.13 364.64 416.05 200
EMT Simulation (kV) 423.22 384.51 422.88 100
0
The simplified transmission line representation in the -100
analytical model ignores traveling wave effects. Thus, the -200
0.9995 1.0000 1.0005 1.0010 1.0015 1.0020
calculated results from this model in Table II, are different from t (s)
those obtained by detailed simulation, although the same trends
are evident. Although the calculations are useful as a sanity Fig. 6 The dc reactor voltages during a pole-to-pole fault
check, an EMT model that includes frequency dependent line 2) Pole-to-ground Fault
representations must be used for the final settings as it is more The sensor at each side of the faulted line can independently
accurate. detect the positive pole-to-ground fault quickly and accurately.
1) Pole-to-pole Fault When a positive pole-to-ground fault occurs, the voltages of the
A pole-to-pole fault is applied at 1 s at fault position 1 on dc reactors at the positive pole are significantly larger than that
Line 14 (dc fault points are indicated by red dashed circles in at the negative pole. Hence, as described in Section III.B, the
Fig. 5). The fault resistance is 100 Ω. The voltages of dc faulted pole can be readily identified as the positive pole. This
reactors at both sides of the faulted line and two reactors on is demonstrated with the following example.
adjacent lines (Line13 and Line 42) are shown in Fig. 6. Since A positive pole-to-ground fault is applied at fault position 1
the dc reactor voltages at the positive and negative poles are the on Line 14. The fault resistance is 100 Ω. The positive and
same, only positive pole dc reactor voltages are shown. negative voltages of dc reactors at both side of faulted line are
In Fig. 6, ULTp14 rises above 300 kV immediately on fault shown in Fig. 7 respectively. Here UTH2=50 kV (i.e., 0.05 pu)
application. As the other end of the line is 200 km away, it takes for fault type identification.
another 700 s (due to the finite travel time across the line) In Fig. 7, ΔU14 and ΔU41 are the differences between positive
before the voltage rises to about 590 kV. These voltages are and negative pole dc reactor voltages obtained by (22) for the
clearly larger than the threshold UTH1 = 200kV, and so provide a two groups. ULTp14 rises above 300 kV immediately on fault
clear indication that the fault is on line 14. Also on the other application. ULTn14 is significantly smaller than ULTp14 and so
lines 13 and 42, the voltages across the line reactors have ΔU14 exceeds UTH2 almost instantaneously (within 200 s).
maximum magnitudes of 94 kV and 174 kV, which are below This, according to the criterion (24) in section III.B.2, indicates
the threshold UTH1. Hence the detection on these adjacent that the fault is a positive pole-to-ground fault. Due to the travel
un-faulted lines is not triggered. time of transients on the line, the same identification occurs 700
The sensor at LT41 detects the fault roughly 700 s after the s later at the other end of the line, as shown in Fig. 7b.

0885-8977 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2018.2825779, IEEE
Transactions on Power Delivery
7

700 700
350 ULTp14
UTH1 Faulty line ULTp14
300 600 600 Faulty line ULTp41
ULTn14 Healthy line ULTpmax
ΔU14
(a) ULTp (kV)
250 500 500
200

ULTp / kV
UTH2 400 400
150
Δt
300 300
100
UTH1 UTH1
50 200 200

0 100 100
-50 (a) Pole-to-pole Fault (b) Pole-to-ground Fault
0 0
-100 0 100 200 300 400 500 600 700 800 0 50 100 150 200 250 300 350 400 450 500
0.9995 1.0000 1.0005 1.0010 1.0015 1.0020 Fault Resistance Rf / Ω Fault Resistance Rf / Ω
450 Δt
400
ULTp41 Fig. 9 Voltages of dc reactor vary with fault resistance (a) pole-to-pole fault
(b) ULTn (kV)

350 UTH1
300
ULTn41 (b) pole-to-ground fault
ΔU41
250
200
A large fault resistance affects the dc fault characteristic.
UTH2
150 With an increase in fault resistance, the dc reactor voltages
100
decrease. When the fault resistance reaches about Rf = 600 Ω
50
0 (1.2 pu, with base quantities being the rated dc voltage of 1000
-50
0.9995 1.0000 1.0005 1.0010 1.0015 1.0020
kV pole-pole and rated dc current of 2 kA), the pole-pole fault
t (s) is no longer able to be identified due to the reactor voltage
Fig. 7 (a) voltages of dc reactor LT14; (b) voltages of dc reactor LT41 being less than the threshold. Likewise, pole-to-ground faults,
with Rf > 380Ω (0.76 pu) are also no longer detectable by the
In section III, the threshold for primary protection was set
primary protection. Note that in these cases, the fault resistance
assuming solid (i.e. zero Ω) faults. In the above simulations, a
is approaching a pu value close to 1.0 pu, thus the fault current
100 Ω fault resistance was used, which is 0.2 pu based on rated
is in the range of the rated current, making the fault more
dc voltage and current. This was done to show that the primary
difficult to discern. However, it should be noted that for a high
protection can identify both pole-to-pole fault even when the
resistance dc fault, the relatively small short-circuit current is
fault is not a solid fault.
not so devastating to the dc grid, and remains within the
3) Influence of Fault Location
clearance range of the dc circuit breaker for a longer period.
Fig. 8 shows the line reactor voltages ULTp1 and ULTp2
The speed of the protection become less urgent; and in that
measured at the two ends of the faulted line as well as the
case, the fault is detected via the proposed backup protection
maximum voltage ULTpmax amongst all reactors of the other
which uses communication between two ends of the
healthy lines for pole-to-pole fault and positive pole-to-ground
transmission line as explained in Section IV.
fault applied at 12 different fault locations shown in Fig. 5. The
fault resistance is 100Ω. C. Detection in Meshed Dc Grids
700 700
Faulty line ULTp1
With the addition of Line 34 to the dc grid of Fig.5, as shown
600 600 Faulty line ULTp2
Healthy line ULTpmax
in Fig. 10, the dc grid becomes meshed. A solid pole-to-pole
500 500 fault is applied at 1 s at fault position 1 on Line 14. The voltages
ULTp / kV

400 400 of dc reactors at both sides of the faulted line and three reactors
300 300 on adjacent lines (Line13, Line 42 and Line 34) are shown in
UTH1 UTH1
200 200 Fig. 11.
100 100 Cb-A1 1 Cb-A4
Pole-to-pole Fault Pole-to-ground Fault DC AC
0 0
1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12
Fault Position AC DC
Fault Position
LTx43

Fig. 8 Maximum voltages of dc reactor (a) pole-to-pole fault (b) U13


pole-to-ground fault
Line 34
150 km
In Fig. 8, regardless of fault location, ULTpmax is under the LTx34
voltage threshold and ULTp1 and ULTp2 are above the threshold Cb-A3 Cb-A2
AC
in all cases. Therefore all fault types, regardless of where along AC
DC
DC
the line the fault occurs, can be unambiguously detected in the
Fig. 10 Meshed dc network and fault location
test dc grid system.
4) Influence of Fault Resistance 800
700 ULTp13 ULTp14
Pole-to-pole faults and positive pole-to-ground faults at 600 ULTp42 ULTp41
position 1 are applied with different fault resistance values. Fig. ULTp43
ULTp (kV)

500 UTH1
400
9 shows the positive pole voltages ULTp14 and ULTp41 detected by 300
the protection system at either line end, as well as the largest 200
100
voltage detected by any reactor in the healthy lines. 0
-100
-200
0.9995 1.0000 1.0005 1.0010 1.0015 1.0020
t (s)

0885-8977 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2018.2825779, IEEE
Transactions on Power Delivery
8

Fig. 11 The dc reactor voltages during a pole-to-pole fault optical communication fibers, the signal propagation velocity is
In Fig. 11, the dc reactor voltages on the faulted line rise about 200,000 km/s [26]. For line 14 which has a length of 200
above the threshold and thus the fault is rapidly detected and km, this amounts to a signal travel time of 1000 μs. As the
identified. The dc reactor voltages on healthy lines are under signal SST14 arrives from terminal 1, or 300 μs after SST41 goes
the threshold, which turns out to be 200 kV just as it was for the high, terminal 4’s protection system can finally confirm that the
non-meshed grid. This scenario indicates that the proposed fault is indeed on line 14. When terminal 1 receives SST41 1000
protection method still works on meshed dc grid. μs after its generation, it can also finally confirm that the fault is
on line 14. Finally, the fault is fully confirmed using the
D. Backup Protection information on both sides of the line in 1700 μs. This indicate
In this test system, the backup protection as presented in the protection will operate in less than 2 ms.
Section IV uses the threshold of UTHB=70kV, and also relies on
E. Symmetrical Monopole Pole-to-ground Fault Detection
communication between the two ends.
A positive pole-to-ground dc fault is set at fault position 1 on In a symmetrical monopole dc grid, the ac side is high
Line 14 (shown in Fig. 5). The fault occurs at t=1.0 s and the impedance grounded or even ungrounded. However, there is
fault resistance is 1000 Ω (2 pu). The positive and negative still a sufficient difference in the dc reactor voltage between the
voltages of dc reactors at both side of the faulted line are shown faulted pole and healthy pole to clearly identify the faulted pole.
in Fig. 12. The symmetrical monopole dc grid are shown in Fig. 13 and
parameters of MMC are shown in Table III. The ac side is not
150 grounded. A solid pole-to-ground fault is applied at 0.6 s at
ULTp14
125 UTHB ULTn14 fault position f1 on Line 12.
100 ULTp41 Line 12
ULTn41 I12
LT12 400 km LT21
ULT (kV)

75 DC DC
50 AC
f1 AC

25 Cb-A1 f2 LT13 LT23 Cb-A2


0
-25 (a) Line 23
300 km
-50 Line 13
1 DT14 DT41 200 km
DT

0
LT32
1 RT14 RT41
RT

DC
0
AC
(b) LT31
Cb-A3
Suspected signal SST14 Confirmed signal SCT14
1
Fig. 13 A symmetrical monopole dc grid
0
Communication delay
Communication delay TABLE III
Travelling wave delay
1 PARAMETERS OF SYMMETRICAL MONOPOLE MMCS
Suspected signal SST41
0 Confirmed signal SCT41
0.9995 1.0000 1.0005 1.0010 1.0015 1.0020
(c) t (s) Station Control Strategy L0 (mH) NSM C0(μF)

Q= 0MVar
Fig. 12 High Resistance Fault (Rf =1000Ω): (a) Line dc reactor voltages; (b) Cb-A1 96 250 7500
P= -1800MW
Amplitude and Directional parameters (c) Fault suspected and confirmed
Q= 0MVar
signals Cb-A2 48 250 14000
Udc= 1000 kV
Q= 0MVar
When the fault occurs, the dc reactor voltage ULTp14 exceeds Cb-A3 96 250 7500
P= -1500MW
UTHB and the ratio |ULTp14 / ULTn14| exceeds Kset = 1.2. As a result,
the corresponding amplitude parameters DT14 is set to 1
The positive and negative voltages of dc reactor LT12 on
indicating a fault on the positive pole. The directional
faulted line are shown in Fig. 14.
parameters RT14 also sets to 1, indicating that the fault is on line
14. When DT14 and RT14 go to 1, the protection system at 350
UTH1
terminal 1 of line 14 suspects a fault on the line and sets SST14 300
250
=1, and transmits this signal to the other end (terminal 4), which 200 U
TH2
ULTp (kV)

is received later. The communication delay is slightly larger 150


Δt
100
than the travel time of signals on the line, but the exact value of 50
the delay is not critical. The remote fault suspected signal 0 ULTp12
-50 ULTn12
would not miss the local fault suspected signal because of this -100 ΔU12
slight delay. -150
0.5995 0.6000 0.6005 0.6010 0.6015 0.6020
At the other end of line 14, i.e., at terminal 4, DT41 and RT41 t (s)
are similarly set to 1, when the fault is seen by that terminal
Fig. 14 Voltages of dc reactor LT12
about 700 μs later due to travelling wave delay on the line. The
protection at end 4 now sets SST41 to 1, as it also now suspects a From Fig. 14, it is evident that the faulted pole (positive pole)
fault on line 14. It transmits this signal to the other end. With reactor voltage is larger than that on healthy pole. Hence, the

0885-8977 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2018.2825779, IEEE
Transactions on Power Delivery
9

proposed primary protection can also detect the fault and increases and then decreases. For good discrimination, we need
identify the faulted pole in a symmetrical monopole dc grid. a large spread between the inductor voltages on the faulted and
It should be noted that if there is a fault at f2 then the positive healthy lines. Therefore, the proposed fault detection method
pole reactor voltages would be equal and so would the negative will find it difficult to identify faulted line and adjacent healthy
pole reactor voltages, and so the proposed method as shown lines if the dc reactor sizes are under about 30mH.
would not directly work. It is possible to use voltages from all
four reactors to identify the fault, but that is outside the scope of 2.0

the paper which considers line fault detection only, and not 1.0

(a) I41 (kA)


faults between the converter and its dc bus. 0.0

-1.0
VI. ROBUSTNESS OF PROPOSED STRATEGY
-2.0
This section investigates the robustness of the proposed
primary and backup protection algorithms. A properly designed -3.0
30
protection system should not react to other system behaviors
20

(b) ULTp14 (kV)


which are not dc faults. These scenarios are simulated by the
10
test dc grid shown in Fig. 5.
0

A. Response to Power Order Changes -10

When power changes, the resulting dc current undergoes a -20

transient, resulting in a voltage change across the dc reactor. At -30


0.900 0.950 1.000 1.050 1.100 1.150 1.200
t=1.0 s, MMC station Cb-A1 reverses its real power order t (s)
instantaneously from -1800 MW to 1800 MW and station
Fig. 15 Waveform of positive pole with power reversal (a) current on Line
Cb-A4 changes its order in a step from 2000 MW to -2000 MW. 41 (b) dc reactor LT14 voltage
In an actual dc system, it would likely be ramped, but the step is
purposely selected here to make the test the system undergo a 40

more severe change. 30


20
Fig.15 shows the line current and the dc reactor voltage on
ULTp14 (kV)

10
line 14. The peak magnitude of ULTp14 is about 27 kV, which is 0
less than the primary and backup protection triggers of 200 kV -10

and 70 kV respectively. Hence, large power order changes do -20


-30
not cause mis-operation of the protection. (a) Three phase ground fault
-40
20
B. Response to Ac Short-circuit Faults 15
10
Ac side short-circuit faults also create dc current transients
ULTp14 (kV)

5
and thus affect the dc reactor voltage. The protection behavior 0
is investigated for i) a solid three phase to ground fault and ii) a -5
single phase ground fault. Either fault is a 50 ms fault applied at -10
-15
fault position 13 in Fig. 5 at t=1.0s. The resultant voltage ULTp14 (b) Single phase ground fault
-20
across LT14 for these two faults is shown in Fig.16. 0.80 1.00 1.20 1.40
t (s)
1.60 1.80 2.00

The maximum dc reactor voltage ULTp14 is below 40kV and


10kV respectively for the three phase and single phase faults, Fig. 16 ULTp14 during ac short-circuit fault (a) three phase ground fault; (b)
which is significantly lower than either the primary of backup single phase ground fault
trigger thresholds. Therefore, ac faults do not cause spurious
600
operation of the protection. Faulty line ULTp14
Faulty line ULTp41
C. Influence of Dc Reactor Size 500 Healthy line ULTpmax

The dc reactor voltage is ULT=LT (di/dt), which indicates that


the dc reactor voltage is also a function of the dc reactor size. 400
ULTp / kV

A positive-pole-to-ground fault at fault position 1 with


300
different dc reactor sizes varying from 10 mH to 210 mH
separately. The fault resistance is 0.1 Ω. The positive pole dc
200
voltages ULTp14 and ULTp41 on the termini of the faulted line and
the maximum dc reactor voltage ULTpmax on the neighboring
100
healthy lines are shown in Fig.17.
The dc reactor voltages on the faulted line increase 0
0 50 100 150 200
monotonously with increasing dc reactor size. On the other LT / mH
hand, the maximum dc reactor voltage on the healthy lines first
Fig. 17 Dc reactor voltages change with dc reactor size

0885-8977 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2018.2825779, IEEE
Transactions on Power Delivery
10

However, a dc circuit breaker (CB) is present in a large scale paper also shows that the method is equally applicable to grids
dc grid to clear dc faults. The minimum size of the dc reactor with symmetrical monopole as well as bipolar converters, and
depends on the dc CB’s current breaking rating and required also works well with both meshed and non-meshed dc grids.
interruption time. This also affects the cost of the breaker and
other devices in dc grid. Usually, the dc reactor for ±320kV dc APPENDIX: OVERHEAD LINE DATA
grid is greater than 100 mH per pole to limit the dc short-circuit The HVdc overhead transmission lines are modeled based on
fault current [15]. Therefore, the proposed fault detection the frequency dependent (phase) model of the PSCAD software.
method would be effective in dc grid applications, as the fault Fig. 19 illustrates the dc overhead transmission line
discrimination is very good for LT >= 100 mH. configuration.
D. Influence of Dc CB Operation
A solid pole-to-pole fault is applied at 1s at fault position 1
on Line 14. The voltages of dc reactors at both sides of the
faulted line rise rapidly and detect the fault immediately. The
proposed primary protection trigger the dc CB and isolate the
fault. The dc CB proposed by ABB [5] is applied. All the
DC resistance:
voltages of dc reactors at positive poles during the transient are 0.015 ohms/km
shown in Fig. 18. Ground wire resistance:
2.8645 ohms/km
700 Length:
600 Show in Fig.5
ULTp14 ULTp42
500 UTH1 ULTp41 ULTp24
400 ULTp13 ULTp32
ULTp (kV)

300 ULTp31 ULTp23


200
100
0
-100
-200
-300
0.980 1.000 1.020 1.040 1.060 1.080 1.100 1.120 1.140 1.160
t (s)

Fig. 18 Reactor voltages during a pole-to-pole fault and dc CB operation Fig. 19 Configuration of the utilized overhead line model.

As illustrated in Fig. 18, the fault is successfully detected by REFERENCES


the proposed protection method, as the dc reactor voltages on
[1] J. Häfner and B. Jacobson, “Proactive hybrid HVDC breakers—A key
the faulted line are over the threshold UTH1. Hence the innovation for reliable HVDC grids, integrating supergrids and
protection would trigger the operation of the dc CBs to isolate microgrids,” in Proc. CIGRE Symp., Bologna, Italy, 2011, pp. B4–B110.
the fault, which could initiate transients on the other healthy [2] T. An et al., “A DC grid benchmark model for studies of interconnection
of power systems,” CSEE Journal of Power and Energy Systems, vol.1,
lines. However, even with the transient, the dc reactor voltages no.4, pp.101-109, Dec. 2015.
on other lines remain under UTH1. This indicates that when a dc [3] T. An, G. Tang, and W. Wang, “Research and application on
CB isolates the fault, it will not mis-trip other healthy lines. multi-terminal and DC grids based on VSC-HVDC technology in China,”
IET High Voltage vol.2, no.1, pp.1-10, 2017.
[4] G. Liu, F. Xu and Z. Xu et al., “Assembly HVDC Breaker for HVDC
VII. CONCLUSIONS Grids with Modular Multilevel Converters,” IEEE Trans. Power
Electron., vol.32, no.2, pp. 931-941, 2017.
This paper presents a fast detection method for dc faults on [5] A. Hassanpoor, J. Häfner and B. Jacobson, “Technical Assessment of
an HVdc grid that utilizes dc reactor voltages. The primary Load Commutation Switch in Hybrid HVDC Breaker,” IEEE Trans.
protection uses single-terminal dc reactor voltages only, and Power Electron., vol.30, no.10, pp.5393-5400, Oct. 2015.
[6] C. C. Davidson, R. S. Whitehouse and C. D. Barker et al., “A new
can detect the faulted line and identify the faulted pole in under ultra-fast HVDC Circuit breaker for meshed DC networks,” 11th IET
1ms. The backup protection requires communication between International Conference on AC and DC Power Transmission,
the two ends of the line, and is designed for high-resistance Birmingham, 2015, pp. 1-7.
[7] J. Descloux, P. Rault, S. Nguefeu, J. B. Curis, X. Guillaud, F. Colas, et al.,
fault situations. “HVDC meshed grid: Control and protection of a multi-terminal HVDC
Using simulation on a four-terminal dc grid test system, the system,” CIGRE, 2012.
primary protection is comprehensively validated with pole to [8] Azad, S. Pirooz, W. Leterme, and D. Van Hertem, “A DC grid primary
pole and pole to ground faults at multiple locations. It is shown protection algorithm based on current measurements,” 2015 17th
European Conference on Power Electronics and Applications, Geneva,
that primary protection operates within 1 microseconds for low Switzerland, 2015, pp. 1-10.
resistance faults, but loses sensitivity when the fault resistance [9] S. Pirooz Azad and D. Van Hertem, “A Fast Local Bus Current-Based
approaches 0.76 pu (380 Ω) in the test dc grids. For higher Primary Relaying Algorithm for HVDC Grids,” IEEE Trans. Power Del.,
vol. 32, no. 1, pp. 193-202, Feb. 2017.
resistance faults, the backup protection is effective, and is able [10] T. Lianxiang and O. Boon-Teck, “Locating and Isolating DC Faults in
to operate within 2 ms. The paper demonstrates that the Multi-Terminal DC Systems,” IEEE Trans. Power Del., vol.22, pp.
protection is immune to mis-operation in the face of 1877-1884, 2007.
[11] A. Gunnar, L. Kestin, and B. Carl, “HVDC grid feasibility study,”
disturbances such as ac faults and power order changes. The Working Group B4-52, 2013.

0885-8977 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRD.2018.2825779, IEEE
Transactions on Power Delivery
11

[12] J. Sneath and A. D. Rajapakse, “Fault Detection and Interruption in an


Earthed HVDC Grid Using ROCOV and Hybrid DC Breakers,” IEEE
Trans. Power Del., vol. 31, no. 3, pp. 973-981, June 2016. Chengyu Li (S’17) was born in Hunan,
[13] R. Li; L. Xu; L. Yao, “DC Fault Detection and Location in Meshed China. He received the B.S. degree in power
Multi-terminal HVDC Systems Based on DC Reactor Voltage Change system and its automation from North China
Rate,” IEEE Trans. Power Del., vol.32, no.3, pp. 1516-1526, June 2017. Electric Power University (NCEPU), Beijing,
[14] J. Liu; N. Tai; C. Fan, “Transient-Voltage Based Protection Scheme for China, in 2013, where he is currently pursuing the
DC Line Faults in Multi-terminal VSC-HVDC System,” IEEE Trans. Ph.D degree in power system and its automation.
Power Del., vol. 32, no. 3, pp. 1483-1494, June 2017. He was a Visiting Scholar at the University of
[15] Y. Zhang, N. Tai and B. Xu, “Fault Analysis and Traveling-Wave Manitoba, Winnipeg, MB, Canada, from 2016 to
Protection Scheme for Bipolar HVDC Lines,” IEEE Trans. Power Del., 2017. His research interests include VSC-HVdc,
vol. 27, no. 3, pp. 1583-1591, July 2012 dc grids and virtual synchronous generator
[16] W. Leterme, J. Beerten and D. Van Hertem, “Non unit protection of control.
HVDC grids with inductive dc cable termination”, IEEE Trans. Power
Del., vol. 31, no. 2, pp. 820-828, Apr. 2016.
[17] W. Wang, M. Barnes and O. Marjanovic et al., “Impact of DC Breaker
Systems on Multiterminal VSC-HVDC Stability,” IEEE Trans. Power
Del., vol.31, no.2, pp.769-779, Apr. 2016. Aniruddha M. Gole (S’77-M’82-SM’04-F’10)
[18] . J. Yang, J. E. Fletcher and J. O'Reilly, “Short-Circuit and Ground Fault received the B.Tech. degree in Electrical
Analyses and Location in VSC-Based DC Network Cables,” IEEE Trans. Engineering from the I.I.T, Bombay, India, in
Industrial Electronics, vol.59, no.10, pp.3827-3837, Oct. 2012. 1978 and the Ph.D. degree from the University
[19] J. Qin, M. Saeedifard and A. Rockhill et al., “Hybrid Design of Modular of Manitoba, Canada, in 1982, where he is
Multilevel Converters for HVDC Systems Based on Various Submodule currently a Distinguished Professor. His
Circuits,” IEEE Trans. Power Del., vol.30, no.1, pp.385-394, Feb. 2015. research interests include HVDC Transmission
[20] D. V. Hertem; O. G. Bellmunt; J. Liang, “DC fault phenomena and DC and power systems simulation. He is one of the
grid protection,” HVDC Grids:For Offshore and Supergrid of the Future, original design team members of the
1, Wiley-IEEE Press, 2016, pp. 345-365. PSCAD/EMTDC simulation program. Dr. Gole
[21] C. Li, C. Zhao and J. Xu et al., “A Pole-to-Pole Short-Circuit Fault is a Registered Professional Engineer in the
Current Calculation Method for DC Grids,” IEEE Trans. Power Systems, Province of Manitoba and is a Fellow of the Canadian Academy of
vol. 32, no. 6, pp. 4943-4953, Nov. 2017. Engineering. He is a recipient of the IEEE PES Nari Hingorani FACTS
[22] Z. Zhang and Z. Xu, “Short-circuit current calculation and performance Award and is a Fellow of the IEEE.
requirement of HVDC breakers for MMC-MTDC systems,” IEEJ Trans.
on Electrical and Electronic Engineering, vol.11, no.2, pp.168-177,
2016.
[23] J. Xu, H. Ding and S. Fan et al., “Enhanced high-speed electromagnetic
transient simulation of MMC-MTdc grid,” International Journal of Chengyong Zhao (M’05-SM’15) was born in
Electrical Power & Energy Systems, vol.83, no.1, pp.7-14, 2016. Zhejiang, China. He received the B.S., M.S., and
[24] J. Lv and L. Li, “Study on the Key Equipment's Insulation Level of Ph.D. degrees in power system and its automation
±800kV UHVDC Power Transmission Project,” 2007 IEEE Power from North China Electrical Power University
Engineering Society Conference and Exposition in Africa, PowerAfrica, (NCEPU), Beijing, China, in 1988, 1993, and
Johannesburg, 2007, pp. 1-4. 2001, respectively. Currently, he is a professor and
[25] Y. Tanaka et al., “Long-term test of the equipment for ±500 kV DC the Deputy Director of New Energy Power Grid
converter station,” 1999 IEEE Power Engineering Society Summer Institute in Electrical and Electronic Engineering
Meeting. Conference Proceedings, Edmonton, Alta., 1999, pp. School of NCEPU. His research interests include
1152-1157 vol.2. HVDC and HVDC and VSC-HVDC.
[26] C. Huang, F. Li, T. Ding, Y. Jiang, J. Guo and Y. Liu, “A Bounded Model
of the Communication Delay for System Integrity Protection Schemes,”
IEEE Trans. Power Del., vol. 31, no. 4, pp. 1921-1933, Aug. 2016.

0885-8977 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

Вам также может понравиться