Академический Документы
Профессиональный Документы
Культура Документы
IGBT Switching Behavior Note that in most datasheets the following voltage-
One of the important performance features of any dependent low-signal capacitances of turned off
switching device is the switching (turn on and turn off) IGBT/MOSFETs are given per Table 2.
characteristic. Since, significant power loss is
incurred during these switching states, it is important Capacitance IGBTs Power MOSFET
to understand these characteristics in order to deter- Input Ciss = CGE + CGC Ciss = CGS + CGD
mine switching losses. Reverse transfer Crss = CGC Crss = CGD
Output Coss = CGC + CCE Coss = CGD + CDS
When driving inductive loads, the device under goes
higher stress. Hence, the turn on and turn of time of
the IGBT/MOSFET are studied when driving inductive Table 2: IGBT and MOSFET Capacitance.
loads.
The turn on behavior of the IGBT is identical to the
The IGBT's internal input capacitance (CGE) and power MOSFET since the IGBT acts as a MOSFET
miller capacitance (CGC) impacts the IGBT turn on during most of turn on interval. When gate signal is
behavior. But the CGC effect is very small and negligi- applied, gate to emitter voltage of the IGBT rises from
ble. Figure 3 illustrates the parasitic IGBT capaci- zero to VGE (TH), as shown in Figure 4. This voltage
tances. rise is due to the Gate resistance (Rgate) and the CGE.
VGE
QGE QCG
CGC VGE(TH)
VGE = 0 V
VCE
G iC
i(t) V(t)
CCE
iC = 0 A VCE(sat)
ti-rise tv-fall
CGE 19892
E
The turn on time is a function of the output impedance
of the drive circuit and the applied gate voltage.
CGC = Feedback or Miller Hence, it is possible to control the turn on speed of the
Capacitance device by choosing an appropriate value of gate
resistance (Rgate).
CGE = Input Capacitance
C
IGBT Power Dissipation
Maximum switching frequency of IGBT is limited by
the dissipation of power during switching. The junc-
IC tion temperature (TJ) during normal operation
C CG depends on the amount of power dissipated from the
device and the efficiency of the heat sink.
R gate
dV/dt
TJ = TC + Ptot × θ JC (1)
I C = C CG x dV/dt
E ΔT
θ SA = −θ JC − θ CS (2)
Figure 5. Rgate effect on dV/dt Ptot
Where:
The turn off behavior of the IGBT, as shown in Figure 6, θSA = Heat sink to ambient thermal resistance
has a dual characteristic of both power MOSFET and θJC = Junction to case thermal resistance
BJT devices. θCS = Case to heat sink thermal resistance
Ptot = Total power dissipation
VGE QCG QGE TC = Case temperature
the delay time, rise time and fall times of the device ESW ( on) =∫ i-rise
VCE × I C (t ) × dt + ∫ v-fall VCE (t ) × I C × dt (7)
and hence to reduce the switching losses. Reducing
1
the level of VGE or increasing Rgate results in ESW ( on ) = × VCE × I C × (ti-rise + tv-fall ) (8)
increased switching losses, but can reduce Electro- 2
magnetic Emissions (EMI). Other factors affecting the ESW ( off ) = ∫ v-rise VCE (t ) × I C × dt + ∫ i-fall VCE × I C (t ) × dt (9)
switching losses are the anti parallel diode (FWD), cir-
cuit inductance, snubbers, device junction tempera- 1
ESW ( off ) = × VCE × ( I C × tv-rise + I C-tail × ti-fall ) (10)
ture, operating voltage and current etc. Use of FWD 2
is illustrated in Figure 7.
1 (11)
E SW = ×VCE × I C × (ton + toff )
C 2
Where:
ESW = Switching energy loss
Rgate
ton = ti-rise + tv-fall = turn on time
FWD toff = tv-rise + ti-fall = turn off time
PSW = f SW × ESW
(12)
E
Where:
Figure 7. FWD is usd with IGBT to Adjust Switching Speed Psw = Switching power loss
fsw = Switching frequency
The reverse recovery and turn on characteristics of
the FWD can be controlled to a certain extent by Power dissipated during turn on is calculated as fol-
adjusting the speed of the IGBT. In the event of a lows:
diode becoming too snappy in an application, the 1
PSW ( on ) = ×VCE × I C × f SW × ton (13)
IGBT turn on can be slowed down, hence reducing 2
the value of di/dt applied to the diode and so reducing
the diode losses. However, this is at the expense of Figure 6 indicates that the Power dissipated during
increasing the IGBT losses. An alternative method of turn off can be considered as being due to two ele-
reducing the FWD losses in a bridge configuration is ments:
to turn on the IGBT with a reduced VGE. This limits the
peak reverse recovery current, Irr, of the FWD in the First element is due to the speed at which the collec-
opposite side of the arm, according to the IGBTs' for- tor voltage reaches its maximum value and the sec-
ward output characteristic. ond element is the duration of the tail of the collector
current. The collector tail current is due to the recom-
As illustrated in Figures 4 and 6, there is a finite time bination of the minority carriers that cannot be
interval, during both turn on and turn off of the IGBT, extracted from the base of the PNP BJT section that
where finite VCE and IC coexist. CISS, COSS, CRSS is already open. The length of this "tail" depends on
affect the turn on and turn off times as well as turn on the lifetime of these carriers and causes the major
and turn off delay times and are responsible for some part of the switching losses.
energy losses.
Hence, the turn off power losses can be approxi-
Average IGBT power losses during both turn on and mated as follows:
turn off can be computed as follows: 1 (14)
PSW (Off ) ≈ × VCE × f SW × ( I C × tv-rise+ I C −tail × t i-fall )
2
Note that the turn off switching losses of the MOSFET
portion of the IGBT structure is negligible. This is
because the time that the MOSFET portion is respon-
sible for the IGBT turn off is only a very small fraction The minimum peak current capability of the gate drive
of ti-fall time and much shorter time than that of the power source and the average power required to
BJT portion. drive an IGBT is as follows:
Δ VGE
IGBT Gate Driver IC Power Losses I gate ( peak ) = ± (15)
Rgate
As mentioned before, IGBTs are voltage controlled
devices and require gate voltage to establish collector Where:
to emitter conduction. Due to the large input gate to Δ VGE = VGE ( on ) + VGE ( off ) (16)
emitter capacitance (CGE) of IGBTs, MOSFET drive
techniques can be used where the off biasing needs When determining the gate drive requirements for the
to be stronger. The positive gate drive should be such switching IGBT, the key specification to look for is the
the full saturation is guaranteed and short circuit cur- gate charge. The main reason for looking at gate
rent is limited. A negative voltage bias is used to charge rather than gate capacitance is the Miller
improve the IGBT immunity to collector to emitter dV/dt Effect. The Miller capacitance (CGC) effects on gate
injected noise and reduce turn off losses. Figure 8 drive of IGBT are characterized in the gate charge
shows a simplified IGBT gate driver. value. Figure 3 is representative of parasitic gate
capacitances.
Note that it is good practice to connect some back-to-
back zener diodes directly across the gate emitter ter- The charging process for the gate of an IGBT is
minals of IGBT to prevent damage from over voltage shown in Figure 9.
on the collector (by limiting the level of VGE). This is
because when a short circuit appears while the
device is already conducting the voltage and collector VGE (V)
current rise very quickly. The rapidly rising dV/dt cou-
pled with the miller capacitance (CGC) can increase
the effective VGE seen by the IGBT, further increasing
QGE QGC
the short circuit current level.
VCC
Qgate (C)
Qgate
C gate = (18)
VGE
Where: + VDC
Qgate = Total gate charge
Cgate = Total gate capacitance
LO AD
VCC
VGE = Driver's supply voltage
S H IE L D
NC
0.1 µF VOut
This means that the charging and discharging the
A
IGBT gate can be the same as charging and discharg- VO
Rgate
ing a capacitor.
1 2
Pgate = × C gate ×VGE × f SW (19)
C VO
2
NC
Where:
fSW = Switching frequency - VDC
CGE
PInternal = ICC × (VCC - VEE ) (22)
Where:
ICC = Supply current, output open
VEE
The total Gate driver IC power losses are: Figure 11. IGBT Gate Current
Pgate −driver (tot ) = POutput + PEmitter + PInternal (23) The IOL is specified when output voltage is low, that is
when the gate drive optocoupler is charging the IGBT
In many applications, the gate drive circuitry needs to gate.
be isolated from the control circuit to provide the level
shifting and improve noise immunity as well as safety. Hence, the load draws the highest output current.
And this is what the Vishay IGBT driver provides by The required IOL or Igate to switch the IGBT can be
means of optical isolation. calculated by using the gate capacitances of the
IGBT.
Where:
1
VGE / GC = × ∫ I GE / GC (t )dt (24) VOL = Low level output voltage of the gate driver
CGE / GC
optocoupler
1
VGE / GC = × I GE / GC × t SW (25)
CGE / GC 3. UVLO
The minimum acceptable gate drive voltage for IGBT
VGE / GC × CGE / GC is important because falling below this value will result
I GE / GC = (26)
t SW in switching from on state to a highly dissipative linear
mode. Hence, the Vishay IGBT drivers have Under
Voltage Lock Out (UVLO) to ensure that gate drive is
For I gate = I GE + I GC (27) removed for low drive condition. This will prevent the
IGBT from entering the linear conductive mode.
SHIELD
NC VCC
2. Gate Resistor (Rgate) Value
Rgate will need to be selected such that the maximum
peak output current rating of the gate driver optocou- A VO
pler (IOL(peak)) is not exceeded.
VCC C VO
NC VEE
Rgate
Figure 13. Vishay IGBT driver
+ VDC
NC S H IE L D CSOU VCC
LO AD
VCC
VDD
S H IE L D
NC
CESU 0.1 µF VOut
A VO A VO
Rgate
C VO
C VO
CESL NC
- VDC
CSOL
NC VEE Figure 15. Recommended LED Drive Circuit for High CMTR Per-
formance
Where:
2
POutput = C gate × VGE × f SW (20)
PEmitter = I F × VF × D (21)
+High Voltage
VCC
VIN DC
Floating Supply
RIN NC S H IE L D
Open 0.1µF
Collector
Control A VO
Input Rgate
GND 1 C VO
NC 3-Phase
AC
VIN VCC
NC
S H IE L D
RIN
Open 0.1µF
Collector
Control A VO
Input Rgate
- High Voltage
DC
GND 1 C VO
NC
Note that the value for RIN is dependent upon VIN, the desired LED input current (IF), and input forward voltage (VF).
VIN VCC
S H IE L D
NC +
RIN
Open 0.1 µF
Collector _
Control A VO
Input Rgate
GND C VO
NC 3-Phase
AC
VEE
- High Voltage
DC
VIN VCC
SHIELD
RIN NC
Open 0.1 µF +
Collector High Voltage
Control A VO DC
Input Rgate -
GND C VO
NC
- VDC