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Jan.

11 2002 C-Note 2 Block Diagram PCB LAYER


L1: Signal 1

Mobile CPU TV OUT


L2: GND

CLK GEN. Tualatin 01204-3 L3: Signal 2

ICS 950806 CRT LCD L4: Signal 3


Celeron-T CONN For C2 SOVP
3 4,5 13 14 L5: GND
C3 DV
LVDS L6: POWER
HOST BUS 133MHz Final version L7: Signal 4(weak)
RGB CH70011 VCH L8: Signal 5
SO-DIMM*2 MEM BUS TV Encoder

10 133MHz
Almador-M To P.R. 12 11 L9: GND
L10:Signal 6
GMCH DVO BUS / 66MHz

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7,8,9
DC/DC&CHARGER
Switching Power
MIC IN AC'97
CODEC HUB I/F 66MHz MAX1631/MAX1772
AD1881A INPUTS OUTPUTS
24
PCI BUS CARDBUS CARDBUS DCBATOUT LAN+3VAUX
TI 1410A PWR SW ONE SLOT UBAY+5V
Line Out
TPS2211A +3VSUS
OP AMP AC-Link 20 20
20 +5VSUS
TPA0202
25 +3VRUN
+5VRUN
ICH3-M 1394
TSB43AB21
1394
CONN AD+ BT+
21 21
MODEM
33,36
CDC Card
22
MiniPCI AC-Link
CPU DC/DC
802.11b
22 Switching Power
PRIMARY IDE MAX1718/MAX1714
HDD 18 LPC BUS INPUTS OUTPUTS
DCBATOUT +VCC_CORE
UltraBay IDE +VCCT
31,32
CD/DVDROM 15,16,17 KBC LPC
CD-RW/FDD NS SIO FWH DEBUG
NEST PC87392 M38859 82802AB
CONN. OTHER DC/DC
18 28 27 26 26
USB
MAX1644/MAX1792
INPUTS OUTPUTS
Bluetooth LAN
CDC Card USB*2 82562ET +3.3VRUN +1.8VRUN
MAX3243 PRN TRACK +3.3VRUN +1.5VRUN
AC-Link 23 23 Port29 POINT 27 INT KB
19 29 27

Digitally signe
32

Line In Line Out RJ11 USB RJ45 RS232 PRN Port FDD PS2 CRT DC In
Acer Incorporated DN: cn=dd, o=
21F, 88, Sec. 1, Hsin Tai Wu Rd.,

email=dddd@
Hsichih, Taipei Hsien 221,
Taiwan, R.O.C.
Title

Port Replicator(244PIN) 30
Size Document Number
Block Diagram c=US Rev
A3

Date:
C-Note 2
Friday, January 11, 2002 Sheet 1 of
Date:
-3
37
2009.11.
+07'00'
+VCCT +VCCT 3,4,5,6,9,32
01.BLOCK DIAGRAM
02.TABLE OF CONTENT Cu-T & Tualatin SPEC Summary July 3 '01
+VCC_CORE +VCC_CORE 4,5,31

+1.5VRUN +1.5VRUN 4,5,6,7,8,9,11,12,17,26,32


03.CLOCK GENERATOR
04.CPU
Early Samples/ES QS/ Production +1.8VRUN +1.8VRUN 4,8,9,11,15,17,32

LAN+3VAUX LAN+3VAUX 15,17,19,22,30,34


05.CPU CONFIGURATION
VCC = 1.50V (perf mode)/ VCC = 1.40V (perf mode)/ +3VRUN +3VRUN 3,6,8,9,11,12,13,14,15,16,17,18,20,21,22,23,24,26,27,28,31,32,34,35,37
06.ITP/Thermal/Fan Control/RFID 1.15V (batt mode) 1.15V (batt mode)
ICC,MAX = 13.71A +3VSUS +3VSUS 6,9,10,14,18,20,23,27,31,32,34,35,37
07.GMCH (1/3)
+3VALW +3VALW 14,15,16,17,23,25,32,33,34,36
08.GMCH (2/3) VCCDPRSLP=0.85V
+3.3VRTC +3.3VRTC 16
09.GMCH (3/3) ICC,DSLP=2.09A
Tualatin VCCT = 1.3V (min), 1.365V (max) +5VRUN +5VRUN 6,13,14,15,17,18,22,24,25,26,27,29,30,31,34,35,37
10.SO-DIMM VCCT = 1.25V +/- 5% (static)
+1.8VALW +1.8VALW 17,34
11.VCH +/- 9%(transient)
R143 R142 R143 R142 +5VSUS +5VSUS 13,14,20,23,25,27,32,34,37
12.TV Encoder
16K5R3F 49K9R3F 2D49KR3 10KR3F
+5VALW +5VALW 14,17,18,30,33,34,36
13.CRT CONN
ICC =2.7A LAN+1.8VAUX LAN+1.8VAUX 17,34
14.LCD/Inverter CONN Tj (min) = 10C TV_AVDD TV_AVDD 12
UBAY+5V UBAY+5V 18
15.ICH3-M (1/3) Tj (min) = 0C TV_VDD TV_VDD 12
+5VA +5VA 24,25
16.ICH3-M (2/3) +1.5VRUN_F +1.5VRUN_F 12
BT+ BT+ 35,36
17.ICH3-M (3/3) VCC = 1.7V (perf Mode)/ VCC = 1.7V (perf Mode)/

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LCD_DCBAT LCD_DCBAT 14
1.35V (Batt Mode) 1.35V (Batt Mode) +3VAUX +3VAUX 22,23
18.HDD & ULTRA BAY LIGHT_PWR LIGHT_PWR 14
USB1_VCC USB1_VCC 23,30
19.LAN
LCDVDD LCDVDD 14
20.PCMCIA Controler OZ6912 Cu-T SLOTVCC SLOTVCC 20
VCCT = 1.25V +/- 5% (static) AC97_3V AC97_3V 23
21.1394 TSB43AA22 VCCT = 1.2V +/- 5% SLOTVPP SLOTVPP 20
Functional at : +/- 9%(transient) CRT_VCC CRT_VCC 13,30
22.Mini PCI SOCKET & MDC 1394_AVDD 1394_AVDD 21
VCCT = 1.3V (min), 1.365 (max) AD+ AD+ 35,36
23.USB I/F & BLUETOOTH 1394_PLLVDD 1394_PLLVDD 21
AD+IN AD+IN 35,36
24.AC'97 CODEC-ALC200 MOD_5VAD MOD_5VAD 22
DCBATOUT DCBATOUT 14,31,32,33,34,35,36
25.OP AMP & PHONE JACK USB0_VCC USB0_VCC 23
VCC/VTT = 1.2V +/- 5% VCC/ VTT = 1.25V +/- 5% DCBATOUT+ DCBATOUT+ 36
26.FIRMWARE HUB GMCH Functional at : AUD_VREF AUD_VREF 25
ICH_VBIAS ICH_VBIAS 16
27.KBC-M38859 VCC/VTT= 1.3V (min), 1.365V (max) OP+5V OP+5V 25
VCC_RTC VCC_RTC 6,15,16,17
28.SIO-PC87392 TP_VCC TP_VCC 27
AD+_IN AD+_IN 30,36
29.Printer Port 1718_+5V 1718_+5V 31
MAX1631_VL MAX1631_VL 14,33
30.PORT-REPLICATOR M1772+3V M1772+3V 36
BT_VCC BT_VCC 23
31.CPU CORE M1772_LDO M1772_LDO 36
32.CPUIO/1.5V/1.8V/1.2V MAX1718 Voltage Setting FAN1_VCC FAN1_VCC 6
DC+5V DC+5V 33
TV_DVDD TV_DVDD 12
33.3V/5V DC/DC DC+3V DC+3V 33
D4 D3 D2 D1 D0 Vout (V) S1 S0 Vout (V)
34.PWR PLANE & RESET LOGIC
PCI TABLE
0 0 0 0 0 1.75 GND GND 0.975
35.CHARGER uP-MC68HC908SR
0 0 0 0 1 1.70 Perf for Cu-T GND REF 0.950
36.CHARGER CONTROLER-MAX1772
0 0 0 1 0 1.65 GND Float 0.925
37.SPARE Logic/TEST POINT DEVICE IDSEL IRQ REQ# / GNT#
0 0 0 1 1 1.60 GND VCC 0.900
0 0 1 0 0 1.55 REF GND 0.875 TI 1394 AD19 Auto REQ2# / GNT2#
0 0 1 0 1 1.50 REF REF 0.850
MINIPCI SLOT AD21 C,E REQ3# / GNT3#
0 0 1 1 0 1.45 REF Float 0.825
Perf for Tualatin
0 0 1 1 1 1.40 REF VCC 0.800 PCMCIA TI1410 AD25 B,D REQ1# / GNT1#
CG_* : CPU GTL+ Batt for Cu-T
0 1 0 0 0 1.35 Float GND 0.775
CC_* : CPU CMOS AGP AD17(Int.) A,B
0 1 0 0 1 1.30 Float REF 0.750
M_* : MEMORY BUS
0 1 0 1 0 1.25 Float Float 0.725 LAN AD24(Int.) E
G_* : AGP BUS
0 1 0 1 1 1.20 Float VCC 0.700
P_* : PCI BUS USB AD29 A,D,C
0 1 1 0 0 1.15 Batt for Tualatin VCC GND 0.675
HL_* : HUB LINK I/F
0 1 1 0 1 1.10 VCC REF 0.650 Hub-to-PCI AD30
LPC_* : LPC I/F
0 1 1 1 0 1.05 VCC Float 0.625
ICH_AC_* : AC'97 LINK I/F LPC Bridge/ AD15
0 1 1 1 1 1.00 VCC VCC 0.600
IDE_* : IDE BUS IDE/AC97/
SMBus

ZMODE SUS Vout Determined by: Acer Incorporated


21F, 88, Sec. 1, Hsin Tai Wu Rd.,
GND GND Logic Level of D0 - D4 Hsichih, Taipei Hsien 221,
Taiwan, R.O.C.
VCC GND Impedance of D0 - D4
Title
X VCC Logic Level of S0, S1 TABLE OF CONTENT
Size Document Number Rev
A3 C-Note 2 -3
Date: Friday, January 04, 2002 Sheet 2 of 37
+3VRUN
L17 PLACE NEAR EACH PIN
1 2 CLKGEN_+3VRUN
+3VRUN Filtering CKT for
48MHz power plane BLM21P221SGPT
L26 BC161 BC163 BC166 BC162 BC206 BC164 BC205 BC204 BC202 BC201
2 1 CLKGEN_48MPWR SC4D7U10V6KX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX

BLM21A601S
BC616 BC165 BC617
SC4D7U10V6KX SCD01U50V3KX SCD1U10V2MX +3VRUN

L27
CLKGEN_APWR 1 2

BLM21A601S
BC167 BC618 BC623
No stuff: SCD1U10V2MX SCD01U50V3KX SC4D7U10V6KX
caps are internal to CK-TITAN. U25

1 26
VDD VDDA
8
BC200 VDD
14 27 CLKGBOUT_MCH 7
VDD VSSA
CPU & MEMORY Freq. Selection 19
VDD

1
32 45 CLK_CPU 4
+3VRUN SC10P VDD CPU2 R235 R236
37 44 CLK_CPU# 4
VDD CPU/2

2
46 47R3 240KR3
R222 X3 VDD
50 49 CLK_MCH 7
2MR3 X-14.318MHZ-1 VDD CPU1
48 CLK_MCH# 7
CPU/1

2
1

CLKGEN_XIN 2
XIN

1
R193 R564 R562 BC203 52
CPU0 CLK_ITP 6

2
10KR3 1KR3 1KR3 CLKGEN_XOUT 3 51 BC208 New stepping of CK-408 chip has pin22 (66BUF1)

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XOUT CPU/0 CLK_ITP# 6 SC5P
SC10P SEL2 40 24 dedicate for GBIN use
S2 66IN/3V66_5
2

23 Almador checklist v0.93 9/08


66B2_3V66_4
55 22 CLKGBINR_MCH
S1 66B1/3V66_3 R234 BC207
4 H_BSEL1 21 CLK66R_ICH
66B0/3V66_2
4 H_BSEL0 54 1 2 1 2 CLKGBIN_MCH 7
S0
1

CLKGEN_PD# 25 7 CLKPCIFR_ICH 33R3 0R3-0-U


PD#/SRESET# PCIF2 R233
16 PM_STPPCI# 34
R565 R563 PCI_STP#
16 PM_STPCPU# 53 6 CLKAPICR_CPU 1 2 CLK66_ICH 15
DUMMY-R3 DUMMY-R3 CPU_STP# PCIF1
VTT_PWRGD# 28
VTT_PG# 33R3
43 5 CLKAPICR_ICH
MULT0 PCIF0 R225
2

15 ICH_SDA 29 18 PCLKR_SIO 1 2 CLKPCIF_ICH 15


R191 SDATA PCI6
15 ICH_SCL 30
10KR3 SCLK 33R3
17 PCLKR_PCM
R196 PCI5 R223
33
3V66_0
11 CLK66_VCH 1 2 CLK66R_VCH 35 16 PCLKR_FWH 1 2 CLKAPIC_CPU 4
3V66_1/VCH PCI4
1

33R3 42 13 33R3
IREF PCI3 R224

1
+VCCT +VCCT +3VRUN 41 12 1 2
VSSIREF PCI2 CLKAPIC_ICH 15
R192
BC698 221R3F 11 33R3
PCI1
1

SC22P 4 R232
R150 R147 R146 VSS
NO STUFF 9 10 1 2 PCLK_SIO 28
10KR3 1KR3 10KR3
2 VSS PCI0
15
VSS 33R3
20 39
VSS 48MUSB
31 R231
VSS
2

36 38 1 2 PCLK_PCM 20
+3VRUN VSS 48MDOT
47
VSS
1

56 22R3
REF
3

2 3 2 Q16 ICS950806 R230


32 RUN_ON
1 2 PCLK_FWH 26
Q17 DTC114TK R198 C-Note 2 use the symbol of
1

MMBT3904-U DUMMY-R3 33R3


MMBT3904 C9827 to replace that of R229
ICS950806. PCLKR_KBC 1 2
5 VTTPWRGOOD PCLK_KBC 27
2

R197
1 2 CLKGEN_PD# 33R3
16 PM_SLP_S1#
R190 R228
0R3-0-U 2 1 PCLKR_MINI 1 2
16 CLK14_ICH PCLK_MINI 22
33R3 33R3
R189 R227
28 CLK14_SIO 2 1 CLK_14M PCLKR_DEBUGBD 1 2 PCLK_DEBUGBD 26
33R3 33R3
R188 R226
6 CRYPT_14M 2 1 PCLKR_1394 1 2 PCLK_1394 21
33R3 33R3
R194
CLK48R_ICH 1 2 CLK48_ICH 16
22R3
R195
CLKDREFR_MCH 1 2 CLKDREF_MCH 7
33R3

CLK GEN. SECOND SOURCE Acer Incorporated


21F, 88, Sec. 1, Hsin Tai Wu Rd.,
Hsichih, Taipei Hsien 221,
ICS : ICS950806 71.95806.00W Taiwan, R.O.C.
CYPRESS : W320-04X 71.00320.00W Title
CLOCK GENERATOR
Size Document Number Rev
A3 C-Note 2 -3
Date: Friday, January 11, 2002 Sheet 3 of 37
U21A +1.5VRUN

7 CG_HA#[31..3] CG_HD#[63..0] 7
CG_HA#3 K1 A16 CG_HD#0
A3# D0#

2
CG_HA#4 J1 B17 CG_HD#1
A4# D1# R480 R481 +VCC_CORE
CG_HA#5 G2 A17 CG_HD#2
A5# D2# 150R3 150R3
CG_HA#6 K3 D23 CG_HD#3
A6# D3#
CG_HA#7 J2 B19 CG_HD#4
A7# D4#
CG_HA#8 H3 C20 CG_HD#5
A8# D5# U21B

1
CG_HA#9 G1 C16 CG_HD#6
A9# D6#
CG_HA#10 A3 A20 CG_HD#7
A10# D7#
CG_HA#11 J3 A22 CG_HD#8 15 CC_PICD0 AD19 D22
A11# D8# R131 PICD0 VCC_0
CG_HA#12 H1 A19 CG_HD#9 15 CC_PICD1 AD17 F22
A12# D9# PICD1 VCC_1
CG_HA#13 D3 A23 CG_HD#10 3 CLKAPIC_CPU 1 2 APICCLK_CPU AF20 E21
A13# D10# PICCLK VCC_2
CG_HA#14 F3 A24 CG_HD#11 H22
A14# D11# VCC_3

1
CG_HA#15 G3 C18 CG_HD#12 26D7R3F AF22 G21
A15# D12# BP2# VCC_4

2
CG_HA#16 C2 D24 CG_HD#13 AE20 K22
A16# D13# R130 R132 BP3# VCC_5
CG_HA#17 B5 B24 CG_HD#14 AD22 J21
A17# D14# 137R3F DUMMY-R3 BPM0# VCC_6
CG_HA#18 B11 A18 CG_HD#15 AD21 M22
A18# D15# BPM1# VCC_7
CG_HA#19 C6 E23 CG_HD#16 L21
A19# D16# VCC_8
CG_HA#20 B9 B21 CG_HD#17 6 ITP_TCK AD10 P22
A20# D17# TCK VCC_9

1 2
CG_HA#21 B7 B23 CG_HD#18 6 ITP_TDI AD7 N21
A21# D18# TDI VCC_10
CG_HA#22 C8 E26 CG_HD#19 6 ITP_TDO AD11 T22
A22# D19# TDO VCC_11
CG_HA#23 A8 C24 CG_HD#20 6 ITP_TMS AF7 R21
A23# D20# BC110 TMS VCC_12
CG_HA#24 A10 F24 CG_HD#21 6 ITP_TRST# AF15 V22
A24# D21# DUMMY-C3 TRST# VCC_13
CG_HA#25 B3 D25 CG_HD#22 6 ITP_PREQ# AF19 U21
A25# D22# PREQ# VCC_14
CG_HA#26 A13 E24 CG_HD#23 6 ITP_PRDY# AE22 Y22
CG_HA#27 A26# D23# PRDY# VCC_15
A9 B25 CG_HD#24 10pF W21
A27# D24# VCC_16

2
CG_HA#28 C3 G24 CG_HD#25 AF12 AB22

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A28# D25# 5 CPU_COMSREF CMOSREF_1 VCC_17
CG_HA#29 C12 H24 CG_HD#26 AD5 AA21
A29# D26# R489 CMOSREF_0 VCC_18
CG_HA#30 C10 F26 CG_HD#27 AC21
A30# D27# VCC_19
CG_HA#31 A6 L24 CG_HD#28 1 2 AE16 D20
A31# D28# RTTIMPEDP VCC_20
A15 H25 CG_HD#29 F20
A32# D29# 56D2R3F VCC_21
A14 C26 CG_HD#30 16 PM_CPUPERF L5 E19
A33# D30# GHI# VCC_22
B13 K24 CG_HD#31 AB20
A34# D31# VCC_23
A12 G26 CG_HD#32 GHI#:internal 5,7 AGTLREF AF21 AA19
A35# D32# VREF_1 VCC_24
7 CG_REQ#[0..4] K25 CG_HD#33 pull up to VCCT AB26 AC19
D33# VREF_2 VCC_25
CG_REQ#0 R1 J24 CG_HD#34 H26 D18
REQ0# D34# VREF_3 VCC_26
CG_REQ#1 L3 K26 CG_HD#35 A21 F18
REQ1# D35# VREF_4 VCC_27
CG_REQ#2
CG_REQ#3
CG_REQ#4
T1
U1
L1
REQ2#
REQ3#
REQ4#
CPU D36#
D37#
D38#
F25
N26
J26
CG_HD#36
CG_HD#37
CG_HD#38
+VCCT

1
R508
2
AF9
A4
N1
VREF_5
VREF_6
VREF_7
VCC_28
VCC_29
VCC_30
E17
AB18
AA17

1
M24 CG_HD#39 Place near CPU +VCC_CORE AA1 AC17
+1.5VRUN D39# R507 1KR3 VREF_8 VCC_31
T4 U26 CG_HD#40 R514 D16
7 CG_ADS# AA3
RP#
ADS# 1/4 D40#
D41#
D42#
P25
L26
CG_HD#41
CG_HD#42 1 2
0R3-0-U Y4
R5
TESTLO
VCC
VCC_32
VCC_33
VCC_34
F16
E15
1

W2 R24 CG_HD#43 L25 AB16


AERR# D43# VCC_35

2
R518 AB3 R26 CG_HD#44 1 2 CPU_PLL1 N3 AA15
AP0# D44# PLL1 VCC_36
1K5R3 P3
AP1# D45#
M25 CG_HD#45 10R3F CPU_PLL2 N2
PLL2
CPU VCC_37
AC15

1
C14 V25 CG_HD#46 R513 IND-4D7UH D14
BERR# D46# TC16 VCC_38
AF23 T24 CG_HD#47 3 CLK_CPU 2 1 P1 F14
BINIT# D47# NC VCC_39
2

CC_IERR# AF4 M26 CG_HD#48 ST33U8VM P5 E13


IERR# D48# NC VCC_40

2
1
R504 P24 CG_HD#49 61D9R3F E1 AB14
+1.5VRUN 1 2 CG_BREQ0# A7
C4
BREQ0#
NC
D49#
D50#
D51#
AA26
T26
CG_HD#50
CG_HD#51
R515
475R3F
F1
NC
NC 2/4 VCC_41
VCC_42
VCC_43
AA13
AC13
10R3 C22 U24 CG_HD#52 CLK_BCLKAC1 D12
NC D52# CLK0 VCC_44
1

AD23 Y25 CG_HD#53 R517 AD1


CLK_BCLK# F12
NC D53# CLK0# VCC_45

2
R520 R2 W26 CG_HD#54 1 2 R506 E11
7 CG_BPRI# BPRI# D54# 3 CLK_CPU# VCC_46
1K5R3 L2 V26 CG_HD#55 2 1 M1 AB12
7 CG_BNR# BNR# D55# 61D9R3F TESTLO VCC_47
7 CG_LOCK# V3 AB25 CG_HD#56 AA11
LOCK# D56# 1KR3 VCC_48
T25 CG_HD#57 R516 AF18 AC11
D57# NC VCC_49
2

15 CC_FERR# 7 CG_HIT# AA2 Y24 CG_HD#58 AD16 D10


HIT# D58# +VCCT NCHCTRLP VCC_50
7 CG_HITM# U2 W24 CG_HD#59 1 2 AF11 F10
HITM# D59# R478 TESTHI VCC_51
7 CG_DEFER# T3 Y26 CG_HD#60 AE8 E9
DEFER# D60# NC VCC_52
AB24 CG_HD#61 1 2 AB10
+1.5VRUN D61# 10R3F VCC_53
7 CG_RS#0 Y3 AA24 CG_HD#62 AA9
RS0# D62# 14R3F VCC_54
7 CG_RS#1 V1 V24 CG_HD#63 N24 AC9
RS1# D63# NC VCC_55
7 CG_RS#2 U3 D8
RS2# VCC_56
1

+1.8VRUN M5 AE24 R490 AE10 F8


R519 RSP# DEP0# NC VCC_57
7 CG_TRDY# W1 AD25 1 2 E2 E7
3KR3 TRDY# DEP1# TESTHI VCC_58
AE25 AB8
DEP2# VCC_59
1

AC3 AC24 1KR3 P4 AA7


15 CC_A20M# A20M# DEP3# NC VCC_61
R512 CC_FERR# AF6 AF24 R505 AC7
FERR# DEP4# VCC_62
2

1K5R3 CC_FLUSH# AF5 AD26 1 2 AB6 D6


FLUSH# DEP5# VCC_76 VCC_63
15 CC_IGNNE# AD9 AC26 AA5 F6
IGNNE# DEP6# 1KR3 VCC_77 VCC_64
15 CC_SMI# AD3 AD24 AC5 E5
SMI# DEP7# VCC_78 VCC_65
2

CC_CPUPWRGD AB4 M6 H6
15 CC_CPUPWRGD PWRGOOD VCC_79 VCC_66
W3 CG_DBSY# 7 P6 G5
+VCCT DBSY# +VCC_CORE VCC_80 VCC_67
Y1 CG_DRDY# 7 W5 K6
DRDY# VCC_75 VCC_68
15 CC_STPCLK# AE4 Y6 J5
STPCLK# VCC_74 VCC_69
15 CC_DPSLP# AF8 AF13 THERMDP 6 U5 N5
DPSLP# THERMDA VCC_73 VCC_70
1

AF14 THERMDN 6 V6 T6
R488 THERMDC VCC_72 VCC_71
AD15
56D2R3F 15 CC_INTR INTR/LINT0
AE14 AE12 H_BSEL0 3
15 CC_NMI NMI/LINT1 SELFSB0
AF10 H_BSEL1 3 BGA479-SKT-2-U
R487 SELFSB1
15 CC_INIT# AE6
INIT#
2

7 CG_CPURST# 1 2 CPU_RST# B15 AF16


RESET# EDGECTRLP
0R3-0-U
1

BGA479-SKT-2-U R495
Layout note: 110R3F
Place CPU_RST# Resistor < 0.1" from CPU
2

P/N update to 62.10053.061 (BGA479-SKT-2-U) Acer Incorporated


7/12 21F, 88, Sec. 1, Hsin Tai Wu Rd.,
CPU SOCKET SECOND SOURCE Hsichih, Taipei Hsien 221,
Taiwan, R.O.C.
AMP : 62.10053.061 Title
FOXCONN: 62.10055.011 CPU
Size Document Number Rev
A3 C-Note 2 -3
Date: Friday, January 11, 2002 Sheet 4 of 37
U21C +VCCT
U21D
E16 F19
VSS_0 VSS_142
R4 E20
VSS_1 VSS_141
E25 C25 A26 AD4
VSS_2 VSS_140 VCCT_1 NC_1
G25 A25 G23 A5
VSS_3 VSS_139 VCCT_2 NC_2
J25 AE1 J23 D1
VSS_4 VSS_138 BC547 BC565 BC570 BC574 BC517 VCCT_3 NC_3
L25 AD2 L23 AD13
VSS_5 VSS_137 SCD1U10V2MXSCD1U10V2MXSCD1U10V2MXSCD1U10V2MXSCD1U10V2MX VCCT_4 NC_4
N25 AB2 N23 B1
VSS_6 VSS_136 VCCT_5 NC_5
R25 Y2 R23 P26
VSS_7 VSS_135 VCCT_6 NC_6
U25 V2 U23 A11
VSS_8 VSS_134 VCCT_7 NC_7 +VCCT
W25 T2 W23 A2
VSS_9 VSS_133 VCCT_8 NC
AA25 P2 AA23
VSS_10 VSS_132 VCCT_9
AC25 M2 C21 AE18
VSS_11 VSS_131 VCCT_10 VCCT_36
AF25 K2 C19
VSS_12 VSS_130 VCCT_11
AE26 H2 AD20
VSS_13 VSS_129 BC513 BC525 BC531 BC521 BC578 VCCT_12
C23 F2 C17
VSS_14 VSS_128 SCD1U10V2MXSCD1U10V2MXSCD1U10V2MXSCD1U10V2MXSCD1U10V2MX AD18 VCCT_13
F23 D2 AB1 CPU_VID0 31
VSS_15 VSS_127 VCCT_14 VID0
H23
K23
M23
P23
VSS_16
VSS_17
VSS_18
VSS_126
VSS_125
VSS_124
B2
W4
U4
M3
GTLREF( 2/3 +VCCT) C15
C13
AD14
C11
VCCT_15
VCCT_16
VCCT_17
CPU VID1
VID2
VID3
AC2
AE2
AF3
R3
CPU_VID1
CPU_VID2
CPU_VID3
31
31
31
VSS_19 VSS_123 VCCT_18 VID4 CPU_VID4 31
T23 K4 +VCCT AD12
V23
Y23
VSS_20
VSS_21
VSS_22
VSS_122
VSS_121
VSS_120
H4
F4
C9
C7
VCCT_19
VCCT_20
VCCT_21
4/4
AB23 D4 AD8 B26
VSS_23 VSS_119 VCCT_22 VSS
AE23 B4 C5 M4
VSS_24 VSS_118 VCCT_23 VSS

1
B22 AE5 AD6 AF26
VSS_25 VSS_117 R125 VCCT_24 VSS
D21 AC6 Place resistors AC23
VSS_26 VSS_116 1KR3F VCCT_25
F21 AA6 AA4
VSS_27 VSS_115 between GMCH VCCT_26
E22 AB5 E4
VSS_28 VSS_114 VCCT_27
H21 W6 and CPU G4 E3 VTTPWRGOOD 3
VSS_29 VSS_113 VCCT_28 VTTPWRGOOD

2
G22 Y5 J4
VSS_30 VSS_112 VCCT_29
K21 U6 L4
VSS_31 VSS_111 VCCT_30
J22 V5 4,7 AGTLREF AC4 D26
VSS_32 VSS_110 VCCT_31 NC +VCCT
M21 R6 V4
VSS_33 VSS_109 VCCT_32
L22 T5 AE3
VSS_34 VSS_108 VCCT_33
P21 L6 AF2 D5
VSS_35 VSS_107 VCCT_34 VCCT_37
CPU

1
N22 N6 AF1 E6

www.kythuatvitinh.com
VSS_36 VSS_106 R126 BC590 BC589 BC107 BC512 VCCT_35 VCCT_38
T21 J6
VSS_37 VSS_105 2KR3F SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX
R22 K5
VSS_38 VSS_104
V21 G6
U22
VSS_39
VSS_40 3/4 VSS_103
VSS_102
H5 BGA479-SKT-2-U

2
Y21 F5
VSS_41 VSS_101
W22 B6
VSS_42 VSS_100
AB21 AE7
VSS_43 VSS_99
AA22 AC8 Place caps near CPU
VSS_44 VSS_98
AC22 AA8
VSS_45 VSS_97
AE21 AB7
B20
VSS_46
VSS_47
VSS_96
VSS_95
E8 CMOSREF
D19 F7
VSS_48 VSS_94 +VCC_CORE
AB19 D7
VSS_49 VSS_93
AA20 B8
VSS_50 VSS_92
AC20 AE9
VSS_51 VSS_91
AE19 AC10
VSS_52 VSS_90 +1.5VRUN
B18 AA10
VSS_53 VSS_89 BC552 BC549 BC554 BC112 BC519 BC526 BC551 BC550 BC555 BC553 BC707 BC708 BC709
D17 AB9
VSS_54 VSS_88 SC10U6D3V5MX SC10U6D3V5MX SC10U6D3V5MX SC10U10V-U SC10U6D3V5MX SC10U6D3V5MX SC10U6D3V5MX SC10U6D3V5MX SC10U6D3V5MX SC10U6D3V5MX SC10U6D3V5MX SC10U6D3V5MX SC10U6D3V5MX
F17 E10
VSS_55 VSS_87

1
E18 F9
VSS_56 VSS_86 R491
AB17 D9
VSS_57 VSS_85 510R3-1
AA18 B10 NO STUFF
VSS_58 VSS_84
AC18 AE11 Almador checklist v0.93
VSS_59 VSS_83
AE17 AC12
VSS_60 VSS_82 9/08

2
B16 AA12 +VCC_CORE
VSS_61 VSS_81
D15 AB11
VSS_62 VSS_80
F15 E12
VSS_63 VSS_79 4 CPU_COMSREF
AB15 F11
VSS_64 VSS_78
AA16 D11
VSS_65 VSS_77 BC556 BC566 BC577 BC530 BC515 BC514 BC548 BC520 BC522 BC524
AC16 B12
VSS_66 VSS_76

1
AE15 AE13 SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX
VSS_67 VSS_75 R137 BC558 BC579
B14 AC14
VSS_68 VSS_74 1KR3F SCD1U10V2MX SCD1U10V2MX
D13 AA14
VSS_69 VSS_73
F13 AB13
VSS_70 VSS_72
E14
VSS_71

2
+VCC_CORE
C1
NC
AF17 N4
NC NC
Place caps near CPU
BGA479-SKT-2-U BC518 BC576 BC528 BC529 BC523 BC567 BC527 BC516 BC572 BC571
SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX

+VCC_CORE

BC568 BC575 BC573 BC569


SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX

Decouping Recommendation C-Note 2 Kenora Ver 0.93


Underneath balls 0.22uF * 24 Use 2-3 vias per pad for reduced 0.1uF * 24 0.47uF * 24
on solder side inductance during layout
VCC_CORE
On the peripheral 10uF / 6.3V * 10 Placement should be near 10uF / 10V * 10 10uF / 6.3V * 10 + 6 * NS
near balls processor for all

Bulk Caps 220uF / 2.5V * 7 150uF / 4V * 12 + 2 * NS


Acer Incorporated
21F, 88, Sec. 1, Hsin Tai Wu Rd.,
Hsichih, Taipei Hsien 221,
Place close to 1uF * 10 Use 2 vias per pad for reduced 0.1uF * 10 1uF * 10 + 2 * NS Taiwan, R.O.C.
processor for all inductance during layout Title
VCCT
Bulk Caps 220uF / 2.5V * 2 150uF / 4V * 5 + 1 * NS CPU CONFIGURATION
Size Document Number Rev
Custom
C-Note 2 -3
Almador-M Checklist Ver. 0.93 9/08
Date: Friday, January 11, 2002 Sheet 5 of 37
+3VRUN
THERMAL SENSOR & FAN CONTROLLER

1
+5VRUN FAN1_VCC R641 R720 R721
10KR3 1 2 1 2 +3VRUN
*Layout* 15 mil 10K5R3F 20KR3D

2
2

1
D +3VRUN
BC507 BC489 BC488 D27 1 Q81 R722
27 TH_CHANGE

3
SCD1U SCD1U SC10U10V6ZY-U S1N4148 G 2N7002
Q59 S U77 0R3-0-U

2
DTC124EUA-U NO STUFF

2
U20 1 6
4 THERMDP from SOVP SET VCC
22 K 2 5
GND OUTSET
1 16 THRM_SHUT 2 3 4
BC508 OUT1 OUT2 OUT# HYST
2 15
SC2K2P VCC VCC
THERMDP 3 14 KBC_SCL 27
DXP1 SMBCLK

1
THERMDN 4 13 R461 0R3-0-U CN10 MAX6510HAUT-T
4 THERMDN DXN FG2
THERMDP2 5 12 1 2 FAN1_VCC_1 22 K R723
DXP2 SMBDATA KBC_SDA 27 1
G768_PWRGD 6 11
RESET# ALERT# FAN1_FG 2 0R3-0-U
7 10 1 2
GND FG1 3

1
2

1
8 9 G768_32K 17 NO STUFF HW thermal shutdown
GND CLK

2
1
1 Q41 BC509 R536 R464 0R3-0-U CON3-4
MMBT3904 SC2K2P 100KR3 temperature setting = 75 degree
G768B BC103
3

DUMMY-C3 +3VRUN
2

MMBT3904-U

2
+5VRUN U33A

14

1
R463 TSLCX125
1 2 THRM# 16

1
G768_PWRGD 1 2 2 3 HW_SHUT 16,33
0R3-0-U

1
R719 R652 0R3-0-U

www.kythuatvitinh.com
DUMMY-R3 R389

7
10KR3
16 SW_THER_EN# 1 2

2
FAN1_FG R653 0R3-0-U
NO STUFF

Cover Switch VCC_RTC VCC_RTC


Crypto Card CONN
+3VSUS

1
R172

1
+3VSUS +3VSUS 22KR3
R363 BC134 BC135
U1A U1B 10KR3 +3VRUN CN13 SCD1U SCD1U
14

14

2
TSAHC14 TSAHC14
R364 CN5 12
14,27 COVERUP 2 1 COVERUP# 4 3 COVERUP_3 1 2 2 COVER+
1
9 10
10KR3 2
3 CRYPT_14M 7 8 DM2_SDATA 10,14,27
BC347 CON2-10 5 6 DM2_SCLK 10,14,27
7

SCD1U 3 4
15 INTRUDER# PCIRST# 15
1 2

11

HRS-CONN10D-1

+VCCT
+1.5VRUN

+1.5VRUN
+3VSUS
1

+3VSUS BC443 R448 R499 +VCCT R184


SCD1U 56D2R3F 39R3 2 1
1

1
R537 61D9R3F R185
2

240R3 R479 R493 R498 1 2 TP6


BC604 R449 200R3 150R3 200R3 TPAD30

1
SCD1U 1 2 TP10 33R3F
7 CG_CPURST# 3 CLK_ITP
2

TPAD30 R187
2

1
240R3 TP20 475R3F
ITP_TDI 4
U73 TPAD30 R129
3 CLK_ITP#
5 1 ITP_DBREST# TP21 56D2R3F BC109 R186
VCC A

2
2 G768_PWRGD TPAD30 TP17 SCD1U 1 2 TP7
B ITP_TDO 4
4 3 TPAD30 R183 TPAD30
14,16,27 DRUNPWROK Y GND

2
1 2 33R3F
NC7SZ08 TP16 TP18
4 ITP_TCK ITP_TRST# 4
TPAD30 TPAD30 61D9R3F

TP15 per Intel NO STUFF


ITP_PREQ# 4
TP19 TPAD30
4 ITP_TMS
TPAD30 R128
1

TP1 1 2 ITP_PRDY# 4
R492 TPAD30
39R3 240R3
1

R494
2

1K5R3
Acer Incorporated
21F,88,Sec. 1,Hsin Tai Wu Rd.
2

1.5K pull down if ITP/TAP unused Hsichih,Taipei Hsien 221.


Taiwan ,R.O.C.
Almador checklist v0.93 9/08
Title
ITP/Thermal/Fan Control/RFID
Size Document Number Rev
PULLUP RESISTOR<1"FROM ITP PORT PINS A3
C-Note 2 -3
Date: Friday, January 11, 2002 Sheet 6 of 37
RN30 RS2N100J1-U
M_RMA[0..12] 10 M_MA2 2 3 M_RMA2
M_MA3 1 4 M_RMA3
U18A U18B
4 CG_HD#[0..63] CG_HA#[3..31] 4 10 M_MD[0..63] RN6 RS2N100J1-U
CG_HD#0 U4 H2 CG_HA#3 M_MD0 D29 A20 M_MA0 M_MA0 2 3 M_RMA0
HD0# HA3# M_MD1 SM_MD0 SM_MA0
CG_HD#1 P1 E3 CG_HA#4 C29 B20 M_MA1 M_MA1 1 4 M_RMA1
HD1# HA4# M_MD2 SM_MD1 SM_MA1
CG_HD#2 W6 G3 CG_HA#5 D27 B19 M_MA2
HD2# HA5# M_MD3 SM_MD2 SM_MA2
CG_HD#3 U2 N4 CG_HA#6 C27 C19 M_MA3 RN32 RS2N100J1-U
HD3# HA6# M_MD4 SM_MD3 SM_MA3
CG_HD#4 U6 M6 CG_HA#7 A27 A18 M_MA4 M_MA6 2 3 M_RMA6
HD4# HA7# M_MD5 SM_MD4 SM_MA4
CG_HD#5 R1 F1 CG_HA#8 B26 A19 M_MA5 M_MA4 1 4 M_RMA4
HD5# HA8# M_MD6 SM_MD5 SM_MA5
CG_HD#6 N3 F2 CG_HA#9 E24 C17 M_MA6
HD6# HA9# M_MD7 SM_MD6 SM_MA6
CG_HD#7 W5 J3 CG_HA#10 C25 C18 M_MA7 RN31 RS2N100J1-U
HD7# HA10# M_MD8 SM_MD7 SM_MA7
CG_HD#8 V4 F3 CG_HA#11 E23 B17 M_MA8 M_MA7 2 3 M_RMA7
HD8# HA11# M_MD9 SM_MD8 SM_MA8
CG_HD#9 P3 P6 CG_HA#12 B25 A17 M_MA9 M_MA5 1 4 M_RMA5
HD9# HA12# M_MD10 SM_MD9 SM_MA9
CG_HD#10 R3 G1 CG_HA#13 C23 A16 M_MA10
HD10# HA13# M_MD11 SM_MD10 SM_MA10
CG_HD#11 U1 N5 CG_HA#14 F22 C15 M_MA11 RN34 RS2N100J1-U
HD11# HA14# M_MD12 SM_MD11 SM_MA11
CG_HD#12 V6 H1 CG_HA#15 B23 C14 M_MA12 M_MA11 2 3 M_RMA11
HD12# HA15# M_MD13 SM_MD12 SM_MA12
CG_HD#13 W4 P4 CG_HA#16 C22 M_MA10 1 4 M_RMA10
HD13# HA16# M_MD14 SM_MD13
CG_HD#14 T3 T4 CG_HA#17 E21
HD14# HA17# M_MD15 SM_MD14
CG_HD#15 P2 M2 CG_HA#18 B22 RN33 RS2N100J1-U
HD15# HA18# M_MD16 SM_MD15
CG_HD#16 V3 J2 CG_HA#19 C12 M_MA8 2 3 M_RMA8
HD16# HA19# M_MD17 SM_MD16
CG_HD#17 R2 L2 CG_HA#20 D10 M_MA9 1 4 M_RMA9
HD17# HA20# M_MD18 SM_MD17
CG_HD#18 T1 R4 CG_HA#21 C11
HD18# HA21# M_MD19 SM_MD18 R476
CG_HD#19 W3 K1 CG_HA#22 A10
HD19# HA22# M_MD20 SM_MD19
CG_HD#20 U3 L3 CG_HA#23 C10 B13 M_MA12 1 2 M_RMA12
HD20# HA23# M_MD21 SM_MD20 VSS

SDRAM SYSTEM MEMORY


CG_HD#21 Y4 L1 CG_HA#24 C8 E14
HD21# HA24# M_MD22 SM_MD21 VSS 10R3
CG_HD#22 AA3 J1 CG_HA#25 A7 C3
HD22# HA25# SM_MD22 VSS

HOST
CG_HD#23 W1 N1 CG_HA#26 M_MD23 E9 A14
HD23# HA26# CG_HA#27 M_MD24 SM_MD23 VSS
CG_HD#24 V1 T5 C7
HD24# HA27# M_MD25 SM_MD24 R465 1
CG_HD#25 Y1 H3 CG_HA#28 E8 B16 M_BA0 2 10R3 M_RBA0 10
HD25# HA28# M_MD26 SM_MD25 SM_BA0 R475 1
AGP_REF used as CG_HD#26 Y6 M3 CG_HA#29 A5 C16 M_BA1 2 10R3 M_RBA1 10
HD26# HA29# M_MD27 SM_MD26 SM_BA1
DVO_REF for DVO device CG_HD#27 AD3 M1 CG_HA#30 F8
HD27# HA30# M_MD28 SM_MD27
CG_HD#28 AB4 K3 CG_HA#31 C5

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HD28# HA31# SM_MD28 M_DQM[0..7] 10
CG_HD#29 AB5 M_MD29 D6 F18 M_DQM0
HD29# M_MD30 SM_MD29 SM_DQM0 M_DQM1
CG_HD#30 V2 R6 CG_CPURST# CG_CPURST# 4,6 B4 D18
HD30# CPURST# SM_MD30 SM_DQM1 M_DQM2
CG_HD#31 Y3 C1 CG_ADS# CG_ADS# 4 M_MD31 C4 D13
HD31# ADS# SM_MD31 SM_DQM2 M_DQM3
CG_HD#32 Y2 E1 CG_BNR# CG_BNR# 4 M_MD32 E27 D12
HD32# BNR# SM_MD32 SM_DQM3 M_DQM4
CG_HD#33 AA4 L4 CG_BPRI# CG_BPRI# 4 M_MD33 C28 E18
+1.5VRUN HD33# BPRI# SM_MD33 SM_DQM4 M_DQM5
CG_HD#34 AA1 G5 CG_DBSY# CG_DBSY# 4 M_MD34 B28 F17
HD34# DBSY# SM_MD34 SM_DQM5 M_DQM6
CG_HD#35 AA6 J4 CG_DEFER# CG_DEFER# 4 M_MD35 E26 F14
HD35# DEFER# SM_MD35 SM_DQM6 M_DQM7
CG_HD#36 AB1 F4 CG_DRDY# CG_DRDY# 4 M_MD36 C26 F13
HD36# DRDY# SM_MD36 SM_DQM7
CG_HD#37 AC4 D3 CG_HIT# CG_HIT# 4 M_MD37 D25 M_CS#[0..3] 10
HD37# HIT# SM_MD37
CG_HD#38 AA2 D1 CG_HITM# CG_HITM# 4 M_MD38 A26 E17 M_CS#0
BC510 HD38# HITM# SM_MD38 SM_CS0#
CG_HD#39 AB3 J6 CG_LOCK# CG_LOCK# 4 M_MD39 D24 F16 M_CS#1
SC470P50V3JN HD39# HLOCK# SM_MD39 SM_CS1#
CG_HD#40 AD2 G4 CG_TRDY# CG_TRDY# 4 M_MD40 F23 D16 M_CS#2
HD40# HTRDY# SM_MD40 SM_CS2#
CG_HD#41 AD1 M_MD41 A25 D15 M_CS#3
HD41# SM_MD41 SM_CS3#
1

CG_HD#42 AC2 CG_REQ#[0..4] 4 M_MD42 G22


R471 R474 HD42# SM_MD42
CG_HD#43 AB6 K6 CG_REQ#0 M_MD43 D22
1KR3F 82R3F HD43# HREQ0# SM_MD43
CG_HD#44 AC6 M4 CG_REQ#1 M_MD44 A23
HD44# HREQ1# SM_MD44 R120 10R3
CG_HD#45 AC1 K5 CG_REQ#2 M_MD45 F21 A15 CLKSDRAM0 1 2 CLK_SDRAM0 10
HD45# HREQ2# SM_MD45 SM_CLK0 R123 10R3
CG_HD#46 AF3 K4 CG_REQ#3 M_MD46 D21 B2 CLKSDRAM1 1 2 CLK_SDRAM1 10
HD46# HREQ3# SM_MD46 SM_CLK1
2

AGP_REF CG_HD#47 AD4 L6 CG_REQ#4 M_MD47 A22 B14 CLKSDRAM2 R121 1 2 10R3
HD47# HREQ4# SM_MD47 SM_CLK2 CLK_SDRAM2 10
CG_HD#48 AD6 M_MD48 F11 A3 CLKSDRAM3 R122 1 2 10R3
HD48# SM_MD48 SM_CLK3 CLK_SDRAM3 10
1

CG_HD#49 AC3 M_MD49 A11


R473 R472 HD49# SM_MD49
CG_HD#50 AH3 H6 CG_RS#0 CG_RS#0 4 M_MD50 B11
1KR3F 82R3F BC459 HD50# RS0# SM_MD50
CG_HD#51 AE5 H4 CG_RS#1 CG_RS#1 4 M_MD51 F10 M_CKE[0..3] 10
SCD1U10V2MX HD51# RS1# SM_MD51 M_CKE0
CG_HD#52 AE3 G6 CG_RS#2 CG_RS#2 4 M_MD52 B10 A13
HD52# RS2# SM_MD52 SM_CKE0 M_CKE1
CG_HD#53 AG2 M_MD53 B8 C9
HD53# SM_MD53 SM_CKE1
2

CG_HD#54 AF4 M_MD54 D9 C13 M_CKE2


HD54# HL_[0..10] 15 SM_MD54 SM_CKE2
CG_HD#55 AF2 G26 HL_0 M_MD55 B7 A9 M_CKE3
BC511 HD55# HL0 SM_MD55 SM_CKE3
CG_HD#56 AJ3 H28 HL_1 M_MD56 F9
SC470P50V3JN HD56# HL1 SM_MD56
CG_HD#57 AE4 H29 HL_2 Per Intel Request M_MD57 A6
HD57# HL2 SM_MD57
CG_HD#58 AG1 H27 HL_3 M_MD58 C6
HD58# HL3 SM_MD58 R118 1
CG_HD#59 AE1 F29 HL_4 01/15 M_MD59 D7 C20 M_SRAS# 2 10R3 M_RRAS# 10
HD59# HL4 HL_5 SM_MD59 SM_RAS# R119 1
CG_HD#60 AG4 F27 M_MD60 B5 D19 M_SCAS# 2 10R3 M_RCAS# 10
HD60# HL5 TP14 SM_MD60 SM_CAS# R117 1
CG_HD#61 AH4 E29 HL_6 M_MD61 E6 A21 M_BMWE# 2 10R3 M_RBMWE# 10
HD61# HL6 TPAD30 SM_MD61 SM_WE#
CG_HD#62 AG3 E28 HL_7 M_MD62 A4
HD62# HL7 TP13 SM_MD62
CG_HD#63 AF1 G25 HL_8 M_MD63 D4 A24 SM_ORCLK
HD63# HL8 TPAD30 SM_MD63 SM_OCLK
G27 HL_9 C24
HL9 TP12 SM_RCLK
H26 HL_10 GMCH_E11 E11
R442 1 HL10 NC
2 54D9R3F DVO_RCOMP AC22 G29 HL_STB HL_STB 15
TPAD30 GMCH_F12 F12 E5
R453 1 DVOBC_RCOMP HLSTRB NC SM_REFA
2 27D4R3F SM_RCOMP F6 F28 HL_STB# HL_STB# 15
TP11 GMCH_E20 E20 F24 SMREF 9
R451 1 SM_RCOMP HLSTRB# NC SM_REFB
2 54D9R3F HUB_RCOMP J23 H24 HUBREF HUBREF 9,15
TPAD30 GMCH_F20 F20
HL_RCOMP HLREF NC BC105
AGP_REF J25
R450 1 AGPREF
2 54D9R3F AGP_RCOMP K24 R44 SC22P
AGP_RCOMP GRAPH-U1
15 PCIRST#_3 AB24 AJ4 CLK_HT 1 2
RESET# HTCLK
AA7 AH5 CLK_HT# NO STUFF
GTL_REFA HTCLK# 33R3F
4,5 AGTLREF J7
GTL_REFB R46
AC19 BC469 1 2
DCLKREF CLK_MCH 3
AG26 SCD01U50V3KX Route 0.15"+/-50mil trace
GBIN

1
C2 AD24 61D9R3F
GTL_RCOMP GBOUT R45 Almador-M A3 stepping Design Guideline Update
BC557 BC477 BC445 AB23 475R3F
SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX VSS
AC23 12/26/00
VSS R84

2
NO STUFF 1 2 CLK_MCH# 3
1

GRAPH-U1
R124 61D9R3F
80D6R3F R83
1 2
CLKDREF_MCH 3
2

33R3F
CLKGBIN_MCH 3
Place near GMCH
1

Part Number Change to 71.0GMCH.M09


1

BC440 R440 R38 R445


1 2 10R3 10R3 R37
3 CLKGBOUT_MCH 240KR3
SCD01U50V3KX 47R3
2

Acer Incorporated
2

21F, 88, Sec. 1, Hsin Tai Wu Rd.,


SM_RCOMP = 1/2 PCB impedance BC47 BC442 NO STUFF Hsichih, Taipei Hsien 221,
SC10P SC10P Taiwan, R.O.C.
DVO_RCOMP = PCB impedance Almador checklist v0.93 9/08
Title
HUB_RCOMP = PCB impedance
AGP_RCOMP = PCB impedance
NO STUFF GMCH(1/3)
Size Document Number Rev
Almador checklist A3
C-Note 2 -3
Date: Friday, January 11, 2002 Sheet 7 of 37
DVOA_CLK# (AG24) --> DVO_CLKIN1 (N8) DVOA_D5 0 = DESKTOP
Pull-up 8.2K to 1.5VRUN AGP device attached DVOA_CLK (AJ24) --> DVO_CLKIN0 (M8) Pull-up 2.2K to V1.5S
AGP_PAR Int. P/D 1 = MOBILE
Almador EDS Rev 0.9 Apr.7
Pull-down 2.2K to GND DVO device attached
DVOA_D6 0 = Dual ended term.
Pull-up 2.2K to V1.5S
Strapping Option for SW detection of AGP or DVO device Int. P/D 1 = Single ended term.
+1.5VRUN
DVOA_D0 0 = 200MHz
Pull-down 2.2K to GND

1
U18D U18C Int. P/U 1 = 133MHz
R443
AD8 M12 AA29 AE29 100KR3
VSS VSS SBA0 VSYNC DAC_VSYNC 13
AD9 M13 AA24 AD28 DAC_HSYNC 13 DVOA_D1 0 : IOQD = 1
VSS VSS SBA1 HSYNC
AD10 M17 AA25 AF28 DAC_RED# 13 Pull-down 2.2K to GND
VSS VSS SBA2 RED#

2
AJ21 M18 Y24 AG28 DAC_GREEN# 13 Int. P/U 1 : IOQD = 8
VSS VSS SBA3 GREEN#
AE8 N12 Y27 AH27 DAC_BLUE# 13 Be close to pin
VSS VSS SBA4 BLUE#
AE9 N13 Y26 AF29 DAC_RED 13,30 RDDP 1.0
VSS VSS SBA5 RED
AE10 N14 W24 AG29 DAC_GREEN 13,30
VSS VSS SBA6 GREEN
AE11 N15 Add pull-ups to +1.5VRUN on Y28 AH28 DAC_BLUE 13,30 DVOA_D7 0 : Normal mode
VSS VSS SBA7 BLUE
AE12 N16 AE27 CLK_DDC1 13
VSS VSS G_FRAME#, G_IRDY#, DDC1_CLK R81
AE13 N17 AB26 CRT AD27 DAT_DDC1 13 Int. P/D 1 : Invoking the XOR Chain test mode
VSS VSS PIPE# DDC1_DATA
AE17 N18 G_TRDY#, G_DEVSEL# AB29 AJ27 2 1
VSS VSS WBF# REFSET
AE19 P13 AB25
VSS VSS in SVT planar RBF# 255R3F
AH21 P14 AD20 DVOA_D8 0 : Normal mode
VSS VSS DVOA_CLKINT
AF8 P15 AC28 AD21 DVO_BLANK# 11
VSS VSS ST0 DVOA_BLANK#
AF9 P16 Almador checklist v0.93 9/08 AC29 AF23 DVO_VSYNC 11 Int. P/D 1 : Tri-stating all GMCH outputs when ICH3-M is
VSS VSS ST1 DVOA_VSYNC R727 0R3-0-U
AF10 P17 AB27 AF22

AGP,GPIO,DISPLAY,LOCAL MEMORY
VSS VSS ST2 DVOA_HSYNC DVO_HSYNC 11 in XOR Chain mode.
AF11 R13 AD25 1 2 IO_I2C_CLK 11
VSS VSS I2C_CLK
AF12 R14 L29 GMBUSI2C_DATA AC25 1 2 IO_I2C_DATA 11 Per Intel GMCH EDS Rev0.7 12/22/2K
VSS VSS +1.5VRUN AD_STB0
AF13 R15 L28 AG24 DVO_CLK# 11
VSS VSS AD_STB0# DVOA_CLK# R728 0R3-0-U
AF14 R16 U29 AJ24

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VSS VSS 12 TV_CLK AD_STB1 DVOA_CLK DVO_CLK 11
AF15 R17 RN67 U28 +1.5VRUN
VSS VSS 12 TV_CLK# AD_STB1# DVO_D[0..11] 11
AF16 T13 2 3 AA27 AJ22 DVO_D0
VSS VSS SB_STB DVOA_D0
AF17 T14 1 4 AA28 AH22 DVO_D1
VSS VSS SB_STB# DVOA_D1 DVO_D0 R413 1
AF18 T15 R29 AG22 DVO_D2 4.7K RDDP1.0 P.72 2 2K2R3 DVO_D5 R412 1 2 2K2R3
VSS VSS G_FRAME# DVOA_D2
AF19 T16 RS2N472J1-U P26 AJ23 DVO_D3
VSS VSS G_IRDY# DVOA_D3 +3VRUN +1.5VRUN
AF20 T17 RN68 P27 AH23 DVO_D4 NO STUFF
VSS VSS G_TRDY# DVOA_D4
AG7 U12 2 3 N25 AG23 DVO_D5
VSS VSS G_STOP# DVOA_D5 R414 1
AG15 U13 1 4 R28 AE23 DVO_D6 DVO_D1 2 2K2R3 DVO_D6 R416 1 2 2K2R3
VSS VSS G_DEVSEL# DVOA_D6
AG16 U14 AC27 AE24 DVO_D7
VSS VSS G_REQ# DVOA_D7

1
AG21 U15 RS2N472J1-U AD29 AJ25 DVO_D8 NO STUFF NO STUFF
VSS VSS G_GNT# DVOA_D8 R82 R80 R39
AH6 U16 AGP_PAR P28 AH25 DVO_D9
VSS VSS G_PAR DVOA_D9 10KR3 10KR3 100KR3 R415 1
AH8 U17 AG25 DVO_D10 DVO_D7 2 2K2R3
VSS VSS DVOA_D10
1

AH9 U18 L27 AJ26 DVO_D11


VSS VSS R91 G_C/BE0# DVOA_D11
AH11 V12 P29 DVI NO STUFF
VSS VSS G_C/BE1#

2
AH12 V13 330R3 R27 AD26
VSS VSS G_C/BE2# DDC2_DATA TV_I2C_DATA 12
AH14 V17 TV_D5 T25 AE26 DVO_D8 R411 1 2 2K2R3
VSS VSS G_C/BE3# DDC2_CLK TV_I2C_CLK 12
AH17 V18 AE21 DVO_INTR#
VSS VSS DVOA_INTR#
2

AH18 J29 AE22 NO STUFF


VSS G_AD0 DVOA_FLD/STL R41
B3 J28
VSS +1.5VRUN G_AD1
B6 K26 AG17 1 2 DVO_STALL 11
VSS G_AD2 DQ_A0
B9 AJ5 K25 AJ17
VSS VSS G_AD3 DQ_A1

1
B12 D2 RN5 L26 AG18 15R3F
VSS VSS G_AD4 DQ_A2 R40
B15 AC5 2 3 J27 AJ18
VSS VSS G_AD5 DQ_A3 75R3F
B18 Y5 1 4 K29 AG19 9/13 per Intel DVO_INTR# Pull-up 100K to 1.5VRUN
VSS VSS G_AD6 DQ_A4
B21 U5 K27 AJ19
VSS VSS RS2N822J1-U G_AD7 DQ_A5
B24 P5 M29 AG20 DVO port of GMCH is Pull-up/down required
VSS VSS G_AD8 DQ_A6

2
B27 L5 M28 AJ20 +1.5V Power plane DVO_FIELD Pull-down 100K to GND if DVOA not
VSS VSS G_AD9 DQ_A7
E7 H5 L24
VSS VSS G_AD10 implemented.
E10 AH2 M27 AJ11
VSS VSS G_AD11 DQ_B0
E13 AE2 N29 AH10 DVO port of VCH is DVO_CLKIN Pull-up 100K to 1.5VRUN
VSS VSS G_AD12 DQ_B1
E16 AB2 12 TV_POUT M25 AJ10 +1.8V Power plane
VSS VSS AGP_AD14 G_AD13DVOBC_CLKINT# DQ_B2
E19 W2 N26 AG10
VSS VSS G_AD14DVOB_FLD/STL DQ_B3
E22 T2 AGP_AD15 N27 AJ9
VSS VSS G_AD15 DQ_B4
1

E25 N2 12 TV_VSYNC R25 AG9 DDC1CLK Pull-up 2.2K to +5VRUN


VSS VSS R439 G_AD16 DQ_B5
G9 K2 12 TV_HSYNC R24 AJ8 DDC1DAT
VSS VSS 4K7R3 G_AD17 DQ_B6
G21 G2 T29 AG8
VSS VSS G_AD18 DQ_B7
E4 AC7 TV_D0 T27 Non-5V tolerant,
VSS VSS G_AD19
12 TV_D[0..11] TV_D1 T26 AH7 DDC2CLK Pull-up 10K to +5VRUN Q-Switch required for
G_AD20 CMD
2

TV_D2 U27 AF7 DDC2DAT


G_AD21 SCK 5V support
AH19 TV_D3 V27 AJ7
VSS +3VRUN G_AD22 SIO
AH20 TV_D4 V28
VSS G_AD23
AF5 TV_D7 U26 AG11 I2CCLK Pull-up 10K to +3VRUN
VSS G_AD24 RQ0
C21 TV_D6 V29 AJ12 I2CDATA
VSS G_AD25 RQ1
1

F19 TV_D9 W29 AG12


VSS R441 G_AD26 RQ2
D28 G28 TV_D8 V25 AH13
VSS VSS 10KR3 TV_D11 W26 G_AD27 RQ3 +1.8VRUN
K28 H25 AG13
VSS VSS G_AD28 RQ4 +3VRUN
N28 TV_D10 W25 AJ13
VSS G_AD29 RQ5
T28 AC26 17 AGP_AD30 W27 AG14
VSS VSS G_AD30DVOBC_INTR#/DPMS_CLK RQ6
2

1
W28 AD22 Y29 AJ14
VSS VSS G_AD31DVOC_FLD/STL RQ7 R446
AB28 AE28
VSS VSS 576R3F
L25 16 AGP_BUSY# AC24 AJ6
VSS AGP_BUSY# GM_RCLK
P25 AH24 AG6
VSS VSS GM_GCLK
U25 AF25 AH15 OSC1
VSS VSS CTM
2
1

Y25 AF27 AJ15 AE14 1 4 R115


VSS VSS R90 CTM# RAM_REFA NC VDD
AD14 2 3 1 2 AGP_AD30
RAM_REFB GND OUT
1

AH26 10KR3 AJ16


VSSA_DAC CFM

1
AE20 AH16 R447 OSC-32.768KHZ-1 732R3F
VSSA_DPLL0 CFM#
1

G24 G8 2KR3F R116


VSSA_DPLL1 VSSA_CPLL
2

AD7 R42 R43 GRAPH-U1 604R3F


VSSA_HPLL 10KR3 10KR3
2

2
GRAPH-U1
2

VSSA_DPLL1 9 KODIAK 0.7b P.9 33MHz OSC


9/13 change to 32K OSC per Intel
VSSA_DPLL0 9
Pull-up required Acer Incorporated
for ext. AGP GFX 21F, 88, Sec. 1, Hsin Tai Wu Rd.,
Hsichih, Taipei Hsien 221,
and int. DVO GFX Taiwan, R.O.C.
Title
Connect pin AE20, G24(VSSA_DPLL[0,1]) to GMCH(2/3)
the respective decoupling caps of pin Size Document Number Rev
AC20, F25(VCCA_DPLL[0,1]) A3 C-Note 2 -3
Date: Friday, January 11, 2002 Sheet 8 of 37
Add at topside w/ shortest & widest Vcc trace directly to ball A8 & A12
+VCCT +VCCT +VCCT
U18E
Route ball A12 and A8 directly to respective decoupling capacitor
H7 F5 without going through a via first.
H23 VCC VTT J5
VCC VTT

1
K7 M5 Almador-M A3 stepping Design Guideline Update
BC438 BC435 BC427 BC425 BC446 TC10 K23 VCC VTT R5 12/26/00
SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX ST150U6D3VM-U VCC VTT
L7 V5
VCC VTT

2
N6 AA5
T6 VCC VTT AD5
W7 VCC VTT AG5 BC492
Y7 VCC VTT E2 SCD1U10V2MX
VCC VTT +3VSUS
AB7 A12
BC447 BC448 BC479 BC480 BC475 VCC VCC_SM
M24 E12
SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX P24 VCC VCC_SM G10
T24 VCC VCC_SM D5
V24 VCC VCC_SM D8
VCC VCC_SM

POWER
Y23 D11 BC454 BC504 BC444 BC467 BC465 BC474 BC473 BC472 BC496 BC495
VCC VCC_SM SC68P SC10U10V-U SC22U10V-1 SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX
M14 D14
M15 VCC VCC_SM D17
BC426 BC421 BC478 BC441 BC422 M16 VCC VCC_SM D20
SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX P12 VCC VCC_SM D23
VCC VCC_SM
R12 D26
VCC VCC_SM
T12 G11
P18 VCC VCC_SM G23 BC476 BC494 BC493 BC497 BC500 BC501 BC502
R18 VCC VCC_SM A8 BC498 SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX
T18 VCC VCC_SM G20 SCD1U10V2MX
BC464 BC437 BC433 BC462 BC463 VCC VCCQ_SM
V14 F7
SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX VDD_LM VCCQ_SM
Place C near AE16 V15 F15
V16 VDD_LM VCCQ_SM G19
and AE15 on GMCH VDD_LM VCCQ_SM
AE16 E15 +1.8VRUN
AE15 VDD_LM VCCQ_SM BC470 BC468 BC491 BC414 BC416 BC471
AD15
VDD_LM
AC10
CHECK SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX
+1.8VRUN BC483 +3VSUS VDD_LM VCC_LM
AD16 AC11
SC68P VDD_LM VCC_LM AD11
AE25 VCC_LM AD12 BC411 BC457
AD23 VCC_GPIO VCC_LM AD13 SCD1U10V2MX SCD1U10V2MX
VCC_GPIO VCC_LM

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AE18
VCC_LM
J24 AD17
BC420 BC428 F26 VCC_HUB VCC_LM AD18
SCD1U10V2MX SCD1U10V2MX VCC_HUB VCC_LM AD19 +1.8VRUN
N24 VCC_LM +1.5VRUN
+1.5VRUN VCCQ_AGP
W23 AF6
VCCQ_AGP VCC_CMOS
AE7
J26 VCC_CMOS AC9 +1.8VRUN
M26 VCC_AGP VCC_CMOS AC8
R26 VCC_AGP VCC_CMOS BC456 BC431 BC432
BC436 BC434 BC458 BC413 BC417 BC418 BC455 VCC_AGP SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX
V26 AC21
SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SC22U10V-1 VCC_AGP VCC_DVO
AA26 AF21
L23 VCC_AGP VCC_DVO AF24 BC424 BC423
AA23 VCC_AGP VCC_DVO SCD1U10V2MX SCD1U10V2MX
U24 VCC_AGP AF26
+VCCT VCC_AGP VCCA_DAC
AG27
VCCA_DAC +VCCT
BC415 BC412 BC490 BC439 BC466 AE6 L23 R444
SCD1U10V2MX SCD1U10V2MX SCD01U50V3KX SCD01U50V3KX SCD01U50V3KX G7 VCCA_HPLL AC20 2 1 GMCH_VADPLL0 1 2
GMCH_VCCADPLL0
VCCA_CPLL VCCA_DPLL0 F25
VCCA_DPLL1 L-D1UH 1R3F

1
BC482 BC503
SCD1U10V2MX SCD1U10V2MX GRAPH-U1 BC419 TC8
SCD1U10V2MX ST150U6D3VM-U

2
VSSA_DPLL0 8
+VCCT
L24 R452
GMCH_VCCADPLL1 2 1 GMCH_VADPLL1 1 2

L-D1UH 1R3F

1
BC460 TC9
SCD1U10V2MX ST150U6D3V-1-U

2
VSSA_DPLL1 8

SYSTEM MEMORY
Decouping Recommendation C-Note 2 Kenora Ver 0.93 REF 0.55V
Decoupling Distribute as close as possible
Caps 0.1uF * 10 to GMCH-M processor Quadrant 0.1uF * 20
V1.2S_GMCH 0.1uF * 20
Bulk Caps 10uF * 1 150uF / 4V * 5 + 1 * NS HUB INTERFACE REF
150uF / 6.3V * 2
Close to VDD_LM, near pins AE15 1/2*1.8V
68pF * 1 and AE16 on Almador 68pF * 1 68pF * 1 +3VRUN +3VSUS
Decoupling
V1.2S_GMCHCORE Caps 220uF / 2.5V * 2
0.1uF * 10 0.1uF * 28 NO STUFF
+1.8VRUN

1
Bulk Caps 10uF * 1 150uF / 4V * 6 R108 R729
249R3F 249R3F
Distribute as close as possible
0.1uF * 9 to GMCH-M AGP/DVO Quadrant 0.1uF * 11 0.1uF * 9

2
Decoupling 0.01uF * 3 SMREF 7

1
Caps 10uF /10V * 1

1
V1.5S_GMCH 82pF * 4 82pF * 4 R466
301R3F R107 BC481 BC461
49D9R3F SCD1U10V2MX SCD1U10V2MX
Bulk Caps 22uF /10V * 1 22uF / 20V * 1

2
Distribute as close as possible HUBREF 7,15
0.1uF * 4 + 2 to GMCH-M Local Memory Quadrant 0.1uF * 4 + 2
Decoupling 0.1uF * 6 0.01uF *2

1
Caps Additional 4* 0.1uF shall be distributed 82pF * 2
V1.8S_GMCH 82pF * 2 as close as possible to VCCPCMOS_LM 22uF / 20V * 2 BC499 R467 Place capacitor near GMCH ball E5 & F24.
SCD1U10V2MX 301R3F

Bulk Caps 68uF / 10V * 5

2
Distribute as close as possible to Acer Incorporated
0.1uF * 12 + 2 GMCH-M System Memory Quadrant 0.1uF * 20+2 0.1uF * 12 + 2 21F, 88, Sec. 1, Hsin Tai Wu Rd.,
Decoupling 22uF 10V * 1 82pF * 4 Hsichih, Taipei Hsien 221,
V3_GMCH Caps Additional 4* 0.1uF shall be distributed 10uF 10V * 1 22uF / 20V * 2 Taiwan, R.O.C.
82pF * 4 as close as possible to IO Quadrant 82pF * 1
Title
Layout Note:
Bulk Caps Place divider pair in middle of bus.
GMCH(3/3)
Size Document Number Rev
Place capacitors near GMCH. Custom
C-Note 2 -3
Almador-M Checklist Ver. 0.93 9/08
Date: Friday, January 11, 2002 Sheet 9 of 37
(Normal Type) (Reverse Type)
7 M_RMA[0..12] 7 M_RCAS#
+3VSUS +3VSUS
7 M_MD[0..63] 7 M_RRAS#
+3VSUS +3VSUS
7 M_CS#[0..3] 7 M_RBA0
7 M_DQM[0..7] 7 M_RBA1
DM2 DM1
7 M_CKE[0..3] 7 M_RBMWE#
146 145

1 2 1 2
M_MD0 3 4 M_MD32
M_MD0 3 4 M_MD32 M_MD1 5 6 M_MD33
M_MD1 5 6 M_MD33 M_MD2 7 8 M_MD34
M_MD2 7 8 M_MD34 M_MD3 9 10 M_MD35
M_MD3 9 10 M_MD35 11 12
11 12 M_MD4 13 14 M_MD36
M_MD4 13 14 M_MD36 M_MD5 15 16 M_MD37
M_MD5 15 16 M_MD37 M_MD6 17 18 M_MD38
M_MD6 17 18 M_MD38 M_MD7 19 20 M_MD39
M_MD7 19 20 M_MD39 21 22
21 22 M_DQM0 23 24 M_DQM4
M_DQM0 23 24 M_DQM4 M_DQM1 25 26 M_DQM5
M_DQM1 25 26 M_DQM5 27 28
27 28 M_RMA0 29 30 M_RMA3
M_RMA0 29 30 M_RMA3 M_RMA1 31 32 M_RMA4
M_RMA1 31 32 M_RMA4 M_RMA2 33 34 M_RMA5
M_RMA2 33 34 M_RMA5 35 36
35 36 M_MD8 37 38 M_MD40
M_MD8 37 38 M_MD40 M_MD9 39 40 M_MD41
M_MD9 39 40 M_MD41 M_MD10 41 42 M_MD42
M_MD10 41 42 M_MD42 M_MD11 43 44 M_MD43
M_MD11 43 44 M_MD43 45 46
45 46 M_MD12 47 48 M_MD44
M_MD12 47 48 M_MD44 M_MD13 49 50 M_MD45
M_MD13 49 50 M_MD45 M_MD14 51 52 M_MD46

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M_MD14 51 52 M_MD46 M_MD15 53 54 M_MD47
M_MD15 53 54 M_MD47 55 56
55 56 57 58
57 58 59 60
59 60

61 62 M_CKE0
7 CLK_SDRAM0
63 64 61 62 M_CKE2
7 CLK_SDRAM2
M_RRAS# 65 66 M_RCAS# 63 64
M_RBMWE# 67 68 M_CKE1 M_RRAS# 65 66 M_RCAS#
M_CS#0 69 70 M_RMA12 M_RBMWE# 67 68 M_CKE3
M_CS#1 71 72 M_CS#2 69 70 M_RMA12
73 74 CLK_SDRAM1 7 M_CS#3 71 72

1
75 76 73 74 CLK_SDRAM3 7

1
77 78 R531 75 76
79 80 0R3-0-U 77 78 R484
81 82 79 80 0R3-0-U
M_MD16 83 84 M_MD48 81 82

2
M_MD17 85 86 M_MD49 M_MD16 83 84 M_MD48

2
M_MD18 87 88 M_MD50 M_MD17 85 86 M_MD49
M_MD19 89 90 M_MD51 M_MD18 87 88 M_MD50
91 92 M_MD19 89 90 M_MD51
M_MD20 93 94 M_MD52 91 92
M_MD21 95 96 M_MD53 M_MD20 93 94 M_MD52
M_MD22 97 98 M_MD54 M_MD21 95 96 M_MD53
M_MD23 99 100 M_MD55 M_MD22 97 98 M_MD54
101 102 M_MD23 99 100 M_MD55
M_RMA6 103 104 M_RMA7 101 102
M_RMA8 105 106 M_RBA0 M_RMA6 103 104 M_RMA7
107 108 M_RMA8 105 106 M_RBA0
M_RMA9 109 110 M_RBA1 107 108
M_RMA10 111 112 M_RMA11 M_RMA9 109 110 M_RBA1
113 114 M_RMA10 111 112 M_RMA11
M_DQM2 115 116 M_DQM6 113 114
M_DQM3 117 118 M_DQM7 M_DQM2 115 116 M_DQM6
119 120 M_DQM3 117 118 M_DQM7
M_MD24 121 122 M_MD56 119 120
M_MD25 123 124 M_MD57 M_MD24 121 122 M_MD56
M_MD26 125 126 M_MD58 M_MD25 123 124 M_MD57
M_MD27 127 128 M_MD59 M_MD26 125 126 M_MD58
129 130 M_MD27 127 128 M_MD59
M_MD28 131 132 M_MD60 129 130
M_MD29 133 134 M_MD61 M_MD28 131 132 M_MD60
M_MD30 135 136 M_MD62 M_MD29 133 134 M_MD61
M_MD31 137 138 M_MD63 M_MD30 135 136 M_MD62
139 140 M_MD31 137 138 M_MD63
14,27 DM1_SDATA 141 142 DM1_SCLK 14,27 139 140
143 144 6,14,27 DM2_SDATA 141 142 DM2_SCLK 6,14,27
143 144
145
146
SDIMM144-13
SDIMM144-1U

+3VSUS

R482 R483
BC583 BC584 BC587 BC536 BC537 BC540 BC543 BC544 BC545 BC546 BC535 CLK_SDRAM0 1 2 CLK_SDRAM2 1 2
SC4D7U10V5ZY SC4D7U10V5ZY SC4D7U10V5ZY SCD1U SCD1U SCD1U SCD1U SC1000P50V3KX SC1000P50V3KX SC1000P50V3KX SC1000P50V3KX
56R3 56R3
BC538 BC539
SC10P SC10P

R485 R486
CLK_SDRAM1 1 2 CLK_SDRAM3 1 2
+3VSUS
56R3 56R3
BC541 BC542
SC10P SC10P
Acer Incorporated
BC586 BC585 BC588 BC597 BC598 BC599 BC600 BC602 BC603 BC605 BC606 21F, 88, Sec. 1, Hsin Tai Wu Rd.,
SC4D7U10V5ZY SC4D7U10V5ZY SC4D7U10V5ZY SCD1U SCD1U SCD1U SCD1U SC1000P50V3KX SC1000P50V3KX SC1000P50V3KX SC1000P50V3KX Hsichih, Taipei Hsien 221,
Taiwan, R.O.C.
SDRAM clock AC terminations change from 33 Ohm 22p to 56 Ohm 10p. Title

12/14/00 SO-DIMM
Size Document Number Rev
Custom -3
C-Note 2
Date: Friday, January 11, 2002 Sheet 10 of 37
+1.8VRUN +3VRUN

BC77 BC76 BC86 BC68 BC70 BC73 BC682 BC683 BC81 BC80 BC75 BC91 BC92 BC72 BC79 BC69 BC74 BC78 BC64
SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SC4D7U10V5ZY SC4D7U10V5ZY SCD1U10V2MX
SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX

DVO_STALL 8
DVO_HSYNC 8
BC67 BC85 BC88 BC89 BC66 BC90 +1.5VRUN
SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX DVO_VSYNC 8
SCD1U10V2MX
DVO_BLANK# 8
DVO_CLK 8

1
DVO_CLK# 8
R94
DVO_D[0..11] 8

DVO_BLANK#
2KR3F

DVO_HSYNC
DVO_VSYNC
DVO_STALL
+1.8VRUN

DVO_CLK#

DVO_D10
DVO_D11
DVO_CLK
L13

DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8
DVO_D9

2
1 2 +1.8VRUN_VCH LCD_VREF

1
BLM11B750S
BC71 BC65 BC87 R96 BC84

M11

M10
G11
C10

D10

H11

N13

N12
N11

N10
E11

K11

A13

P12
P11

P10

P13
F11
L10

J11
SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX 2KR3F SCD1U10V2MX

M8

M9

M7
G4
C7

C5
D5

C6
C9
D4
D6
D9

H4

N8

N7

N6
E8

A2

E4

K4

P9

P8
P7

P6
F4

L5
L7
L8
L9

L6
J4
+3VRUN

DVOVSYNC
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8
VCC_1.8

VCC_3.3
VCC_3.3
VCC_3.3
VCC_3.3
VCC_3.3
VCC_3.3
VCC_3.3
VCC_3.3
VCC_3.3
VCC_3.3
VCC_3.3
VCC_3.3
VCC_3.3
VCC_3.3

DVOCLKOUT

DVOBLANK#
PLL_VCC
LVDSPLL_VCC

DVODATA[0]
DVODATA[1]
DVODATA[2]
DVODATA[3]
DVODATA[4]
DVODATA[5]
DVODATA[6]
DVODATA[7]
DVODATA[8]
DVODATA[9]
DVOHSYNC

DVODATA[10]
DVODATA[11]
LCD_VREF

2
DC_CKT_VCC

DVOCLKIN[0]
DVOCLKIN[1]
1
2

D12 A6 TXCLK+ 14
RN28 GMBSCL CLKAP
D13 B6 TXCLK- 14
SRN4D7KJ GMBSDA CLKAM
A3 TXOUT0+ 14
YA0P
B3

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YA0M TXOUT0- 14
B14 A4 TXOUT1+ 14
TESTIN YA1P
D14 B4 TXOUT1- 14
PCIRST# YA1M
4
3

A5 TXOUT2+ 14
YA2P
M12 B5 TXOUT2- 14
OSC YA2M
8 IO_I2C_CLK A7
YA3P
8 IO_I2C_DATA E3 B7
P[0] YA3M
E2 A12
P[1] CLKBP
15 PCIRST#_3 E1 B12
P[2] CLKBM +1.8VRUN
F3 A8
P[3] YB0P
3 CLK66_VCH F2 B8
P[4] YB0M
F1 A9
P[5] YB1P

2
G3 B9
P[6] YB1M
1

G2 A10 R87
R436 P[7] YB2P 150R3
G1 B10
10R3 P[8] YB2M
H3 A11
P[9] YB3P
H2 B11
P[10] YB3M

1
H1 D8 VCH_VREF_HI
P[11] VREF_HI
2

J3 D7 VCH_VREF_LO
P[12] VREF_LO
J2
P[13]

VCH

1
BC429 J1
SC18P P[14] R88
K3 F14
P[15] DVORCLKIN

1
K2 G13 150R3
P[16] DVORHSYNC R435
K1 G14
P[17] DVORVSYNC 10KR3
L3 G12
P[18] DVORBLANK#

2
NO STUFF L2 J13
P[19] DVORCLKOUT[0]
L1 J12
P[20] DVORCLKOUT[1]

2
M3 H14
P[21] DVORDATA[0]
M2 H13
P[22] DVORDATA[1]
M1 H12
P[23] DVORDATA[2]
N1 J14
P[24] DVORDATA[3] +1.8VRUN
N2 K14
P[25] DVORDATA[4]
P2 K13
P[26] DVORDATA[5]
N3 K12
P[27] DVORDATA[6]

1
P3 L14
P[28] DVORDATA[7] R98
M4 L13
P[29] DVORDATA[8] 36D5R3F
N4 L12
P[30] DVORDATA[9]
P4 M14
P[31] DVORDATA[10]
M5 M13
P[32] DVORDATA[11]

2
N5 N9
P[33] DVORRCOM
P5
P[34]
M6
P[35]
D3 C12
SHFCLK GPIO[0]
C1 C14
FLM GPIO[1]
B2 B13
LP GPIO[2]
D2 C13
DE GPIO[3]
14 LCDVDD_ON C3 E12
ENAVDD GPIO[4]
D1 E13
ENEXBUF GPIO[5]
C2 F12
14 BL_ON ENABKL GPIO[6]
E14
GPIO[7]
F13
GPIO[8]
LVDSPLL_VSS
DC_CKT_VSS
PLL_VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U61
FW82807AA
L11
C11
C8

A1
A14
B1
C4
D11
E5
E6
E7
E9
E10
F5
F6
F7
F8
F9
F10
G5
G6
G7
G8
G9
G10
H5
H6
H7
H8
H9
H10
J5
J6
J7
J8
J9
J10
K5
K6
K7
K8
K9
K10
L4
N14
P1
P14

Strapping Options
GPIO[5:2] 10 - 4.7K Ohm Can be used for panel ID select. Default state is Acer Incorporated
GPI w/ int. weak pull down. 21F, 88, Sec. 1, Hsin Tai Wu Rd.,
Hsichih, Taipei Hsien 221,
Taiwan, R.O.C.
GPIO6 10 - 4.7K Ohm For normal VCH operation pin has to be read as low.
Title
Default state is GPI w/ int. weak pull down.
VCH
GPIO[8:7] 10 - 4.7K Ohm Used for GMBus base address select. Default state Size Document Number Rev
A3
is GPI w/ int. weak pull down. C-Note 2 -3
Almador checklist ver.0.93
Date: Friday, January 11, 2002 Sheet 11 of 37
+3VRUN TV_AVDD TV_DVDD
+3VRUN
L10 Layout 40 mil L8
1 2 1 2

33R3 0R3-0-U
BC22 BC699 BC23 BC1 BC366 BC367 BC20 BC330 BC19
SCD1U10V2MX SC22U10V0ZY SC22U10V0ZY SC1000P50V SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SC2D2U16V5ZY

+1.5VRUN_F +1.5VRUN
TV_AGND L9
1 2

+3VRUN TV_VDD 0R3-0-U


BC21 BC368
L20 SC4D7U10V5ZY SCD1U10V2MX ESD Protection Diode
1 2
TV_AVDD
0R3-0-U D1
+1.5VRUN_F BC7 BC369 BAV99LT1
SCD1U10V2MX SC4D7U10V5ZY U49 2
CH7011

33

18
44
49
12

45

25
24
23
22
21
20
19
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1

9
2
LUMA_1 3
R349

AVDD
AVDD
VDD

NC
NC
NC
NC
NC
NC
NC
NC
NC
DVDDV
DVDD
DVDD
DVDD
10KR3F 1

TV_D[0..11] 8
2

TV_VREF 3 63 TV_D0 D3
VREF D[0] BAV99LT1
8 TV_HSYNC 4 62 TV_D1
H D[1]
1

+3VRUN 5 61 TV_D2 2
8 TV_VSYNC V D[2]
BC329 R350 R730 7 60 TV_D3
SCD1U 10KR3F GPIO[1] D[3]
1 2 8 59 TV_D4 CRMA_1 3
GPIO[0] D[4]
10 58 TV_D5
AS D[5]
10KR3
TV Encorder D[6]
55 TV_D6 1
2

R739 14 54 TV_D7
8 TV_I2C_DATA SD D[7]
1 2 8 TV_I2C_CLK 15 53 TV_D8
SC D[8] TV_AGND
52 TV_D9
10KR3 D[9]
8 TV_CLK 57 51 TV_D10
XCLK D[10]
BC9
8 TV_CLK#
TV_XO
56

43
XCLK#

XO
CH7011A D[11]

CVBS
50

36
TV_D11 BC4

TV_XI 42 39 SC33P SKT1


SC10P XI/FIN CVBS/B
L2
2

15 PCIRST#_3 13 48 6
X6 RESET# C/HSYNC
47 38 CRMA 1 2 CRMA_1 4
XTAL-14D318M BCO C/R
8 TV_POUT 46 37 2
P-OUT Y/G

1
35 IND-1D2UH
ISET
1

BC8 20ppm R13 BC24 BC6 TVCONN_12 1


1

75R3 SC150P SC270P50V3JN 3

DGND
DGND
DGND
AGND
AGND
AGND
R344 5

GND
GND
SC10P 140R3F BC2
NC
NC
NC
NC
NC
NC
NC

2
BC706 MINDIN4-11
2

26
27
28
29
30
31
32

16
17
41

6
11
64

40
34
SC33P
L1 SC1000P50V3KX
TV_AGND
LUMA 1 2 LUMA_1

2
1
IND-1D2UH R714
TV_AGND TV_AGND R1 BC5 BC3 BLM18HG601SN1D
75R3 SC150P 1.8uH SC270P50V3JN

Change P/N to 0 ohm (63.R0004.151)

1
to solve TV detection issue 1/10/'02
75 Ohm close to chip 6 MHz Low-Pass filter TV_AGND
CH7011 Addresss: close to CONN
P/N Change to 68.00084.341
0X75 AS pull-up (int. pull-up)
0X76 AS pull-down

Power up default:
NTSC GPIO0 pull-up (int. pull-up)
PAL GPIO0 pull-down

Acer Incorporated
21F, 88, Sec. 1, Hsin Tai Wu Rd.,
Hsichih, Taipei Hsien 221,
Taiwan, R.O.C.
Title
TV Encorder
Size Document Number Rev
A3 -3
C-Note 2
Date: Friday, January 11, 2002 Sheet 12 of 37
CRT I/F & CONN
+5VRUN CRT_VCC
F1
Ferrite bead impedance: 75ohm@100MHz
2 1
L4

1
1 2 CRT_R MINISMDC110
8 DAC_RED
BC17
BLM11B750S D5 SCD01U50V3KX
RB751V-40
L5

2
8 DAC_GREEN 1 2 CRT_G
+3VRUN
BLM11B750S

1
L6 R690 R357 R356 CN3
U33C 30 CRT_IN#_5 10KR3 2K2R3 2K2R3
1 2 CRT_B 16

10

14
8 DAC_BLUE
TSLCX125
1

1
BLM11B750S 6

2
R21 R22 R9 BC12 BC13 BC16 BC11 BC14 BC15 8 9 11
SC3P50V3CN 16 CRT_IN#
75R3F 75R3F 75R3F SC3P50V3CN SC3P50V3CN SC3P50V3CN SC3P50V3CN SC3P50V3CN CRT_R 1
7
DAT_DDC1_5 12
2

7
CRT_G 2
3.3pF Almador checklist 8
No Stuff JVGA_HS 13
CRT_B 3
9
JVGA_VS 14
4
10

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CLK_DDC1_5 15
5
R6 1 2 37D4R3F
8 DAC_RED#
17
R7 1 2 37D4R3F
Layout Note: BC695 BC334 BC333 BC376 BC10
8 DAC_GREEN#
SC100P SC100P SC100P SC100P SC100P VIDEO-15-16
R8 1 2 37D4R3F
* Must be a ground return path between this ground and the ground on
8 DAC_BLUE#
the VGA connector.
* 37.4_1% resistors must be placed at the same place as the RGB 75 Ohm
pull-down resistors.

Pi-filter & 75 Ohm pull-down resistors should be as close as to CRT


CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
RDDP 1.0

Hsync & Vsync level shift DDC_CLK & DATA level shift
L21
1 2 JVGA_HS JVGA_HS 30
+3VRUN +3VRUN +5VRUN
33R3
+5VSUS

1
L3
1 2 JVGA_VS R19 R5 R4
JVGA_VS 30
10KR3 10KR3 10KR3
33R3
BC375

2
SCD1U Signal level need check.

1
G
+5VSUS
14

U51 8 DAT_DDC1 2 3 DAT_DDC1_5 30


R355
1 2 2 3 HSYNC_5 5 4 CRT_G

D
8 DAC_HSYNC Q5
39R3 U50A CRT_R 6 3 2N7002

1
TSAHCT125

G
14

7
4

7 2
R354 2 3
8 CLK_DDC1 CLK_DDC1_5 30
1 2 5 6 VSYNC_5 8 1 CRT_B
8 DAC_VSYNC

D
39R3 U50B Q1
TSAHCT125 PACDN009 2N7002
7

3.3V @ Almador side 5V @ ext. CRT side

Acer Incorporated
21F,88,Sec. 1,Hsin Tai Wu Rd.
Hsichih,Taipei Hsien 221.
Taiwan ,R.O.C.
Title

CRT Connector
Size Document Number Rev
Custom
C-Note 2 -3
Date: Friday, January 11, 2002 Sheet 13 of 37
LCD /INVERTER INTERFACE +3VRUN

COVERUP 6
BC263
SCD1U

U3A

14
TSLCX08 +3VRUN
1
FPBACK 3
2 U3B

14
TSLCX08
BC403 4 BL_ON 11

7
SC100P LCD_ON 6
MAX1631_VL 5 BACKLT_OFF# 16

7
1
R15
160R6 +3VRUN +3VALW

UltraBay LED

2
MAX1631_VL
U3C Q60

1
DCBATOUT LCD_DCBAT TSLCX08 DTA124EUA-U

14
1

1
R16 +5VSUS
+3VSUS
22 K
R2 K 22 Q3 1 2 R17 9
100KR3 DTA124EUA-U 1 2 8
0R6 10
0R3-0-U Q50 2 UBAY_LED_ON# 16
2

1
LIGHTEN# 2 DTA124EUA-U

7
22 K
K 22 Layout 40 mil 22 K R655
100KR3

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3

2
Q4 BC33 NO STUFF 2

3
DTC124EUA-U SCD1U50V5KX R418 Q61
3

22 K

3
1 2 DM1_SCLK 10,27 D 2N7002
22 K CN7 1

61
2 LIGHT_PWR 0R3-0-U
27 THINKLIGHT_EN G

1
BC34 S
DM1_SDATA 10,27

2
SC1000P50V3KX R656

3
1 31 100KR3
22 K 2 32
BC32 3 33

2
1
SCD1U 4 34
1

Layout 15 mil 5 35 FPBACK R546


6 36 INV_SCLK +3VRUN 200R6
7 37
+5VALW 8 38

2
+5VRUN 9 39 BRIGHTNESS 27
27 SCROL# 10 40 UBAY_LED
11 41
27 CAPS# 12 42
13 43 +3VALW
27 NUM# BAT_O# 35
14 44
18 IDE_LED#
15 45
BAT_G# 35 Suspend LED
23 BDC_LED
23 BTBTN# 16 46
17 47 BC397 BC398 Q62

1
18 48 SC100P SC100P DTA124EUA-U
BC371 BC400 LCDVDD 19 49 +5VSUS
+3VSUS
22 K
BC28 SC100P SCD1U 20 50
SC100P 21 51 BC396 BC401
22 52 SC100P SC100P
BC29 BC26 BC31 23 53 Q37 2 SPLED# 16

1
SC100P SCD1U SCD1U 24 54 DTA124EUA-U 22 K
25 55 22 K R657
26 56 BC402 BC399 100KR3
BC30 27 57 SCD1U SC100P
SC100P 28 58

2
29 59 2

3
30 60 22 K Q63

3
TXOUT0+ 11 D 2N7002
TXOUT0- 11 1
G

1
S
62

2
R658
TXOUT1+ 11

3
AMP-CONN60-2 100KR3
TXOUT1- 11

TXCLK+ 11

2
1
TXCLK- 11
R417
160R6
TXOUT2+ 11
+3VRUN +3VRUN LCDVDD
TXOUT2- 11

2
U2 Layout 40 mil
U19A 1 8
14

TSLCX14 GND OUT


2 7
IN OUT
R716 3 6
IN OUT BC25
11 LCDVDD_ON 1 2 1 2 4 5
EN# OUT SCD1U10V2MX +3VRUN
1

0R3-0-U TPS2013AD
BC27 R379
7

SC1U10V3ZY 1KR3 D49


BC370 2 1 R568 +3VRUN
SC10U10V6ZY-U 15 PCIRST# 4K7R3
2

S1N4148
2

D50
3

D 2 1 BC615
6 DRUNPWROK
1 Q76 SCD1U NO STUFF
G 2N7002 S1N4148 U76
S 1 8 R660
L1 VCC
2

2 7 1 2 RF08WP 27
L2 WP
3 6
PROT SCL
1

4 5 0R3-0-U
R570 R569 GND SDA
DM2_SCLK 6,10,27
10KR3 10KR3 AT24RF08-BN DM2_SDATA 6,10,27
1

Acer Incorporated
2

R661 21F,88,Sec. 1,Hsin Tai Wu Rd.


10KR3 Hsichih,Taipei Hsien 221.
Taiwan ,R.O.C.
2

Title
72.02408.B01 Ver. F LCD INTERFACE
Size Document Number Rev
Custom
RFID 24RF08(24C08) C-Note 2 -3
Date: Friday, January 11, 2002 Sheet 14 of 37
+3VRUN +5VRUN
PCI I/F Pullups

14

1
U32C +5VRUN +3VRUN

14
TSLCX08 U43A
Interrupt I/F Pullups
9 PCIRST#_3 2 3 RSTDRV#_5 18

1
+3VRUN 8 PCIRST# 6,14,21,22,26,27,28 +3VRUN
PCIRST#_3 10 R662

3
4
TSAHCT125 10KR3

7
RN44 RS2N822J1-U RN43 RN45 RS2N822J1-U

7
2 3 DOCK_ATTACH# VCC_RTC RS2N103J1-U P_REQ#1 3 2

2
1 4 PIRQE# PCIRST# Buffer to enhance the driving strength PCIRST# 3V to 5V level shift for HDD & CDROM P_DEVSEL# 4 1
Q64
RN46 RS2N822J1-U 2N7002 RN47 RS2N822J1-U

2
1
1

1
2 3 P_STOP# P_IRDY# 3 2

G
1 4 P_SERR# R159 P_PLOCK# 4 1
22KR3 3 2 ICH_SCL 3,27

1
RN48 RS2N822J1-U NO STUFF Q65 R583

G
ICH3-M 2N7002

S
2 3 P_REQ#3 P_SERIRQ 1 2

D
2
1 4 PIRQB# INTRUDER# 6 3 2 ICH_SDA 3,27
PART A System 8K2R3

1
RN50 RS2N822J1-U +3VALW

S
D
PIRQF#
Management R691 RN12 RS2N472J1-U
2 3
1 4 PIRQD# U75A I/F 1MR3 2 3 +3VALW
ICH3-M-U 1 4
20,21,22 P_AD[0..31]
RN51 RS2N822J1-U
20,21,22 P_C/BE#[0..3]

1
2 3 PIRQC# Y6 2 3
SM_INTRUDER# R541
1 4 P_REQ#2 P_AD0 J2 AC3 SMLINK0 1 4
PCI_AD0 SMLINK0 10KR3
P_AD1 K1 AB2 SMLINK1
RN52 RS2N822J1-U PCI_AD1 SMLINK1 RN26 RS2N472J1-U
P_AD2 J4 AC4 ICH_SCL_3
PCI_AD2 SMB_CLK
2 3 PIRQA# P_AD3 K3 AB5 ICH_SDA_3
PCI_AD3 SMB_DATA

2
1 4 P_PERR# P_AD4 H5 AC5
PCI_AD4 SMB_ALERT#/GPIO11
P_AD5 K4
RN53 RS2N822J1-U PCI_AD5
P_AD6 H3 Y22

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PCI_AD6 CPU_A20GATE ICH_A20GATE 27
2 3 P_FRAME# P_AD7 L1 V23 R542
PCI_AD7 CPU_A20M# CC_A20M# 4
1 4 P_REQ#0 P_AD8 L2 AB22 CPU_DPLSP# 1 2 CC_DPSLP# 4,31
PCI_AD8 CPU_DPLSP#
P_AD9 G2 J22

CPU Interface
PCI_AD9 CPU_FERR# CC_FERR# 4
P_AD10 L4 AA21 0R3-0-U
PCI_AD10 CPU_IGNNE# CC_IGNNE# 4
P_AD11 H4 AB23 CC_INIT# 4,26
+3VALW PCI_AD11 CPU_INIT#
P_AD12 M4 AA23 CC_INTR 4
PCI_AD12 CPU_INTR
P_AD13 J3 Y21 CC_NMI 4
R157 PCI_AD13 CPU_NMI
P_AD14 M5 W23 CC_CPUPWRGD 4
PCI_AD14 CPU_PWRGOOD
1 2 ICH_PME# P_AD15 J1 U22 RCIN# 27
PCI_AD15 CPU_RCIN# TP22
P_AD16 F5 W21 CPU_SLP#
10KR3 PCI_AD16 CPU_SLP# TPAD30
P_AD17 N2 Y23 CC_SMI# 4
PCI_AD17 CPU_SMI#
NO STUFF P_AD18 G4 U23 CC_STPCLK# 4
PCI_AD18 CPU_STPCLK#
P_AD19 P2
PCI_AD19
P_AD20 G1 L22 HL_0 HL_[0..10] 7
PCI_AD20 HUB_PD0
ICH_PME# has weak P_AD21 P1 M21 HL_1 HUB INTERFACE LAYOUT HUB I/F VSWING VOLTAGE
PCI_AD21 HUB_PD1
internal pullup. P_AD22 F2 M23 HL_2 Route signals with 5/20 trace/space routing.
PCI_AD22 HUB_PD2
P_AD23 P3 N20 HL_3
PCI_AD23 HUB_PD3 Signals must match +/- 0.1" of HUB_STB/STB# signals. +1.8VRUN
P_AD24 F3 P21 HL_4
PCI_AD24 HUB_PD4
P_AD25 R1 R22 HL_5

HUB Interface
PCI_AD25 HUB_PD5
P_AD26 E2 R20 HL_6
PCI_AD26 HUB_PD6
P_AD27 N4 T23 HL_7 Kodiak Ver. 0.7
PCI_AD27 HUB_PD7
P_AD28 D1 M19 HL_8 PLACE RCOMP resistor within 0.5"
PCI_AD28 HUB_PD8
PCI BUS

P_AD29 P4 P19 HL_9 TP5 of ICH pad using a thick trace


PCI_AD29 HUB_PD9 TPAD30 R199
P_AD30 E1 N19 HL_10
PCI_AD30 HUB_PD10
P_AD31 P5 1 2 RCOMP should be 2/3
PCI_AD31

1
+3VRUN T19 CLK66_ICH
CLK66 board impedance
R99 P_C/BE#0 K2 R19 36D5R3F R247
PCI_C/BE#0 HUB_PAR 301R3F
2 1 P_REQB# P_C/BE#1 K5 N22 HL_STB 7 SC-3062
PCI_C/BE#1 HI_STB
P_C/BE#2 N1 P23 HL_STB# 7
10KR3 PCI_C/BE#2 HI_STB#
P_C/BE#3 R2 K19 HUB_RCOMP_ICH3
PCI_C/BE#3 HUB_RCOMP

2
L20 HUBREF 7,9
TP9 HUB_VREF HUB_VSWING
P_GNT#0 P_GNT#0 A4 L19
TPAD30 PCI_GNT#0 HUB_VSWING
20 P_GNT#1 E3
PCI_GNT#1 APICCLK_ICH
21 P_GNT#2 D2 J19 CLK66_ICH 3
PCI_GNT#2 INT_APICCLK

1
TP8 P_GNT#4 D5 J20 BC153 BC222
INTERRUPT Interface

22 P_GNT#3 PCI_GNT#3 INT_APICD0 CC_PICD0 4


TPAD30 P_GNT#4 B4 J21 R202 SCD01U50V3KX SCD01U50V3KX R248
PCI_GNT#4 INT_APICD1 CC_PICD1 4

1
B1 PIRQA# 1 2 301R3F
INT_PIRQA# CLKAPIC_ICH 3
TP23 P_GNTA# P_REQ#0 D3 C1 R176 CLOSE TO PIN
PCI_REQ#0 INT_PIRQB# PIRQB# 20

1
TPAD30 F4 B2 10R3 51D1R3F
20 P_REQ#1 PCI_REQ#1 INT_PIRQC# PIRQC# 22

2
1
A3 A2 PIRQD# BC221
21 P_REQ#2 PCI_REQ#2 INT_PIRQD#
R4 A6 R200 R201 SCD1U
22 P_REQ#3 PCI_REQ#3 INT_PIRQE#/GPIO2 PIRQE# 22

2
P_REQ#4 E4 B5 DUMMY-R3 348R3F
PCI_REQ#4 INT_PIRQF#/GPIO3 PIRQF# 21
C5 HOTKEY 27
INT_PIRQG#/GPIO4 BC150
3 CLKPCIF_ICH CLKPCIF_ICH T5 A5 DOCK_ATTACH# 30
PCI_CLK INT_PIRQH#/GPIO5

1 2

2
M3 AB14 SC10P
20,21,22 P_DEVSEL# PCI_DEVSEL# INT_IRQ14 IRQ14 18
1

20,21,22 P_FRAME# F1 W19 IRQ15 18 CLK termination


R173 PCI_FRAME# INT_IRQ15
23 BT_SMI C4 H22 P_SERIRQ 20,22,27,28 close to ICH
10R3 PCI_GPIO0/REQA# INT_SERIRQ BC180
P_REQB# D4 No Stuff
PCI_GPIO1/REQB#/REQ5# DUMMY-C3
P_GNTA# B6 E9 EEP_CS LAYOUT NOTE:
TPAD30 TP29 PCI_GPIO16/GNTA# EEP_CS
P_GNTB# B3 EEPROM D8 EEP_DIN 12/14/00 Place divider pair
PCI_GPIO17/GNTB#/GNT5# EEP_DIN
2

20,21,22 P_IRDY# N3 I/F E8 EEP_DOUT 10pF


PCI_IRDY# EEP_DOUT

2
G5 D10 EEP_SHCLK in middle of bus.
20,21,22 P_PAR PCI_PAR EEP_SHCLK
BC141 M2
20,21,22 P_PERR# PCI_PERR#
SC10P P_PLOCK# M1 C8 LAN_RXD0
PCI_LOCK# LAN_RXD0 LAN_RXD0 19
20,22 ICH_PME# W1 A8 LAN_RXD1 LAN_RXD1 19
PCI_PME# LAN_RXD1
Y1 A9 LAN_RXD2
LAN I/F

7,11,12,17 PCIRST#_3 PCI_RST# LAN_RXD2 LAN_RXD2 19


20,21,22 P_SERR# L5 B9 LAN_TXD0 LAN_TXD0 19
PCI_SERR# LAN_TXD0
20,21,22 P_STOP# H2 C10 LAN_TXD1 LAN_TXD1 19
PCI_STOP# LAN_TXD1
20,21,22 P_TRDY# H1 A10 LAN_TXD2 LAN_TXD2 19
PCI_TRDY# LAN_TXD2
C9 LAN_JCLK 19
LAN_JCLK
CLK termination close to ICH D7 LAN_RSTSYNC 19
LAN_RSTSYNC
1

R577
10R3
H/W Strapping
Part Number Change to 71.0ICH3.M03
No Stuff
2

LAN+3VAUX U31
5 4 EEP_DIN +3VRUN R250
GND DO RN54 RS2N822J1-U BC631
6 3 EEP_DOUT EEP_DOUT 1 2 Acer Incorporated
ORG DI SC10P
7 2 EEP_SHCLK 2 3 P_REQ#4 21F, 88, Sec. 1, Hsin Tai Wu Rd.,
DC SK 1KR3
8 1 EEP_CS 1 4 P_TRDY# Hsichih, Taipei Hsien 221,
VCC CS R574 Taiwan, R.O.C.
M93C46-W-2 No Stuff P_GNTA# 1 2
BC223 R543 Title
SCD1U 1 2 HOTKEY 1KR3
EEPROM for LAN
ICH3-M(1/3) PCI,HUBLINK,SM,CPU,INT
100KR3 Size Document Number Rev
Kodiak V. 0.7b P.19 A3 C-Note 2 -3
Date: Friday, January 11, 2002 Sheet 15 of 37
BIOS NOTE: R539
BIOS should disable PM_STPCPU# on CK_Titan. 34 ICH3_LANRST# 1 2 PM_LANPWROK
+3VALW
(Use H_DPSLP# instead) 0R3-0-U +3VALW

1
+3VALW
R540 ICH3-M R174 R158
10KR3 U75B PART B 8K2R3 10KR3
ICH3-M-U

2
2 +3VALW
8 AGP_BUSY# V4
PM_AGPBUSY#/GPIO6 GPIO_7
V2 ECSMI 27

UNMASKED
R163 D12 Y5 W2
LAN_RST# GPIO_8 ECSWI 27
T=22ms 4K7R3 BAT54 TP4 AB3 Y4
PM_BATLOW# GPIO_12 SB_FN 27

POWER MANAGEMENT
TPAD30 PM_C3_STAT# V5 Y2
PM_C3_STAT#/GPIO21 GPIO_13 ECSCI 27
1

GPIO
R162 R601 AC2 W3
20,21,22,27,28 P_CLKRUN# PM_CLKRUN#/GPIO24 GPIO_25 UBAY_LED_ON# 14
1

2 1 PM_RSMRST# 10KR3
31 PM_DPRSLPVR AB21 W4 RTC_WK# 33
PM_DPRSLPVR GPIO_27
33 PWRBTN# AB1 Y3 SPLED# 14
PM_PWRBTN# GPIO_28
1

0R3-0-U AA6
6 DRUNPWROK PM_PWROK

2
R164 BC129 AA1 AC15
20 CBUS_RI# PM_RI# IDE_PDCS1# PIDE_CS1# 18
22KR3 SC4D7U10V5ZY PM_RSMRST# AA7 AB15
PM_RSMRST# IDE_PDCS3# PIDE_CS3# 18
3 PM_SLP_S1# W20 AC21 SIDE_CS1# 18
PM_SLP_S1#/GPIO19 IDE_SDCS1#
17,22,25,32,34,35 PM_SLP_S3# AA5 AC22 SIDE_CS3# 18 AC97 AC terminations
PM_SLP_S3# IDE_SDCS3#
2

AA2
L3#_35 35 17,20,25,27,33,34,35,36 PM_SLP_S5# PM_SLP_S5#
3 PM_STPCPU# V21 AA14 PIDE_A0
PM_STPCPU#/GPIO20 IDE_PDA0
3

D 3 PM_STPPCI# U21 AC14 PIDE_A1


PM_STPPCI#/GPIO18 IDE_PDA1
ICH3-M 1 HW_SHUT 6 32K suspend clock output 17 PM_SUSCLK AA4 AA15 PIDE_A2 ICH_AC_BITCLK
PM_SUS_CLK IDE_PDA2
G 20,27 SUS_STAT# AB4 AC20 SIDE_A0 ICH_AC_DIN0
Update WW08 Q18 U5
PM_SUS_STAT# IDE_SDA0
AA19
S 6 THRM# SIDE_A1 ICH_AC_DIN1
PM_THRM# IDE_SDA1
2

2N7002 AB20 SIDE_A2


IDE_SDA2

1
31 ICH_GMUXSEL U20
PM_GMUXSEL/GPIO23 R578 R579 R576
4 PM_CPUPERF Y20 W12 PIDE_D0
PM_CPUPERF#/GPIO22 IDE_PDD0 47KR3 47KR3 47KR3
31 VCORE_PWRGD V19 AB11 PIDE_D1
R595 PM_VGATE/VRMPWRGD IDE_PDD1
AA10 PIDE_D2
IDE_PDD2
22,23,24 ICH_AC_RST# 1 2 24 ICH_AC_BITCLK B7 AC10 PIDE_D3
AC_BITCLK IDE_PDD3

2
AC_RST# D11 W11 PIDE_D4

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AC_RST# IDE_PDD4

LINK
AC'97
33R3 B11 Y9 PIDE_D5
24 ICH_AC_DIN0 AC_SDATAIN0 IDE_PDD5

1
R594 C11 AB9 PIDE_D6
22,23 ICH_AC_DIN1 AC_SDATAIN1 IDE_PDD6
1 2 AC_DOUT C7 AA9 PIDE_D7 BC632 BC633 BC630
22,23,24 ICH_AC_DOUT AC_SDATAOUT IDE_PDD7
AC_SYNC A7 AC9 PIDE_D8 0R3-0-U 0R3-0-U 0R3-0-U
33R3 R575 AC_SYNC IDE_PDD8
Y10 PIDE_D9 PIDE_D[0..15] 18
IDE_PDD9
R725 22,23,24 ICH_AC_SYNC 1 2 LPC_LAD0 V1 W9 PIDE_D10 PIDE_A[0..2] 18
LPC_AD0 IDE_PDD10

2
Interface
LPC
1 2 PM_DPRSLPVR LPC_LAD1 U3 Y11 PIDE_D11
33R3 LPC_AD1 IDE_PDD11
LPC_LAD2 T3 AB10 PIDE_D12

IDE BUS
LPC_AD2 IDE_PDD12 SIDE_D[0..15] 18
100KR3 LPC_LAD3 U2 AC11 PIDE_D13
26,27,28 LPC_LAD[0..3] LPC_AD3 IDE_PDD13 SIDE_A[0..2] 18
28 LPC_LDRQ#0 T2 AA11 PIDE_D14
R538 TP3 LPC_LDRQ#1 LPC_DRQ#0 IDE_PDD14
U4 AC12 PIDE_D15
DRUNPWROK TPAD30 LPC_DRQ#1 IDE_PDD15
1 2 26,27,28 LPC_LFRAME# U1 Y17 SIDE_D0
LPC_FRAME# IDE_SDD0
W17 SIDE_D1 RTC Circuitry
22KR3 IDE_SDD1
D19 AC17 SIDE_D2
30 USBP0P USB_PP0 IDE_SDD2
A19 AB16 SIDE_D3
18 USBP1P USB_PP1 IDE_SDD3 VCC_RTC +3VALW +3.3VRTC
23 USBP2P E17 W16 SIDE_D4
USB_PP2 IDE_SDD4
23 USBP3P B17 Y14 SIDE_D5
+3VRUN USB_PP3 IDE_SDD5
D15 AA13 SIDE_D6
23 USBP4P USB_PP4 IDE_SDD6

1
USB Interface
R462 TP25 USBP5P A15 W15 SIDE_D7
THRM# TPAD30 USB_PP5 IDE_SDD7 D15
1 2 30 USBP0N D18 W13 SIDE_D8
USB_PN#0 IDE_SDD8
18 USBP1N A18 Y16 SIDE_D9
10KR3 USB_PN#1 IDE_SDD9 RB751V-40
E16 Y15 SIDE_D10
R156 23 USBP2N USB_PN#2 IDE_SDD10 BC159
B16 AC16 SIDE_D11
23 USBP3N USB_PN#3 IDE_SDD11

2
1 2 P_CLKRUN# D14 AB17 SIDE_D12 SC1U16V5KX-U
23 USBP4N USB_PN#4 IDE_SDD12 6,15,17 VCC_RTC
TP24 USBP5N A14 AA17 SIDE_D13
USB_PN#5 IDE_SDD13

1
10KR3 TPAD30 Y18 SIDE_D14
R239 IDE_SDD14 BC158 R182
USB_OC#0 E12 AC18 SIDE_D15
USB_OC#0 IDE_SDD15 SC1U16V5KX-U 1KR3
1 2 BACKLT_OFF# USB_OC#1 D12 LAYOUT: NO STUFF
USB_OC#1
23 USB_OC#2 C12 Y13 PIDE_DACK# 18 MAKE PAD R181
10KR3 USB_OC#2 IDE_PDDACK#
23 USB_OC#3 B12 Y19 SIDE_DACK# 18 1 2
USB_OC#3 IDE_SDDACK#

2
USB_OC#4 A12 AB12 ACCESSABLE 1KR3
USB_OC#4 IDE_PDDREQ PIDE_DREQ 18
+3VALW USB_OC#5 A11 AB18 R180 D14
USB_OC#5 IDE_SDDREQ SIDE_DREQ 18
RN55 RS2N103J1-U AC13 RTCRST# 1 2 2 1
IDE_PDIOR# PIDE_IOR# 18
2 3 USB_OC#0 13 CRT_IN# H20 AC19 SIDE_IOR# 18
USB_LEDA#0/GPIO32 IDE_SDIOR#

1
1 4 USB_OC#1 G22 Y12 15KR3 RB751V-40
26 FWH_WP#_ICH USB_LEDA#1/GPIO33 IDE_PDIOW# PIDE_IOW# 18
F21 AA18 R557 CN15
23 BT_DETACH USB_LEDA#2/GPIO34 IDE_SDIOW# SIDE_IOW# 18
RN56 RS2N103J1-U G19 AB13 GP6 BC157 1KR3
23 BLTH_IN# USB_LEDA#3/GPIO35 IDE_PIORDY PIDE_IORDY 18 1
2 3 USB_OC#4 E22 AB19 GAP-OPEN SC1U16V5KX-U
23 BLTH_PWCTL USB_LEDA#4/GPIO36 IDE_SIORDY SIDE_IORDY 18 2
1 4 USB_OC#5 E21
21 1394_EEPWP USB_LEDA#5/GPIO37 3

2
H21 J23 CLK14_ICH RTCRST# delay
14 BACKLT_OFF# USB_LEDG#0/GPIO38 CLK_14
ICH_GPIO39 G23 F20 CLK48_ICH 10~20ms CON3-4
+3VRUN USB_LEDG#1/GPIO39 CLK_48 BC611
F23 Y7 RTCRST#
6 SW_THER_EN# ICH_GPIO41 USB_LEDG#2/GPIO40 RTCRST# ICH_VBIAS SCD047U25V3KX
G21 AC7 RTCX1
RN57 RS2N103J1-U USB_LEDG#3/GPIO41 CLK_RTCX1
27 TP4_RST D23 AC6 RTCX2
CRT_IN# USB_LEDG#4/GPIO42 CLK_RTCX2
2 3 ICH_GPIO43 E23 AB7
USB_LEDG#5/GPIO43 CLK_VBIAS
1 4 FWH_WP#_ICH R238

1
1 2 B21 H23
RN58 RS2N103J1-U USB_RBIAS SPKR R161
2 3 BLTH_IN# 18D2R3F 10MR3 Change P/N to 78.1R574.1B1
1 4 ICH_GPIO39
BC127
24 ICH_SPKR

2
RN17 RS2N103J1-U ICH3-M NEW Update 6/13
2 3 ICH_GPIO41 3 CLK48_ICH
1 4 ICH_GPIO43 SC1D5P50V3CN
3 CLK14_ICH
1

2
R203 R177
ICH3 Integrated Pull-up and Pull-down Resistors 10R3 33R3 R160 X2
10MR3 XTAL-32.768K4P
EE_DIN , EE_DOUT , LDRQ[1:0] , PME#
2

2
GNT[B:A]#/GNT[5]#/GPIO[17:16] , ICH3 internal 24K pull-ups

3
BC184 BC154
LAD[3:0]#/FWH[3:0]# , PWRBTN# SC10P SC10P
BC126

LAN_RXD[2:0] ICH3 internal 9K pull-ups H/W Strapping


CLK termination close to ICH SC1D5P50V3CN

AC_BITCLK, AC_SDIN[0], AC_SDOUT, ICH3 internal 20K pull-downs No Stuff


+3VRUN
AC_SDIN[1]/GPIO[9], AC_SYNC, R240 Acer Incorporated
ICH_SPKR 1 2 21F, 88, Sec. 1, Hsin Tai Wu Rd.,
Hsichih, Taipei Hsien 221,
SPKR ICH3 internal 24K pull-downs 1KR3 Taiwan, R.O.C.
R593
ICH_AC_DOUT 1 2 Title
PDD[7]/SDD[7], PDDREQ / SDDREQ ICH3 internal 5.9K pull-downs ICH3-M(2/3) PM,USB,AC'97,LPC,IDE,RTC
10KR3
Size Document Number Rev
DPRSLPVR ICH3 internal TBD K pull-downs Custom C-Note 2 -3
Kodiak V. 0.7b P.19
FM-1882 P4-1,2 Date: Friday, January 11, 2002 Sheet 16 of 37
+1.8VALW +3VRUN
U75C
ICH3-M-U
*Within a given well, 5VREF needs to be up before the
corresponding 3.3V rail E13 F6
VCCSUS1_8 VCC3_3
F14 G6
VCCSUS1_8 VCC3_3
K12 H6

PCI PWR
+3VRUN +5VRUN BC179 BC144 BC213 VCCSUS1_8 VCC3_3 BC607 BC211 BC148 BC145 BC168 BC170
P10 J6
SCD1U10V2MX SCD1U10V2MX SC10U10V-U VCCSUS1_8 VCC3_3 SC22U10V-1 SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX
V6 M10
VCCSUS1_8 VCC3_3
V7 R6
VCCSUS1_8 VCC3_3
1

1
T6
D16 D47 VCC3_3
F15 U6
RB751V-40 RB751V-40 LAN+1.8VAUX VCCSUS1_8 VCC3_3
F16
VCCSUS1_8
G18
VCC3_3
F7 H18
VCCLAN1_8 VCC3_3
2

1 2 VCC_RTC F8
VCCLAN1_8
K10 P12 BC169 BC183 BC140 BC139 BC138
R237 BC174 BC172 VCCLAN1_8 VCC3_3 SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX
V15

IDE
PWR
1KR3 SCD1U10V2MX SCD1U10V2MX VCC3_3
AB6 V16
VCCRTC VCC3_3
V17
VCC3_3 +1.8VRUN
E6 V18
V5REF1 ICH3-M VCC3_3
2

V5REF W8
V5REF2
POWER J18
V5REF_ALW VCC1_8
C13 M14
V5REF_SUS1 VCC1_8

1
BC146 BC209 LAN+3VAUX W5 R18

HUB
PWR
SCD1U SC1U16V5KX-U V5REF_SUS2 VCC1_8 TC18 BC171 BC210 BC152 BC182 BC147
T18
VCC1_8 ST100U6D3V-U SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX
F9
VCCLAN3_3

2
F10 E11
VCCLAN3_3 VCC1_8

CORE PWR
K6
+3VALW +5VALW VCC1_8
P14 K18
BC177 BC176 V_CPU_IO VCC1_8
U18 P6

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SCD1U10V2MX SCD1U10V2MX V_CPU_IO VCC1_8
V22 P18
V_CPU_IO VCC1_8
1

+1.5VRUN V10
D17 R249 VCC1_8 BC143 BC137 BC136
C23 V14
RB751V-40 1KR3 VCCSUS1_8 VCC1_8 SCD1U10V2MX SC47P SC47P
B23 U19
VCCSUS1_8 VCC1_8 +3VALW
2

BC610 BC149 +1.8VALW E7 F17


SC1U16V5KX-U SCD1U10V2MX NC VCCSUS3_3
T21 F18

USB
PWR
NC VCCSUS3_3
D6 K14
BC142 BC224 NC VCCSUS3_3
T1
SCD1U SC1U16V5KX-U NC BC244 BC128 BC178 BC181 BC173
C2 E10
BC151 BC175 NC VCCSUS3_3 SC4D7U10V5ZY SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX SCD1U10V2MX
A21 V8

RSM
PWR
SCD1U10V2MX SCD1U10V2MX VSS VCCSUS3_3
A22 V9
VSS VCCSUS3_3

BC212 Kodiak Ver. 0.7b


SCD1U10V2MX U75D
NO STUFF PM_SLP_S5# 16
A1 K23 +3VALW
+5VALW R726 VSS0 VSS51 U84B
A13 L3
VSS1 VSS52 TSLCX74
1 2 A16 L10

10
AGP_AD30 8 VSS2 VSS53
U129 A17 L11
+3VALW 732R3F VSS3 VSS54
1 5 PM_SLP_S3 33 A20 L12 14 9
NC VCC VSS4 VSS55 VCC Q

PR
R561 A23 L13 12
VSS5 VSS56 R612 D
16 PM_SLP_S3# 2 1 2 G768_32K 6 B8 L14
A VSS6 VSS57
U78 B10 L21 15 PCIRST#_3 1 2 11
10R3 VSS7 VSS58 CLK
3 4 1 5 B13 L23 8 SUS_PCIRST#_3 20,27
GND Y OE# VCC VSS8 VSS59 Q

1
2 R571 B14 M11 1KR3 7

CL
16 PM_SUSCLK A VSS9 VSS60 GND

1
NC7ST04 3 4 32KHZ 1 2 OZ998_32K 27 B15 M12
GND Y VSS10 VSS61 BC649 R613
B18 M13
VSS11 VSS62

13
1

NC7SZ125 10R3 B19 M20 DUMMY-C3 10KR3 +3VALW


R572 B20
VSS12
VSS13
ICH3-M VSS63
VSS64
M22
240KR3 B22 N5
VSS14 VSS VSS65

2
32K suspend clock output C3 N10
VSS15 VSS66
C6 N11
VSS16 VSS67
2

F19 N12
VSS17 VSS68
C14 N13
VSS18 VSS69
C15 N14
VSS19 VSS70
C16 N21
VSS20 VSS71
ICH3 H/W Pin Straps FM-1882 C17 N23 Decouping Recommendation Kenora Bulk
VSS21 VSS72
C18 P11
VSS22 VSS73
C19 P13
VSS23 VSS74
AC_SDOUT SAFE MODE Rising Edge This signal has a weak int. pull-down. If C20 P20 +1.5VRUN 0.1uF * 2 X
VSS24 VSS75
of PWROK C21 P22 1uF / 16V * 1
the signal is sampled high, the ICH3 will VSS25 VSS76
C22 R3
set the CPU speed strap pins for safe VSS26 VSS77
D9 R5
VSS27 VSS78
mode. D13 R21 1.8VRUN 0.1uF * 5 100uF*1+22uF*1
VSS28 VSS79
EE_DOUT Reserved System designers should include a placeholder D16 R23 47pF * 2
VSS29 VSS80
for a pull-down resistor on EE_DOUT but do D17 T4
VSS30 VSS81
D20 T20
not populate the resistor. VSS31 VSS82
D21 T22 1.8VSUS 0.1uF * 3 10uF * 1
VSS32 VSS83
D22 V3
VSS33 VSS84
GNT[A]# TOP-SWAP Rising Edge This signal has a weak int. pull-up. If the E5 AC23
VSS34 VSS85
OVERRIDE of PWROK E14 V20 1.8V_ICHLAN 0.1uF * 22uF *1
signal is sampled low, this indicates that VSS35 VSS86
E15 W6 2
the system is strapped to the "TOP-SWAP" VSS36 VSS87
E18 W7
VSS37 VSS88
mode(ICH3 will invert A16 for all cycles E19 W10 3.3VRUN 0.1uF * 13
VSS38 VSS89
E20 W14 47pF * 5 22uF *2
targeting FWH BIOS spacing). Note that SW VSS39 VSS90
F22 W18
VSS40 VSS91
will not be able to clear the Top-Swap bit G3 W22
VSS41 VSS92
until the system is rebooted w/o GNT[A]# G20 Y8 3.3VSUS 0.1uF * 8 22uF *1
VSS42 VSS93
H19 AA3
being pulled down. VSS43 VSS94
AA22 AA8
VSS44 VSS95
J5 AA12 3.3V_ICHLAN 0.1uF * 2
VSS45 VSS96
DPRSLPVR HUB INTERFACE Rising Edge If this signal is sampled low (default due to K11 AA16 47pF * 1 22uF *1
VSS46 VSS97
of PWROK K13 AA20
TERMINATION weak int. pull-down), the termination scheme VSS47 VSS98
K20 AB8
SCHEME will be set to source. If this signal is VSS48 VSS99
K21 AC1
VSS49 VSS100 Acer Incorporated
(PARALLEL vs. sampled high (via an ext. pull-up to Vcc1_8), K22 AC8
VSS50 VSS101 21F, 88, Sec. 1, Hsin Tai Wu Rd.,
SOURCE) the termination scheme will be set to Hsichih, Taipei Hsien 221,
parallel. Taiwan, R.O.C.
ICH3-M-U
SPKR NO REBOOT Rising Edge This signal has a weak int. pull-down. If the Title
of PWROK signal is sampled high, this indicates that ICH3-M(3/3) POWER,VSS,BYPASS CAPS
the system is strapped to the " No Reboot "
Size Document Number Rev
mode (ICH3 will disable the TXO Timer system A3 C-Note 2 -3
reboot feature).
Date: Friday, January 11, 2002 Sheet 17 of 37
HDD CONN UltraBay CONN
16 PIDE_D[0..15]
CN11
28 UBAYD[0..4] Bios need to program
R591
to inverse DENSEL
1 2 +3VRUN 82
15 RSTDRV#_5
CN16 RN11 UBAYD4 80
0R3-0-U LIB is swap horizontal 1 8 UBAYD1 UBAYD3 79
47 2 7 UBAYD2 78
45 3 6 UBAYD3 77
1 2 4 5 UBAYD4 24 CD_R_S 76
24 CD_L_S 75
PIDE_D7 3 4 PIDE_D8 +3VRUN SRN10K R133 74
PIDE_D6 5 6 PIDE_D9 R149 2 1 CD_MUTE 73
PIDE_D5 7 8 PIDE_D10 2 1 UBAYD0 72
PIDE_D4 9 10 PIDE_D11 0R3-0-U CD_AGND CDROM_LED# 71

1
PIDE_D3 11 12 PIDE_D12 0R3-0-U +3VRUN 70
16 SIDE_CS3#
R286 PIDE_D2 13 14 PIDE_D13 69
16 SIDE_CS1#
1 2 PIDE_D1 15 16 PIDE_D14 R640 68
16 PIDE_DREQ 16 SIDE_A2

1
+3VRUN PIDE_D0 17 18 PIDE_D15 DUMMY-R3 67
16 SIDE_A0
47R3 19 20 R136 66
NO STUFF HDDDRQ 21 22 NO STUFF 4K7R3 R140 65
16 SIDE_A1

2
2

23 24 15 IRQ15 1 2 64
R307 16 PIDE_IOW#
25 26 SIRQ 63
16 PIDE_IOR#

2
4K7R3 HDDIORDY 27 28 HDD_CSEL 47R3 SIDE_DACK# 62
16 SIDE_DACK# R139 CD_CSEL
R287 29 30 61
16 PIDE_IORDY 1 2 PIRQ 31 32 1 2 SIDERDY 60
1

1
33 34 59
47R3 35 36 R306 470R3 58
PIDE_A2 16 16 SIDE_IOR#
37 38 100KR3 57
FDD I/F Signal R138

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PIDE_CS3# 16
16 PIDE_DACK# HDD_LED# 39 40 16 SIDE_IORDY 1 2 16 SIDE_IOW# 56
41 42 +5VRUN 55
+5VRUN

2
R647 43 44 47R3 SIDEDRQ 54
15 IRQ14 1 2 46 RP3 R141 53
48 INDEX#_5 1 10 16 SIDE_DREQ 1 2 52
47R3 TRK0#_5 2 9 WDATA#_5 SIDE_D15 51
HDSEL#_5 3 8 STEP#_5 47R3 SIDE_D0 50
16 PIDE_A1
STH-CONN44D-U1 DSKCHG#_5 4 7 RDATA#_5 SIDE_D14 49
16 PIDE_A0
5 6 WP#_5 CD-ROM I/F Signals SIDE_D1 48
16 PIDE_CS1#

1
47
BC308 BC309 TC26 SRP1K SIDE_D13 46
SCD1U SC4D7U10V6KX SE220U6D3VM-1 SIDE_D2 45
16 SIDE_D[0..15]

2
UBAY+5V SIDE_D12 44
FPET7 Elec. P3-54 SIDE_D3 43
UBAY+5V 42
+3VRUN 41
40
BC116 39
R165 SC1000P50V SIDE_D11 38
HDDIORDY 1 2 +3VRUN SIDE_D4 37
SIDE_D10 36
1KR3 BC115 SIDE_D5 35
RN49 RS2N822J1-U SCD1U10V2MX 34
R166 PIRQ 2 3 SIDE_D9 33
SIDERDY 1 2 SIRQ 1 4 SIDE_D6 32
BC580 SIDE_D8 31
1KR3 SC10U10V6ZY-U R500 SIDE_D7 30
RSTDRV#_5 1 2 29
28
0R3-0-U UBAYD0 27
28 HDSEL#_5 26
25
+5VALW 24
28 RDATA#_5
28 WP#_5 23
TP2 DRATE0 22
D35 TPAD30 21
28 TRK0#_5
1

28 CHG_REQ# 1 2 CHG_REQ#_5 20
R692 R343 19
100KR3 28 WGATE#_5
100KR3 18
From Nest device needing charging S1N4148 17
28 WDATA#_5
U44 16
Nest Charging Support
2

CHG_REQ#_5 1 5 15
A VCC 28 STEP#_5
35 AD#_5V_BAY 2 14
B
3 4 PWR_EN1# 28 FDIR#_5 13
GND Y
28 DENSEL_5
(DRATE1) 12
Charing when Adaptor existing NC7SZ32 +5VALW +5VALW 11
28 MTR0#_5
U69 16 USBP1N 10
U42 1 8 16 USBP1P 9
+5VALW GND OUT
1 5 2 7 8
A VCC IN OUT
2 3 6 28 DSKCHG#_5 7
B IN OUT
3 4 UBAY_PWR_EN# 4 5 28 DR0#_5 6
GND Y EN# OUT
1

+3VSUS 5
28 INDEX#_5
R706 NC7SZ08 TPS2013AD 4
100KR3 3
2

CMOS I/P UBAYD2 2


R705 UBAYD1 1
2

100KR3 UBAY_PWR_OFF 81
1

D
1 Q80 MLX-CON80
27 UBAY_PWR_OFF#
G 2N7002
S
2

UltraBay Switch
BAY_SW 25
D11 +3VSUS
1 2 HDD_LED#
UBAYFDD-DRV0 +3VSUS +3VSUS

1
BAT54
DOCKFDD-DRV1 R631 Acer Incorporated
D10 U1C U1D 10KR3 21F,88,Sec. 1,Hsin Tai Wu Rd.
14

14

6 1 TSAHC14 TSAHC14 Hsichih,Taipei Hsien 221.


DR1#_5 28
R632 SW1 Taiwan ,R.O.C.

2
27 BAY_SW# 6 5 8 9 1 2 1
5 2 DR0#_5 Title
10KR3 2
BC668 IDE & USB INTERFACE
7

14 IDE_LED# 4 3 CDROM_LED# SCD1U SW-SENSOR Size Document Number Rev


A3
RB731U
C-Note 2 -3
Date: Friday, January 11, 2002 Sheet 18 of 37
LAN+3VAUX
L14
1 2 LAN+3VAUX_1

0R5
BC484 BC99 BC96 BC451 BC106 BC98
SCD1U SCD1U SCD1U SC4D7U10V6KX SC1U16V5KX-U SCD1U

BC101 BC100 BC97 BC485 BC505


SCD1U SCD1U SCD1U SCD1U SCD1U

P/N update to 22.10177.501


U63
82562ET
11/12
LAN_CLK: 50MHz for 100 BASE-T
25
36
40

12
14
17
19
23

www.kythuatvitinh.com
1

2
7
9

1
5MHz for 10 BASE-T TR3
VCCP
VCCP

VCCA
VCC
VCC

VCCT
VCCT
VCCT
VCCT
VCCA2

VCCR
VCCR
* Place R454,R468 as close to PLW3216S102SQ2 LAN+3VAUX
R110 82562 as possible. For Modem Cable from MDC
0R3-0-U 27 LAN_LED_GN

B5
LILED#

1
1 2 39 32 LAN_LED_YN * Optional Cap: value 6pF - 12pF JK1
15 LAN_JCLK LAN_CLK ACTLED#
34 31 RJ45-10 R3
15 LAN_RXD0 LAN_RXD0 SPDLED# if needed for magnetics

4
35 CN2 330R3
15 LAN_RXD1 LAN_RXD1
15 LAN_RXD2 37 TIP_1 TIP B2
LAN_RXD2 LAN_TDP 1
15 LAN_TXD0 43 10 RING_1 RING B1
LAN_TXD0 TDP 2

2
1
15 LAN_TXD1 44
LAN_TXD1 R468 CON2-10 LAN_LED_GP
15 LAN_TXD2 45 11 LAN_TDN A12
LAN_TXD2 TDN 100R3F
15 LAN_RSTSYNC 42 U62 A11 LAN_LED_GN
LAN_RSTSYNC
15 LAN_RDP A8
RDP LAN+3VAUX
1 16 RX+ RJ45_END1 A7
RD RX

2
26 16 LAN_RDN 2 15 RX- RX-C A6
TOUT LAN 82562 RDN RD RX

1
30 XFR_RDC 3 14 XFR_RXC A5
ISO_TCK CT CT R353
28 4 13 RJ45_END2 A4
R127 29
ISO_TI SSOP48 5
NC NC
12 RX+C A3 330R3
ISO_TEX NC NC
2 1 21 5 LAN_RBIAS100 XFR_TDC 6 11 XFR_CMT TX-C A2
TESTEN RBIAS100 CT CT
7 10 TX+ TX+C A1
TD TX

2
61K9R3F 46 4 LAN_RBIAS10 8 9 TX- A10 LAN_LED_YP
X1 RBIAS10 TD TX

1
A9 LAN_LED_YN
47 41 R454
X2 ADV10
VSSA2

1
X7 100R3F
VSSP
VSSP

VSSA

VSSR
VSSR

XFORM-60
VSS
VSS
VSS
VSS
VSS

A13
1

1
1 2 R381 R380
R437 R438 75R3 75R3
Pulse H0013

2
XTAL-25MHZ-3 75R3 75R3
8
13
18
24
48

33
38

3
6
20
22

2
BC450 BC449 R112 R111 BC430 BC373

2
1
SC18P SC18P 549R3F 619R3F LAN_TERMINAL

BC453 BC452 SC1KP2KV SC1KP2KV


1

SCD1U DUMMY-C3
ADV10 has its own internal
Crystal away from Magnetics. pull-down resistor.

2
Symbol is 82562EM,
Cnote 2 use it to replace 82562ET TR4
1 4
To Port Replicator
2 3 TX+ 30
TX- 30
PLW3216S102SQ2
RX+ 30
RX- 30
LAN_LED_GN 30
LAN_LED_YN 30
TR5
1 4

2 3

PLW3216S102SQ2

Per EMI 8/29

Acer Incorporated
21F, 88, Sec. 1, Hsin Tai Wu Rd.,
Hsichih, Taipei Hsien 221,
Taiwan, R.O.C.
Title
LAN 82562ET
Size Document Number Rev
A3 -3
C-Note 2
Date: Friday, January 11, 2002 Sheet 19 of 37
+3VSUS SKT2
SUS_PCIRST#_3 17,27
CARDBUS-SKT-3

+3VSUS SLOTVCC 1 2

BC638 BC259 BC650 BC234 BC653


SC10U10V6ZY-U SCD1U SCD1U SCD1U SC1000P50V3KX
P/N: 21.H0042.001 CN12

114
130

102
122
138

126

151
U80 CARDBUS150P-U

18
30
44
50

22
42
58
78
94

14
66
86

63

90
(CARDBUS-SKT-12)

6
P_AD31 3 125 ACCBE#3

VCCP

VCCP
VCC

VCC

VCC

VCC
VCC
VCC
VCC

151
AD31 CC/BE3#

G_RST
GND
GND
GND
GND
GND
GND
GND
GND

VCCCB
VCCCB
VCCI
BC654 BC640 BC652 P_AD30 4 116 A_CAD19 75 150
SC1000P50V3KX SCD1U SCD1U AD30 CAD19 B35 A35
P_AD29 5 113 A_CAD17 A_CAD0 74 149
AD29 CAD17 B1 A1
P_AD28 7 111 A_CFRAME# 3 4 ACCD1#_C 73 148
AD28 CFRAME# B36 A36
P_AD27 8 109 A_CTRDY# A_CAD1 72 147
AD27 CTRDY# B2 A2
P_AD26 9 107 A_CDEVSEL# A_CAD2 71 146
AD26 CDEVSEL# B37 A37
P_AD25 10 105 A_CSTOP# A_CAD3 70 145
AD25 CSTOP# B3 A3

PCI signaling
P_AD24 11 103 A_CBLOCK# A_CAD4 69 144
AD24 CBLOCK# B38 A38

Interrupt & Misc I/O


PC card I/F
P_AD23 15 100 A_R2_A18 68 143
AD23 RSVD R245 A_CAD5 B4 A4
P_AD22 16 98 A_CAD16 67 142
AD22 CAD16 GND GND
P_AD21 17 108 A_CCLKXX 1 2 A_CCLK A_CAD6 66 141
P_AD20
P_AD19
19
23
AD21
AD20
CCLK
CIRDY#
110
104
A_CIRDY#
A_CPERR# 33R3
PCMCIA CAGE A_CAD7
A_RFU/D14
65
64
B39
B5
A39
A5
140
139
P_AD18 AD19 CPERR# B40 A40
24 101 A_CPAR A_CC/BE0# 63 138
P_AD17 AD18 CPAR B6 A6
25 112 A_CC/BE2# A_CAD8 62 137
P_AD16 AD17 CC/BE2# B41 A41
26 95 A_CAD12 61 136
P_AD15 AD16 CAD12 B7 A7
38 89 A_CAD9 A_CAD9 60 135
P_AD14 AD15 CAD9 B42 A42
39 97 A_CAD14 A_CAD10 59 134
P_AD13 AD14 CAD14 GND GND
40 99 A_CC/BE1# A_CAD11 58 133
P_AD12 AD13 CC/BE1# B8 A8
41 115 A_CAD18 A_VS1 57 132
P_AD11 AD12 CAD18 B43 A43
43 118 A_CAD20 A_CAD12 56 131
P_AD10 AD11 CAD20 B9 A9
45 120 A_CAD21 55 130
P_AD9 AD10 CAD21 A_CAD13 B44 A44
46 121 A_CAD22 54 129
P_AD8 AD9 CAD22 SLOTVCC B10 A10
47 124 A_CAD23 A_CAD14 53 128

www.kythuatvitinh.com
P_AD7 AD8 CAD23 B45 A45
49 127 A_CAD24 A_CAD15 52 127
AD7 CAD24 B11 A11
P_AD6 51 128 A_CAD25 A_CC/BE1# 51 126
AD6 CAD25 GND GND
P_AD5 52 129 A_CAD26 A_CAD16 50 125
AD5 CAD26 B46 A46
P_AD4 53 87 A_CAD8 49 124
AD4 CAD8 B12 A12
P_AD3
P_AD2
P_AD1
P_AD0
54
55
56
57
AD3
AD2
AD1
PCMCIA RSVD
CAD6
CAD4
84
82
80
77
A_RFU/D14
A_CAD6
A_CAD4
A_CAD2
BC118
SC22U10V0ZY