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PD - 96030

IRF9540NSPbF
IRF9540NLPbF
HEXFET® Power MOSFET
l Advanced Process Technology
l Ultra Low On-Resistance D
l 150°C Operating Temperature
VDSS = -100V
l Fast Switching
l Repetitive Avalanche Allowed up to Tjmax RDS(on) = 117mΩ
G
l Some Parameters are Different from
IRF9540NS/L ID = -23A
l P-Channel S
l Lead-Free
Description D
D
Features of this design are a 150°C junction
operating temperature, fast switching speed and
improved repetitive avalanche rating . These fea- S S
D D
tures combine to make this design an extremely G G
efficient and reliable device for use in a wide D2Pak TO-262
variety of other applications. IRF9540NSPbF IRF9540NLPbF

G D S
Gate Drain Source
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -23 A
ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -14
IDM Pulsed Drain Current c -92
PD @TA = 25°C Maximum Power Dissipation 3.1 W
PD @TC = 25°C Maximum Power Dissipation 110
Linear Derating Factor 0.9 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy d 84 mJ
IAR Avalanche Current c -14 A
EAR Repetitive Avalanche Energy c 11 mJ
dv/dt Peak Diode Recovery dv/dt e -13 V/ns
TJ Operating Junction and -55 to + 150 °C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.1 °C/W
RθJA Junction-to-Ambient (PCB Mount, steady state) g ––– 40
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09/30/05
IRF9540NS/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage -100 ––– ––– V VGS = 0V, ID = -250µA
∆ΒVDSS/∆TJ Breakdown Voltage Temp. Coefficient ––– -0.11 ––– V/°C Reference to 25°C, ID = -1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 117 mΩ VGS = -10V, ID = -14A f
VGS(th) Gate Threshold Voltage -2.0 ––– -4.0 V VDS = VGS, ID = -250µA
gfs Forward Transconductance 5.6 ––– ––– S VDS = -50V, ID = -14A
IDSS Drain-to-Source Leakage Current ––– ––– -50 µA VDS = -100V, VGS = 0V
––– ––– -250 VDS = -80V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = -20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = 20V
Qg Total Gate Charge ––– 73 110 nC ID = -14A
Qgs Gate-to-Source Charge ––– 13 20 VDS = -80V
Qgd Gate-to-Drain ("Miller") Charge ––– 38 57 VGS = -10V f
td(on) Turn-On Delay Time ––– 13 ––– ns VDD = -50V
tr Rise Time ––– 64 ––– ID = -14A
td(off) Turn-Off Delay Time ––– 40 ––– RG = 5.1Ω
tf Fall Time ––– 45 ––– VGS = -10V f
LD Internal Drain Inductance ––– 4.5 ––– nH Between lead,
6mm (0.25in.)
LS Internal Source Inductance ––– 7.5 ––– from package
and center of die contact
Ciss Input Capacitance ––– 1450 ––– pF VGS = 0V
Coss Output Capacitance ––– 430 ––– VDS = -25V
Crss Reverse Transfer Capacitance ––– 230 ––– ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– -23 MOSFET symbol
(Body Diode) A showing the
ISM Pulsed Source Current ––– ––– -92 integral reverse
(Body Diode) c p-n junction diode.
VSD Diode Forward Voltage ––– ––– -1.6 V TJ = 25°C, IS = -14A, VGS = 0V f
trr Reverse Recovery Time ––– 140 210 ns TJ = 25°C, IF = -14A, VDD = -25V
Qrr Reverse Recovery Charge ––– 890 1340 nC di/dt = -100A/µs f
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11) … When mounted on 1" square PCB (FR-4or G-10
‚ Starting TJ = 25°C, L = 0.88mH Material). For recommended footprint and soldering
RG = 25Ω, IAS = -14A. (See Figure 12) techniques refer to application note #AN-994.
ƒ ISD ≤ -14A, di/dt ≤ -620A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C.

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IRF9540NS/LPbF

1000 1000
VGS VGS
TOP -15V TOP -15V
-10V -10V
-ID, Drain-to-Source Current (A)

-ID, Drain-to-Source Current (A)


-8.0V -8.0V
-7.0V -7.0V
100 -6.0V 100 -6.0V
-5.5V -5.5V
-5.0V -5.0V
BOTTOM -4.5V BOTTOM -4.5V

10 10

-4.5V
1 1
-4.5V
≤60µs PULSE WIDTH ≤60µs PULSE WIDTH
Tj = 25°C Tj = 150°C
0.1 0.1
0.1 1 10 100 0.1 1 10 100
-VDS, Drain-to-Source Voltage (V) -VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

100 2.0
TJ = 25°C ID = -14A
RDS(on) , Drain-to-Source On Resistance

VGS = -10V
TJ = 150°C
-ID, Drain-to-Source Current (A)

10 1.5
(Normalized)

1 1.0

VDS = -50V
≤60µs PULSE WIDTH
0.1 0.5
2 4 6 8 10 12 14 -60 -40 -20 0 20 40 60 80 100 120 140 160

-VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance


vs. Temperature
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IRF9540NS/LPbF

10000 20
VGS = 0V, f = 1 MHZ
ID= -14A
Ciss = Cgs + Cgd, Cds SHORTED
VDS = -80V

-VGS, Gate-to-Source Voltage (V)


Crss = Cgd
Coss = Cds + Cgd
16 VDS = -50V
VDS = -20V
C, Capacitance(pF)

Ciss 12

1000
Coss
8
Crss

100 0
1 10 100 0 20 40 60 80 100 120
-VDS , Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)

Fig 5. Typical Capacitance vs. Fig 6. Typical Gate Charge vs.


Drain-to-Source Voltage Gate-to-Source Voltage

100 1000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
-ID, Drain-to-Source Current (A)
-ISD , Reverse Drain Current (A)

TJ = 150°C
100
10

10 100µsec
1msec
TJ = 25°C
1 10msec
1
Tc = 25°C
Tj = 150°C
VGS = 0V Single Pulse
0.1 0.1
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 1 10 100 1000

-VSD , Source-to-Drain Voltage (V) -VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area


Forward Voltage

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IRF9540NS/LPbF
RD
VDS

24 VGS
D.U.T.
RG -
+ VDD
20

-10V
-ID, Drain Current (A)

16 Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

12
Fig 10a. Switching Time Test Circuit

8
td(on) tr t d(off) tf
VGS
4 10%

0
25 50 75 100 125 150 90%
TC , Case Temperature (°C) VDS

Fig 9. Maximum Drain Current vs. Fig 10b. Switching Time Waveforms
Case Temperature

10
Thermal Response ( Z thJC )

1
D = 0.50
0.20
0.1 0.10 R1
R1
R2
R2
R3
R3 Ri (°C/W) τi (sec)
τJ
0.05 τJ τC
0.1737838 0.0000610
τ1 τ2 τ3
τ1
0.02 τ2 τ3 0.4335992 0.0019590
0.01 Ci= τi/Ri
Ci i/Ri 0.4921007 0.0260060
0.01

SINGLE PULSE Notes:


( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF9540NS/LPbF
VDS L

350

EAS , Single Pulse Avalanche Energy (mJ)


ID
RG D.U.T
VDD
300 TOP -6.7A
IAS A -9.6A
-20V DRIVER
tp 0.01Ω BOTTOM -14A
250

200

15V 150

100
Fig 12a. Unclamped Inductive Test Circuit

I AS 50

0
25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)

Fig 13. Maximum Avalanche Energy


vs. Drain Current
tp
V(BR)DSS

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

50KΩ
QG 12V .2µF
.3µF
-10V -
QGS QGD D.U.T. +VDS

VGS
VG
-3mA

IG ID
Charge Current Sampling Resistors

Fig 14a. Basic Gate Charge Waveform Fig 14b. Gate Charge Test Circuit

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IRF9540NS/LPbF
Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations


D.U.T* • Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• ISD controlled by Duty Factor "D" VDD
-
• D.U.T. - Device Under Test
VGS

* Reverse Polarity of D.U.T for P-Channel

Driver Gate Drive


P.W.
Period D=
P.W. Period

[VGS=10V ] ***

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
[VDD]
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% [ ISD]

*** VGS = 5.0V for Logic Level and 3V Drive Devices

Fig 15. For P-Channel HEXFETS


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IRF9540NS/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)

D2Pak Part Marking Information


T HIS IS AN IRF530S WIT H PART NUMBER
LOT CODE 8024 INTERNAT IONAL
AS S EMBLED ON WW 02, 2000 RECTIFIER F530S
IN THE AS S EMBLY LINE "L" LOGO
DAT E CODE
YEAR 0 = 2000
AS S EMBLY
LOT CODE WEEK 02
LINE L

OR
PART NUMBER
INT ERNATIONAL
RECT IFIER F530S
LOGO DATE CODE
P = DES IGNAT ES LEAD - FREE
PRODUCT (OPT IONAL)
AS S EMBLY
YEAR 0 = 2000
LOT CODE
WEEK 02
A = AS S EMBLY S IT E CODE

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IRF9540NS/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)

TO-262 Part Marking Information


EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789 PART NUMBER
INTERNATIONAL
AS S EMBLED ON WW 19, 1997
RECT IFIER
IN T HE AS S EMBLY LINE "C" LOGO
DATE CODE
Note: "P" in assembly line
pos ition indicates "Lead-Free" YEAR 7 = 1997
AS S EMBLY
LOT CODE WEEK 19
LINE C

OR
PART NUMBER
INT ERNATIONAL
RECT IF IER
LOGO
DATE CODE
P = DES IGNATES LEAD-FREE
AS S EMBLY PRODUCT (OPTIONAL)
LOT CODE YEAR 7 = 1997
WEEK 19
A = AS S EMBLY S ITE CODE

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IRF9540NS/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)

TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161) 1.50 (.059)
3.90 (.153) 0.368 (.0145)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)


1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)


12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)


(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Data and specifications subject to change without notice.


This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 09/05
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/

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