[ Roll No.

: 1
National Institute ojr:fecnno{ooy, (])eOii
Nameof the Examination: B. Tech, End (Spring)Semester: 2017-2018
Branch : ECE Semester : IV
Title of the Course :Analog Electronics Course Code : ECB 252
Time: 3 Hours Maximum Marks: 50

Note:
• Questionsare printed on BOTHsides. Answers should be CLEARand TOTHEPOINT.
• Allparts of a single question must be answered together and in the same sequence as given in
question paper. ELSEQUESTIONSHALLNOTBEEVALUATED.

Q1. Consider the cascaded circuit in figure 1 (a) with emitter resistor. Find the [1+1]
input resistance of a single stage and then find the overall input resistance of
the entire circuit if hie = h, = hoe = 0 and hie is same for each of the transistor
Qi to QN.
The small signal equivalent circuit model of each of such transistor is given in
figure 1 (b).

Q2. Answer the following questions properly. [8x1=8]

(a) Cascode transistor configuration consists of a _ stage in series

followed by a stage.

(b) In an amplifier circuit the average power delivered to the load depends on the
phase angle. (True/ False).

(c) In a self or emitter bias circuit, the stability increases as the base resistance
(Rs] increases/ decreases/ remains constant.

(d) An amplifier supplies output current proportional to the signal voltage and
independent of Rs and RL, is known as - trans-resistance/ trans-
conductance/ mutual conductance amplifier.

(e) Monolithic integrated circuit is made on a single Si crystal/ single Si atom/

single Si sheet.
(f) The amplifier in which the operating point is chosen so that the output
current or voltage is zero for more than one half of an input sinusoidal cycle is
known as class AB / class A/ class C/ Class B amplifier.
(g) Phase shift distortion is also known as non-linear distortion/ delay
distortion/ destructive distortion.

(h) Physical model of a transistor includes early feedback generator/ base

spreading resistance/ both.
 Q3. Find out the input impedance (Zin=Vin/Iin)ofthe circuit in figure 2. [2]

Q4. Design an inverter amplifier (also draw the circuit diagram) with gain of 120 [3]
and input impedance of 5 kfl.

Q5. For the summing amplifier shown in figure 3, estimate the values of resistors [3]
Ri, Rz and R3so that the output Vois VO=-(3Vl+VZ+0.2V3)
What is the approximate value of the compensating resistor R?

Q6. Determine the output voltage in the circuit shown in figure 4, ifVa=SV, Vb=-2V [3]
and Vc=3V.

Q7. Calculate the approximate value for the base resistor RB, in the circuit as [4]
shown in figure 5, which will forward bias the emitter junction of silicon
transistor W=100) in the circuit. Collector-emitter voltage VCEof 2.5 V reverse
biases the collector. (VBE=0.7V).

Q8. The operating point values of current Ic(=IcQ) and voltage VCE(=VCEQ) in the [4]
circuit, as shown in figure 6, have magnitudes of 0.9 rnA and 3.72 V
respectively when the current gain P for the transistor is 100. The transistor
in the circuit is replaced by another one with P=200. Calculate the new values
of ICQand VCEQ. What do you infer?

Q9. Design a fixed bias circuit using a silicon transistor having f3 value of 100, [3]
1'cc = 10 V and DC bias condition are to be VCE = SV and Ie = SmA.
Q10. Determine whether the transistor is biased in cutoff, saturation or linear [5]
region, as shown in the figure 7.

a) RB = 330 fl , RE = 3kfl, Re = 1.6kfl

b) RB = 150 fl , RE = 1kfl, Re = 1.6kfl
c) RB = 150 fl , RE = SOOfl, Re = 4kfl

Q11. Determine Ie, VeE' Ie(sat) and VeE(cut of!)' in the figure shown in figure 8, Also, [3]
construct DC load line and plot q-point. Assume f3De = 220 and IE ~ Ie.

Q12. For the circuit as shown in figure 9, V1= 10 sin(200t)and Vz = 15 sin(200t). [5]
What is Vout? The op amp is ideal with infinite gain.

Q13. Evaluate the following amplifier circuit, shown in figure 10, to determine the [5]
value of resistor R4 in order to obtain a voltage gain (Va/Vi) of -120.
===================================================================================================================

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Page 6 of 7
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Page 7 of 7
~
V7.2 Design an inverter amplifier with gain of 120 and input impedance of 5kO. Give the
circuit.

Solution:-
R1

+Vcc

Figure shows the circuit for an inverting amplifier.

Since for an inverting amplifier, the input impedance Zj is,

Zj = R1 = 5kO (desired)
Therefore, R1 = 5kO
Further, the gain Av of inverting amplifier is,

C i MarKJ

And, Av desired is 120, R1 = 5kO

Therefore,

RF = Av.R1 = 120 X 5k
or, RF = 600 kO [ i MarK]
; j'

@).S For the summing amplifier shown in fig .• estimate the values of resistors R,.R2 and R:.
so that the output Va is,

What is the approximate value of the compensating resistor R?

R2
V2

+VCC
R3
V3
Va

R
 < •

Solution:-
The output voltage, Vo, for the summing amplifier is,

[i MOr)<J
Thus for the desired output,

RF = 3 or 30k = 3
R, ' R,
or, R, = 10kO
Similarly,

R
___f_
R2 = 1 ' or R2 = RF = 30 kO [iMorkJ
or, R2 = 30k
And,

-RF = 0.2 or, R3 = RF = 30k

R3 0.2 0.2
or R3 = 150k
And,

R R111 R211 R3
= = 10kl130k 11150k
or, R = 7.0kQ
 I
~7.6 Determinethe output voltagein the circuit shown in fig. If V,= 5V. Vb= -2V and v: = @ .!IV'

1k RF

1 R1

+Vcc
Vo
Va 1k

R1 -VEE
Vb 1k

R2
Vc 1k

R3
Solution:-
In the amplifier circuit shown in fig. Since the resistors R1, R2, and R3 are all equal to 1kG,
the voltage V1, at non-inverting input terminal will be average of the three voltages, Va, Vb,
and v:

Thus,

v. = Va + v;, + V" = 5V - 2V + 3V = 2V [i Mark]

133

And the gain for non-inverting amplifier, Av, is

[ i {\1tHkJ
6) 2.5 Calculate the approximate value for the base resistor R. which will forward bias the
emitter junction of silicon transistor (~ = 100) in the circuit. Collectior - emitter voltage
VeEof 2.5 V reverse biases the collector.

(VSE= 0.7V)

+5V

Rs 1.5k
Ie 1
+
VeE

i
VSE -----+ bE
1k
 , .

Solution:-

We assume that the emitter junction is in forward bias and VSE = 0.7V.
Summation of voltages in the base-emitter circuit results in,

Since lc = IE,
[iMCHI<J

Then above equation yields,

RB. IE +VBE + REIE = Vee

fJ
or IE (; +RE)= Vee -VBE =5.0-0.7

orIE(; +RE )=4.3

Now, summation of voltages in the collector - emitter circuit gives,

Because lc = IE
And substituting for other parameters C i Mo.rk]
IE(Re + RE) = Vee - VeE = 5.0 - 2.5 = 2.5
I 2.5 = 2.5 = 1rnA
or E (Re+RE) (1.5+1)xI03

Substituting IE = 1mA in eq" (A)

lXlO-3(RB
100
+lXI03 )=4.3
Rs = 330 X 1030
or Rs = 330 kO
(§) 2.6 The operating point values of current Ic(=lco) and voltage VCE(=VCEO) in the circuit
have magnitudes of 0.9 mA and 3.72 V respectively when the current gain 13 for the
transistor is 100. The transistor in the circuit is replaced by another one with 13 = 200.
Calculate the new values of leo and VCEa. What do you infer?

+6V (Vee)

1k
R1 4k Re
1 Ie
+
r VeE
O.7V
R2 2k
 l. .

Solution:-

Thevenized voltage Vth across R2 is

2xl03 V
VTH 3 X CC
2xlO +4x103
2
= -x6
6
[i fV)(r<kJ
=2V

That is VTH= 2V

And, as we have derived the relation earlier,

Where Thevenized resistance RTHis

RTH=R111 R2 = 4kl12k = 1.33 kO,

(2 MC\lkb]
Then with 13= 200,
I =1 =1 = 2-0.7
E C cQ 1.3x103 +0.006 X 103
or ICQ = 0.995mA

Further, summation of voltage in the collector circuit under the condition

lc = IE leads to,
Vee = Ie (Re + RE) + VeE

Or, VeE = VeEQ= Vcc-lc (Re + RE)

= 6V - 0.995 rnA (1k + 1.3k)

Or VeEQ = 3.71V

",~
'. ,

ADVANTAGES OF FIXED BIAS CIRCUIT:

~ Circuit is simple
~ The operating point can be fixed anywhere in the active region by varying the value of
Rs Thus if provides maximum flexibility.

DISADVANTAGES:

~ Thermal stability is not provide by the circuit and so the Q -point varies

Since lc Q -point varies

~ Circuit depends on p

~problem

'\::!J Design a fixed bias circuit using a silicon transistor having f3 value of 100, Vee = 10v' and
DC bias condition are to be VCE = SVand 1c = SmA

Solution:
Given:
f3= 100
Vee = lOV
VeE = SV
Ie = SmA

To find: r!
R8 =?
Re =?
18 =?
 ~ .'

To findRc:

Applying KVL to collector circuit ,

10 = 5 x 10-3Rc +5
5
----R
5 x 10-3 - C

To findlB:

WKT1C=p
18

5m
=-
100

To findRB:

Applying KVL to input circuit,

10 - 0.7
50ji = Rs

IR8 = 1861 Kill [0' ~ Mar'<_]

Design: C I·<;" MC\tU 4-« d oCtUt c1'Dfr1amJ
 '. r
,
, .
\

@
Example 6: Determine whether the transistor is biased in cutoff, saturation or
linear region.

(a) RB= 330n ,RE = 3Kn , Rc= I.6Kn

(b) RB= I50n ,RE = IKn ,Rc= 1.6Kn
(c) RB= I50n ,RE = 500n , Rc= 4 Kn

+25 V

~DC = 220

-5V
Figure 5.15 For Example 6.
Solution:

(a) As I - ~DC(VEE - VBE)

c - RB +~DC +1)RE

I = 220(5 - 0.7) = 1.426 rnA

CQ 330Q+(220+1)x3kQ
from VCE ~ (Vcc +VEE)-Ic(Rc +RE), ~DC »1

:. I = VCC +V EE = 5+25 = 6.522 rnA

C(sat) Rc + RE 3 + 1.6

As ICQ < IC(sat),:. this transistor is operated in active mode.

1931 P age
 (;
-,

I = 220(5-0.7) =4.278rnA
CQ 150 Q+ (220 + l)xl kQ
from VCE~ (VCC+ VEE)- r, (Rc + RE), ~DC» 1
.', I = Vcc+VEE=5+25=11.538rnA
C(sat) Rc + RE 1+1.6
As ICQ<IC(sat)'.. this transistor is operated in activemode.

(c) As I - ~DC(VEE-VBE)
C - RB + (r3DC+ I)RE
I = 220(5 - 0.7) = 8.55 rnA
CQ 150Q+(220+1)x500Q n'S J
fY)~ir.&

from VCE~ (VCC+VEE)-Ic(Rc +RE), ~DC»1

:.1 = Vcc + VEE= 5+25 =6.67rnA
C(sat) R, +RE 500 Q+4kQ
As ICQ > IC(sat)"'.this transistor is operatedin saturation mode.

(§) Example 7: Determine Ic,V and VCE(cut ofi). Also, construct DC load line
CE, IC(sat)

and plot Q-point. Assume PDC = 220 and IE_:; Ic.

. Rc=1.6k·
r sv

.I.
,
R.:E=3k
·15v· . .

Figure 5.16 For Example 7.

. -

1941 P age
®14. For the circuit shown below, V, ~ l Osin (200t) and V, = 15sin (200t). What is Vout? The
op amp is ideal with infinite gain.

R2=O.5MQ

Vout

ANSWER:
Any problem with a capacitor (or inductor) in it and sinusoidal voltages immediately indicates that
phasors are required. This means that V 1 and V2 should be represented as phasors, and Cf should
be replaced by an impedance. This problem is not solved very well with the formulas in the
Reference Handbook. This circuit is most easily solved using the virtual short assumption (V+=V_
), and using KCL at the inverting input. Note that the grounding ofV + then requires that V_=O.
This is also called the virtual short assumption.
+V2-0+ V,-O_O-VOIlt=O
R2 R; 'I;wc . /. J
Rationalizing this expression gives + ~~ + ~~ + )roCVOIII = o. L~ MOy)(J
Solvi
o vmg fior Vout gives
. V 0111 =. V2
tee»,
- -.--V,
jroCRj j
It is important to recognize that all sine functions should always be converted to cosines for proper
phase in the phasor expressions, i.e. sin (200t) = cos (200t - 90°) H 1L-90° = -)

Using the circuit parameters given,

_ - )15 - )10 } (2- M ~tJJ
VOIII - )(200) ( 2 x 10-6 )( 0.5x 106 ) - )(200)(2 x 1O-6XO.75X 106)
_ 15 + 10 _ 3 + 1
- 200 300 - 40 30

The answer is then VOIIAt) = (10 + fo )cos (200t) _ [iMQ'rK]

-12-
Copyright F.Merat
 ® 5. Evaluate the following amplifier circuit to determine the value of resistor ~ in order to
obtain a voltage gain (vJVj) of -120.

500kn R2 ~

R,
Vi --
Vo
,;

--

(A) 25 n
(B) 23 kn
(C) 24 kn
(D) 25 ill

Solution:
i2 R2 R4
...

Vi
Rl v+
1"
......,........ Vo
1J

Vjn+is grounded, so Vjn-is also a virtual ground.

Vjn_= 0

[2 {'/)(lrtg J
Similarly,
Vx=-i3R3
Vx-Vo =-i4~

-9-
Copyright F.Merat
From Kirchhoff's current law ,

vx = _(RR2Jv .
I
I

Answer is C.

-10-
Copyright F.Merat