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BE / B.TECH DEGREE EXAMINATION OCT – 2017 16.10.

17
Time: 3 hours Max: 100 Marks
THIRD SEMESTER – ECE
EC 6304 – ELECTRONIC CIRCUITS 1

Answer ALL questions


PART – A (10 X 2 = 20 Marks)
1. What do you meant by thermal runway?
2. Give the expression for stability factor
3. What is the necessary of the coupling capacitor?
4. How are amplifiers classified according to the transistor configuration?
5. State Miller’s Theorem.
6. What is voltage swing limitation?
7. Discuss one advantage of BiCMOS circuit
8. Give relation between rise time and bandwidth
9. Define cut off frequency for a MOSFET.
10. What is meant by matched transistors?
PART – B (5 X 13 =
65 Marks)

11(a) Examine why the biasing is necessary in BJT amplifier? Explain the (13)
concept of DC load line with neat diagram. How will you select the
operating point, explain it using CE amplifier characteristics?
(Or)
11(b) (i) Explain the voltage divider bias method & derive an expression for (6)
stability factors.
(ii) Justify about Collector to Base Bias circuit and derive its (7)
expressions.
12(a) (i) Explain with circuit diagram of Darlington connection and derive the (7)
expression for Ai, Av, Ri &Ro.
(ii) Explain Bootstrap emitter follower circuit. Compare CE, CB, CC (6)
amplifiers.
(Or)
12(b) Consider a single stage CE amplifier with Rs=1kΩ, R1=50KΩ, (13)
R2=2KΩ, RC=2KΩ, RL=2KΩ, hfe=50, hie=1.1 KΩ, hoe=25μmho,
hre=2.5×10-4. Find Ai,Ri,Av,Ais,Avs and R0.
13(a) (i) Derive the small signal analysis of common source amplifier (6)
(ii) Characterize the voltage gain and output resistance of a common- (7)
gate amplifier
(Or)
13(b) (i) Explain common source amplifier with source resistor and source (7)
bypass capacitor.
(ii) Describe the characteristics of and analyze BiCMOS circuits. (6)
14(a) Discuss the frequency response of multistage amplifiers. Calculate (13)
the overall upper & lower cutoff frequencies.
(Or)
14(b) Explain the high frequency analysis of JFET with necessary circuit (13)
diagram & gain bandwidth product.
15(a) Draw the MOSFET cascode current source circuit, explain and (13)
discuss the advantage of this design.
(Or)
15(b) Explain CMOS differential amplifier and derive CMRR. (13)

PART – C (1 X 15 = 15 Marks)

16(a) Write short notes on multistage amplifiers & Draw a two stage RC (15)
coupled amplifier and explain. Compare cascade and cascode
amplifier?
(or)
16(b) Explain the large signal behavior of MOSFETs and compare the (15)
operating regions of Bipolar and MOS transistors.

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