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1mark questions:
unit-4
1.compare ecl,ttl,mos,cmos logic families?
2.how does htl differ from dtl.explain htl logic gate operation?
3.with reference to logic families explain following:
propagation delay
figure of merit
fan out & fan in
4.draw the open collector ttl gate & explain its working?
5.draw an ecl gate & its working?explain why ecl is more fast in logic families?write its
advantages & disadvantages?
unit-3
1.design a 4 bit binary up/down ripple counter?
2.draw ckt diagram of sr latch using 2input nor gate & nand gate also.explain its
operation?
3.draw logic diagram of 4bit shift register.explain iuts operation (i.e in serial &
parallel.shift left & shift right)?
4.with neat diagram ,explain the operation of biderictional shift register?
5.convert sr flipflop into T and D flipflops?
6.draw ckt diagramof jk flipflop using nand gates.what type of problem is encounterd in
this type of flip flop?explain methods to overcome this?
or
what is race around condition i jk fliflop?explain metho of eliminating this problem?
unit-2
1.design:
binary to gray & gray to binatry code convertors?
bcd to excess 3code convertor?
bcd to decimal decoder?
2.design a 4*1 multiplexer & explain its operation ?
3.explain the operation of carry a head adder fopr 4 bit addition with necessary logic
diagrams?
4.explain the operation of:
2bit magnitude comparator
4bit magnitude comparator?
5.explain the op[eration of binary adder with neat diagram?
6.design a bd to 7 segment decocer?
7.realize exor gate using nor & nand gates.explain?
unit-1
1.state & prove demorgans law?
2.implement xor & xnor using nand & nor gates?
3.what is meant by two level & multi level implementation?
4.prove that(a+b)(a'+c)(b+c)=(a+b)(a'+c)?
5simplify & realise nand gates
1.f=abc+bcd+ac'
2.f=abc+bc'd+a'bc
note-conversions,tabulation method,kmaps rae *****