Session – 2

Session Name: Programmable Peripheral

Interfacing - 8255
Author Name: Mahalakshmi B.S
Department: Information Science &
Engineering
Subject/Course: Microprocessors
Cell Number: 9880244249
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Mahalakshmi B.S
BMSCE, B’lore
Session Objectives
At the end of this session, the learner will be able to:

• Define the features of 8255.

• Outline the functional block diagram of 8255 PPI.
• Analyse the programming of 8255 through the modes of 8255.

Teaching Learning Material

• White Board and Markers

• Presentation slides

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Mahalakshmi B.S
BMSCE, B’lore
Session Plan
Time Learning Aid and Faculty Typical Student Learning Outcomes
Content
(in min) Methodology Approach Activity (Blooms Gardeners)

Introduction to
Understanding
Programmable Explains
Board Activity Listens Interpersonal
05 peripheral device- Facilitates
Intrapersonal
8255

Board Activity Explains Understanding

Listens
Features of 8255 Chart Activity Facilitates Intrapersonal
10 Interpersonal

Understanding
Functional diagram Explains Intrapersonal
15 Board Activity Listens Interpersonal
of 8255 Facilitates

Board Activity
Explains Understanding
Chart Activity
15 Modes of 8255 Facilitates Listens Intrapersonal
Unspoken Word
Interpersonal

Remembering
Facilitates Understanding
Question and Monitors
05 Conclusion Answers Intrapersonal
Answers
Interpersonal
Linguistic

Session Inputs

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Mahalakshmi B.S
BMSCE, B’lore
Introduction to Programmable Peripheral device - 8255

This session starts with the introduction to the Peripheral

device – 8255.

The 8255A programmable peripheral interface (PPI)

implements a general-purpose I/O interface to connect
peripheral equipment to a microcomputer system bus. The
core's functional configuration is programmed by the system
software so that external logic is not required to interface
peripheral devices. Features
• Three 8-bit Peripheral Ports - Ports A, B, and C
• Three programming modes for Peripheral Ports: Mode 0
(Basic Input/Output), Mode 1 (Strobed Input/Output), and
Mode 2 (Bidirectional)
• Total of 24 programmable I/O lines
• 8-bit bidirectional system data bus with standard
microprocessor interface controls

Functional diagram of 8255

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Mahalakshmi B.S
BMSCE, B’lore
The diagram shown above shows the 8255 processor. Now the user will
get an idea of working of various blocks like data bus buffer, read/write
control logic and ports of 8255.

Modes of 8255

1. Bit set mode

2. Bit reset mode

After learning about the modes, the users will have the knowledge of
ports and control word of 8255.

Conclusion:

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Mahalakshmi B.S
BMSCE, B’lore
 This topic can be concluded with question and answers.
Facilitator can ask questions and the learners can answer .

Summary
In this session, we learnt to:

• Define the features of 8255.

• Outline the functional block diagram of 8255 PPI.
• Analyse the programming of 8255 through the modes of 8255.
• c

Assignment
1. What are the various applications of 8255.
2. How to interface 8255 PPI with other devices.

References
• www.compeng.dit.ie/staff/tscarff/8255PPI/8255

• Microprocessor X86 Programming – K R Venugopal

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Mahalakshmi B.S
BMSCE, B’lore