A majority logic is a digital circuit whose output is equal to logic 1 if the majority inputs are

1’s.The output is 0 otherwise.

Design and test a three-input majority circuit using NAND gates witha minimum number of
!"’s.#y inspection we can see that the majority inputs and just the in$erse of a NAND gate
with a %input .
Half Adder
There are two inputs and two outputs in a Half Adder. Inputs are named as A
and B, and the outputs are named as Sum (S) and Carry (C). The Sum is X-
OR of the input A and B. Carry is AND of the input A and B. With the help of
half adder, one can design a circuit that is capable of performing simple
addition with the help of logic gates. Let us first take a look at the addition of
single bits.

0+0=0

0+1=1

1+0=1

1 + 1 = 10

These are the least possible single bit combinations. But the result for 1 + 1
=10. This problem can be solved with the help of an EX – OR gate. The sum
results can be re-written as a 2-bit output. Thus the above combination can
be written as

0 + 0 = 00

0 + 1 = 01

1 + 0 = 01

1 + 1 = 10

Here the output “1” of “10” becomes the carry-out. SUM is the normal
output and the CARRY is the carry-out.

The truth table of the half adder is shown below.

Inputs Outputs

A B Sum Carry

0 0 0 0

0 1 1 0
Inputs Outputs

1 0 1 0

1 1 0 1

The Half Adder Circuit is shown below.

The main
disadvantage of this circuit is that it can only add two inputs and if there is
any carry it is neglected. Thus, the process is incomplete. To overcome this
difficulty Full Adder is designed.

What is a Half Subtractor?

Before going to discuss the half subtractor, we have to know the binary subtraction.
In binary subtraction, the process of subtraction is similar to arithmetic subtraction. In
arithmetic subtraction the base 2 number system is used whereas in binary
subtraction, binary numbers are used for subtraction. The resultant terms can be
denoted with the difference and borrow.

Half Subtractor Block Diagram

As in binary subtraction, the major digit is 1, we can generate borrow while the
subtrahend 1 is superior to minuend 0 and due to this, borrow will need. The
following example gives the binary subtraction of two binary bits.

First Digit Second Digit Difference Borrow

0
0 0 0
1 0
0 1
1
0 1 1
0
1 1 0
In the above subtraction, the two digits can be represented with A and B. These two
digits can be subtracted and gives the resultant bits as difference and borrow.

When we observe the first two and fourth rows, the difference of these rows, then the
difference and borrow are similar because subtrahend is lesser than the minuend.
Similarly, when we observe the third row, the minuend value is subtracted from the
subtrahend. So the difference and borrow bits are 1 because the subtrahend digit is
superior to the minuend digit.

Half-Subtractor Block Diagram

The block diagram of the half subtractor is shown above. It requires two inputs as
well as gives two outputs. Here inputs are represented with A&B, and outputs are
Difference and Borrow.

The above circuit can be designed with EX-OR & NAND gates. Here, NAND gate
can be build by using AND and NOT gates. So we require three logic gates for
making half subtractor circuit namely EX-OR gate, NOT gate, and NAND gate.

Combination of AND and NOT gate produce a different combined gate named as
NAND Gate. The Ex-OR gate output will be the Diff bit and the NAND Gate output
will be the Borrow bit for the same inputs A&B.

Digital Logic. Full Subtractor.

A full subtractor is a combinational circuit that performs subtraction of two bits, one
is minuend and other is subtrahend, taking into account borrow of the previous
adjacent lower minuend bit. This circuit has three inputs and two outputs.

Truth Table –
From above table we can draw the K-Map as shown for “difference” and “borrow”.