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Electronics Engineering Department Introduction to VLSI Laboratory Manual

Experiment No. 1 TANNER IC WORK FLOW using “S-EDIT” 1. Objective(s):


The activity aims to introduce the basic principle of Tanner
Tools VLSI design ​2. Intended Learning Outcomes (ILOs):
The students shall be
able to:
2.1 Familiarize the basic of concept of VLSI design. 2.2 Learn the basic
steps and concepts in using the Tanner Tools in VLSI design 2.3
Conduct the experiment by designing the schematic in S-EDIT ​3.
Discussion:

Verylargescale integration (VLSI) is the process of creating integrated circuits by


combining thousands of transistor-based circuits into a single chip.The microprocessor
is a VLSI device. Integrated circuit design involves the creation of electronic
components, such as transistors, resisto rs, capacitors and the metallic interconnect of
these components onto a piece of semiconductor, typically silicon.
Roughly speaking, digital IC design can be divided into
three parts

1. ​ESLdesign: ​This step creates the user functional specification. The user may
use a varity
of languages and tools to create this description. Examples include a C/C++ model,
System,SystemVerilog Transaction Level Models.

2. ​RTL design: ​This step converts the user specification (what the user wants the
chip to do)
into aregister transfer level (RTL) description. The RTL describes the exact behavior
of the digit all circuits on the chip, as well as the interconnections to inputs and
outputs.

3. ​Physical design: ​This step takes the RTL, and a library of available logic gates,
and creates a chip design. This involves figuring out which gates to use, defining
places for them, and wiring them together.

Tanner Tools ​as shown in Figure1 are fully-integrated solutions consisting of


tools for schematic entry, circuit simulation, waveform probing, full-custom layout
editing, placement and routing, netlist extraction, LVS and design rule checking
(DRC) verification.
1
Figure 1: Tanner EDA Design Flow
4. Resources:
Tanner Tools Software

Electronics Engineering Department Introduction to VLSI Laboratory Manual ​2


5. Procedure:
1. Start S-Edit 2. Create a new design with the student’s surname as the design name.
3. Add the Tanner libraries 4. Create a new Cell called “TOP” using the Pull Down
Menus Cell - New View Name = TOP View Type = schematic 5. Setup the simulation
using the Pull Down Menus: Setup – SPICE Simulation Highlight the General Tab of the
Setup SPICE window and set the following: SPICE File Name, Library Files, and
Simulation Results File Name - Check the “Transient/Fourier Analysis” box on the left
and set the following: Stop Time = 2ns Maximum Time Step = 10ps - Click “OK” 6.
Create a new schematic view using the pull-down menus: - Cell - New View Name =

Inverter View Type = schematic 7.Enter the inverter schematic as follow: ​Figure 2:

Inverter Schematic
- Entering the NMOS: Name = M1 L = 0.25u W = 2.5u Model =NMOS - Entering the
PMOS: Name = M2 L = 0.25u

Electronics Engineering Department Introduction to VLSI Laboratory Manual ​3


W = 5.0u Model =PMOS - Entering the Ports: Ports are entered using the icons on the
top of the S-edit window. Enter the following: In Port: Name it “IN” Out Port: Name it
“OUT” In/Out Port: Name it “VDD” In/Out Port: Name it “VSS” - Wire up the Inverter
Enter wire connections as shown in the previous figure. 8. Export a SPICE Netlist.
Exporting a SPICE Netlist is a good idea in order to verify that you have entered the
schematic correctly. With the schematic open, use the pull down menus to perform: -
File – Export – Export SPICE. - Browse to your design directory and give the file name
“Inverter.spc”. 9. Create the Inverter Symbol. Symbols can either be created manually
by creating a new symbol view or automatically by S-edit. We will use the automatic
symbol generation. This will create a new symbol view from the schematic, create the
ports for the symbol, and make a symbol shape. While the shape of the symbol is rarely
what we ultimately want, it will do a lot of the work for us. 10. With the schematic view
open, use the pull down menus to create the symbol view:
Cell – Generate Symbols A new window will come up with a square symbol and 4 ports
with the same names you entered in the Inverter schematic view (i.e., IN, OUT, VDD,
VSS). You should edit the shapes until you have created a symbol that looks like an
inverter:
Figure 3: Inverter Symbol
A note on drawing: The “Path” icon will put you into a mode where you can draw lines
that are not wires. The “Circle” icon will allow you to enter the inversion bubble. The
ports can be rotated by selecting and pressing the “r” button Remember to save. 11.
Instantiate the Inverter in the TOP schematic Open the TOP schematic view using the
pull-down menus: - Cell – Open View: Cell Name: TOP

Electronics Engineering Department Introduction to VLSI Laboratory Manual ​4


View Type: schematic - Click on “Inverter” and you will see your symbol show up in the
symbol viewer. - Click on the “Instance” button and place your symbol in the TOP
schematic. 12. Enter the following circuit in order to power and stimulate your inverter:
Figure 4:
Enter the Pulse Voltage Source. All voltage sources are the same component in the
SPICE_Elements library. The default is DC, but this can be changed to any other type
of source in the properties dialog. Name = Vin_Source MasterInterface = Pulse Period =
1ns PulseWidth = 0.5ns VHigh = 2.5v VLow = 0v RiseTime = 10ps FallTime = 10ps -
Enter a Load capacitor from the Devices library. Name = Cload C =50fF - Enter a DC
Source for VDD Name = VDD_Source MasterInterface = DC V = 2.5v - Enter the
grounds from the Misc library 18 - Enter wire connections and name them Vin and Vout
- Enter a voltage probe for both Vin and Vout 14. Check you design using the pull down
menus: - Tools – Design Checks (any warnings or errors will be shown at the bottom)
15. Simulate your design: - Click on the Green Arrow to start the simulator

Electronics Engineering Department Introduction to VLSI Laboratory Manual ​5


Date
Course: Experiment No.: Group No.: Section: Submitted
Group Members: Date Performed: Instructor:
6. Data and
Results:
A. Inverter Schematic on S-Edit
Workspace

D. Netlist in
T-Spice

B. Inverter testbench in
S-Edit
Electronics Engineering Department
Introduction to VLSI Laboratory

Manual ​6
C. Output 7.
Waveform Conclusion:
Electronics Engineering Department
Introduction to VLSI Laboratory

Manual ​7
8. Assessment:
BEGINNER
CRITERIA ​
1
PROFICIENT
SCORE
3​
I. Laboratory Skills
Manipulative Skills
Members always demonstrate needed skills.
Experimental Set-up
Members do not
Members occasionally demonstrate needed
demonstrate needed skills.
skills
Members are able to set-up the material with minimum supervision.
Process Skills
Members are unable to set-up the materials.
Members are able to set- up the materials with supervision.
Members do not
Members occasionally
Members always demonstrate targeted
demonstrate targeted
demonstrate targeted process skills.
process skills.
process skills.
Members do not follow
Safety Precautions ​
safety precautions.
Members follow safety precautions at all times. ​II. Work Habits ​Time Management / Conduct of
Members do not finish on
Experiment ​
time with incomplete data.
Members follow safety precautions most of the time.
Members finish ahead of time with complete data and time to revise data.
Cooperative and Teamwork
Members finish on time with incomplete data.
Members are on tasks and have defined responsibilities at all times. Group conflicts are
cooperatively managed at all times.
Neatness and Orderliness
Members do not know their tasks and have no defined responsibilities. Group conflicts have to
be settled by the teacher.
Members have defined responsibilities most of the time. Group conflicts are cooperatively
managed most of the time.
Clean and orderly workplace at all times during and after the experiment.
Ability to do independent work
Clean and orderly Messy workplace during
workplace with and after the experiment.
occasional mess during and after the experiment. Members require
Members require
Members do not need supervision by the
occasional supervision
to be supervised by teacher.
by the teacher.

the teacher. Other Comments/Observations: ​Total Score


9. Reference(s):
Electronics Engineering Department Introduction to VLSI Laboratory Manual
ACCEPTABLE
2