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Design Details :MCS9835CV-BA Based PCI to Two Serial and one Parallel Port
Evaluation Board :MCS98XXCV-BA EVB - Combo All information contained in this document is subject
to change without notice. This document is Preliminary.
CHIP : MCS9835CV-BA PCI Based Peripheral Controller The information contained in this document is provided
on an " AS IS" Basis. In no event will ASIX be liable
Title : MCS9835CV-BA for damages arising directly or indirectly from any use
D D
Assembly :128 Pin QFP Package Outline of the information contained in this document.

For technical queries write to

support@asix.com.tw

Note :1. " - NP " Refers to DO NOT POPULATE. These are extra provisions
and not required for Normal Operation
C
2. All Resistors can be" +/- 5 %" tolerance unless specified. C

3. Use " +/- 10% " tolerance capacitors unless specified otherwise.

MCS9835CV-BA : App lication Block Diagram

DB25 - Female Connector

RC Network
Line-Driver
DB9-M

B B
RS232
Line-Driver

MCS9835CV-BA
22.1184MHz
DB9-M

RS232

SERIAL
EEPROM

5V-PCI EDGE Fingers

A A
ASIX ELECTRONICS CORPORATION
Title
MCS9835CV-BA Block Diagram

Size Document Number Rev

A4 MCS9835CV-BA Based 2S1P 1.00

Date: Thursday, August 18, 2011 Sheet 1 of 5

5 4 3 2 1
 5 4 3 2 1

+5.0V U1A
PCI_ C/BE0 43 53 PCI_AD0
PCI_ C/BE1 nC/BE0 AD0 PCI_AD1
32 nC/BE1 AD1 52
PCI_ C/BE2 22 51 PCI_AD2
+5.0V PCI_ C/BE3 nC/BE2 AD2 PCI_AD3
8 nC/BE3 AD3 50
+5.0V 49 PCI_AD4
+ CT2 CC20 AD4 PCI_AD5
AD5 48
0.1uF 47 PCI_AD6
10uF/25V AD6
PC I_FRAME 23 46 PCI_AD7
PCI_STOP nFRAME AD7 PCI_AD8
D 27 nSTOP AD8 42 D
CN1A CN1B PC I_LOCK 28 41 PCI_AD9
P C I_ IR D Y nLOCK AD9 PC I_AD10
A1 -TRST A1 B1 -12V B1 24 nIRDY AD10 40
A2 B2 G ND P CI_TRDY 25 38 PC I_AD11
+12V A2 B2 TCK PCI_INTA nTRDY AD11 PC I_AD12
A3 TMS A3 B3 GND B3 120 nINTA AD12 37
A4 B4 36 PC I_AD13

PCI SIGNALS
TDI A4 B4 TD0 AD13 PC I_AD14
A5 +5V A5 B5 +5V B5 AD14 35
PCI_INTA A6 B6 34 PC I_AD15
-INTA A6 B6 +5V PCI_IDSEL AD15 PC I_AD16
A7 -INTC A7 B7 -INTB B7 9 IDSEL AD16 18
A8 B8 PCI_DEVSEL 26 17 PC I_AD17
+5V A8 B8 -INTD R1 0R PCI_PAR nDEVSEL AD17 PC I_AD18
A9 RSVD1 A9 B9 -PRSNT1 B9 31 PAR AD18 16
A10 B10 15 PC I_AD19
VIO A10 B10 RSVD1 R2 0R PCI_CLK AD19 PC I_AD20
A11 RSVD2 A11 B11 -PRSNT2 B11 122 CLK AD20 14
A12 B12 13 PC I_AD21
GND GND P CI_RST AD21 PC I_AD22
A13 GND GND B13 121 nRESET AD22 12
A14 B14 G ND 11 PC I_AD23
P CI_RST VAUX A14 B14 RSVD2 AD23 PC I_AD24
A15 -RST A15 B15 GND B15 AD24 6
A16 B16 PCI_CLK 5 PC I_AD25
VIO A16 B16 CLK AD25 PC I_AD26
A17 -GNT A17 B17 GND B17 AD26 4
A18 B18 3 PC I_AD27
GND A18 B18 -REQ PCI_ PERR AD27 PC I_AD28
A19 PME- A19 B19 VIO B19 29 nPERR AD28 2
PC I_AD30 A20 B20 PC I_AD31 PCI_ SERR 30 128 PC I_AD29
AD30 A20 B20 AD31 PC I_AD29 nSERR AD29 PC I_AD30
A21 +3.3V A21 B21 AD29 B21 AD30 127
PC I_AD28 A22 B22 126 PC I_AD31
PC I_AD26 AD28 A22 B22 GND PC I_AD27 AD31
A23 AD26 A23 B23 AD27 B23
A24 B24 PC I_AD25 MCS9835CV-BA
PC I_AD24 GND A24 B24 AD25
A25 AD24 A25 B25 +3.3V B25
PCI_IDSEL A26 B26 PCI_ C/BE3
IDSEL A26 B26 -C/BE3# PC I_AD23
A27 +3.3V A27 B27 AD23 B27
C PC I_AD22 A28 B28 C
AD22 A28 B28 GND
PC I_AD20 A29 AD20 A29 B29 AD21 B29 PC I_AD21 Layout Guidelines:
A30 B30 PC I_AD19
PC I_AD18 GND A30 B30 AD19
A31 AD18 A31 B31 +3.3V B31 >> The maximum trace lengths for all 32-bit interface signals are
PC I_AD16 A32 B32 PC I_AD17
A33
AD16 A32 B32 AD17
B33 PCI_ C/BE2 limited to 1.5 inches for 32-bit
PC I_FRAME +3.3V A33 B33 -/CBE2#
A34 -FRAME A34 B34 GND B34 >> The trace length for the PCI CLK signal is 2.5 inches ?0.1
A35 B35 P C I_ IR D Y
P CI_TRDY A36
GND A35 B35 -IRDY
B36
inches for 32-bit
-TRDY A36 B36 +3.3V PCI_DEVSEL
A37 GND A37 B37 -DEVSEL B37 >> The maximum component height on the primary component side of the
PCI_STOP A38 B38
A39
-STOP A38 B38 PCIXCAP
B39 PC I_LOCK PCI add-in card is not to exceed 0.570 inches (14.48 mm).
+3.3V A39 B39 -LOCK PCI_ PERR
A40 SMBCLK A40 B40 -PERR B40 >> The maximum component height on the back side of the add-in card
A41 B41
A42
-SMBDAT A41 B41 +3.3V
B42 PCI_ SERR is not to exceed 0.105 inches (2.67 mm).
PCI_PAR GND A42 B42 -SERR
A43 PAR A43 B43 +3.3V B43
PC I_AD15 A44 B44 PCI_ C/BE1
AD15 A44 B44 -C/BE1# PC I_AD14
A45 +3.3V A45 B45 AD14 B45
PC I_AD13 A46 B46
PC I_AD11 AD13 A46 B46 GND PC I_AD12 V CC
A47 AD11 A47 B47 AD12 B47
A48 B48 PC I_AD10
PCI_AD9 GND A48 B48 AD10
A49 AD9 A49 B49 M66EN B49
N/C A50 (5V KEY) B50 N/C (5V KEY)
N/C A51 (5V KEY) B51 N/C (5V KEY)
PCI_ C/BE0 A52 B52 PCI_AD8
-C/BE0# A52 B52 AD8 PCI_AD7 V CC +5.0V
A53 +3.3V A53 B53 AD7 B53
PCI_AD6 A54 B54
AD6 A54 B54 +3.3V

104
114
PCI_AD4 PCI_AD5

10
19
39
54
66
82
89
A55 AD4 A55 B55 AD5 B55

1
PCI_AD3 U1B
A56 GND A56 B56 AD3 B56
B PCI_AD2 B
A57 B57

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
PCI_AD0 AD2 A57 B57 GND PCI_AD1
A58 AD0 A58 B58 AD1 B58
A59 VIO A59 B59 VIO B59
A60 -REQ64 A60 B60 -ACK64 B60
A61 +5V A61 B61 +5V B61
A62 +5V A62 B62 +5V B62 POWER SUPPLIES
5 V - PC I Edge Fi ngers
7 GND GND 125
20 GND GND 119
21 GND GND 108
33 99

GND
GND
GND
GND
GND
GND
GND GND

G ND G ND
MCS9835CV-BA

44
45
60
77
88
94
V CC

G ND
C C4 C C5 C C6 C C7 C C8 C C9 CC10 CC11 CC12 CC13 CC14
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

A A

G ND

CC15 CC16 CC17 CC18

0.01uF 0.01uF 0.01uF 0.01uF ASIX ELECTRONICS CORPORATION
Title
PCI GOLD FINGER AND POW ER CONNECTIONS

Size Document Number R ev

G ND A3 MCS9835CV-BA Based 2S1P 1.00

D ate: T h u r sd ay, A u g u st 1 8 , 2 0 1 1 Sheet 2 of 5

5 4 3 2 1
 5 4 3 2 1

U 1C
105 TX_A PW R1
TX_A C C 25
107 nR TS_A
nRTS_A nDT R_A PW R 1 +5.0V
106

UART - A
R 33 2 2R UARTA_CLK nDTR_A R X_A
59 109
ACLK RX_A n CD_A
112
nCD_A nRI_A G ND 0.1uF
113
nRI_A nC TS_A
111
nCTS_A n DSR_A
55 110
RESERVED1 nDSR_A C C 26
56

26
C LK_12X RESERVED2 0.1uF U2
58
UART_CLK TX_B
76 28

VCC
TX_B nR TS_B C1+
74 24 27
D nRTS_B nDT R_B C1- V+ D

UART - B
75
nDTR_B R X_B
73 1 3
R 35 2 2R UARTB_CLK RX_B n CD_B C2+ V-
57 70 2
BCLK nCD_B C2-
nRI_B
69
71
nRI_B
nC TS_B
C C 27
0.47uF TX_A 14 9 sTX_A C C 28 C C 29
SERIAL PORT 1 CONNECTIONS
nCTS_B n DSR_B T1IN T1OUT 0.47uF 0.47uF
72
EE_CS nDSR_B
115
EE_C LK EE-CS nR TS_A sRT S_A
116 13 10
EE_DI R 15 0R EE-CLK T2IN T2OUT G ND G ND
118 68
EE_DO EE-DI NC68
117
J3 EE-DO nDT R_A sDTR _A
123 67 12 11
EE-EN TEST_MODE_N T3IN T3OUT
124
Mount Jumper to Disable SCAN_EN
R 12 the EEPROM XTAL1
20

XTAL2
R2OUT
1K
n CD_A 19 4 s C D_A

11
R1OUT R1IN C N2
MCS9835CV-BA
62

61
G ND nRI_A 18 5 s RI_A s C D_A 1
R2OUT R2IN s D SR_A 6
sR X_A 2
Y1 Crystal ( Y1) Part # R X_A 17 6 sR X_A sRT S_A 7
R3OUT R3IN sTX_A
HC49US22.1184MABJ-UB 3
sCT S_A 8
22.1184MHz nC TS_A 16 7 sCT S_A sDTR _A 4
R4OUT R4IN s RI_A 9
PW R 1 5
R 21 n DSR_A s D SR_A
15 8
R5OUT R5IN
1M - NP DB9_RA_M

10
R 17 1K
22
C C 40 C C 41 SHUTDOWN C C 31 C C 36 C C 37 C C 32 C C 33 C C 34 C C 35 C C 30
18pF 18pF R 19 1K 180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF
23
ONLINE 50V 50V 50V 50V 50V 50V 50V 50V

GND
21 C C 39
G ND G ND STATUS
C SN75C3243 C

25
0.1uF

C C 43
G ND

0.1uF

G ND G ND

PW R1
C C 44

G ND 0.1uF

C C 45

26
0.1uF U4
28

VCC
C1+
24 27
C1- V+
1 3
SERIAL PORT 2 CONNECTIONS
C2+ V-
2
C C 48 C2-
0.47uF TX_B 14 9 sTX_B C C 46 C C 47
T1IN T1OUT 0.47uF 0.47uF

nR TS_B 13 10 sRT S_B

B T2IN T2OUT G ND G ND
B

EEPROM INTERFACE : OPTIONAL nDT R_B sDTR _B

12 11
T3IN T3OUT
+5.0V

11
20
R2OUT C N3
U3
8 1 EE_CS n CD_B 19 4 s C D_B s C D_B 1
VCC CS R1OUT R1IN s D SR_B 6
6 2 EE_C LK sR X_B 2
ORG CLK nRI_B s RI_B sRT S_B
18 5 7
C C 42 EE_DI EE_DO R2OUT R2IN sTX_B
4 3 3
0.1uF DO DI sCT S_B 8
R X_B 17 6 sR X_B sDTR _B 4
R3OUT R3IN s RI_B
7 5 9
G ND NC VSS
5
93LC46B nC TS_B 16 7 sCT S_B
R4OUT R4IN
DB9_RA_M
G ND

10
PW R1 n DSR_B 15 8 s D SR_B
R5OUT R5IN C C 51 C C 52 C C 53 C C 54 C C 55 C C 56 C C 57 C C 58
180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF
R 43 1K 50V 50V 50V 50V 50V 50V 50V 50V
22
SHUTDOWN C C 59
R 45 1K
23
ONLINE
GND

21 0.1uF
STATUS
SN75C3243 C C 60
25

0.1uF
G ND G ND

G ND
A A

Note:
The 180pF capacitors for the Serial Port Signals
are for EMI purpose only and are optional.

ASIX ELECTRONICS CORPORATION

Title
RS232 SERIAL PORT INTERFACE

Size Document Number R ev

C MCS9835CV-BA Based 2S1P 1.00

Date: T hur s day , Augus t 18, 2011 Sheet 3 of 5

5 4 3 2 1
 5 4 3 2 1

D D

PARALLEL PORT 'A' INTERFACE

+5.0V

D1
U 1D
90 P D0 BAT54
PD0
91 P D1
PD1 C C 86
92 P D2
PD2 0.1uF
93 P D3
PD3
95 P D4
PD4
96 P D5
PD5

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4
C 97 P D6 G ND C
PD6

4.7K 5%

4.7K 5%

4.7K 5%

4.7K 5%
R P1

R P2

R P3

R P4
98 P D7
PD7

4.7K 5%
81
PARALLEL PORT_A SIGNALS

STRB

R 82
nSTROBE
80 AFDX
nAUTOFDX
79 INIT
nINIT
78 SLCTIN

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5
nSLCTIN
83 FAULT
nFAULT
84 SLCT
SLCT
85 B U SY
BUSY
86 AC K
nACK
87 PE
PE C N6
R P5 33R 5%
P D7 1 8 9
PD7
P D6 2 7 8 26
PD6 SHLD1
63 P D5 3 6 7 27
PPDIR PD5 SHLD2
64 P D4 4 5 6
NC64 PD4
65 P D3 1 8 5
NC65 PD3
P D2 2 7 4
PD2
100 P D1 3 6 3
NC100 PD1
101 P D0 4 5 2
NC101 PD0
102 R P6 33R 5%
NC102
103 FAULT 15
NC103 R 84 0R ERR C C 88
R P7 33R 55%
SLCTIN 4 17 18
SLIN GND0
INIT 3 6 16 19
MCS9835CV-BA INIT GND1 0.1uF
AFDX 2 7 14 20
AFD GND2
STRB 1 8 1 21
STRB GND3 R 83 1M
22
GND4
A CK 1 8 10 23
ACK GND5 C C 89
B U SY 2 7 11 24
BUSY GND6
PE 3 6 12 25
PE GND7
SLCT 4 5 13
SLCT 0.1uF
R P8 0R 5%
PRT_25_F
C C90 C C91 C C92 C C93 C C94 C C95 C C96 C C97 C C 98 C C 99 C C100 C C101 C C102 C C103 C C104 C C105 C C106 G ND
180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF 180pF
B B

G ND

A A

ASIX ELECTRONICS CORPORATION

Title
PARALLEL PORT- A INTERFACE

Size Document Number R ev

C MCS9835CV-BA Based 2S1P 1.00

Date: T hur s day , Augus t 18, 2011 Sheet 4 of 5

5 4 3 2 1
 5 4 3 2 1

Revision History
Revision Date Comment
D Ver.A 2008/05/14 Initial Release. D

V1.00 2011/08/18 1.Changed to ASIX Electronics Corp. logo/strings

and revision number format.
2.Added Revision History page.

C C

B B

A A
ASIX ELECTRONICS CORPORATION
Title
History

Size Document Number Rev

A MCS9835CV-BA Based 2S1P 1.00

Date: Thursday, August 18, 2011 Sheet 5 of 5

5 4 3 2 1