Acer Ao756 q1vzc - La-8941pr10

A B C D E
schematic-laptop.blogspot.com
Compal Confidential ZZZ5
ZZZ1 ZZZ2 ZZZ3 ZZZ4
Model Name : Q1VZC

LA-8941P LS-8941P LS-8942P LS-8943P
File Name :LA-8941P PCB
DAZ@
DA2@ DA2@ DA2@ DA2@
1 1
BOM P/N:43
Compal Confidential
2 2
Q1VZC M/B Schematics Document

Intel Sandy Bridge ULV Processor + Panther Point PCH
3 2012-04-19 3
REV:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/11/22 Deciphered Date 2012/11/22 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Q1VZC M/B LA-8941P Schematic
Date: Friday, April 20, 2012 Sheet 1 of 45
A B C D E
A B C D E
Compal Confidential
Model Name : Q1VZC
File Name :LA-8941P
1
Memory BUS(DDRIII) 204pin DDRIII-SO-DIMM X2 1
Intel BANK 0, 1, 2, 3 page 11,12

Dual Channel
Sandy Bridge ULV 1.5V DDRIII 1066/1333
Processor
eDP(UMA) BGA1023
17W
page 4~10
FDI x8 DMI x4
USB 2.0 USB 2.0 CMOS
CRT Conn HDMI Conn. LVDS/eDP Conn. CLK=100MHz CLK=100MHz conn x1(Option for USB3.0) conn x2 Camera
page 24 page 23 page 22 2.7GT/s 2.5GB/s x4 page 34 page 30 page 22
2
LVDS(UMA) USBx14 Port 1 Port 2,3 Port 10 2
3.3V 48MHz
Port 8
TMDS(UMA) Intel
RGB(UMA) LAN(GbE)/CardReader MINI Card
Broadcom
57785page WLAN
Panther Point-M 25 page 36
HD Audio
PCI-Express x 8 Port 3 Port 2
3.3V 24MHz
PCH (PCIE2.0 5GT/s) 100MHz
SPI
HDA Codec SATA x 6 (GEN2 3.0GT/S ,GEN3 6GT/S)
ALC271X-VB6 100MHz
page 31 989pin BGA GEN3 Port 0
LS-8941P
page 13~21 SATA HDD LED/B
3
Conn. page 30 3
page 24
Int. Speaker SPI ROM x2 LPC BUS
page 31 page 13 CLK=33MHz LS-8942P
ENE IO/B
page 28
KB9012
RTC CKT. page 29
page 13 LS-8943P
HDD/B
page 24
Power On/Off CKT.
page 36 Touch Pad Int.KBD TPM
page 30 page 30 page 30
4 DC/DC Interface CKT. 4
page 33

Power Circuit DC/DC Issued Date 2011/11/22 Deciphered Date 2012/11/22 Title
Block Diagrams
page 34~43 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A B C D E
A B C D E
STATE
SIGNAL
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
BATT+ Battery power supply (12.6V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
1 1
+CPU_CORE Core voltage for CPU ON OFF OFF
S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+VGFX_CORE Core voltage for UMA graphic ON OFF OFF
+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator ON OFF OFF Board ID / SKU ID Table for AD channel
+1.05VS_VTT +1.05VS_VTTP to +1.05VS_VTT switched power rail for CPU ON OFF OFF Vcc 3.3V +/- 5%
+1.5V +1.5VP to +1.5V power rail for DDRIII ON ON OFF Ra/Rc/Re 100K +/- 5%
+1.5VS +1.5V to +1.5VS switched power rail ON OFF OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU ON OFF OFF 0 0 0 V 0 V 0 V
+3VALW +3VALW always on power rail ON ON ON* 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+VCCSUS3_3 +3VALW to +VCCSUS3_3 power rail for PCH (Short Jump) ON ON ON* 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+3VS +3VALW to +3VS power rail ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+5VALW +5VALWP to +5VALW power rail ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+5VREF_SUS +5VALW to +5VREF_SUS power rail for PCH (Short resister) ON ON ON* 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+5VS +5VALW to +5VS switched power rail ON OFF OFF 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+VSB +VSBP to +VSB always on power rail for sequence control ON ON ON* 7 NC 2.500 V 3.300 V 3.300 V
+RTCVCC RTC power ON ON ON
2
BOARD ID Table 2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. Board ID PCB Revision BTO Option Table
0 0.1 BTO Item BOM Structure
1 0.2 Celeron 867 C867@
2 0.3 Pentium 977 P977@
3 1.0 Unpop @
4 eDP Panel EDP@
EC SM Bus1 address 5 LVDS Panel LVDS@
6 Connector CONN@
Device Address
Smart Battery 0001 011X b
7 USB3 Only USB3@
Deep S3 DS3@
PCH SM Bus address USB Port Table Normal S3 S3@
3 External Intel i5/i7 CPU only I57@
Device Address USB 2.0 USB 1.1 Port USB Port
ChannelA DIMM0 A0 1010 000X JDIMM1(STD) Celeron/Pentium/i3 CP3@
ChannelB DIMM0 B0 1010 010X JDIMM2(REV) 0 CPU only
UHCI0
1 USB 2.0(Options for USB3.0)
3 3
2 USB port(Left 2.0)
UHCI1
3 USB Port(Left 2.0)
EHCI1
4
UHCI2
5
USB 3.0 Port
6
UHCI3 1
7
2 USB Port(Right 3.0)
8 Mini Card(WLAN) XHCI
UHCI4 3
9
4
10 Camera
EHCI2 UHCI5
11
12
UHCI6
13
4 4

2011/11/22 2012/11/22 Title
Issued Date Deciphered Date Notes List
A B C D E
A B C D E
schematic-laptop.blogspot.com PEG_ICOMPI and RCOMPO signals should be

shorted and routed
with - max length = 500 mils - typical
+1.05VS_VTT
impedance = 43 mohms
PEG_ICOMPO signals should be routed with -
1
max length = 500 mils
R1 - typical impedance = 14.5 mohms
24.9_0402_1%
UCPU1A
W=12mil L=500mil S=15mil
2
1 G3 PEG_COMP 1
PEG_ICOMPI G1
M2 PEG_ICOMPO G4
<15> DMI_CRX_PTX_N0 DMI_RX#[0] PEG_RCOMPO
P6
<15> DMI_CRX_PTX_N1 DMI_RX#[1]
P1
<15> DMI_CRX_PTX_N2 DMI_RX#[2]
P10 H22 C867@ Celeron 867 HR 1.3G SA00005BH40(S IC AV8062701148901 SR0FK J1 1.3G ABO!)
<15> DMI_CRX_PTX_N3 DMI_RX#[3] PEG_RX#[0] J21
N3 PEG_RX#[1] B22
<15> DMI_CRX_PTX_P0 DMI_RX[0] PEG_RX#[2] P977@ Pentium 977 HR 1.4G SA00005BJ50(S IC AV8062701147701 SR0FB J1 1.4G ABO!)
P7 D21
<15> DMI_CRX_PTX_P1 DMI_RX[1] PEG_RX#[3]
DMI
P3 A19 I2467@ i5-2467M HR 1.6G SA00004X010(S IC AV8062701047504 SR0D6 J1 1.6G ABO!)
<15> DMI_CRX_PTX_P2 DMI_RX[2] PEG_RX#[4]
P11 D17
<15> DMI_CRX_PTX_P3 DMI_RX[3] PEG_RX#[5] B14 I2367@ i3-2367M HR 1.4G SA000051H60( S IC AV8062701047904 SR0CV J1 1.4G ABO! )
K1 PEG_RX#[6] D13
<15> DMI_CTX_PRX_N0 DMI_TX#[0] PEG_RX#[7]
M8 A11 C877@ Celeron 877 HR 1.4G SA00005QI00( S IC AV8062701148001 QB35 J1 1.4G BGA)
N4 B10
R2 G8 P987@ Pentium 987 HR 1.5G SA00005QH00(S IC AV8062701147601 QB31 J1 1.5G BGA)
<15> DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] A8
K3 PEG_RX#[11] B6
<15> DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12] P967@ Pentium 967 HR 1.3G SA000051J40(S IC AV8062701147801 SR0FC J1 1.3G ABO!)
M7 H8
<15> DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13]
P4 E5 I2377@ i3-2377M HR 1.5G SA00005MX10(S IC AV8062701048004 QAXQ J1 1.5G BGA)
T3 K7
I3317@ i5-3317U CR 1.7G SA00005K650(S IC AV8063801058002 QC9E L1 1.7G BGA)
K22
PEG_RX[0] K19
PEG_RX[1] I3667@ i7-3667U CR 2G SA00005LA50(S IC AV8063801057405 QC9B L1 2G BGA 1023)
C21
U7 PEG_RX[2] D19
<15> FDI_CTX_PRX_N0 FDI0_TX#[0] PEG_RX[3] I3217@ i3-3217U CR 1.8G SA00005L530(S IC AV8063801058400 QC56 L0 1.8G ABO!)
W11 C19
<15> FDI_CTX_PRX_N1 FDI0_TX#[1] PEG_RX[4]
<15> FDI_CTX_PRX_N2 W1 D16 I3427@ i5-3427U CR 1.8G SA00005L9A0(S IC AV8063801057801 SR0N7 L1 1.8G BGA)
AA6 FDI0_TX#[2] PEG_RX[5] C13
2
<15> FDI_CTX_PRX_N4 W6 D12 I3517@ i7-3517U CR 1.9G SA00005K540(S IC AV8063801057605 QC9C L1 1.9G BGA) 2
V4 FDI1_TX#[0] PEG_RX[7] C11
PCI EXPRESS -- GRAPHICS

<15> FDI_CTX_PRX_N6 Y2 C9
AC9 FDI1_TX#[2] PEG_RX[9] F8
Intel(R) FDI
C8
PEG_RX[11] C5
U6 PEG_RX[12] H6
<15> FDI_CTX_PRX_P0 FDI0_TX[0] PEG_RX[13]
W10 F6 UCPU1 UCPU1 UCPU1 UCPU1
<15> FDI_CTX_PRX_P1 FDI0_TX[1] PEG_RX[14]
<15> FDI_CTX_PRX_P2 W3 K6
AA7 FDI0_TX[2] PEG_RX[15]
<15> FDI_CTX_PRX_P3 FDI0_TX[3]
<15> FDI_CTX_PRX_P4 W7 G22
T4 FDI1_TX[0] PEG_TX#[0] C23
<15> FDI_CTX_PRX_P5 FDI1_TX[1] PEG_TX#[1]
<15> FDI_CTX_PRX_P6 AA3 D23
AC8 FDI1_TX[2] PEG_TX#[2] F21 AV8062701147701 AV8062701047504 AV8062701047904 AV8062701148001
<15> FDI_CTX_PRX_P7 FDI1_TX[3] PEG_TX#[3] H19 P977@ I2467@ I2367@ C877@
+1.05VS_VTT AA11 PEG_TX#[4] C17
<15> FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5]
eDP_COMPIO and ICOMPO signals AC12 K15 SA00005BJ50 SA00004X010 SA000051H60 SA00005QI40
<15> FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] F17
should be shorted near balls and U11 PEG_TX#[7] F14
routed with typical impedance <15> FDI_INT FDI_INT PEG_TX#[8] A15 UCPU1 UCPU1 UCPU1
PEG_TX#[9]
1
<25 mohms <15> FDI_LSYNC0

AA10
FDI0_LSYNC PEG_TX#[10]
J14
can't be left floating R2 AG8 H13
<15> FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11]
24.9_0402_1% M10
,even if disable eDP function... PEG_TX#[12] F10
PEG_TX#[13] D9
2
PEG_TX#[14] J4 AV8062701147601 AV8062701147801 AV8062701048004

EDP_COMP AF3 PEG_TX#[15] P987@ P967@ I2377@
AD2 eDP_COMPIO F22
EDP_HPD# AG11 eDP_ICOMPO PEG_TX[0] A23
3 eDP_HPD# PEG_TX[1] SA00005QH50 SA000051J40 SA00005MX60 HR(Sandy Bridge) 3
D24
PEG_TX[2] E21
AG4 PEG_TX[3] G19
<22> EDP_AUXN AF4 eDP_AUX# PEG_TX[4] B18
<22> EDP_AUXP eDP_AUX PEG_TX[5] K17
eDP PEG_TX[6] G17 UCPU1 UCPU1 UCPU1
+1.05VS_VTT AC3 PEG_TX[7] E14
<22> EDP_TXN0 eDP_TX#[0] PEG_TX[8]
AC4 C15
<22> EDP_TXN1 eDP_TX#[1] PEG_TX[9]
AE11 K13
eDP_TX#[2] PEG_TX[10]
1
AE7 G13
R3 eDP_TX#[3] PEG_TX[11] K10
1K_0402_5% AC1 PEG_TX[12] G10 AV8063801058002 AV8063801057405 AV8063801058401
<22> EDP_TXP0 eDP_TX[0] PEG_TX[13]
EDP@ AA4 D8 I3317@ I3667@ I3217@
<22> EDP_TXP1 eDP_TX[1] PEG_TX[14]
AE10 K4
2
AE6 eDP_TX[2] PEG_TX[15]

eDP_TX[3] SA00005K6B0 SA00005LAA0 SA00005L5C0
EDP_HPD#
<22> EDP_HPD#
IVY-BRIDGE_BGA1023 UCPU1 UCPU1
C867@
AV8063801057801 AV8063801057605
I3427@ I3517@
SA00005L9B0 SA00005K5B0 CR(Ivy Bridge)

4 4

2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PROCESSOR(1/7) DMI,FDI,PEG
Custom 1.0
A B C D E
A B C D E
schematic-laptop.blogspot.com 0921 LVDS@->@ +1.05VS_VTT
CLK_CPU_DPLL# R4 2 LVDS@ 1 1K_0402_5%
CLK_CPU_DPLL R5 2 LVDS@ 1 1K_0402_5%
Checklist1.5 P.67 Graphis Disable Guide

eDP disable:
DPLL_REF_SSCLK PD 1K_5% to GND
1 DPLL_REF_SSCLK# PU 1K_5% to +1.05VS_VTT 1
UCPU1B
PROC_SELECT#
非外外外
PCH->CPU J3 CLK_CPU_DMI <14>
PH VCPLL and connect to PCH DF_TVS BCLK H2
UNCOREPWRGOOD: CORE OK BCLK# CLK_CPU_DMI# <14>
MISC
CLOCKS
都後後做
SM_DRAMPWROK:DRAM power ok <17> H_SNB_IVB#
F49
PROC_SELECT#
RESET#: ok CPU reset AG3 CLK_CPU_DPLL CLK_CPU_DPLL <14>
DPLL_REF_CLK AG1 CLK_CPU_DPLL# CLK_CPU_DPLL# <14>
偵偵CPU有有有有
C57 DPLL_REF_CLK#
PROC_DETECT#
SM_RCOMP0,SM_RCOMP1
Follow DG 1.5& Tacoma_Fall2 1.0
reserve XBOX 三三三三 T1 PAD @ H_CATERR# C49
CATERR# SM_RCOMP2
THERMAL
@
C65 2 1 0.1U_0402_16V4Z H_CPUPW RGD
follow Checklist 1.5 H_PECI A48 AT30 SM_DRAMRST# SM_DRAMRST# <6>
<18,29> H_PECI PECI SM_DRAMRST#
R6 2 1 10K_0402_5% +1.05VS_VTT R7 2 1 62_0402_5% R8
56_0402_5% BF44 SM_RCOMP0 R9 2 1 140_0402_1%
DDR3
MISC
H_PROCHOT# 1 2 H_PROCHOT#_R C45 SM_RCOMP[0] BE43 SM_RCOMP1 R10 2 1 25.5_0402_1%
<29,35> H_PROCHOT# PROCHOT# SM_RCOMP[1] BG43 SM_RCOMP2 R11 2 1 200_0402_1%
SM_RCOMP[2]
2 DDR3 Compensation Signals 2

D45
<18> H_THRMTRIP# THERMTRIP#
Follow DG 1.5 & Tacoma_Fall2 1.0 Use open drain logic gate: N53
+1.05VS_VTT PU pop 75ohm PRDY# N55
Buffered reset to CPU PREQ#
+3VS series resister pop 43ohm
L56 XDP_TCK @ PAD T2
TCK L55 XDP_TMS @ PAD T3
+1.05VS_VTT TMS
PWR MANAGEMENT
J58 XDP_TRST# @ PAD T4
TRST#
1
JTAG & BPM

C66 C48 M60 XDP_TDI @ PAD T5
<15> H_PM_SYNC PM_SYNC TDI
1
0.1U_0402_16V4Z L59 XDP_TDO @ PAD T6

R12 TDO
2 75_0402_5%
R14 1 2 H_CPUPW RGD_R B46
<18> H_CPUPW RGD
非CORE外外外OK
UNCOREPWRGOOD
5
0_0402_5% U1 R15 R13 0_0402_5% K58 XDP_DBRESET# XDP_DBRESET# <15>

2
1 @ 2 1 43_0402_1% DBR#
UNCOREPWRGOOD:
P
NC 4 BUFO_CPU_RST# 1 2 BUF_CPU_RST#
PLT_RST# 2 Y PM_DRAM_PW RGD_R BE45 G58
<17> PLT_RST# A SM_DRAMPWROK BPM#[0]
G
E55
SN74LVC1G07DCKR_SC70-5 BPM#[1] E59
3
BPM#[2] G55
SM_DRAMPWROK:DRAM power ok BPM#[3] G59
都ok後後CPU做reset
BUF_CPU_RST# D44 BPM#[4] H60
RESET# BPM#[5] J59
RESET#: BPM#[6] J61
BPM#[7]
Follow DG 1.5 & Tacoma_Fall2 1.0
3 +3VALW Use open drain logic gate: 3
+1.5V_CPU_VDDQ PU pop 200ohm @
C476
+1.5V_CPU_VDDQ series resister pop 130ohm 2 1 H_CPUPW RGD_R
+3VS
1
C67 180P_0402_50V8J IVY-BRIDGE_BGA1023
1
0.1U_0402_16V4Z C867@ XDP_DBRESET# R17 2 1 1K_0402_5%

R16 12/22 Add(ESD request)
2 200_0402_5% Tacoma_Fall2 1.0 PU 1K +3VS
Check list 1.5 PU 1K +3VS
2
5
U2 Debug port DG1.1-1.3 50~5K ohm

1
G VCC
<15> SYS_PW ROK B 4 PM_SYS_PW RGD_BUF 1 2 PM_DRAM_PW RGD_R

2 Y R18 130_0402_5%
<15> PM_DRAM_PW RGD A
MC74VHC1G09DFT2G_SC70-5
3
4 4

2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PROCESSOR(3/7) DDRIII
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom Q1VZC M/B LA-8941P Schematic 1.0

A B C D E
A B C D E
UCPU1C UCPU1D
<11> DDR_A_D[0..63] <12> DDR_B_D[0..63]
DDR_A_D0 AG6 DDR_B_D0 AL4
DDR_A_D1 AJ6 SA_DQ[0] AU36 DDR_B_D1 AL1 SB_DQ[0] BA34
DDR_A_D2 AP11 SA_DQ[1] SA_CK[0] AV36 SA_CLK_DDR0 <11> DDR_B_D2 AN3 SB_DQ[1] SB_CK[0] AY34 SB_CLK_DDR0 <12>
AL6 SA_DQ[2] SA_CK#[0] AY26 SA_CLK_DDR#0 <11> AR4 SB_DQ[2] SB_CK#[0] AR22 SB_CLK_DDR#0 <12>
DDR_A_D3 DDR_B_D3
AJ10 SA_DQ[3] SA_CKE[0] DDRA_CKE0_DIMMA <11> AK4 SB_DQ[3] SB_CKE[0] DDRB_CKE0_DIMMB <12>
DDR_A_D4 DDR_B_D4
1 DDR_A_D5 AJ8 SA_DQ[4] DDR_B_D5 AK3 SB_DQ[4] 1
DDR_A_D6 AL8 SA_DQ[5] DDR_B_D6 AN4 SB_DQ[5]
DDR_A_D7 AL7 SA_DQ[6] DDR_B_D7 AR1 SB_DQ[6]
DDR_A_D8 AR11 SA_DQ[7] DDR_B_D8 AU4 SB_DQ[7]
DDR_A_D9 AP6 SA_DQ[8] AT40 DDR_B_D9 AT2 SB_DQ[8] BA36
AU6 SA_DQ[9] SA_CK[1] AU40 SA_CLK_DDR1 <11> AV4 SB_DQ[9] SB_CK[1] BB36 SB_CLK_DDR1 <12>
DDR_A_D10 DDR_B_D10
DDR_A_D11 AV9 SA_DQ[10] SA_CK#[1] BB26 SA_CLK_DDR#1 <11> DDR_B_D11 BA4 SB_DQ[10] SB_CK#[1] BF27 SB_CLK_DDR#1 <12>
DDR_A_D12 AR6 SA_DQ[11] SA_CKE[1] DDRA_CKE1_DIMMA <11> DDR_B_D12 AU3 SB_DQ[11] SB_CKE[1] DDRB_CKE1_DIMMB <12>
DDR_A_D13 AP8 SA_DQ[12] DDR_B_D13 AR3 SB_DQ[12]
DDR_A_D14 AT13 SA_DQ[13] DDR_B_D14 AY2 SB_DQ[13]
DDR_A_D15 AU13 SA_DQ[14] DDR_B_D15 BA3 SB_DQ[14]
DDR_A_D16 BC7 SA_DQ[15] DDR_B_D16 BE9 SB_DQ[15]
DDR_A_D17 BB7 SA_DQ[16] BB40 DDR_B_D17 BD9 SB_DQ[16] BE41
BA13 SA_DQ[17] SA_CS#[0] BC41 DDRA_CS0_DIMMA# <11> BD13 SB_DQ[17] SB_CS#[0] BE47 DDRB_CS0_DIMMB# <12>
DDR_A_D18 DDR_B_D18
BB11 SA_DQ[18] SA_CS#[1] DDRA_CS1_DIMMA# <11> BF12 SB_DQ[18] SB_CS#[1] DDRB_CS1_DIMMB# <12>
DDR_A_D19 DDR_B_D19
DDR_A_D20 BA7 SA_DQ[19] DDR_B_D20 BF8 SB_DQ[19]
DDR_A_D21 BA9 SA_DQ[20] DDR_B_D21 BD10 SB_DQ[20]
DDR_A_D22 BB9 SA_DQ[21] DDR_B_D22 BD14 SB_DQ[21]
DDR_A_D23 AY13 SA_DQ[22] DDR_B_D23 BE13 SB_DQ[22]
DDR_A_D24 AV14 SA_DQ[23] AY40 DDR_B_D24 BF16 SB_DQ[23] AT43
AR14 SA_DQ[24] SA_ODT[0] BA41 SA_ODT0 <11> BE17 SB_DQ[24] SB_ODT[0] BG47 SB_ODT0 <12>
DDR_A_D25 DDR_B_D25
DDR_A_D26 AY17 SA_DQ[25] SA_ODT[1] SA_ODT1 <11> DDR_B_D26 BE18 SB_DQ[25] SB_ODT[1] SB_ODT1 <12>
DDR_A_D27 AR19 SA_DQ[26] DDR_B_D27 BE21 SB_DQ[26]
DDR_A_D28 BA14 SA_DQ[27] DDR_B_D28 BE14 SB_DQ[27]
DDR_A_D29 AU14 SA_DQ[28] DDR_B_D29 BG14 SB_DQ[28]
DDR_A_D30 BB14 SA_DQ[29] DDR_B_D30 BG18 SB_DQ[29]
DDR_A_D31 BB17 SA_DQ[30] AL11 DDR_A_DQS#0 DDR_A_DQS#[0..7] <11> DDR_B_D31 BF19 SB_DQ[30] AL3 DDR_B_DQS#0 DDR_B_DQS#[0..7] <12>
DDR_A_D32 BA45 SA_DQ[31] SA_DQS#[0] AR8 DDR_A_DQS#1 DDR_B_D32 BD50 SB_DQ[31] SB_DQS#[0] AV3 DDR_B_DQS#1
DDR_A_D33 AR43 SA_DQ[32] SA_DQS#[1] AV11 DDR_A_DQS#2 DDR_B_D33 BF48 SB_DQ[32] SB_DQS#[1] BG11 DDR_B_DQS#2
DDR_A_D34 AW48 SA_DQ[33] SA_DQS#[2] AT17 DDR_A_DQS#3 DDR_B_D34 BD53 SB_DQ[33] SB_DQS#[2] BD17 DDR_B_DQS#3
DDR_A_D35 BC48 SA_DQ[34] SA_DQS#[3] AV45 DDR_A_DQS#4 DDR_B_D35 BF52 SB_DQ[34] SB_DQS#[3] BG51 DDR_B_DQS#4
DDR_A_D36 BC45 SA_DQ[35] SA_DQS#[4] AY51 DDR_A_DQS#5 DDR_B_D36 BD49 SB_DQ[35] SB_DQS#[4] BA59 DDR_B_DQS#5
2 DDR_A_D37 AR45 SA_DQ[36] SA_DQS#[5] AT55 DDR_A_DQS#6 DDR_B_D37 BE49 SB_DQ[36] SB_DQS#[5] AT60 DDR_B_DQS#6 2
DDR SYSTEM MEMORY A

SA_DQ[37] SA_DQS#[6] SB_DQ[37] SB_DQS#[6]
DDR SYSTEM MEMORY B

DDR_A_D38 AT48 AK55 DDR_A_DQS#7 DDR_B_D38 BD54 AK59 DDR_B_DQS#7
DDR_A_D39 AY48 SA_DQ[38] SA_DQS#[7] DDR_B_D39 BE53 SB_DQ[38] SB_DQS#[7]
DDR_A_D40 BA49 SA_DQ[39] DDR_B_D40 BF56 SB_DQ[39]
DDR_A_D41 AV49 SA_DQ[40] DDR_B_D41 BE57 SB_DQ[40]
DDR_A_D42 BB51 SA_DQ[41] DDR_B_D42 BC59 SB_DQ[41]
DDR_A_D43 AY53 SA_DQ[42] DDR_B_D43 AY60 SB_DQ[42]
DDR_A_D44 BB49 SA_DQ[43] DDR_B_D44 BE54 SB_DQ[43]
AU49 SA_DQ[44] AJ11 DDR_A_DQS[0..7] <11> BG54 SB_DQ[44]
DDR_A_D45 DDR_A_DQS0 DDR_B_D45
DDR_A_D46 BA53 SA_DQ[45] SA_DQS[0] AR10 DDR_A_DQS1 DDR_B_D46 BA58 SB_DQ[45] AM2 DDR_B_DQS0 DDR_B_DQS[0..7] <12>
DDR_A_D47 BB55 SA_DQ[46] SA_DQS[1] AY11 DDR_A_DQS2 DDR_B_D47 AW59 SB_DQ[46] SB_DQS[0] AV1 DDR_B_DQS1
DDR_A_D48 BA55 SA_DQ[47] SA_DQS[2] AU17 DDR_A_DQS3 DDR_B_D48 AW58 SB_DQ[47] SB_DQS[1] BE11 DDR_B_DQS2
DDR_A_D49 AV56 SA_DQ[48] SA_DQS[3] AW45 DDR_A_DQS4 DDR_B_D49 AU58 SB_DQ[48] SB_DQS[2] BD18 DDR_B_DQS3
DDR_A_D50 AP50 SA_DQ[49] SA_DQS[4] AV51 DDR_A_DQS5 DDR_B_D50 AN61 SB_DQ[49] SB_DQS[3] BE51 DDR_B_DQS4
DDR_A_D51 AP53 SA_DQ[50] SA_DQS[5] AT56 DDR_A_DQS6 DDR_B_D51 AN59 SB_DQ[50] SB_DQS[4] BA61 DDR_B_DQS5
DDR_A_D52 AV54 SA_DQ[51] SA_DQS[6] AK54 DDR_A_DQS7 DDR_B_D52 AU59 SB_DQ[51] SB_DQS[5] AR59 DDR_B_DQS6
DDR_A_D53 AT54 SA_DQ[52] SA_DQS[7] DDR_B_D53 AU61 SB_DQ[52] SB_DQS[6] AK61 DDR_B_DQS7
DDR_A_D54 AP56 SA_DQ[53] DDR_B_D54 AN58 SB_DQ[53] SB_DQS[7]
DDR_A_D55 AP52 SA_DQ[54] DDR_B_D55 AR58 SB_DQ[54]
DDR_A_D56 AN57 SA_DQ[55] DDR_B_D56 AK58 SB_DQ[55]
DDR_A_D57 AN53 SA_DQ[56] DDR_B_D57 AL58 SB_DQ[56]
DDR_A_D58 AG56 SA_DQ[57] DDR_B_D58 AG58 SB_DQ[57]
DDR_A_D59 AG53 SA_DQ[58] DDR_B_D59 AG59 SB_DQ[58]
DDR_A_D60 AN55 SA_DQ[59] DDR_B_D60 AM60 SB_DQ[59]
DDR_A_D61 AN52 SA_DQ[60] BG35 DDR_A_MA0 DDR_A_MA[0..15] <11> DDR_B_D61 AL59 SB_DQ[60] BF32 DDR_B_MA0 DDR_B_MA[0..15] <12>
DDR_A_D62 AG55 SA_DQ[61] SA_MA[0] BB34 DDR_A_MA1 DDR_B_D62 AF61 SB_DQ[61] SB_MA[0] BE33 DDR_B_MA1
DDR_A_D63 AK56 SA_DQ[62] SA_MA[1] BE35 DDR_A_MA2 DDR_B_D63 AH60 SB_DQ[62] SB_MA[1] BD33 DDR_B_MA2
SA_DQ[63] SA_MA[2] BD35 DDR_A_MA3 SB_DQ[63] SB_MA[2] AU30 DDR_B_MA3
SA_MA[3] AT34 DDR_A_MA4 SB_MA[3] BD30 DDR_B_MA4
SA_MA[4] AU34 DDR_A_MA5 SB_MA[4] AV30 DDR_B_MA5
SA_MA[5] BB32 DDR_A_MA6 SB_MA[5] BG30 DDR_B_MA6
BD37 SA_MA[6] AT32 DDR_A_MA7 BG39 SB_MA[6] BD29 DDR_B_MA7
3 <11> DDR_A_BS0 BF36 SA_BS[0] SA_MA[7] AY32 <12> DDR_B_BS0 BD42 SB_BS[0] SB_MA[7] BE30 3
DDR_A_MA8 DDR_B_MA8
<11> DDR_A_BS1 BA28 SA_BS[1] SA_MA[8] AV32 <12> DDR_B_BS1 AT22 SB_BS[1] SB_MA[8] BE28
DDR_A_MA9 DDR_B_MA9
<11> DDR_A_BS2 SA_BS[2] SA_MA[9] BE37 DDR_A_MA10 <12> DDR_B_BS2 SB_BS[2] SB_MA[9] BD43 DDR_B_MA10
SA_MA[10] BA30 DDR_A_MA11 SB_MA[10] AT28 DDR_B_MA11
SA_MA[11] BC30 DDR_A_MA12 SB_MA[11] AV28 DDR_B_MA12
BE39 SA_MA[12] AW41 DDR_A_MA13 AV43 SB_MA[12] BD46 DDR_B_MA13
<11> DDR_A_CAS# BD39 SA_CAS# SA_MA[13] AY28 <12> DDR_B_CAS# BF40 SB_CAS# SB_MA[13] AT26
DDR_A_MA14 DDR_B_MA14
<11> DDR_A_RAS# AT41 SA_RAS# SA_MA[14] AU26 DDR_A_MA15 <12> DDR_B_RAS# BD45 SB_RAS# SB_MA[14] AU22 DDR_B_MA15
<11> DDR_A_WE# SA_WE# SA_MA[15] <12> DDR_B_WE# SB_WE# SB_MA[15]
IVY-BRIDGE_BGA1023 IVY-BRIDGE_BGA1023
C867@ C867@
Follow CRB1.0 +1.5V

1
R19
0_0402_5% R20
1 2 1K_0402_5%
CPU 通通DIMM做reset @
2
3 1 1 2
S
SM_DRAMRST# DIMM_DRAMRST#_R
<5> SM_DRAMRST# DIMM_DRAMRST# <11,12>
Q1 R21 1K_0402_5%
2
BSS138_NL_SOT23-3
R22 S0
G
2
4.99K_0402_1%
DRAMRST_CNTRL_PCH hgih ,MOS ON
SM_DRAMRST# HIGH,DDR3 DRAMRST# HIGH
1
4 4
R23 Dimm not reset
0_0402_5% RST_GATE_R
1 2 S3
<14> RST_GATE RST_GATE_R <11,12> DRAMRST_CNTRL_PCH Low ,MOS OFF
DS3@
SM_DRAMRST# lo,DDR3 DRAMRST# HIGH
R24 Dimm not reset
0_0402_5%
1 2 S4,5
<29> EC_RST_GATE
DS3@ 1 DRAMRST_CNTRL_PCH Low ,MOS OFF Security Classification Compal Secret Data Compal Electronics, Inc.
C68 SM_DRAMRST# lo,DDR3 DRAMRST# low 2011/11/22 2012/11/22 Title
0.047U_0402_16V7K
Dimm reset
Issued Date Deciphered Date PROCESSOR(3/7) DDRIII
2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
A B C D E
A B C D E
CFG Straps for Processor
CFG2
UCPU1E
1
R25
T7 PAD @ CFG0 B50 N59 1K_0402_1%
C51 CFG[0] BCLK_ITP N58 @
2
CFG2 B54 CFG[1] BCLK_ITP#
D53 CFG[2]
CFG4 A51 CFG[3] N42
1 1
CFG5 C53 CFG[4] RSVD30 L42
CFG6 C55 CFG[5] RSVD31 L45
PEG Static Lane Reversal - CFG2 is for the 16x
CFG7 H49 CFG[6] RSVD32 L47
A55 CFG[7] RSVD33 1: Normal Operation; Lane # definition matches
H51 CFG[8] socket pin map definition
K49 CFG[9] M13
CFG2
K53 CFG[10] RSVD34 M14 0:Lane Reversed
F53
G53
CFG[11]
CFG[12]
CFG[13]
RSVD35
RSVD36
RSVD37
U14
W14 *
L51 P13
CFG[14] RSVD38
關關啟啟
F51
D52 CFG[15] CFG4
L53 CFG[16] AT49
UMA,Optimus eDP
CFG[17] RSVD39 DISO eDP
1
K24
RSVD40
RESERVED
T37 PAD @ VCC_VAL_SENSE H43 EDP@ R28
T38 PAD @ VSS_VAL_SENSE K43 VCC_VAL_SENSE AH2 1K_0402_1%
VSS_VAL_SENSE RSVD41 AG13
2
RSVD42 AM14
T39 PAD @ VAXG_VAL_SENSE H45 RSVD43 AM15
T40 PAD @ VSSAXG_VAL_SENSE K45 VAXG_VAL_SENSE RSVD44
VSSAXG_VAL_SENSE
N50 eDP enable
T8 PAD @ F48 RSVD45
VCC_DIE_SENSE
1:Disable
H48
K48 RSVD6
RSVD7
CFG4 * 0:Enable
2 A4 2
DC_TEST_A4 C4
BA19 DC_TEST_C4 D3 DC_TEST_C4_D3 CFG6
AV19 RSVD8 DC_TEST_D3 D1
These pins are for solder joint CFG5
AT21 RSVD9 DC_TEST_D1 A58 reliability and non-critical to
RSVD10 DC_TEST_A58
BB21
RSVD11 DC_TEST_A59
A59 function. For BGA only.
1
BB19 C59 DC_TEST_A59_C59
AY21 RSVD12 DC_TEST_C59 A61 R31 R32
BA22 RSVD13 DC_TEST_A61 C61 DC_TEST_A61_C61 1K_0402_1% 1K_0402_1%
AY22 RSVD14 DC_TEST_C61 D61 @ @
AU19 RSVD15 DC_TEST_D61 BD61
2
AU21 RSVD16 DC_TEST_BD61 BE61
BD21 RSVD17 DC_TEST_BE61 BE59 DC_TEST_BE59_BE61
BD22 RSVD18 DC_TEST_BE59 BG61
BD25 RSVD19 DC_TEST_BG61 BG59 DC_TEST_BG59_BG61
BD26 RSVD20 DC_TEST_BG59 BG58
BG22 RSVD21 DC_TEST_BG58 BG4
BE22 RSVD22 DC_TEST_BG4 BG3
BG26 RSVD23 DC_TEST_BG3 BE3 DC_TEST_BE3_BG3
BE26 RSVD24 DC_TEST_BE3 BG1
PCIE Port Bifurcation Straps
BF23 RSVD25 DC_TEST_BG1 BE1 DC_TEST_BE1_BG1
BE24 RSVD26 DC_TEST_BE1 BD1
RSVD27 DC_TEST_BD1 11: (Default) 1x16 PCI Express
CFG[6:5] 10: 2x8 PCI Express
*01: Reserved
IVY-BRIDGE_BGA1023
C867@ 00: 1x8,2x4 PCI Express
3 3
CFG7
1
R33
@ 1K_0402_1%
2
PEG DEFER TRAINING Tacoma_Fall2 1.0 P.12
1: (Default) PEG Train immediately following

CFG7 xxRESETB de assertion
0: PEG Wait for BIOS for training
4 4

2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PROCESSOR(4/7) RSVD,CFG
Custom 1.0
A B C D E
A B C D E
POWER
schematic-laptop.blogspot.com UCPU1F
8.5A
ULV type
+1.05VS_VTT
DC 33A
AF46
+CPU_CORE VCCIO[1] AG48
VCCIO[3] AG50
VCCIO[4] For DDR
A26 AG51
A29 VCC[1] VCCIO[5] AJ17
A35 VCC[4] VCCIO[8] AJ43 INTEL Recommend VCCIO
INTEL Recommend VCC A38 VCC[5] VCCIO[9] AJ47
A39 VCC[6] VCCIO[10] AK50 2*330UF,10*10uF(0603) and 26*1uF(0402)
1
4*470UF,12*22uF(0805) and 35*2.2uF(0402) A42 VCC[7] VCCIO[11] AK51
1
C26 VCC[8] VCCIO[12] AL14 PD0.8

PD0.8 C27 VCC[9] VCCIO[13] AL15
C32 VCC[10] VCCIO[14] AL16 CAP at P.51
CAP at P.51 C34 VCC[11]
VCC[12]
VCCIO[15]
VCCIO[16]
AL20
C37 AL22
C39 VCC[13] VCCIO[17] AL26
C42 VCC[14] VCCIO[18] AL45
D27 VCC[15] VCCIO[19] AL48
D32 VCC[16] VCCIO[20] AM16
PEG IO AND DDR IO

E26 VCC[21] VCCIO[25] AN20
E37 VCC[25] VCCIO[29]
E38 VCC[26]
VCC[27]
CORE SUPPLY
F25
F26 VCC[28]
F28 VCC[29]
F32 VCC[30]
F34 VCC[31]
F37 VCC[32] AA14
F38 VCC[33] VCCIO[30] AA15
VCC[34] VCCIO[31] For PEG
F42 AB17
G42 VCC[35] VCCIO[32] AB20
H25 VCC[36] VCCIO[33] AC13
H26 VCC[37] VCCIO[34] AD16
2 H32 VCC[40] VCCIO[37] AE14 2
H34 VCC[41] VCCIO[38] AE15
H35 VCC[42] VCCIO[39] AF16
H40 VCC[45] VCCIO[42] AG15
J25 VCC[46] VCCIO[43] AG16
J26 VCC[47] VCCIO[44] AG17 +3VS
VCC[50] VCCIO[47]
1
J32 AJ14
J34 VCC[51] VCCIO[48] AJ15 R34
J35 VCC[52] VCCIO[49] 10K_0402_5%
J37 VCC[53] @
J38 VCC[54]
2
J40 VCC[55] +1.05VS_VTT
J42 VCC[56]
K26 VCC[57] W16 VCCIO_SEL
K27 VCC[58] VCCIO50 W17
VCC[59] VCCIO51 VCCIO_SEL after Ivy bridge ES2 Voltage support
1
K29
K32 VCC[60] R35
K34 VCC[61] 10K_0402_5% 1/NC : (Default) +1.05VS_VTT
K35
K37
VCC[62]
VCC[63]
@ BC22 * 0: +1.0VS_VTT
2
K39 VCC[64]
K42 VCC[66] BC22 VCCIO_SEL
L25 VCC[67] VCCIO_SEL
L28 VCC[68]
L33 VCC[69]
L36 VCC[70] +1.05VS_VTT
L40 VCC[71] +1.05VS_VTT +1.05VS_VTT
N26 VCC[72]
N30 VCC[73] AM25
QUIET
RAILS
1
3 N34 VCC[74] VCCPQE[1] AN22 3
N38 VCC[75] VCCPQE[2] R36 R37
Place the PU
VCC[76] 1 2 130_0402_5% 75_0402_5% resistors close to CPU
C69
1U_0402_6.3V6K
2
A44 H_CPU_SVIDALRT# R38 1 2 43_0402_1%
VIDALERT# SVID_ALERT# <41>
B43 H_CPU_SVIDCLK R39 1 2 0_0402_5%
VIDSCLK SVID_CLK <41>
SVID
C44 H_CPU_SVIDDAT R40 1 2 0_0402_5%
VIDSOUT SVID_DATA <41>
+CPU_CORE
Place the PU
1
resistors close to VR R41
100_0402_1%
2
F43 VCCSENSE_R R42 1 2 0_0402_5%
SENSE LINES VCC_SENSE VCCSENSE <41>
G43 VSSSENSE_R R43 1 2 0_0402_5%
VSS_SENSE VSSSENSE <41>
1
R44 1 2 10_0402_5% +1.05VS_VTT
R45
AN16 100_0402_1%
VCCIO_SENSE VCCIO_SENSE <40>
AN17 VSSIO_SENSE
VSS_SENSE_VCCIO
2
1
R46 Should change to connect form
10_0402_5%
power cirucit & layout differential
4 IVY-BRIDGE_BGA1023 with VCCIO_SENSE. 4
2
C867@
Check list 1.5

2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PROCESSOR(5/7) PWR,BYPASS
Custom 1.0
A B C D E
A B C D E
schematic-laptop.blogspot.com +1.5V_CPU_VDDQ
POWER
1
UCPU1G
+V_SM_VREF should R47
have 20 mil trace width 1K_0402_5%
+VGFX_CORE
DC 16A
2
AY43 +V_SM_VREF
AA46 SM_VREF
VREF
1
AB47 VAXG[1]
VAXG[2] 1
AB50 BE7 SA_DIMM_VREFDQ C70 R48 SA_DIMM_VREFDQ
VAXG[3] SA_DIMM_VREFDQ SA_DIMM_VREFDQ <11>
AB51 BG7 SB_DIMM_VREFDQ 0.1U_0402_16V4Z 1K_0402_5%
AB52 VAXG[4] SB_DIMM_VREFDQ SB_DIMM_VREFDQ <12> SB_DIMM_VREFDQ
1
INTEL Recommend VAXG AB53 VAXG[5] 2 Check list1.5 P18 M1 default M3 no stuff 1
2
1
1
AB55 VAXG[6]
2*470uF,6*22uF(0805) and 6*10uF(0603) AB56 VAXG[7]
VAXG[8]
AB58 R49 R50
11*1U(0402) AB59 VAXG[9] 1K_0402_1% 1K_0402_1%
PD0.8 AC61 VAXG[10] @ @ INTEL Recommend VDDQ
2
AD47 VAXG[11]
AD48 VAXG[12] 5A 1*330uF,8*10uF(0603) ,10*1uF(0402)
AD50 VAXG[13]
AD51 VAXG[14]
VAXG[15] VDDQ[1]
AJ28 PD0.8
- 1.5V RAILS
AD52 AJ33
AD53 VAXG[16] VDDQ[2] AJ36
AD55 VAXG[17] VDDQ[3] AJ40 +1.5V_CPU_VDDQ +1.5VS
AD56 VAXG[18] VDDQ[4] AL30
Place TOP IN BGA J1
AD58 VAXG[19] VDDQ[5] AL34 1 2
AD59 VAXG[20] VDDQ[6] AL38 C71 C72 C73 C74 C75 C76 C77 C78 C79 C80
VAXG[21] VDDQ[7]
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
AE46 AL42 1 JUMP_43X118
N45 VAXG[22] VDDQ[8] AM33 @
VAXG[23] VDDQ[9]
1
P47 AM36 + C81
P48 VAXG[24] VDDQ[10] AM40 330U_D2_2V_Y
P50 VAXG[25] VDDQ[11] AN30
2
P51 VAXG[26] VDDQ[12] AN34 2
P52 VAXG[27] VDDQ[13] AN38
P53 VAXG[28] VDDQ[14] AR26
DDR3
GRAPHICS
Place BOT OUT BGA
T48 VAXG[32] VDDQ[18] AR34
T58 VAXG[33] VDDQ[19] AR36
T59 VAXG[34] VDDQ[20] AR40 C82 C83 C84 C85 C86 C87 C88 C89
VAXG[35] VDDQ[21]
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
T61 AV41 SGA20331E10 S POLY C 330U
1
U46 VAXG[36] VDDQ[22] AW26
V47 VAXG[37] VDDQ[23] BA40 2V Y D2 LESR9M EEFSX H1.9
2 V48 VAXG[38] VDDQ[24] BB28 2
2
V50 VAXG[39] VDDQ[25] BG33
V51 VAXG[40] VDDQ[26]
V52 VAXG[41]
V53 VAXG[42]
V55 VAXG[43]
V56 VAXG[44]
V58 VAXG[45]
V59 VAXG[46]
W50 VAXG[47]
W51 VAXG[48]
W52 VAXG[49]
W53 VAXG[50]
W55 VAXG[51]
CR CheckList Rev1.5 W56 VAXG[52]
W61 VAXG[53]
+VGFX_CORE Y48 VAXG[54]
Y61 VAXG[55]
1
VAXG[56]
R51
100_0402_5% +1.5V_CPU_VDDQ
INTEL Recommend VCCPLL

2
QUIET RAILS
AM28
SENSE
LINES
F45 VCCDQ[1] AN26
1*330uF,2*1uF(0402) <41>
<41>
VCC_GFXSENSE
VSS_GFXSENSE
G45 VAXG_SENSE VCCDQ[2]
1
VSSAXG_SENSE
PD0.8
1
C90
R52 1U_0402_6.3V6K
2
100_0402_5% 1.2A
1.8V RAIL
2
+1.8VS BB3
3
Place BOT OUT Conn BC1 VCCPLL[1] 3
BC4 VCCPLL[2]
VCCPLL[3]
1
1U_0402_6.3V6K
C92
1U_0402_6.3V6K
C93
1 1
+ C91
SGA00001700 S POLY C 220U @ BC43
220U_B2_2.5VM_R35 VDDQ_SENSE BA43
220U 2.5V M B2 ESR35 TPE H1.9 2 2 2 VSS_SENSE_VDDQ
SENSE LINES
6A L17
L21 VCCSA[1]
N16 VCCSA[2]
N20 VCCSA[3]
N22 VCCSA[4]
SA RAIL
P17 VCCSA[5]
+VCCSA P20 VCCSA[6] U10
VCCSA
Place TOP IN BGA R16 VCCSA[7] VCCSA_SENSE VCCSA_SENSE <39>
+VCCSA R18 VCCSA[8] CPU EDS1.3 P.93 VID0 VID1 Vout HR CR
R21 VCCSA[9] VCCSA_VID0 Must PD
C95 C96 C97 C98 C99 U15 VCCSA[10] 0 0 0.9V V V
1
VCCSA VID
VCCSA[11]
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
V16 0 1 0.85V V V
1
+ C94 V17 VCCSA[12] D48 H_VCCSA_VID0

VCCSA[13] VCCSA_VID[0] H_VCCSA_VID0 <39>
lines
330U_D2_2V_Y V18 D49 H_VCCSA_VID1 1 0 0.775V X V

VCCSA[14] VCCSA_VID[1] H_VCCSA_VID1 <39>
SGA20331E10 S POLY C 330U V21
2
2 W20 VCCSA[15]
2V Y D2 LESR9M EEFSX H1.9 VCCSA[16] 1 1 0.75V X V
1
R53
0_0402_5%
@
IVY-BRIDGE_BGA1023
2
Place BOT OUT BGA C867@
4 INTEL Recommend VCCSA C100 C101 C102 C103 C104 4

10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1*330uF,5*10uF(0603) ,5*1uF(0402)
1
PD0.8
2

2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PROCESSOR(6/7) PWR
Custom 1.0
A B C D E
A B C D E
UCPU1H
UCPU1I
A13 AM38
A17 VSS[1] VSS[91] AM4
A21 VSS[2] VSS[92] AM42 BG17 M4
A25 VSS[3] VSS[93] AM45 BG21 VSS[181] VSS[250] M58
A28 VSS[4] VSS[94] AM48 BG24 VSS[182] VSS[251] M6
A33 VSS[5] VSS[95] AM58 BG28 VSS[183] VSS[252] N1
A37 VSS[6] VSS[96] AN1 BG37 VSS[184] VSS[253] N17
1 1
AA1 VSS[12] VSS[102] AN40 C29 VSS[190] VSS[259] N40
AA51 VSS[15] VSS[105] AN50 D10 VSS[193] VSS[262] N48
AA52 VSS[16] VSS[106] AN54 D14 VSS[194] VSS[263] N51
AA53 VSS[17] VSS[107] AP10 D18 VSS[195] VSS[264] N52
AA8 VSS[20] VSS[110] AP7 D29 VSS[198] VSS[267] P14
AB16 VSS[21] VSS[111] AR13 D35 VSS[199] VSS[268] P16
AB61
AC10
VSS[25]
VSS[26]
VSS[27]
VSS[115]
VSS[116]
VSS[117]
AR48
AR61
D46
D50
VSS[203]
VSS[204]
VSS[205]
VSS VSS[272]
VSS[273]
VSS[274]
P59
P9
AC14 AR7 D54 R17
AC46 VSS[28] VSS[118] AT14 D58 VSS[206] VSS[275] R20
AC6 VSS[29] VSS[119] AT19 D6 VSS[207] VSS[276] R4
AD17 VSS[30] VSS[120] AT36 E25 VSS[208] VSS[277] R46
AD20 VSS[31] VSS[121] AT4 E29 VSS[209] VSS[278] T1
AD4 VSS[32] VSS[122] AT45 E3 VSS[210] VSS[279] T47
2 AD61
AE13
VSS[33]
VSS[34]
VSS[35]
VSS VSS[123]
VSS[124]
VSS[125]
AT52
AT58
E35
E40
VSS[211]
VSS[212]
VSS[213]
VSS[280]
VSS[281]
VSS[282]
T50
T51
2
AE8 AU1 F13 T52

AF1 VSS[36] VSS[126] AU11 F15 VSS[214] VSS[283] T53
AF47 VSS[39] VSS[129] AU51 F35 VSS[217] VSS[286] U13
AF48 VSS[40] VSS[130] AU7 F40 VSS[218] VSS[287] U8
AF50 VSS[41] VSS[131] AV17 F55 VSS[219] VSS[288] V20
AF51 VSS[42] VSS[132] AV21 G51 VSS[220] VSS[289] V61
AF52 VSS[43] VSS[133] AV22 G6 VSS[221] VSS[290] W13
AF53 VSS[44] VSS[134] AV34 G61 VSS[222] VSS[291] W15
AF55 VSS[45] VSS[135] AV40 H10 VSS[223] VSS[292] W18
AF59 VSS[48] VSS[138] AW13 H21 VSS[226] VSS[295] W8
AG10 VSS[49] VSS[139] AW43 H4 VSS[227] VSS[296] Y4
AG47 VSS[52] VSS[142] AY14 J1 VSS[230] VSS[299] Y59
AG52 VSS[53] VSS[143] AY19 J49 VSS[231] VSS[300] G48
AG61 VSS[54] VSS[144] AY30 J55 VSS[232] VSS[301]
AG7 VSS[55] VSS[145] AY36 K11 VSS[233]
AH4 VSS[56] VSS[146] AY4 K21 VSS[234]
AH58 VSS[57] VSS[147] AY41 K51 VSS[235]
AJ13 VSS[58] VSS[148] AY45 K8 VSS[236] A5
AJ16 VSS[59] VSS[149] AY49 L16 VSS[237] VSS_NCTF_1 A57
3 VSS[60] VSS[150] VSS[238] VSS_NCTF_2 3
AJ20 AY55 L20 BC61
AJ22 VSS[61] VSS[151] AY58 L22 VSS[239] VSS_NCTF_3 BD3
AJ26 VSS[62] VSS[152] AY9 L26 VSS[240] VSS_NCTF_4 BD59
AJ30 VSS[63] VSS[153] BA1 L30 VSS[241] VSS_NCTF_5 BE4
NCTF
AJ34 VSS[64] VSS[154] BA11 L34 VSS[242] VSS_NCTF_6 BE58
AJ38 VSS[65] VSS[155] BA17 L38 VSS[243] VSS_NCTF_7 BG5
AJ42 VSS[66] VSS[156] BA21 L43 VSS[244] VSS_NCTF_8 BG57
AJ45 VSS[67] VSS[157] BA26 L48 VSS[245] VSS_NCTF_9 C3
AJ48 VSS[68] VSS[158] BA32 L61 VSS[246] VSS_NCTF_10 C58
AJ7 VSS[69] VSS[159] BA48 M11 VSS[247] VSS_NCTF_11 D59
AK1 VSS[70] VSS[160] BA51 M15 VSS[248] VSS_NCTF_12 E1
AK52 VSS[71] VSS[161] BB53 VSS[249] VSS_NCTF_13 E61
AL10 VSS[72] VSS[162] BC13 VSS_NCTF_14
AL13 VSS[73] VSS[163] BC5
AL17 VSS[74] VSS[164] BC57
AL21 VSS[75] VSS[165] BD12
AL25 VSS[76] VSS[166] BD16
AL28 VSS[77] VSS[167] BD19 IVY-BRIDGE_BGA1023
AL33 VSS[78] VSS[168] BD23 C867@
AL36 VSS[79] VSS[169] BD27
AL40 VSS[80] VSS[170] BD32
AL43 VSS[81] VSS[171] BD36
AL47 VSS[82] VSS[172] BD40
AL61 VSS[83] VSS[173] BD44
AM13 VSS[84] VSS[174] BD48
AM20 VSS[85] VSS[175] BD52
AM22 VSS[86] VSS[176] BD56
4 4
AM26 VSS[87] VSS[177] BD8
AM30 VSS[88] VSS[178] BE5
AM34 VSS[89] VSS[179] BG13
VSS[90] VSS[180]
2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PROCESSOR(7/7) VSS
IVY-BRIDGE_BGA1023 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
C867@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Q1VZC M/B LA-8941P Schematic 1.0
A B C D E
A B C D E
+1.5V
+V_DDR_REFA
+1.5V
JDIMM1
+1.5V
1
+V_DDR_REFA 1 2
R54 3 VREF_DQ VSS1 4 DDR_A_D4
1K_0402_1% DDR_A_D0 5 VSS2 DQ4 6 DDR_A_D5
R55 DDR_A_D1 7 DQ0 DQ5 8
M3 support(unpop) 0_0402_5% 9 DQ1 VSS3 10 DDR_A_DQS#0
2
1 2 11 VSS4 DQS#0 12 DDR_A_DQS0
<9> SA_DIMM_VREFDQ DM0 DQS0
@ 13 14
1
VSS5 VSS6
2.2U_0603_6.3V6K
C105
0.1U_0402_16V4Z
C106
1 1 DDR_A_D2 15 16 DDR_A_D6
DDR_A_D3 17 DQ2 DQ6 18 DDR_A_D7
DQ3 DQ7
D
3 1 R56 19 20
@ Q2 1K_0402_1% DDR_A_D8 21 VSS7 VSS8 22 DDR_A_D12
BSS138_NL_SOT23-3 2 2 DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13
2
25 DQ9 DQ13 26
G
1 1
2
DDR_A_DQS#1 27 VSS9 VSS10 28
<6,12> RST_GATE_R DQS#1 DM1
DDR_A_DQS1 29 30 DIMM_DRAMRST#
DQS1 RESET# DIMM_DRAMRST# <6,12>
31 32
DDR_A_D10 33 VSS11 VSS12 34 DDR_A_D14
DDR_A_DQS#[0..7] <6> DQ11 DQ15
37 38
DDR_A_DQS[0..7] <6> DQ16 DQ20
DDR_A_D17 41 42 DDR_A_D21
43 DQ17 DQ21 44
DDR_A_D[0..63] <6> VSS15 VSS16
DDR_A_DQS#2 45 46
DDR_A_DQS2 47 DQS#2 DM2 48
DDR_A_MA[0..15] <6> DQS2 VSS17
49 50 DDR_A_D22
DDR_A_D18 51 VSS18 DQ22 52 DDR_A_D23
DDR_A_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_A_D28
All VREF traces should DDR_A_D24 57 VSS20 DQ28 58 DDR_A_D29
Layout Note: have 10 mil trace width DDR_A_D25 59 DQ24 DQ29 60
Place near JDIMM1 61 DQ25 VSS21 62 DDR_A_DQS#3
+1.5V 63 VSS22 DQS#3 64 DDR_A_DQS3
65 DM3 DQS3 66
DQ27 DQ31
1U_0402_6.3V6K
C107
1U_0402_6.3V6K
C108
1U_0402_6.3V6K
C109
1U_0402_6.3V6K
C110
71 72
VSS25 VSS26
1 1 1 1
DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA
2 2 2 2 <6> DDRA_CKE0_DIMMA CKE0 CKE1 DDRA_CKE1_DIMMA <6>
75 76
77 VDD1 VDD2 78 DDR_A_MA15
DDR_A_BS2 79 NC1 A15 80 DDR_A_MA14
<6> DDR_A_BS2 BA2 A14
81 82
DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
2 87 A9 A7 88 2
+1.5V DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
A3 A2
10U_0603_6.3V6M
C111
10U_0603_6.3V6M
C112
10U_0603_6.3V6M
C113
10U_0603_6.3V6M
C114
DDR_A_MA1 97 98 DDR_A_MA0
99 A1 A0 100
1 1 1 1 VDD9 VDD10
SA_CLK_DDR0 101 102 SA_CLK_DDR1
<6> SA_CLK_DDR0 CK0 CK1 SA_CLK_DDR1 <6>
SA_CLK_DDR#0 103 104 SA_CLK_DDR#1
<6> SA_CLK_DDR#0 CK0# CK1# SA_CLK_DDR#1 <6> +1.5V
105 106
2 2 2 2 DDR_A_MA10 107 VDD11 VDD12 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 <6>
DDR_A_BS0 109 110 DDR_A_RAS#
<6> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <6>
111 112
1
DDR_A_WE# 113 VDD13 VDD14 114 DDRA_CS0_DIMMA#
<6> DDR_A_WE# WE# S0# DDRA_CS0_DIMMA# <6>
DDR_A_CAS# 115 116 SA_ODT0 R57
<6> DDR_A_CAS# CAS# ODT0 SA_ODT0 <6>
117 118 1K_0402_1%
DDR_A_MA13 119 VDD15 VDD16 120 SA_ODT1
A13 ODT1 SA_ODT1 <6>
DDRA_CS1_DIMMA# 121 122
<6> DDRA_CS1_DIMMA#
2
+1.5V 123 S1# NC2 124
125 VDD17 VDD18 126 +VREF_CA
127 NCTEST VREF_CA 128
VSS27 VSS28
2.2U_0603_6.3V6K
DDR_A_D32 129 130 DDR_A_D36
DQ32 DQ36
1
10U_0603_6.3V6M
C115
10U_0603_6.3V6M
C116
10U_0603_6.3V6M
C117
C119
0.1U_0402_16V4Z
C120
1 DDR_A_D33 131 132 DDR_A_D37
133 DQ33 DQ37 134 R58
1 1 1 VSS29 VSS30 1 1
+ C118 DDR_A_DQS#4 135 136 1K_0402_1%
330U_D2_2V_Y DDR_A_DQS4 137 DQS#4 DM4 138
@ 139 DQS4 VSS31 140 DDR_A_D38
2
2 2 2 2 DDR_A_D34 141 VSS32 DQ38 142 DDR_A_D39 2 2
SGA20331E10 DDR_A_D35 143 DQ34 DQ39 144
330U 2V H1.9 145 DQ35 VSS33 146 DDR_A_D44
9mohm POLY DDR_A_D40 147 VSS34 DQ44 148 DDR_A_D45
DDR_A_D41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_A_DQS#5
3 153 VSS36 DQS#5 154 DDR_A_DQS5 3
155 DM5 DQS5 156
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
+0.75VS 161 DQ43 DQ47 162
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
167 DQ49 DQ53 168
VSS41 VSS42
1U_0402_6.3V6K
C121
1U_0402_6.3V6K
C122
1U_0402_6.3V6K
C123
1U_0402_6.3V6K
C124
DDR_A_DQS#6 169 170

DDR_A_DQS6 171 DQS#6 DM6 172
1 1 1 1 DQS6 VSS43
173 174 DDR_A_D54
DDR_A_D51 177 DQ50 DQ55 178
2 2 2 2 179 DQ51 VSS45 180 DDR_A_D60
DDR_A_D57 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDR_A_DQS#7
187 VSS48 DQS#7 188 DDR_A_DQS7
189 DM7 DQS7 190
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
Layout Note: 195 DQ59 DQ63 196
Place near JDIMM1.203,204 197 VSS51 VSS52 198
199 SA0 EVENT# 200 D_CK_SDATA
+3VS VDDSPD SDA D_CK_SDATA <12,14,30>
201 202 D_CK_SCLK
SA1 SCL D_CK_SCLK <12,14,30>
+0.75VS 203 204 +0.75VS
VTT1 VTT2
10K_0402_5%
205 206
2
G1 G2
0.1U_0402_16V4Z
C125
2.2U_0603_6.3V6K
C126
1 1
R60 TYCO_2-2013022-1
CONN@ Channel A
R59
10K_0402_5% SP07000JN10
2 2
1
4
<Address: SA1:SA0=00> 4
1/3 Modify
DIMM_1 Standard H:4.0mm

DDRIII DIMMA
Custom 1.0
A B C D E
A B C D E
+1.5V
+V_DDR_REFB schematic-laptop.blogspot.com
+1.5V
JDIMM2
+1.5V
1
+V_DDR_REFB 1 2
R67 3 VREF_DQ VSS 4 DDR_B_D4
1K_0402_1% DDR_B_D0 5 VSS DQ4 6 DDR_B_D5
R62 DDR_B_D1 7 DQ0 DQ5 8
M3 support(unpop) 0_0402_5% 9 DQ1 VSS 10 DDR_B_DQS#0
2
1 2 11 VSS DQS0# 12 DDR_B_DQS0
<9> SB_DIMM_VREFDQ DM0 DQS0
@ 13 14
VSS VSS
2.2U_0603_6.3V6K
C127
0.1U_0402_16V4Z
C148
1 1 DDR_B_D2 15 16 DDR_B_D6
DDR_B_D3 17 DQ2 DQ6 18 DDR_B_D7
DQ3 DQ7
D
3 1 R63 19 20
@ Q3 1K_0402_1% DDR_B_D8 21 VSS VSS 22 DDR_B_D12
BSS138_NL_SOT23-3 2 2 DDR_B_D9 23 DQ8 DQ12 24 DDR_B_D13
1 1
2
25 DQ9 DQ13 26
G
2
DDR_B_DQS#1 27 VSS VSS 28
<6,11> RST_GATE_R DQS1# DM1
DDR_B_DQS1 29 30 DIMM_DRAMRST#
DQS1 RESET# DIMM_DRAMRST# <6,11>
31 32
DDR_B_D10 33 VSS VSS 34 DDR_B_D14
DDR_B_DQS#[0..7] <6> DQ11 DQ15
37 38
DDR_B_DQS[0..7] <6> DQ16 DQ20
DDR_B_D17 41 42 DDR_B_D21
43 DQ17 DQ21 44
DDR_B_D[0..63] <6> VSS VSS
DDR_B_DQS#2 45 46
DDR_B_DQS2 47 DQS2# DM2 48
DDR_B_MA[0..15] <6> DQS2 VSS
49 50 DDR_B_D22
DDR_B_D18 51 VSS DQ22 52 DDR_B_D23
DDR_B_D19 53 DQ18 DQ23 54
55 DQ19 VSS 56 DDR_B_D28
All VREF traces should DDR_B_D24 57 VSS DQ28 58 DDR_B_D29
Layout Note: have 10 mil trace width DDR_B_D25 59 DQ24 DQ29 60
Place near JDIMM2 61 DQ25 VSS 62 DDR_B_DQS#3
+1.5V 63 VSS DQS3# 64 DDR_B_DQS3
65 DM3 DQS3 66
DQ27 DQ31
1U_0402_6.3V6K
C141
1U_0402_6.3V6K
C128
1U_0402_6.3V6K
C145
1U_0402_6.3V6K
C143
71 72
VSS VSS
1 1 1 1
DDRB_CKE0_DIMMB 73 74 DDRB_CKE1_DIMMB
<6> DDRB_CKE0_DIMMB CKE0 CKE1 DDRB_CKE1_DIMMB <6>
75 76
2 2 2 2 77 VDD VDD 78 DDR_B_MA15
DDR_B_BS2 79 NC A15 80 DDR_B_MA14
<6> DDR_B_BS2 BA2 A14
81 82
DDR_B_MA12 83 VDD VDD 84 DDR_B_MA11
DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
2 87 A9 A7 88 2
+1.5V DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
93 A5 A4 94
DDR_B_MA1 97 A3 A2 98 DDR_B_MA0
A1 A0
10U_0603_6.3V6M
C147
10U_0603_6.3V6M
C131
10U_0603_6.3V6M
C133
10U_0603_6.3V6M
C137
99 100
SB_CLK_DDR0 101 VDD VDD 102 SB_CLK_DDR1
1 1 1 1 <6> SB_CLK_DDR0 CK0 CK1 SB_CLK_DDR1 <6>
SB_CLK_DDR#0 103 104 SB_CLK_DDR#1
<6> SB_CLK_DDR#0 CK0# CK1# SB_CLK_DDR#1 <6> +1.5V
105 106
DDR_B_MA10 107 VDD VDD 108 DDR_B_BS1
2 2 2 2 A10/AP BA1 DDR_B_BS1 <6>
DDR_B_BS0 109 110 DDR_B_RAS#
<6> DDR_B_BS0 BA0 RAS# DDR_B_RAS# <6>
111 112
1
DDR_B_WE# 113 VDD VDD 114 DDRB_CS0_DIMMB#
<6> DDR_B_WE# WE# S0# DDRB_CS0_DIMMB# <6>
DDR_B_CAS# 115 116 SB_ODT0 R65
<6> DDR_B_CAS# CAS# ODT0 SB_ODT0 <6>
117 118 1K_0402_1%
DDR_B_MA13 119 VDD VDD 120 SB_ODT1
A13 ODT1 SB_ODT1 <6>
DDRB_CS1_DIMMB# 121 122
<6> DDRB_CS1_DIMMB#
2
123 S1# NC 124
+1.5V 125 VDD VDD 126 +VREF_CB
127 TEST VREF_CA 128
VSS VSS
2.2U_0603_6.3V6K
DDR_B_D32 129 130 DDR_B_D36
DQ32 DQ36
1
C136
0.1U_0402_16V4Z
C129
DDR_B_D33 131 132 DDR_B_D37
DQ33 DQ37
10U_0603_6.3V6M
C149
10U_0603_6.3V6M
C142
10U_0603_6.3V6M
C130
1 133 134 1 1 R66

DDR_B_DQS#4 135 VSS VSS 136 1K_0402_1%
1 1 1 DQS4# DM4
+ C139 DDR_B_DQS4 137 138
330U_D2_2V_Y 139 DQS4 VSS 140 DDR_B_D38
2
@ @ DDR_B_D34 141 VSS DQ38 142 DDR_B_D39 2 2
2 2 2 2 DDR_B_D35 143 DQ34 DQ39 144
SGA20331E10 145 DQ35 VSS 146 DDR_B_D44
330U 2V H1.9 DDR_B_D40 147 VSS DQ44 148 DDR_B_D45
9mohm POLY DDR_B_D41 149 DQ40 DQ45 150
151 DQ41 VSS 152 DDR_B_DQS#5
3 153 VSS DQS5# 154 DDR_B_DQS5 3
155 DM5 DQS5 156
DDR_B_D43 159 DQ42 DQ46 160 DDR_B_D47
161 DQ43 DQ47 162
+0.75VS DDR_B_D48 163 VSS VSS 164 DDR_B_D52
DDR_B_D49 165 DQ48 DQ52 166 DDR_B_D53
167 DQ49 DQ53 168
DDR_B_DQS#6 169 VSS VSS 170
DQS6# DM6
1U_0402_6.3V6K
C138
1U_0402_6.3V6K
C140
1U_0402_6.3V6K
C146
1U_0402_6.3V6K
C132
DDR_B_DQS6 171 172

173 DQS6 VSS 174 DDR_B_D54
1 1 1 1 VSS DQ54
DDR_B_D50 175 176 DDR_B_D55
DDR_B_D51 177 DQ50 DQ55 178
179 DQ51 VSS 180 DDR_B_D60
2 2 2 2 DDR_B_D56 181 VSS DQ60 182 DDR_B_D61
DDR_B_D57 183 DQ56 DQ61 184
185 DQ57 VSS 186 DDR_B_DQS#7
187 VSS DQS7# 188 DDR_B_DQS7
189 DM7 DQS7 190
DDR_B_D59 193 DQ58 DQ62 194 DDR_B_D63
195 DQ59 DQ63 196
Layout Note: 197 VSS VSS 198
Place near JDIMM2.203,204 199 SA0 EVENT# 200 D_CK_SDATA
+3VS VDDSPD SDA D_CK_SDATA <11,14,30>
1 R61 2 10K_0402_5% 201 202 D_CK_SCLK
SA1 SCL D_CK_SCLK <11,14,30>
+0.75VS 203 204 +0.75VS
VTT VTT
10K_0402_5%
205 206
2
GND1 GND2
C135
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
C134
1 1 207 208
BOSS1 BOSS2
R64
TYCO_2-2013287-1
2 2 CONN@
Channel B
1
4 SP07000KW00 4
<Address: SA1:SA0=10>
12/21 Modify
DIMM_2 Reverse H:4.0mm Security Classification Compal Secret Data Compal Electronics, Inc.
2011/11/22 2012/11/22 Title
Issued Date Deciphered Date DDRIII DIMMB
Custom 1.0
A B C D E
A B C D E
RTCRST close RAM door J1

schematic-laptop.blogspot.com +RTCBATT
1
1
R74
+RTCVCC C163 @ 0_0603_5%
1U_0603_10V6K 20mil
2
2
1 2 PCH_RTCRST#
R75 20K_0402_5%
1 2 PCH_SRTCRST#
R76 20K_0402_5%
1
1
1 R77 1
C164 @ 0_0603_5% D1
1U_0603_10V6K BAS40-04_SOT23-3
2 +RTCVCC
2
20mil
2
+CHGRTC
1
C165 20mil
0.1U_0402_16V4Z
+RTCVCC U16 2
3/7 Add
R78 1 2 1M_0402_5% SM_INTRUDER#
R79 1 2 330K_0402_5% PCH_INTVRMEN +3VS

INTVRMEN
：Integrated VRM enable
BD82HM70 SERIRQ R80 2 1 10K_0402_5%
H HM70@
*
：Integrated VRM disable
PCH_SATALED# R81 2 1 10K_0402_5%
L SA00005MQ60
(INTVRMEN should always be pull high.) U16A
+3VS PCH_RTCX1 A20 C38 LPC_AD0

RTCX1 FWH0 / LAD0 A38 LPC_AD0 <29,30>
LPC_AD1
LPC
FWH1 / LAD1 LPC_AD1 <29,30>
R82 1 @ 2 1K_0402_5% PCH_SPKR PCH_RTCX2 C20 B37 LPC_AD2
RTCX2 FWH2 / LAD2 LPC_AD2 <29,30> +3VS
HIGH= Enable ( No Reboot)Disable TCO timer system reboot feature C37 LPC_AD3
FWH3 / LAD3 LPC_AD3 <29,30> +3VS
PCH_RTCRST# D20
RTCRST# D36 LPC_FRAME#
* LOW= Disable (Default internal PD) FWH4 / LFRAME# LPC_FRAME# <29,30>
1
PCH_SRTCRST# G22
SRTCRST#
1
11/30 Add (EMI request) E36 R85
RTC
+VCCSUS3_3 R84 SM_INTRUDER# K22 LDRQ0# K36 PCH_GPIO23 R230 10K_0402_5%
2
1K_0402_5% HDA_BITCLK_AUDIO INTRUDER# LDRQ1# / GPIO23 2
10K_0402_5%
2 @ 1 HDA_SDOUT_PCH PCH_INTVRMEN C17 V5 SERIRQ
SERIRQ <29,30>
2
R83 INTVRMEN SERIRQ PCH_GPIO21
1
2
0_0402_5% PCH_GPIO23
2
2 1 C467 AM3
<29> HDA_SDO SATA0RXN SATA_PRX_DTX_N0 <24>
1
22P_0402_50V8J HDA_BITCLK_PCH N34 AM1 R86
2 HDA_BCLK SATA0RXP SATA_PRX_DTX_P0 <24>
SATA 6G
AP7 HDD1 R234 10K_0402_5% @
HDA_SDO @
HDA_SYNC_PCH L34 SATA0TXN AP5 SATA_PTX_DRX_N0 <24>
1K_0402_5%
HDA_SYNC SATA0TXP SATA_PTX_DRX_P0 <24>
ME debug mode,this signal has a weak internal PD @
1
Low = Disabled (Default) PCH_SPKR T10 AM10
* <31> PCH_SPKR
2
SPKR SATA1RXN AM8
High = Enabled [Flash Descriptor Security Overide] SATA1RXP
HDA_RST_PCH# K34 AP11
HDA_RST# SATA1TXN AP10
+VCCSUS3_3 SATA1TXP
HDA_SDIN0 E34 AD7 12/1 Del
<31> HDA_SDIN0 HDA_SDIN0 SATA2RXN
R87 2 1 1K_0402_5% HDA_SYNC_PCH AD5 HM70 not support
G34 SATA2RXP AH5
This signal has a weak internal pull-down HDA_SDIN1 SATA2TXN AH4 SATA for port1/port3
C34 SATA2TXP
IHDA
HDA_SDIN2
On Die PLL VR Select is supplied by SATA3RXN
AB8
Prevent back drive issue. A34 AB10
HDA_SDIN3 SATA3RXP AF3
1.5V when sampled high
* +5VS
SATA3TXN
SATA3TXP
AF1
1.8V when sampled low HDA_SDOUT_PCH A36
SATA
HDA_SDO Y7
Needs to be pulled High for Huron River platfrom SATA4RXN Y5
SATA4RXP
2
G
Q4 C36 AD3
R88 BSS138_NL_SOT23-3 HDA_DOCK_EN# / GPIO33 SATA4TXN AD1
33_0402_5% 3 1HDA_SYNC_PCH N32 SATA4TXP
1 2 HDA_BITCLK_PCH HDA_DOCK_RST# / GPIO13 Y3
S
<31> HDA_BITCLK_AUDIO SATA5RXN

R89 R91 Y1
33_0402_5% R90 51_0402_5% SATA5RXP AB3
3 1 2 HDA_SYNC_PCH_R 1 2 2 1 PCH_JTAG_TCK J3 SATA5TXN AB1 3
<31> HDA_SYNC_AUDIO JTAG_TCK SATA5TXP
R92 @ 0_0402_5%
1
33_0402_5% PAD T9 @ PCH_JTAG_TMS H7 Y11 +1.05VS_VTT

L=500mil S=15mil
JTAG
1 2 HDA_RST_PCH# R93 JTAG_TMS SATAICOMPO
<31> HDA_RST_AUDIO#
R95 1M_0402_5% PAD T10 @ PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2
33_0402_5% JTAG_TDI SATAICOMPI R94 37.4_0402_1%
1 2 HDA_SDOUT_PCH PAD T11 @ PCH_JTAG_TDO H1
<31> HDA_SDOUT_AUDIO
2
JTAG_TDO AB12 +1.05VS_VTT

SATA3RCOMPO L=500mil S=15mil
AB13 SATA3_COMP 1 2
PCH_SPI_CLK_2 2 R96 1 33_0402_5% SATA3COMPI R97 49.9_0402_1% +3VS
PCH_SPI_CLK_1 2 R98 1 33_0402_5% PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2

SPI_CLK SATA3RBIAS
1
R99 750_0402_1%
PCH_SPI_CS0#_1 2 R100 1 33_0402_5% PCH_SPI_CS0# Y14 R102
SPI_CS0# 4.7K_0402_5%
PCH_SPI_CS1#_2 2 R101 1 33_0402_5% PCH_SPI_CS1# T1
SPI
SPI_CS1# P3 PCH_SATALED#
2
PCH_SPI_MOSI_2 2 R103 1 33_0402_5% SATALED# PCH_GPIO19
PCH_SPI_MOSI_1 2 1 33_0402_5% PCH_SPI_MOSI V4 V14 PCH_GPIO21 No use PU 10K +3VS
SPI_MOSI SATA0GP / GPIO21
R104
U3 P1 PCH_GPIO19
Debug Port DG 1.2 PU 4.7K +3VS
SPI_MISO SATA1GP / GPIO19 GPIO19 has internal Pull up
PCH_SPI_MISO_1 2 1 PCH_SPI_MISO
R105 33_0402_5% COUGARPOINT_FCBGA989 Boot BIOS Strap
PCH_SPI_MISO_2 2 1 HM77@
R106 33_0402_5%
+3VS Reserve for EMI C166
Boot BIOS GPIO51 GPIO19
PCH_RTCX1 U17 10P_0402_50V8J
PCH_SPI_CS0#_1 1 8 PCH_SPI_CLK 1 2 1 2
LPC 0 0
1 2 PCH_RTCX2 R109 1 2 3.3K_0402_5% SPI_WP1# 3 CS# VCC 6 PCH_SPI_CLK_1 33_0402_5% @ R110 @
R107 10M_0402_5%
+3VS
R108 1 2 3.3K_0402_5% SPI_HOLD1# 7 WP# SCLK 5 PCH_SPI_MOSI_1 11/30 Add
Reserved 0 1
4 HOLD# SI 2 PCH_SPI_MISO_1 22P_0402_50V8J
4 GND SO PCH_SPI_CLK_1 1 2 1 2 C465
- 1 0 4
1
Y1
2
SPI ROM FOR ME (4MB) MX25L3206EM2I-12G_SO8 33_0402_5% @ R466 @
Footprint 200mil SA000041P00 * SPI 1 1
32.768KHZ_12.5PF_1TJF125DP1A000D 22P_0402_50V8J
18P_0402_50V8J
12/7 Change symbol of U18 from SA00000XT00 to SA000041O00 PCH_SPI_CLK_2 1 2 1 2 C466

+3VS 33_0402_5% @ R467 @
+3VS U18 +3VS
1 1
C168 PCH_SPI_CS1#_2 1 8
C167 18P_0402_50V8J R111 PCH_SPI_MISO_2 2 CS# VCC 7 SPI_HOLD2# 1
R112
2 Security Classification Compal Secret Data Compal Electronics, Inc.
1 2 3.3K_0402_5% SPI_WP2# 3 SO HOLD# 6 PCH_SPI_CLK_2 3.3K_0402_5% 2011/11/22 2012/11/22 Title
2 2 4 WP#
GND
SCLK
SI
5 PCH_SPI_MOSI_2
Issued Date Deciphered Date PCH (1/9) SATA,HDA,SPI, LPC, XDP
SPI ROM FOR ME (1MB) MX25L8006EM2I-12G_SO8
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Footprint 200mil SA000041O00 Custom 1.0
A B C D E
A B C D E
BG34
U16B
No use PU 10K +3VALW SMB_ALERT# R113 1 2 10K_0402_5%
+VCCSUS3_3
BJ34 PERN1 E12 SMB_ALERT#

AV32 PERP1 SMBALERT# / GPIO11 SMB_ALERT# <29> 1 2
PCH_SMBCLK R114 2.2K_0402_5%
AU32 PETN1 H14 PCH_SMBCLK
PETP1 SMBCLK PCH_SMBCLK <27> DDR,WLAN,SMBUS 1 2
PU 2.2K +3VALW PCH_SMBDATA R115 2.2K_0402_5%
PCIE_PRX_DTX_N2 BE34 C9 PCH_SMBDATA
<27> PCIE_PRX_DTX_N2 BF34 PERN2 SMBDATA PCH_SMBDATA <27> 1 2
PCIE_PRX_DTX_P2 RST_GATE R116 1K_0402_5%
<27> PCIE_PRX_DTX_P2 1 2 0.1U_0402_16V7K BB32 PERP2
WLAN C170 PCIE_PTX_DRX_N2
<27> PCIE_PTX_C_DRX_N2 1 2 0.1U_0402_16V7K AY32 PETN2 1 2
C171 PCIE_PTX_DRX_P2 PCH_GPIO74 R117 10K_0402_5%
SMBUS
<27> PCIE_PTX_C_DRX_P2 PETP2 A12 RST_GATE
BG36 SML0ALERT# / GPIO60 RST_GATE <6> 1 2
PCIE_PRX_DTX_N3 PCH_SML1CLK R118 2.2K_0402_5%
<25> PCIE_PRX_DTX_N3 BJ36 PERN3 C8
PCIE_PRX_DTX_P3 S3 reduse No use PU 10K +3VALW
1 <25> PCIE_PRX_DTX_P3 1 2 0.1U_0402_16V7K AV34 PERP3 SML0CLK 1 2 1
PCIE LAN C169 PCIE_PTX_DRX_N3 PCH_SML1DATA R119 2.2K_0402_5%
<25> PCIE_PTX_C_DRX_N3 1 2 0.1U_0402_16V7K AU34 PETN3 G12
C174 PCIE_PTX_DRX_P3
<25> PCIE_PTX_C_DRX_P3 PETP3 SML0DATA 1 2
PCH_GPIO47 R120 10K_0402_5%
BF36
BE36 PERN4
AY34 PERP4 C13 PCH_GPIO74 S3 reduse
BB34 PETN4 SML1ALERT# / PCHHOT# / GPIO74 No use PU 10K +3VALW
PETP4 E14 PCH_SML1CLK EC-PCH SMBUS
PCI-E*
+3VS BG37 SML1CLK / GPIO58
BH37 PERN5 M16 PCH_SML1DATA
2 1 10K_0402_5% MINI1_CLKREQ# AY36 PERP5 SML1DATA / GPIO75 PU 2.2K +3VALW +3VS
R121 For DDR , TP
BB36 PETN5
R123 2 1 10K_0402_5% PCH_GPIO20 PETP5 R122
BJ38 4.7K_0402_5%
PERN6
2
+VCCSUS3_3 BG38 1 2
+3VS
Controller
AU36 PERP6 M7
R124 2 1 10K_0402_5% PCH_GPIO73 AV36 PETN6 CL_CLK1 PCH_SMBDATA 6 1 D_CK_SDATA
HM70 not support PETP6 D_CK_SDATA <11,12,30>
Link
R126 2 @ 1 10K_0402_5% LAN_CLKREQ# PCIE port 5-8 BG40 T11 Q5A
BJ40 PERN7 CL_DATA1 DMN66D0LDW-7_SOT363-6 R125
R127 2 1 10K_0402_5% PCH_GPIO26 AY40 PERP7 4.7K_0402_5%
PETN7
5
BB40 P10 1 2
PETP7 CL_RST1# +3VS
R128 2 1 10K_0402_5% PCH_GPIO44
BE38 PCH_SMBCLK 3 4 D_CK_SCLK
2 1 10K_0402_5% BC38 PERN8 D_CK_SCLK <11,12,30>
R129 PCH_GPIO45
AW 38 PERP8 Q5B
R130 2 1 10K_0402_5% PCH_GPIO46 AY38 PETN8 DMN66D0LDW-7_SOT363-6
PETP8
R142 2 1 10K_0402_5% PCH_GPIO56 M10 PCH_GPIO47 +3VS
Y40 PEG_A_CLKRQ# / GPIO47 No use PU 10K +3VALW
Y39 CLKOUT_PCIE0N
CLKOUT_PCIE0P AB37
Pull up at EC side.
2 2
CLOCKS
CLKOUT_PEG_A_N
2
No use PU 10K +3VALW PCH_GPIO73 J2 AB38
PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
PCH_SML1DATA 6 1 EC_SMB_DA2
AB49 AV22 EC_SMB_DA2 <29>
CLK_CPU_DMI#
<27> CLK_PCIE_MINI1# AB47 CLKOUT_PCIE1N CLKOUT_DMI_N AU22 CLK_CPU_DMI# <5>
CLK_CPU_DMI Q6A
<27> CLK_PCIE_MINI1 CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI <5>
WLAN DMN66D0LDW-7_SOT363-6
5
MINI1_CLKREQ# M1
<27> MINI1_CLKREQ# PCIECLKRQ1# / GPIO18 AM12
No use PU 10K +3VS CLK_CPU_DPLL#
CLKOUT_DP_N / CLKOUT_BCLK1_N AM13 CLK_CPU_DPLL# <5> 3 4
CLK_CPU_DPLL 120MHz for eDP. PCH_SML1CLK EC_SMB_CK2
AA48 CLKOUT_DP_P / CLKOUT_BCLK1_P CLK_CPU_DPLL <5> EC_SMB_CK2 <29>
AA47 CLKOUT_PCIE2N Q6B
CLKOUT_PCIE2P BF18 CLK_BUF_CPU_DMI# R131 1 2 10K_0402_5% DMN66D0LDW-7_SOT363-6
PCH_GPIO20 V10 CLKIN_DMI_N BE18 CLK_BUF_CPU_DMI R132 1 2 10K_0402_5%
No use PU 10K +3VS PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
Y37 BJ30 CLKIN_GND1# R133 1 2 10K_0402_5%

<25> CLK_PCIE_LAN# Y36 CLKOUT_PCIE3N CLKIN_DMI2_N BG30
PCIE LAN CLKIN_GND1 R134 1 2 10K_0402_5%
<25> CLK_PCIE_LAN CLKOUT_PCIE3P CLKIN_DMI2_P
No use PU 10K +3VALW LAN_CLKREQ# A8
<25> LAN_CLKREQ# PCIECLKRQ3# / GPIO25 G24 CLK_BUF_DREF_96M# R135 1 2 10K_0402_5%
CLKIN_DOT_96N E24 CLK_BUF_DREF_96M R136 1 2 10K_0402_5%
Y43 CLKIN_DOT_96P Pull down 10K ohm
Y45 CLKOUT_PCIE4N for using internal Clock
CLKOUT_PCIE4P AK7 CLK_BUF_PCIE_SATA# R137 1 2 10K_0402_5%
PCH_GPIO26 L12 CLKIN_SATA_N / CKSSCD_N AK5 CLK_BUF_PCIE_SATA R138 1 2 10K_0402_5%
No use PU 10K +3VALW PCIECLKRQ4# / GPIO26 CLKIN_SATA_P / CKSSCD_P
V45 K45 CLK_BUF_ICH_14M R139 1 2 10K_0402_5%

V46 CLKOUT_PCIE5N REFCLK14IN
CLKOUT_PCIE5P
No use PU 10K +3VALW PCH_GPIO44 L14 H45 CLK_PCI_LPBACK
3 PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK 2 1 1 2 CLK_PCI_LPBACK <17> 3
R140 @ C175 @ 22P_0402_50V8J

AB42 V47 XTAL25_IN 33_0402_5%
AB40 CLKOUT_PEG_B_N XTAL25_IN V49 XTAL25_OUT
CLKOUT_PEG_B_P XTAL25_OUT Reserve for EMI please close to PCH
PCH_GPIO56 E6 R141 +1.05VS_VTT
PEG_B_CLKRQ# / GPIO56 W=12mil S=15mil
90.9_0402_1%
Y47 XCLK_RCOMP 1 2
V40 XCLK_RCOMP XTAL25_IN
V42 CLKOUT_PCIE6N
CLKOUT_PCIE6P XTAL25_OUT 1 2
No use PU 10K +3VALW PCH_GPIO45 T13 R144 1M_0402_5%
PCIECLKRQ6# / GPIO45
V38 K43 CLK_FLEX0 @ 25MHZ_10PF_7V25000014
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 T12 PAD
V37
FLEX CLOCKS
CLKOUT_PCIE7P F47 CLK_FLEX1 @ 3 1

CLKOUTFLEX1 / GPIO65 T13 PAD 3 1
No use PU 10K +3VALW PCH_GPIO46 K12
PCIECLKRQ7# / GPIO46 H47 CLK_FLEX2 @ GND GND
CLKOUTFLEX2 / GPIO66 T14 PAD 1 1
AK14
AK13 CLKOUT_BCLK0_N / CLKOUT_PCIE8N K49 CLK_FLEX3 @ C176 4 Y2 2 C177
CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLKOUTFLEX3 / GPIO67 T33 PAD
12P_0402_50V8J 12P_0402_50V8J
2 2
COUGARPOINT_FCBGA989
HM77@
4 4

2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PCH (2/9) PCIE, SMBUS, CLK
Custom 1.0
A B C D E
A B C D E
<4>
DMI_CTX_PRX_N0
DMI_CTX_PRX_N0 BC24
U16C
DMI0RXN FDI_RXN0
BJ14 FDI_CTX_PRX_N0
FDI_CTX_PRX_N0 <4> +RTCVCC
DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1
<4> DMI_CTX_PRX_N1 DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1 <4>
DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2
+3VALW_PCH <4> DMI_CTX_PRX_N2 DMI2RXN FDI_RXN2 FDI_CTX_PRX_N2 <4>
DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3
<4> DMI_CTX_PRX_N3 DMI3RXN FDI_RXN3 FDI_CTX_PRX_N3 <4>
BC12 FDI_CTX_PRX_N4 DSWODVREN R150 2 1 330K_0402_5%
FDI_RXN4 FDI_CTX_PRX_N4 <4>
DMI_CTX_PRX_P0 BE24 BJ12 FDI_CTX_PRX_N5
<4> DMI_CTX_PRX_P0 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5 <4>
R151 2 1 10K_0402_5% PCH_ACIN DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6 R152 2 @ 1 330K_0402_5%
DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7
：
DMI_CTX_PRX_P3 BJ20 DSWODVREN - On Die DSW VR Enable
+VCCSUS3_3 <4> DMI_CTX_PRX_P3 DMI3RXP BG14 FDI_CTX_PRX_P0 H Enable internal DSW +1.05VS
FDI_RXP0 FDI_CTX_PRX_P0 <4> *
：
DMI_CRX_PTX_N0 AW24 BB14 FDI_CTX_PRX_P1
1 <4> DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 <4> 1
DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2 L Disable
<4> DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P2 <4>
R153 2 1 10K_0402_5% SUSWARN#_R DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3 Must always PU at +RTCVCC
DMI_CRX_PTX_N3 AV18 BE12 FDI_CTX_PRX_P4
DMI
FDI
R154 2 1 10K_0402_5% PCH_GPIO72 BG12 FDI_CTX_PRX_P5
FDI_RXP5 FDI_CTX_PRX_P5 <4>
DMI_CRX_PTX_P0 AY24 BJ10 FDI_CTX_PRX_P6
<4> DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6 <4> +VCCSUS3_3
R155 2 1 10K_0402_5% RI# DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7
<4> DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 <4>
DMI_CRX_PTX_P2 AY18
<4> DMI_CRX_PTX_P2 DMI2TXP
DMI_CRX_PTX_P3 AU18 PCH_PCIE_WAKE# R156 1 2 10K_0402_5%
<4> DMI_CRX_PTX_P3 DMI3TXP
R157 2 1 200_0402_5% PM_DRAM_PWRGD AW16 FDI_INT
FDI_INT FDI_INT <4>
Follow Tacoma 1.0 +1.05VS_VTT BJ24 AV12 FDI_FSYNC0 PCH_GPIO29 R158 1 @ 2 10K_0402_5%
R159 2 1 10K_0402_5% PCH_RSMRST#
L=500mil S=15mil DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 <4>
1 2 DMI_IRCOMP BG25 BC10 FDI_FSYNC1 +3VS
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 <4>
R160 49.9_0402_1%
1 2 DMI2RBIAS BH21 AV14 FDI_LSYNC0 CLKRUN# R162 1 2 8.2K_0402_5%
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 <4>
R161 750_0402_1%
BB10 FDI_LSYNC1
FDI_LSYNC1 FDI_LSYNC1 <4>
4mil width and place
within 500mil of the PCH
A18 DSWODVREN
SUS_PWR_DN_ACK R178 1 S3@ 2 0_0402_5% DSWVRMEN 0_0402_5%
not support Deep S4,S5 not support Deep S4,S5 DPWROK mux with
System Power Management

R483 1 S3@ 2 PCH_RSMRST#
can be left unconnected. SUSACK# 1 DS3@ 2 SUSACK#_R C12 E22 1 2 RSMRST#
<29> SUSACK# SUSACK# DPWROK PCH_DPWROK <29>
Check list1.5 P.81 R163 0_0402_5% R482 DS3@ 0_0402_5% check list1.5 P.50
1 2 XDP_DBRESET#_R K3 B9 PCH_PCIE_WAKE#
<5> XDP_DBRESET# SYS_RESET# WAKE# PCH_PCIE_WAKE# <25,27>
2
R164 0_0402_5% PCH_DPWROK 2
1
SYS_PWROK P12 N3 CLKRUN# No use PU 10K +3VS
SYS_PWROK CLKRUN# / GPIO32 CLKRUN# <30>
not support AMT APWROK can mux R165
100K_0402_5%
with PWROK (check list1.5 P.47) PCH_PWROK 1 2 PCH_PWROK_R L22 G8 SUS_STAT# @
PWROK SUS_STAT# / GPIO61 T15 @ PAD
R166 0_0402_5%
2
L10 N14 SUSCLK
APWROK SUSCLK / GPIO62 SUSCLK <29>
T34 @ PAD
PM_DRAM_PWRGD B13 D10 PM_SLP_S5#
<5> PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 PM_SLP_S5# <29>
T35 @ PAD
PCH_RSMRST# C21 H4 PM_SLP_S4#
<29> PCH_RSMRST# RSMRST# SLP_S4# PM_SLP_S4# <29>
R179 1 S3@ 2 0_0402_5%
T36 @ PAD Can be left NC
<29> SUS_PWR_DN_ACK
1 DS3@ 2 SUSWARN#_R K16 F4 PM_SLP_S3# when IAMT is not
<29> SUSWARN# SUSWARN# / SUS_PWR_DN_ACK / GPIO30 SLP_S3# PM_SLP_S3# <29>
R196 0_0402_5% support on the
PBTN_OUT# E20 G10 SLP_A#
platfrom
1/11 Add "ACPRESENT" signal. (follow Q5LJ1) <29> PBTN_OUT# PWRBTN# SLP_A# T16 @ PAD
R177 D2 @ not support
1 2 PCH_ACIN 1 2 PCH_ACIN H20 G16 SLP_SUS#
<29> ACPRESENT
0_0402_5%
<29,33,36> ACIN ACPRESENT / GPIO31 SLP_SUS# SLP_SUS# <29> Deep S4,S5 can NC
RB751V-40_SOD323-2 PCH EDS1.5 P.75
No use PU 10K +3VALW PCH_GPIO72 E10 AP14 H_PM_SYNC
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC <5>
3 3
Ring Indicator CRB1.0 PU 10K +3VALW RI# A10 K14 PCH_GPIO29 No use PU 10K +3VALW
RI# SLP_LAN# / GPIO29
HM77@
+3VS ALL power OK

tell PCH all power ok
but cpu core
5
U19
2
P
<29> PCH_PWROK B 4 SYS_PWROK

Y SYS_PWROK <5>
1
<41> VGATE A
G
1
MC74VHC1G08DFT2G_SC70-5 1
3
R167 R168 C178

10K_0402_5% 10K_0402_5% @
0.047U_0402_16V7K
2
2
4 4

2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PCH (3/9) DMI,FDI,PM
Custom 1.0
A B C D E
A B C D E
UMA Panel Backlight ON/OFF

schematic-laptop.blogspot.com IGPU_BKLT_EN J47
U16D
AP43
M45 L_BKLTEN SDVO_TVCLKINN AP45
<22> PCH_ENVDD L_VDD_EN SDVO_TVCLKINP
ENBKL R169 2 1 0_0402_5% IGPU_BKLT_EN
<29> ENBKL P45 AM42
<22> DPST_PWM L_BKLTCTL SDVO_STALLN
PD 100K AM40
T40 SDVO_STALLP
at EC side <22> PCH_LCD_CLK
K47 L_DDC_CLK AP39
<22> PCH_LCD_DATA L_DDC_DATA SDVO_INTN AP40 SDVO_CTRLDATA strap pull high
CTRL_CLK T45 SDVO_INTP
+3VS L=500mil S=30mil CTRL_DATA P39 L_CTRL_CLK at level shift page
1 Change to eDP only L_CTRL_DATA
1
2.37K_0402_1%
R170 1 LVDS@ 2 2.2K_0402_5% CTRL_CLK R171 2 1 LVDS_IBG AF37 P38 SDVO_SCLK
LVD_IBG SDVO_CTRLCLK SDVO_SCLK <23>
AF36 M39 SDVO_SDATA
1 LVDS@ 2 2.2K_0402_5% LVD_VBG SDVO_CTRLDATA SDVO_SDATA <23>
R172 CTRL_DATA DIS only can NC W=10mil S=30mil LVD_VREF AE48
R173 2 1 AE47 LVD_VREFH AT49
UMA LVDS DDC 0_0402_5% LVD_VREFL DDPB_AUXN AT47
R174 1 LVDS@ 2 2.2K_0402_5% PCH_LCD_CLK DDPB_AUXP AT40 PCH_DPB_HPD
AK39 DDPB_HPD PCH_DPB_HPD <23>
PCH_TXCLK-
LVDS
<22> PCH_TXCLK- LVDSA_CLK#
R175 1 LVDS@ 2 2.2K_0402_5% PCH_LCD_DATA PCH_TXCLK+ AK40 AV42 PCH_DPB_N0
<22> PCH_TXCLK+ LVDSA_CLK DDPB_0N PCH_DPB_N0 <23>
AV40 PCH_DPB_P0 HDMI D2
DDPB_0P PCH_DPB_P0 <23>
Check list1.5 P.60 disable Graphics PCH_TXOUT0- AN48 AV45 PCH_DPB_N1
<22> PCH_TXOUT0- LVDSA_DATA#0 DDPB_1N PCH_DPB_N1 <23>
Digital Display Interface

PCH_TXOUT1- AM47 AV46 PCH_DPB_P1 HDMI D1
ALL Can NC <22> PCH_TXOUT1-
PCH_TXOUT2- AK47 LVDSA_DATA#1 DDPB_1P AU48 PCH_DPB_N2
PCH_DPB_P1 <23>
<22> PCH_TXOUT2- LVDSA_DATA#2 DDPB_2N PCH_DPB_N2 <23>
but DAC_IREF still need PD AJ48
LVDSA_DATA#3 DDPB_2P
AU47 PCH_DPB_P2
PCH_DPB_P2 <23> HDMI D0
AV47 PCH_DPB_N3
DDPB_3N PCH_DPB_N3 <23>
PCH_TXOUT0+ AN47 AV49 PCH_DPB_P3 HDMI CLK
<22> PCH_TXOUT0+ LVDSA_DATA0 DDPB_3P PCH_DPB_P3 <23>
PCH_TXOUT1+ AM49
<22> PCH_TXOUT1+ AK49 LVDSA_DATA1
LVDS disable: PCH_TXOUT2+
<22> PCH_TXOUT2+ LVDSA_DATA2
AJ47 P46
DATA/Clock/Control an NC LVDSA_DATA3 DDPC_CTRLCLK P42
VCC_TX_LVDS,VCCA_LVDS PD to GND DDPC_CTRLDATA
AF40
AF39 LVDSB_CLK# AP47
2 LVDSB_CLK DDPC_AUXN AP49 2
UM77 not support AH45 DDPC_AUXP AT38
LVDS/CRT AH47 LVDSB_DATA#0 DDPC_HPD
AF49 LVDSB_DATA#1 AY47
AF45 LVDSB_DATA#2 DDPC_0N AY49
LVDSB_DATA#3 DDPC_0P AY43
+3VS AH43 DDPC_1N AY45
AH49 LVDSB_DATA0 DDPC_1P BA47
AF47 LVDSB_DATA1 DDPC_2N BA48
R484 1 2 2.2K_0402_5% PCH_CRT_CLK AF43 LVDSB_DATA2 DDPC_2P BB47
R485 1 2 2.2K_0402_5% PCH_CRT_DATA LVDSB_DATA3 DDPC_3N BB49
DDPC_3P
R486 1 2 150_0402_1% PCH_CRT_B
R487 1 2 150_0402_1% PCH_CRT_G PCH_CRT_B N48 M43
1 2 150_0402_1% <24> PCH_CRT_B P49 CRT_BLUE DDPD_CTRLCLK M36
R488 PCH_CRT_R PCH_CRT_G
<24> PCH_CRT_G CRT_GREEN DDPD_CTRLDATA
PCH_CRT_R T49
<24> PCH_CRT_R CRT_RED
AT45
CRT
PCH_CRT_CLK T39 DDPD_AUXN AT43
<24> PCH_CRT_CLK M40 CRT_DDC_CLK DDPD_AUXP BH41
PCH_CRT_DATA
<24> PCH_CRT_DATA CRT_DDC_DATA DDPD_HPD
BB43
PCH_CRT_HSYNC M47 DDPD_0N BB45
<24> PCH_CRT_HSYNC CRT_HSYNC DDPD_0P
PCH_CRT_VSYNC M49 BF44
<24> PCH_CRT_VSYNC CRT_VSYNC DDPD_1N BE44
3 3
DDPD_1P BF42
CRT_IREF T43 DDPD_2N BE42
CRT_IRTN T42 DAC_IREF DDPD_2P BJ42
CRT_IRTN DDPD_3N BG42
DDPD_3P
1
R176 1 R531 COUGARPOINT_FCBGA989 HM77@

1K_0402_0.5% FBMA-11-100505-301T 0402
2
4 4

2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PCH (4/9) LVDS,CRT,DP,HDMI
Custom 1.0
A B C D E
A B C D E
U16E
+3VS AY7
NV_CE#0 AV7
12/6 Add R469~R480 NV_CE#1
BG26 AU3
8.2K_0402_5% 2 1 R469 PCI_PIRQC# BJ26 TP1 NV_CE#2 BG4
8.2K_0402_5% 2 1 R470 PCI_PIRQB# BH25 TP2 NV_CE#3
8.2K_0402_5% 2 1 R471 PCI_PIRQA# BJ16 TP3 AT10
8.2K_0402_5% 2 1 R472 PCI_PIRQD# BG16 TP4 NV_DQS0 BC8
AH38 TP5 NV_DQS1
AH37 TP6 AU2
AK43 TP7 NV_DQ0 / NV_IO0 AT4
1 AK45 TP8 NV_DQ1 / NV_IO1 AT3 1
8.2K_0402_5% 2 1 R473 PCH_GPIO55 C18 TP9 NV_DQ2 / NV_IO2 AT1
8.2K_0402_5% 2 1 R474 PCH_GPIO53 N30 TP10 NV_DQ3 / NV_IO3 AY3
8.2K_0402_5% 2 1 R475 PCH_GPIO52 H3 TP11 NV_DQ4 / NV_IO4 AT5
8.2K_0402_5% 2 1 R476 PCH_GPIO5 AH12 TP12 NV_DQ5 / NV_IO5 AV3
NVRAM
AM4 TP13 NV_DQ6 / NV_IO6 AV1
AM5 TP14 NV_DQ7 / NV_IO7 BB1
Y13 TP15 NV_DQ8 / NV_IO8 BA3
K24 TP16 NV_DQ9 / NV_IO9 BB5
8.2K_0402_5% 2 1 R477 PCH_GPIO51 L24 TP17 NV_DQ10 / NV_IO10 BB3
8.2K_0402_5% 2 1 R478 PCH_GPIO2 AB46 TP18 NV_DQ11 / NV_IO11 BB7
AB45 TP19 NV_DQ12 / NV_IO12 BE8
RSVD
8.2K_0402_5% 2 1 R480 PCH_GPIO4 TP20 NV_DQ13 / NV_IO13 BD4
NV_DQ14 / NV_IO14 BF6
NV_DQ15 / NV_IO15
8.2K_0402_5% 2 1 R523 PCH_GPIO3 B21 AV5
10K_0402_5% 2 1 R180 PCH_GPIO54 M20 TP21 NV_ALE AY1 DF_TVS
AY16 TP22 NV_CLE
TP23 DMI,FDI Termination Voltage *Note:457511 Rev 1.3-p.20
BG46 AV10
+3VS TP24 NV_RCOMP
AT8
Set to Vcc when HIGH HR CPU NC
1 2 NV_RB# DF_TVS
R181 8.2K_0402_5% BE28 AY5
Set to Vss when LOW HR&CR co-lay CPU PU
PCH_USB3_RX2_N BC30 TP25 NV_RE#_WRB0 BA2
1 2 <28> PCH_USB3_RX2_N BE32 TP26 NV_RE#_WRB1
@ PCH_GPIO50
R182 8.2K_0402_5% BJ32 TP27 AT12
BC28 TP28 NV_WE#_CK0 BF3
CR Check list P.89 PU 2.2K series 1K
PCH_USB3_RX2_P BE30 TP29 NV_WE#_CK1
<28> PCH_USB3_RX2_P BF32 TP30 +1.8VS
BG32 TP31 C24
USB3.0 AV26 TP32 USBP0N A24
TP33 USBP0P
1
PCH_USB3_TX2_N BB26 C25 USB20_N1
2 <28> PCH_USB3_TX2_N AU28 TP34 USBP1N B25 USB20_P1 USB20_N1 <28> 2
USB3 (Left side) R183
AY30 TP35 USBP1P C26 USB20_P1 <28>
Boot BIOS Strap USB20_N2 2.2K_0402_5%
AU26 TP36 USBP2N A26 USB20_N2 <28>
USB20_P2 USB2 (Left side2)
AY26 TP37 USBP2P K28 USB20_P2 <28>
GPIO19 GPIO51 Boot BIOS PCH_USB3_TX2_P USB20_N3
<28> PCH_USB3_TX2_P USB20_N3 <28>
2
AV28 TP38 USBP3N H28 USB20_P3 DF_TVS 2 1
USB2 (Left side1)
Bit10 Destination AW30 TP39 USBP3P E28 USB20_P3 <28> H_SNB_IVB# <5>
Bit11 TP40 USBP4N
EHCI 1 R184 1K_0402_5%
GNT1#/ D28
USBP4P C28
GPIO51 0 1 Reserved USBP5N A28
CLOSE TO THE BRANCHING POINT
USBP5P C29
1 0 PCI USBP6N B29
HM70 not support USB2.0 for port 4-7 &12 &13
Internal PCI_PIRQA# K40 USBP6P N28
PH 1 1 SPI * PCI_PIRQB# K38 PIRQA# USBP7N M28
PCI Interrupt Requests
PCI
PCI_PIRQC# H38 PIRQB# USBP7P L30 USB20_N8
0 0 LPC PCI_PIRQD# G38 PIRQC# USBP8N K30 USB20_P8 USB20_N8 <27>
PIRQD# USBP8P G30 USB20_P8 <27> Mini Card (WLAN) +VCCSUS3_3
PCH_GPIO50 C46 USBP9N E30
CR Check list 1.5 only use for GPIO
USB
PCH_GPIO52 C44 REQ1# / GPIO50 USBP9P C30 USB20_N10
No use PU +3VS PCH_GPIO54 E40 REQ2# / GPIO52 USBP10N A30 USB20_P10
USB20_N10 <22>
REQ3# / GPIO54 USBP10P L32 USB20_P10 <22> CMOS Camera (LVDS)
Only GPIO USBP11N
EHCI 2
無無如如
CR Check list 1.5 only use for GPIO PCH_GPIO51 D47 K32 USB_OC0# 2 1
function PCH_GPIO53 E42 GNT1# / GPIO51 USBP11P G32 R185 10K_0402_5%
PH(Internal PH), GPIO PU +3VS PCH_GPIO55 F46 GNT2# / GPIO53 USBP12N E32 USB_OC7# 2 1
GNT3# / GPIO55 USBP12P C32 R186 10K_0402_5%
USBP13N A32 USB_OC5# 2 1
PCH_GPIO2 G42 USBP13P R187 10K_0402_5%
PCH_GPIO3 G40 PIRQE# / GPIO2 USB_OC6# 2 1
PCH_GPIO4 C42 PIRQF# / GPIO3 C33 USBRBIAS 1 2 R188 10K_0402_5%
PCH_GPIO5 D44 PIRQG# / GPIO4 USBRBIAS# R189 22.6_0402_1% USB_OC1# 2 1
PIRQH# / GPIO5 R197 10K_0402_5%
B33 L=500mil S=15mil USB_OC4# 2 1
K10 USBRBIAS R208 10K_0402_5%
3 PAD T17 @ PME# 3
USB_OC3# 2 1
PLT_RST# C6 A14 USB_OC0# R215 10K_0402_5%
<5> PLT_RST# PLTRST# OC0# / GPIO59 K20 USB_OC1# USB_OC0# <28> USB_OC2# 2 1
OC1# / GPIO40 B17 USB_OC2# USB_OC1# <28>
R217 10K_0402_5%
CLK_PCI_LPBACK R191 1 2 22_0402_5% CLK_PCI0 H49 OC2# / GPIO41 C16 USB_OC3#
<14> CLK_PCI_LPBACK 1 2 22_0402_5% CLK_PCI1 H43 CLKOUT_PCI0 OC3# / GPIO42 L16
CLK_PCI_LPC R192 USB_OC4#
<29> CLK_PCI_LPC 1 2 22_0402_5% CLK_PCI2 J48 CLKOUT_PCI1 OC4# / GPIO43 A16
CLK_PCI_TPM R193 USB_OC5#
<30> CLK_PCI_TPM CLK_PCI3 K42 CLKOUT_PCI2 OC5# / GPIO9 D14 USB_OC6#
PAD T18 @ CLKOUT_PCI3 OC6# / GPIO10
CLK_PCI4 H40 C14 USB_OC7#
PAD T19 @ CLKOUT_PCI4 OC7# / GPIO14
11/30 Add (EMI request)
C469
HM77@
@ 2 1 CLK_PCI_LPC
22P_0402_50V8J
C474
@ 2 1 CLK_PCI_LPBACK
22P_0402_50V8J
C482
@ 2 1 CLK_PCI_TPM
22P_0402_50V8J
R194
0_0402_5%
2 1
@
4 +3VS 4
5
U20
PLT_RST# 2
P
B 4
1 Y PLT_RST_BUF# <25,27,29,30>
A
G
R195 Security Classification Compal Secret Data Compal Electronics, Inc.

3
100K_0402_5% 2011/11/22 2012/11/22 Title

Issued Date Deciphered Date PCH (5/9) PCI, USB, NVRAM
MC74VHC1G08DFT2G_SC70-5
2
A B C D E
A B C D E
HDA_SYNC PH(PLL =+1.5VS)
GPIO28
schematic-laptop.blogspot.com +3VS +3VS +3VS
On-Die PLL Voltage Regulator
1
：：
This signal has a weak internal pull up R198 R199 R200
H On-Die PLL voltage regulator enable 10K_0402_5% 10K_0402_5% 10K_0402_5%@
* L On-Die PLL Voltage Regulator disable LVDS@ @
11/21 EDP@->POP
2
PCH_GPIO71 PCH_GPIO69 PCH_GPIO70
+VCCSUS3_3
2
LVDS/eDP GPIO71
Fan Tachometer Inputs R201 R203 R204
1 10K_0402_5% 10K_0402_5% 10K_0402_5% 1
TACH1~7 only on server LVDS 1
1
EDP@
R202 can insted to GPIO eDP 0
1
4.7K_0402_5%
U16F
2
PCH_GPIO28
No use PU 10K +3VS PCH_GPIO0 T7 C40 PCH_GPIO68
BMBUSY# / GPIO0 TACH4 / GPIO68
2
R205 No use PU 10K +3VS PCH_GPIO1 A42 B41 PCH_GPIO69

@ TACH1 / GPIO1 TACH5 / GPIO69
1K_0402_5%
PCH_GPIO6 H36 C41 PCH_GPIO70 +3VS
No use PU 10K +3VS TACH2 / GPIO6 TACH6 / GPIO70
1
Debug Port DG 1.2 PU 4.7K +3VALW_PCH No use PU 10K +3VS EC_SCI# E38 A40 PCH_GPIO71
<29> EC_SCI# TACH3 / GPIO7 TACH7 / GPIO71
2
No use PU 10K +3VALW EC_SMI# C10 R206
<29> EC_SMI# GPIO8
10K_0402_5%
Deep S4,S5 wake event signal No use PU +3VALW PCH_GPIO12 C4
LAN_PHY_PWR_CTRL / GPIO12
RTC alarm,Power BTN,GPIO27
1
No use PU +3VALW EC_LID_OUT# G2 P4
<29> EC_LID_OUT# GPIO15 A20GATE GATEA20 <29>
PCH_GPIO27 (Have internal Pull-High) AU16 PCH_PECI_R 1 2
@ PECI CPU-EC
Deep S4,S5 wake event signal
CPU/MISC
PCH_GPIO16 U2 PECI H_PECI <5,29>
No use PU +3VS 0_0402_5% R207
SATA4GP / GPIO16 P5 EC_KBRST#
RCIN# EC_KBRST# <29> CTRL+ALT+DEL
GPIO
No use PU +3VS PCH_GPIO17 D40 AY11 non CPU power ok
1 2 10K_0402_5% PCH_GPIO27 TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD <5>
R209 @
No use PU 10K +3VS RAM flag PCH_GPIO22 T5 AY10 PCH_THRMTRIP#_R 1 2 H_THRMTRIP# 130c shut down
SCLOCK / GPIO22 THRMTRIP# H_THRMTRIP# <5>
R210 390_0402_5%
No use PU +3VALW DDR3/DDR3L PCH_GPIO24 E8 T14
GPIO24 / MEM_LED INIT3_3V#
PCH_GPIO27 E16
INIT3_3V Checklist1.5 P.69
2 +3VS No use PD 10K to GND GPIO27 +3VS 2
PCH_GPIO28 P8
This signal has weak internal
No use PU 10K +3VALW GPIO28 AH8 PU, can't pull low,leave NC
R211 2 1 200K_0402_5% PCH_GPIO36 PCH_GPIO34 K1 NC_1
No use PU 10K +3VS BT ON/OFF STP_PCI# / GPIO34 AK11 EC_KBRST# 1 2 10K_0402_5%
R212
PAD T20 @ PCH_GPIO35 K4 NC_2
+3VALW_PCH
No use can NC GPIO35 AH10 PCH_GPIO68 1 2 10K_0402_5%
TS_VSS1~4 R213
PCH_GPIO36 V8 NC_3
1 2 1K_0402_5% EC_SMI#
Can't PU SATA2GP / GPIO36 AK10 PD to GND
R214 @
PAD T21 @ PCH_GPIO37 M5 NC_4
Can't PU SATA3GP / GPIO37 P37
PCH_GPIO38 N2 NC_5
No use PU 10K +3VS SLOAD / GPIO38
SATA2GP/GPIO36 & SATA3GP/GPIO37 PCH_GPIO39 M3
Sampled at Rising edge of PWROK. No use PU 10K +3VS RAM flag SDATAOUT0 / GPIO39
Weak internal pull-down. No use PU 10K +3VS PCH_GPIO48 V13
SDATAOUT1 / GPIO48 VSS_NCTF_15
BG2
(weak internal pull-down is disabled PCH_GPIO49 V3 BG48
after PLTRST# de-asserts) SATA5GP&TEMP_ALERT# CRB PU 10K +3VS SATA5GP / GPIO49 VSS_NCTF_16 9/15 Layout
NOTE: This signal should NOT be PCH_GPIO57 D6 BH3 request remove
No use PU +3VALW GPIO57 VSS_NCTF_17
pulled high when strap is sampled Test point
BH47
VSS_NCTF_18 They will route
A4 BJ4 by itself
VSS_NCTF_1 VSS_NCTF_19
9/15 Layout A44 BJ44
+3VS request remove A45 BJ45
Test point
NCTF
R216 1 2 10K_0402_5% PCH_GPIO0 A46 BJ46
They will route VSS_NCTF_4 VSS_NCTF_22
R218 1 2 10K_0402_5% PCH_GPIO1 by itself A5 BJ5
3 VSS_NCTF_5 VSS_NCTF_23 3
R219 1 2 10K_0402_5% PCH_GPIO6 A6 BJ6
R220 1 2 10K_0402_5% PCH_GPIO16 B3 C2
R221 1 2 10K_0402_5% PCH_GPIO17 B47 C48
R522 1 2 10K_0402_5% PCH_GPIO38 BD1 D1
12/13 Add BD49 D49
R222 1 2 10K_0402_5% PCH_GPIO34 BE1 E1
R223 1 2 10K_0402_5% PCH_GPIO48 BE49 E49
R225 1 2 10K_0402_5% PCH_GPIO49 BF1 F1
+VCCSUS3_3 BF49 F49
+VCCSUS3_3 VSS_NCTF_14 VSS_NCTF_32
COUGARPOINT_FCBGA989 +3VS +3VS

HM77@
R224 1 2 10K_0402_5% PCH_GPIO24
1
R227 1 2 10K_0402_5% PCH_GPIO12 R229 R231
R226 1 @ 2 10K_0402_5% 10K_0402_5% 10K_0402_5%
R228 1 2 1K_0402_5% EC_LID_OUT#
2
R232 1 2 10K_0402_5% PCH_GPIO57 PCH_GPIO39 PCH_GPIO22
1
4
GPIO36/GPIO37 is Strap functionality R233 R235
4
GPIO24 Unmultiplexed 10K_0402_5% 10K_0402_5%
that requires internal pull down to be sampled at rising PWROK. @ @
NOTE: GPIO24 configuration When uses as SATA2GP/SATA3GP for mechanical presence detect
2
register bits are not cleared by -use a external pull up 150K-200K ohm to Vcc3_3
CF9h reset event. When used as GP input
-ensure GPI is not driven high during strap sampling window
CRB1.0 PU 10K to +3VALW When Unused as GPIO or SATA*GP
-use 8.2K-10K pull-down
2011/11/22 2012/11/22 Title
check list page 47 Issued Date Deciphered Date PCH (6/9) GPIO, CPU, MISC
A B C D E
A B C D E
schematic-laptop.blogspot.com Thermal Senser share with VCCADAC power rail

so can't remove this power
+1.05VS_VTT U16G POWER 1/10 Add

+3VS
L1
1730mA Place Near U48 MBK1608221YZF_2P
+1.05VS_VTT AA23 U48 +VCCADAC 2 1
AC23 VCCCORE[1] VCCADAC
VCCCORE[2] 63mA 1 1 1 1 1
10U_0603_6.3V6M
C179
1U_0402_6.3V6K
C180
1U_0402_6.3V6K
C181
1U_0402_6.3V6K
C182
CRT
1 1 1 1 AD21 C183 C184 C185 C483 C484
AD23 VCCCORE[3] U47 10U_0603_6.3V6M 0.01U_0402_16V7K 22U_0805_6.3V6M
AF21 VCCCORE[4] VSSADAC 0.01U_0402_16V7K 0.1U_0402_16V7K @ @
VCC CORE
AF23 VCCCORE[5] 2 2 2 2 2
1 2 2 2 2 AG21 VCCCORE[6] +3VS 1
AG23 VCCCORE[7] 1121 LVDS@ ->@
AG24 VCCCORE[8] AK36 +VCCA_LVDS 1 LVDS@ 2
AG26 VCCCORE[9] VCCALVDS R236 0_0805_5%
VCCCORE[10] 1mA
1
Place Near AA23 AG27 AK37
AG29 VCCCORE[11] VSSALVDS R237
AJ23 VCCCORE[12] 0_0402_5% 1121 EDP@->POP 1121 LVDS@ ->@
LVDS
AJ26 VCCCORE[13] AM37 EDP@
AJ27 VCCCORE[14] VCCTX_LVDS[1]
2
AJ29 VCCCORE[15] AM38 L2 +1.8VS
AJ31 VCCCORE[16] VCCTX_LVDS[2] 0.1UH_MLF1608DR10KT_10%_1608
VCCCORE[17] AP36
Place Near AM37 0921 LVDS@->POP +VCCTX_LVDS 2 1
+1.05VS_VTT 60mA VCCTX_LVDS[3] 1 1 1 LVDS@
1
AP37 LVDS@ LVDS@ LVDS@
AN19 VCCTX_LVDS[4] C186 C187 C188 R238
VCCIO[28] 0.1uH inductor, 200mA
0.01U_0402_16V7K 22U_0805_6.3V6M 0_0402_5%
2 2 2 EDP@
PAD T22 @ +VCCAPLLEXP BJ22 +3VS
178mA
2
VCCAPLLEXP 0.01U_0402_16V7K
V33
1121 EDP@->POP
HVCMOS
：
AN16 VCC3_3[6]
VCCIO[15] Place Near V33
H On-Die PLL voltage regulator AN17
1
enable VCCIO[16] V34
I/O Buffer Voltage
C189
VCC3_3[7]
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 AN21 3799mA 2
0.1U_0402_16V7K
,VCCAPLLSATA VCCIO[17]
AN26 +1.5VS PCH Power Rail Table
VCCIO[18]
S0 Iccmax
AN27 AT16 Voltage Rail Voltage
VCCIO[19] VCCVRM[3] Current(A)
+1.05VS_VTT AP21 +1.05VS_VTT Internal PLL and VRM(+1.5VS)
2 VCCIO[20] 2
AP23 AT20
V_PROC_IO 1.05 0.002 Processor I/F
VCCIO[21] VCCDMI[1]
1 DMI buffer logic
DMI
10U_0603_6.3V6M
C190
1U_0402_6.3V6K
C191
1U_0402_6.3V6K
C192
1U_0402_6.3V6K
C193
1U_0402_6.3V6K
C194
1 1 1 1 1 AP24 C195 V5REF 5 0.001 PCH Core Well Reference Voltage

VCCIO
VCCIO[22] 1U_0402_6.3V6K
AP26 47mA AB36
VCCIO[23] VCCIO[1] 2 place V5REF_Sus 5 0.001 Suspend Well Reference Voltag
2 2 2 2 2 AT24
VCCIO[24]
near AT20 Core Well I/O Buffer
AN33
Vcc3_3 3.3 0.178 I/O Buffer Voltage
Place Near AN16,AN21,AN33
VCCIO[25] 190mA Display DAC Analog Power. This power is
AN34 AG16 VccADAC 3.3 0.063
+3VS VCCIO[26] VCCPNAND[1] +1.8VS supplied by the core well.
VccDFTERM should PH +1.8VS or +3VS
NAND / SPI
BH29 AG17 VccADPLLA 1.05 0.075 Display PLL A power

VCC3_3[3] VCCPNAND[2]
1 1
C196 C197
0.1U_0402_16V7K +1.5VS AJ16 0.1U_0402_16V7K
VCCPNAND[3] VccADPLLB 1.05 0.075 Display PLL B power
Place Near 2 AP16 2 place
BH29 VCCVRM[2] AJ17 near AG16 VccCore 1.05 1.73 Internal Logic Voltage
VCCPNAND[4]
PAD @ +1.05VS_VCCAPLL_FDI BG6
T23 VCCFDIPLL
+1.05VS_VTT +3VS VccDMI 1.05 0.047 DMI Buffer Voltage
AP17
VCCIO[27]
FDI
V1 For SPI control logi VccIO 1.05 3.799 Core Well I/O buffers
VCCSPI
1 AU20 10mA 1 1.05 V Supply for Intel R Management
C198 VCCDMI[2]
VccASW 1.05 0.803 Engine and Integrated LAN
1U_0402_6.3V6K C199
3 COUGARPOINT_FCBGA989 1U_0402_6.3V6K 3
2 Near HM77@ 2
VccSPI 3.3 0.01 3.3 V Supply for SPI Controller Logic
AU20
Trace 20mil VccDSW 3.3 0.003 3.3v supply for Deep S4/S5 well
：
H On-Die PLL voltage regulator VccpNAND 1.8 0.19 1.8V power supply for DF_TVS
enable
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 VccRTC 3.3 6 uA Battery Voltage
,VCCAPLLSATA
VccSus3_3 3.3 0.065 Suspend Well I/O Buffer Voltage
High Definition Audio Controller Suspend
VccSusHDA 3.3 / 1.5 0.01 Voltage
1.8 V Internal PLL and VRMs (1.8 V for
VccVRM 1.8 / 1.5 0.16 Desktop)
VccCLKDMI 1.05 0.02 DMI Clock Buffer Voltage
VccSSC 1.05 0.095 Spread Modulators Power Supply
VccDIFFCLKN 1.05 0.055 Differential Clock Buffers Power Supply

Analog power supply for LVDS (Mobile
4
VccALVDS 3.3 0.001 Only) 4
Analog power supply for LVDS (Mobile

VccTX_LVDS 1.8 0.06 Only)

2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PCH (7/9) PWR
A B C D E
A B C D E
+3VS
+1.05V analog
schematic-laptop.blogspot.com VCC3_3 = 178mA detal waiting for newest spec
VCCDMI = 47mA detal waiting for newest spec
+3VALW JUMP_43X39
1
J13 @
2
+VCCSUS3_3
20mil
+5VALW
R240 2
S3@
1 0_0603_5%
+5VREF_SUS
internal clock PLL 1 2

Can NC PAD T24 @ +VCCACLK 3 1 3 1
L3 DS3@
10UH_LB2012T100MR_20% Q68 Q8 DS3@
1
0.1U_0402_16V7K
C279
20K_0402_5%
R288
1 2 +3VS_VCC_CLKF33 AP2301GN-HF_SOT23-3 AP2301GN-HF_SOT23-3
1 1 +VCCDSW3_3 U16J POWER +1.05VS_VTT 0.1U_0402_16V7K
1
0.1U_0402_16V7K
1
1U_0402_6.3V6K
C201
0.1U_0402_16V7K
C205
20K_0402_5%
R241
1 1 2 1 2 1
C200 C202 AD49 N26
VCCACLK VCCIO[29]
1
10U_0603_6.3V6M 0.1U_0402_16V7K C499 2 C500
Not support Deep S4,S5 1
2
2 2 P26 R552 R553
connect to +3VALW 2 T16 VCCIO[30] C204 2
Near T16 1K_0402_5% 1K_0402_5%
2
1 VCCDSW3_3 P28 1U_0402_6.3V6K 1
VCCIO[31] 2
Near T38 3mA
2
PAD T26 @ +PCH_VCCDSW V12 T27 PCH_PWR_EN#
DCPSUSBYP VCCIO[32] <25,33> PCH_PWR_EN#
T29
Near N26
suppied by internal +3VS_VCC_CLKF33 T38 VCCIO[33] +VCCSUS3_3 For Deep S3 turn off +V5REF_SUS,+VCCSUS3_3
1.05V VR must NC VCC3_3[5]
GPIO28 T23
PAD T27 @ +VCCAPLL_CPY_PCH BH23 VCCSUS3_3[7]
On-Die PLL Voltage Regulator 65mA
：
VCCAPLLDMI2 T24
VCCSUS3_3[8] 1 1
H On-Die PLL voltage regulator AL29 C206 C203
+3VALW_PCH +1.05VS_VTT VCCIO[14] V23 0.1U_0402_16V7K 0.1U_0402_16V7K
USB
enable VCCSUS3_3[9]
Near T23 Near T24
1 2 +VCCDSW3_3 PAD T25 @ +VCCSUS1 AL24 V24 2 2 +VCCSUS3_3 +5VREF_SUS
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 DCPSUS[3] VCCSUS3_3[10]
R242 0_0402_5%
,VCCAPLLSATA P24
VCCSUS3_3[6]
1
+1.05VS_VTT
AA19 D3 R243
VCCASW[1] T26 RB751V-40_SOD323-2 100_0402_5%
+1.05VS_VTT AA21 803mA VCCIO[34]
Near M26
+1.05VS_VTT VCCASW[2]
2
AA24 M26 +PCH_V5REF_SUS
L4 1 1
VCCASW[3] 1mA V5REF_SUS 1 2
+3VS +5VS
22U_0805_6.3V6M
C208
22U_0805_6.3V6M
C209
Clock and Miscellaneous

10UH_LB2012T100MR_20% AA26 C207
1 2 +1.05VS_VCCA_A_DPL VCCASW[4] AN23 +VCCA_USBSUS @ T28 0.1U_0402_16V7K
AA27 DCPSUS[4] PAD
VCCASW[5]
1
2 2
1U_0402_6.3V6K
C210
AN24
AA29 VCCSUS3_3[1] +VCCSUS3_3 suppied by internal D4 R244
1 VCCASW[6] 1.05V VR Must NC
Near BD47 100_0402_5%
AA31 RB751V-40_SOD323-2
VCCASW[7]
2
2 AC26 P34 +PCH_V5REF_RUN
2
1 1 1
VCCASW[8] 1mA V5REF +VCCSUS3_3
1
2
1U_0402_6.3V6K
C211
1U_0402_6.3V6K
C212
1U_0402_6.3V6K
C213
AC27
VCCASW[9] N20 C214
VCCSUS3_3[2]
PCI/GPIO/LPC
1 2 +1.05VS_VCCA_B_DPL AC29 1 1U_0603_10V6K
L5 2 2 2 VCCASW[10] N22 C215 2
VCCSUS3_3[3]
1U_0402_6.3V6K
C217
1 10UH_LB2012T100MR_20% AC31 1U_0402_6.3V6K

VCCASW[11] P20
+
1
AD29 VCCSUS3_3[4] 2 Near P34
C216 Near BF47 Near N20
330U_D2_2V_Y VCCASW[12] P22 +3VS
@ AD31 VCCSUS3_3[5]
2 2 Near AA19 VCCASW[13]
W21 AA16
VCCASW[14] VCC3_3[1]
1 1 1
W23 W16 C218 C219 C220
VCCASW[15] VCC3_3[8] 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K
W24 T34
VCCASW[16] VCC3_3[4] 2 Place near 2 Place near 2 Place near
W26 AJ2 AA16,W16 T34
SGA20331E10 VCCASW[17]
330U 2V H1.9 W29
VCCASW[18]
9mohm POLY
W31 AJ2 +1.05VS_VTT
VCCASW[19] VCC3_3[2]
W33
VCCASW[20] AF13
Near M6 VCCIO[5] Near AH13,AH14,AF13
1
2 1 +VCCRTCEXT N16
C221 0.1U_0402_16V7K DCPRTC AH13 C222
VCCIO[12] 1U_0402_6.3V6K
Y49 AH14 2
+1.5VS VCCVRM[4] VCCIO[13]
3 AF14
GPIO28 3
+1.05VS_VCCA_A_DPL BD47 VCCIO[6]
75mA On-Die PLL Voltage Regulator
SATA
：
VCCADPLLA AK1 +VCCSATAPLL @ T29 PAD
+1.05VS_VTT +1.05VS_VCCA_B_DPL BF47 VCCAPLLSATA +1.5VS
VCCADPLLB 75mA H On-Die PLL voltage regulator
AF11 enable
AF17 VCCVRM[1]
+1.05VS_VTT AF33 VCCIO[7] VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2
1 C223 1 C224 AF34 VCCIO[8] AC16 +1.05VS_VTT ,VCCAPLLSATA
1U_0402_6.3V6K 1U_0402_6.3V6K AG34 VCCIO[9] 55mA VCCIO[2]
VCCIO[11] AC17
+1.05VS_VTT VCCIO[3] Near AC16
Place Place 1 C225
2 near AF17 2 near AG33 1U_0402_6.3V6K AG33 AD17
VCCIO[10] VCCIO[4] 1
C227
Place
95mA 1U_0402_6.3V6K
2 2 1 +VCCSST V16
near AF33, Near V16 DCPSST +1.05VS_VTT 2
C226 0.1U_0402_16V7K
AF34,AG34
suppied by internal PAD T30 @ +1.05VM_VCCSUS T17 T21
V19 DCPSUS[1] VCCASW[22]
1.05V VR Must NC DCPSUS[2]
MISC
+1.05VS_VTT V21
VCCASW[23]
2mA
CPU
BJ8
V_PROC_IO T19
VCCASW[21]
1 1 1
+RTCVCC +VCCSUS3_3
4.7U_0603_6.3V6K
C228
0.1U_0402_16V7K
C229
0.1U_0402_16V7K
C230
RTC
A22 P32 Need +3VALW and 0.1U close PCH

10mAVCCSUSHDA
HDA
2 2 2 VCCRTC
isolation between SSC (AG33)
1U_0402_6.3V6K
C231
0.1U_0402_16V7K
C232
0.1U_0402_16V7K
C233
and DIFFCLKN(AF33,AF34,AG34) 1 1 1 1
COUGARPOINT_FCBGA989 C234
4 18mil width(DIFFCLKN) HM77@ 0.1U_0402_16V4Z 4
10mil (SSC) 2 2 2 2
Place
near BJ8
Near P32
Near A22
2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PCH (8/9) PWR
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Q1VZC M/B LA-8941P Schematic 1.0
A B C D E
A B C D E
U16I
AY4 H46
AY42 VSS[159] VSS[259] K18
AY46 VSS[160] VSS[260] K26
AY8 VSS[161] VSS[261] K39
B11 VSS[162] VSS[262] K46
1 U16H B15 VSS[163] VSS[263] K7 1
H5 B19 VSS[164] VSS[264] L18
VSS[0] B23 VSS[165] VSS[265] L2
AA17 AK38 B27 VSS[166] VSS[266] L20
AA2 VSS[1] VSS[80] AK4 B31 VSS[167] VSS[267] L26
AB11 VSS[5] VSS[84] AL16 F45 VSS[171] VSS[271] M12
AB14 VSS[6] VSS[85] AL17 BB12 VSS[172] VSS[272] P16
AB39 VSS[7] VSS[86] AL19 BB16 VSS[173] VSS[273] M18
AC19 VSS[12] VSS[91] AL27 BB30 VSS[178] VSS[278] M34
AC33 VSS[16] VSS[95] AL48 BC14 VSS[182] VSS[282] M46
AC34 VSS[17] VSS[96] AM11 BC18 VSS[183] VSS[283] M8
AC48 VSS[18] VSS[97] AM14 BC2 VSS[184] VSS[284] N18
AD10 VSS[19] VSS[98] AM36 BC22 VSS[185] VSS[285] P30
AD11 VSS[20] VSS[99] AM39 BC26 VSS[186] VSS[286] N47
AD19 VSS[23] VSS[102] AM46 BC36 VSS[189] VSS[289] T33
AD26 VSS[25] VSS[104] AN2 BC42 VSS[191] VSS[291] P43
AD27 VSS[26] VSS[105] AN29 BC48 VSS[192] VSS[292] P47
AD33 VSS[27] VSS[106] AN3 BD46 VSS[193] VSS[293] P7
AD34 VSS[28] VSS[107] AN31 BD5 VSS[194] VSS[294] R2
2 AD36 VSS[29] VSS[108] AP12 BE22 VSS[195] VSS[295] R48 2
AD37 VSS[30] VSS[109] AP19 BE26 VSS[196] VSS[296] T12
AD38 VSS[31] VSS[110] AP28 BE40 VSS[197] VSS[297] T31
AD39 VSS[32] VSS[111] AP30 BF10 VSS[198] VSS[298] T37
AD40 VSS[34] VSS[113] AP38 BF16 VSS[200] VSS[300] W34
AD46 VSS[38] VSS[117] AP8 BF26 VSS[204] VSS[304] V11
AD8 VSS[39] VSS[118] AR2 BF28 VSS[205] VSS[305] V17
AE2 VSS[40] VSS[119] AR48 BD3 VSS[206] VSS[306] V26
AE3 VSS[41] VSS[120] AT11 BF30 VSS[207] VSS[307] V27
AF10 VSS[42] VSS[121] AT13 BF38 VSS[208] VSS[308] V29
AF12 VSS[43] VSS[122] AT18 BF40 VSS[209] VSS[309] V31
AD14 VSS[44] VSS[123] AT22 BF8 VSS[210] VSS[310] V36
AD16 VSS[45] VSS[124] AT26 BG17 VSS[211] VSS[311] V39
AF16 VSS[46] VSS[125] AT28 BG21 VSS[212] VSS[312] V43
AF19 VSS[47] VSS[126] AT30 BG33 VSS[213] VSS[313] V7
AF24 VSS[48] VSS[127] AT32 BG44 VSS[214] VSS[314] W17
AF26 VSS[49] VSS[128] AT34 BG8 VSS[215] VSS[315] W19
AF27 VSS[50] VSS[129] AT39 BH11 VSS[216] VSS[316] W2
AF38 VSS[53] VSS[132] AT7 BH19 VSS[219] VSS[319] Y12
AF4 VSS[54] VSS[133] AU24 H10 VSS[220] VSS[320] Y38
AF42 VSS[55] VSS[134] AU30 BH27 VSS[221] VSS[321] Y4
AF46 VSS[56] VSS[135] AV16 BH31 VSS[222] VSS[322] Y42
AF8 VSS[59] VSS[138] AV30 BH39 VSS[225] VSS[325] BG29
AG19 VSS[60] VSS[139] AV38 BH43 VSS[226] VSS[328] N24
3 AG2 VSS[61] VSS[140] AV4 BH7 VSS[227] VSS[329] AJ3 3
AG31 VSS[62] VSS[141] AV43 D3 VSS[228] VSS[330] AD47
AG48 VSS[63] VSS[142] AV8 D12 VSS[229] VSS[331] B43
AH11 VSS[64] VSS[143] AW14 D16 VSS[230] VSS[333] BE10
AH3 VSS[65] VSS[144] AW18 D18 VSS[231] VSS[334] BG41
AH36 VSS[66] VSS[145] AW2 D22 VSS[232] VSS[335] G14
AH39 VSS[67] VSS[146] AW22 D24 VSS[233] VSS[337] H16
AH40 VSS[68] VSS[147] AW26 D26 VSS[234] VSS[338] T36
AH7 VSS[71] VSS[150] AW34 D34 VSS[237] VSS[343] C22
AJ19 VSS[72] VSS[151] AW36 D38 VSS[238] VSS[344] AP13
AJ21 VSS[73] VSS[152] AW40 D42 VSS[239] VSS[345] M14
AJ24 VSS[74] VSS[153] AW48 D8 VSS[240] VSS[346] AP3
AJ33 VSS[75] VSS[154] AV11 E18 VSS[241] VSS[347] AP1
AJ34 VSS[76] VSS[155] AY12 E26 VSS[242] VSS[348] BE16
AK12 VSS[77] VSS[156] AY22 G18 VSS[243] VSS[349] BC16
AK3 VSS[78] VSS[157] AY28 G20 VSS[244] VSS[350] BG28
VSS[79] VSS[158] G26 VSS[245] VSS[351] BJ28
COUGARPOINT_FCBGA989 G28 VSS[246] VSS[352]
HM77@ G36 VSS[247]
G48 VSS[248]
H12 VSS[249]
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
VSS[258]
4 4
HM77@

2011/11/22 2012/11/22 Title
Issued Date Deciphered Date PCH (9/9) VSS
A B C D E
A B C D E
LCD POWER CIRCUIT schematic-laptop.blogspot.com +LED_VOUT L6 B+

+LCDVDD FBMA-L11-201209-221LMA30T_0805
+3VS W=60mils 2 1
+3VALW L7
W=60mils
1
FBMA-L11-201209-221LMA30T_0805
2 1
R245 1 @
1
300_0603_5% C235 1 1
R246 4.7U_0603_6.3V6K C236 C237 SM010014520 3000ma
6 2
10K_0402_5% 680P_0402_50V7K 68P_0402_50V8J 220ohm@100mhz
1 2 1
2 2 DCR 0.04
LCD/LED PANEL Conn.
3
1K_0402_5% S
DMN66D0LDW-7_SOT363-6 2 2 1 2 Q10
Q9A R247 G AO3419L_SOT23-3 JLVDS1
1 1 D 1
1
C238 USB20_P10_R 2 1
0.047U_0402_16V7K USB20_N10_R 3 2
+LCDVDD Camera 4 3
2 +CAM_VCC 4
W=60mils EDP_HPD 5
3 6 5
7 6
R454 1 LVDS@ 2 0_0402_5% PCH_TXCLK+_R 8 7
DMN66D0LDW-7_SOT363-6 1 1 <16> PCH_TXCLK+ 8
5 C239 C240 R455 1 LVDS@ 2 0_0402_5% PCH_TXCLK-_R 9
<16> PCH_ENVDD Q9B <16> PCH_TXCLK- 9
4.7U_0603_6.3V6K 0.1U_0402_16V4Z 10
10
1
R456 1 LVDS@ 2 0_0402_5% PCH_TXOUT2+_R 11

<16> PCH_TXOUT2+
4
2 2 R457 1 LVDS@ 2 0_0402_5% PCH_TXOUT2-_R 12 11

<16> PCH_TXOUT2- 12
R248 13
100K_0402_5% R458 1 LVDS@ 2 0_0402_5% PCH_TXOUT1+_R 14 13
<16> PCH_TXOUT1+ 14
R525 R459 1 LVDS@ 2 0_0402_5% PCH_TXOUT1-_R 15
<16> PCH_TXOUT1-
2
INVTPWM 1 2 16 15
R460 1 LVDS@ 2 0_0402_5% PCH_TXOUT0+_R 17 16
<16> PCH_TXOUT0+ 17
R461 1 LVDS@ 2 0_0402_5% PCH_TXOUT0-_R 18
10K_0402_5% <16> PCH_TXOUT0- 19 18
R462 1 LVDS@ 2 0_0402_5% PCH_LCD_DATA_R 20 19
12/13 Add <16> PCH_LCD_DATA 20
U22 @ +3VS R463 1 LVDS@ 2 0_0402_5% PCH_LCD_CLK_R 21
1 2 1 <16> PCH_LCD_CLK 22 21
@ BKOFF#
100K_0402_5% OE# 22
2 2
R249 5 C471 1 2 220P_0402_50V7K INVTPWM 23
VCC <29> BKOFF# 24 23
+3VS +LCDVDD +3VS 24
2 R489 1 2 10K_0402_5% +LCDVDD 25 31
<16> DPST_PWM IN 26 25 GND1 32
4 INVTPWM 27 26 GND2 33
3 OUT 28 27 GND3 34
GND +LED_VOUT 28 GND4
1 1 1 29 35
29 GND5
74AHC1G125GW_SOT353-5 C247 C248 C249 W=60mils 30
30 GND6
36
1 2 0.1U_0402_16V4Z 10U_0603_6.3V6M 0.1U_0402_16V4Z STARC_107K30-000001-G2_30P

R250 0_0402_5% 2 2 2 CONN@
Place closed to JLVDS1
SP010011S00
W=60mils 11/29 Modify.
EDP@ C241 1 2 0.1U_0402_16V7K PCH_LCD_DATA_R

<4> EDP_HPD# eDP <4>
<4>
EDP_AUXN
EDP_AUXP
EDP@ C242 1 2 0.1U_0402_16V7K PCH_LCD_CLK_R
1
D EDP@ C243 1 2 0.1U_0402_16V7K PCH_TXOUT1+_R

2 <4> EDP_TXP0
Q11 EDP_HPD EDP@ C244 1 2 0.1U_0402_16V7K PCH_TXOUT1-_R
<4> EDP_TXN0
SSM3K7002FU_SC70-3 G
1
EDP@ S EDP@ C245 1 2 0.1U_0402_16V7K PCH_TXOUT2+_R

<4> EDP_TXP1
3
EDP@ C246 1 2 0.1U_0402_16V7K PCH_TXOUT2-_R

<4> EDP_TXN1
R251
3 100K_0402_5% 3
EDP@
2
D5
Camera 1
3 USB20_P10_R
2 USB20_N10_R
L30ESDL5V0C3-2 11/29 Modify D5(ESD request)
R252 1 2 0_0402_5%
L8 @
2 1 USB20_P10_R
<17> USB20_P10 2 1
3 4 USB20_N10_R
<17> USB20_N10 3 4
WCM2012F2SF-670T04_0805
R253 1 2 0_0402_5%
+3VS 1 2 +CAM_VCC
4 4
R453 0_0603_5%

LVDS&eDP
Custom 1.0
A B C D E
A B C D E
R255
0_0603_5%
schematic-laptop.blogspot.com HDMI_CLK+
SM070001310 400ma 90ohm@100mhz DCR 0.3
R254 1 @ 2 0_0402_5% HDMI_R_CK+
1 @ 2 W=40mils 4 3
L9 4 3
+HDMI_5V_OUT WCM-2012-900T_0805
+5VS 2 F1 1 2
1 +HDMI_5V 1 2 1 2
3 1 HDMI_CLK- R256 1 2 0_0402_5% HDMI_R_CK-
D6 1.1A_6V_SMD1812P110TF @
1 RB491D-YS_SOT23-3 C250 1
0.1U_0402_16V4Z HDMI_TX0+ R257 1 @ 2 0_0402_5% HDMI_R_D0+
2
4 3
L10 4 3
WCM-2012-900T_0805
1 2
C251 2 1 0.1U_0402_16V7K HDMI_TX2- 1 2
<16> PCH_DPB_N0
<16> PCH_DPB_P0 C252 2 1 0.1U_0402_16V7K HDMI_TX2+ HDMI_TX0- R258 1 2 0_0402_5% HDMI_R_D0-
@
<16> PCH_DPB_N1 C253 2 1 0.1U_0402_16V7K HDMI_TX1-
<16> PCH_DPB_P1 C254 2 1 0.1U_0402_16V7K HDMI_TX1+ HDMI_TX1+ R259 1 @ 2 0_0402_5% HDMI_R_D1+
<16> PCH_DPB_N2 C255 2 1 0.1U_0402_16V7K HDMI_TX0- 4 3

C256 2 1 0.1U_0402_16V7K HDMI_TX0+ L11 4 3
<16> PCH_DPB_P2 WCM-2012-900T_0805
<16> PCH_DPB_N3 C257 2 1 0.1U_0402_16V7K HDMI_CLK- 1 2
C258 2 1 0.1U_0402_16V7K HDMI_CLK+ 1 2
<16> PCH_DPB_P3
HDMI_TX1- R260 1 2 0_0402_5% HDMI_R_D1-
@
HDMI_TX2+ R261 1 @ 2 0_0402_5% HDMI_R_D2+
4 3
+3VS L12 4 3
WCM-2012-900T_0805
2 2
1 2
1 2
HDMI_TX2- R263 1 2 0_0402_5% HDMI_R_D2-
1
@
R262
1M_0402_5% HDMI_TX2- R264 1 2 680_0402_5% HDMI_GND
HDMI_TX2+ R265 1 2 680_0402_5%
2
2
HDMI_TX1- R266 1 2 680_0402_5%
1 6 HDMI_HPD HDMI_TX1+ R267 1 2 680_0402_5%
<16> PCH_DPB_HPD
1 HDMI_TX0- R268 1 2 680_0402_5%

Q12A
1
HDMI_TX0+ R270 1 2 680_0402_5%
DMN66D0LDW-7_SOT363-6 R269 C259
100K_0402_5% 220P_0402_50V7K HDMI_CLK- R271 1 2 680_0402_5%
2 HDMI_CLK+ R272 1 2 680_0402_5%
3
3/1 Add (ESD request) +3VS
+HDMI_5V_OUT 5 DMN66D0LDW-7_SOT363-6
+3VS Q12B
4
1 1
2
C492 C493
3
+3VS @ HDMI connector 3
D7 0.1U_0402_16V4Z 0.1U_0402_16V4Z JHDMI1

R273 1 2 2.2K_0402_5% SDVO_SCLK RB751V-40_SOD323-2 2 2 HDMI_HPD 19
18 HP_DET
+HDMI_5V_OUT
1
R274 1 2 2.2K_0402_5% SDVO_SDATA 17 +5V

HDMI_SDATA 16 DDC/CEC_GND
HDMI_SCLK 15 SDA
SCL
2
+3VS 14
R275 R276 13 Reserved
2.2K_0402_5% 2.2K_0402_5% HDMI_R_CK- 12 CEC 20
11 CK- GND 21
CK_shield GND
2
HDMI_R_CK+ 10 22
1
9 CK+ GND 23
RF request HDMI_R_D0-
D0- GND
SDVO_SCLK 1 6 HDMI_SCLK 8
<16> SDVO_SCLK D0_shield
1 HDMI_R_D0+ 7
D0+
5
Q13A HDMI_R_D1- 6
DMN66D0LDW-7_SOT363-6 C260 5 D1-
SDVO_SDATA 4 3 HDMI_SDATA @ 47P_0402_50V8J HDMI_R_D1+ 4 D1_shield
<16> SDVO_SDATA 2 D1+
1 HDMI_R_D2- 3
Q13B 2 D2-
DMN66D0LDW-7_SOT363-6 C261 HDMI_R_D2+ 1 D2_shield
@ 47P_0402_50V8J D2+
2 HONGL_13-13201904CP_19P
Place closed to JHDMI1 CONN@
4 DC232001000 4
11/29 Modify.

HDMI Conn
Custom 1.0
A B C D E
A B C D E
schematic-laptop.blogspot.com W=40mils
+5VS
2
+R_CRT_VCC +CRT_VCC
F2
D11 1.1A_6V_SMD1812P110TFW=40mils
2 1 1 2
@ @
D9 D10 CH491DPT_SOT23-3 1
L30ESDL5V0C3-2 L30ESDL5V0C3-2 C262
0.1U_0402_16V4Z
CRT Connector
1
2
1 1
CRB1.0 use 47ohm@100Mhz Bead

12/30 Modify.
L14
FBMA-L10-160808-600LMT 0603
PCH_CRT_R 0_0603_5%1 2 L13 CRT_R_1 1 2 CRT_R_2 JCRT1
<16> PCH_CRT_R 6
L16
FBMA-L10-160808-600LMT 0603 JCRT1.11 11
PAD
PCH_CRT_G 0_0603_5%1 2 L15 CRT_G_1 1 2 CRT_G_2 @ T31 1
<16> PCH_CRT_G 7
L18
FBMA-L10-160808-600LMT 0603 12
PCH_CRT_B 0_0603_5%1 2 L17 CRT_B_1 1 2 CRT_B_2 2
<16> PCH_CRT_B 8 16
G
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
13 17
G
1
1
1 1 1 1 1 1 1 1 1 3
R277 R278 R279 9
C263
C264
C265
C266
C267
C268
C269
C270
C271
150_0402_1% 150_0402_1% 150_0402_1% @ @ @ 14
4
2 2 2 2 2 2 2 2 2 10
2
2
15
1 JCRT1.5 5
C272 @ T32
PAD CONTECK_80435-5K1-152
100P_0402_50V8J CONN@
2 DC060004W00
1 2 L19 CRT_HSYNC_2 D-SUB
+CRT_VCC 0_0603_5% DSUB_12
C273 1 2 0.1U_0402_16V4Z R280 2 1 10K_0402_5% 1 2 L20 CRT_VSYNC_2 1

0_0603_5% 1 1
1
2 U23 C274 C275 DSUB_15 2
10P_0402_50V8J 10P_0402_50V8J C276 2
OE#
P
PCH_CRT_HSYNC R281 2 1 CRT_HSYNC 2 4 CRT_HSYNC_1 @ 2 2@ 68P_0402_50V8J
<16> PCH_CRT_HSYNC A Y 1
33_0402_5%
G
C277
74AHCT1G125GW_SOT353-5 68P_0402_50V8J
3
2
+CRT_VCC
C278 1 2 0.1U_0402_16V4Z
+CRT_VCC
1
U24
OE#
P
PCH_CRT_VSYNC R282 2 1 CRT_VSYNC 2 4 CRT_VSYNC_1 +3VS
<16> PCH_CRT_VSYNC A Y
1
33_0402_5%
G
R283 R284
74AHCT1G125GW_SOT353-5 2.2K_0402_5% 2.2K_0402_5%
2
2
PCH_CRT_DATA 1 6 DSUB_12
<16> PCH_CRT_DATA
HDD Board Conn Q15A
5
DMN66D0LDW-7_SOT363-6
PCH_CRT_CLK 4 3 DSUB_15
<16> PCH_CRT_CLK
Q15B
JHDD1
3 1 3
SATA_PTX_DRX_P0 C281 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 1
<13> SATA_PTX_DRX_P0 2
SATA_PTX_DRX_N0 C282 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3
<13> SATA_PTX_DRX_N0 4 3
SATA_PRX_DTX_N0 5 4
<13> SATA_PRX_DTX_N0 6 5
SATA_PRX_DTX_P0
<13> SATA_PRX_DTX_P0 7 6
+5VS +5VS_HDD 8 7
+3VS 9 8
@ J2
1 2 10 9
1 2 11 10 13
12 11 GND 14
JUMP_43X79 12 GND
ACES_85201-1205N
CONN@
SP01000E400
+5VS_HDD
100mils
+3VS
0.1U_0402_16V4Z
C487
1000P_0402_50V7K
C488
1 1 1 1 3/29 Add (EMI request)

1U_0603_10V6K
C486
C485
10U_0805_10V4Z 1
2 2 2 2 C502
@
0.1U_0402_16V4Z
2
4 4

CRT&HDD Connector
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
A B C D E
A B C D E
+1.2V_LAN
+VDDO_CR U25
1/3 Add(Broadcom request)
4.7U_0603_6.3V6K
1 1 1 1 1 1 1 37 +LAN_BIASVDDH
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
20 BIASVDDH +3V_LAN
C290
C291
C288
C292
C293
C294
C295
R02 Modify VDDO_CR
1 60mil 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.2V_LAN 35 17 +LAN_XTALVDDH
1 1 1
4.7U_0603_6.3V6K
2 2 2 2 2 2 2 61 VDDC XTALVDDH
C296
C477
C478
VDDC
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
48 +LAN_AVDDH 1 1
2 2 2 AVDDH 42
C298
+3V_LAN AVDDH
C297
7
56 VDDO 2 2
62 VDDO
VDDO 49 LAN_MIDI3-
TRD3_N LAN_MIDI3- <26>
50 LAN_MIDI3+
+3VALW +3V_LAN TRD3_P LAN_MIDI3+ <26>
R285 47 LAN_MIDI2-
1 2 0_0805_5% TRD2_N 46 LAN_MIDI2- <26>
@ LAN_MIDI2+
TRD2_P LAN_MIDI2+ <26>
1 1 1 1
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AO3419L_SOT23-3 3 1 +LAN_AVDDL 39 43 LAN_MIDI1-
C299
C300
C289
C301
20mil
S
D 45 AVDDL TRD1_N 44 LAN_MIDI1- <26>

Q37 LAN_MIDI1+ L21
AVDDL TRD1_P LAN_MIDI1+ <26>
51 +LAN_XTALVDDH 1 1 2
G
2 2 2 2 AVDDL +3V_LAN
R554 41 LAN_MIDI0- C302 BLM18AG601SN1D_2P
LAN_MIDI0- <26>
2
1 @ 2 +LAN_GPHYPLLVDDL 36 TRD0_N 40 LAN_MIDI0+ 0.1U_0402_16V4Z

GPHY_PLLVDDL TRD0_P LAN_MIDI0+ <26>
10K_0402_5%
+LAN_PCIEPLLVDD 32
20mil 2 L22
R548 1 @ 2 PCIE_PLLVDDL +LAN_BIASVDDH 1 2
<20,33> PCH_PWR_EN# 1
0_0402_5% 29 C304 BLM18AG601SN1D_2P
R549 1 2 PCIE_PLLVDDL 65 0.1U_0402_16V4Z
<29> LAN_PWR_EN# SO_LINKLED# LAN_LINK# <26>
1K_0402_5% 1
C498 66 2
0.1U_0402_16V4Z SCLK_SPD1000LED# 20mil L23
2 +LAN_AVDDH 1 2
2 SPD100LED#_SERIALDO BLM18AG601SN1D_2P
1 1
C306 C307
.1U_0402_16V7K 1 2 C305 PCIE_PRX_C_DTX_P3 28 67 R286 2 1 0_0402_5%
<14> PCIE_PRX_DTX_P3 PCIE_TXD_P TRAFFICLED#_SERIALDI LAN_ACTIVITY# <26>
.1U_0402_16V7K 1 2 C308 PCIE_PRX_C_DTX_N3 27 0.1U_0402_16V4Z 0.1U_0402_16V4Z
<14> PCIE_PRX_DTX_N3 33 PCIE_TXD_N 2 2
<14> PCIE_PTX_C_DRX_P3 PCIE_RXD_P
34 8 +VDDO_CR_R R287 1 2 0_0603_5% +VDDO_CR
<14> PCIE_PTX_C_DRX_N3 PCIE_RXD_N GPIO1_LR_OUT
2 5 2
R289 1 2 0_0402_5% GPIO_0
<27,29> EC_PME#
+3V_LAN R290 1 2 4.7K_0402_5% 64 SPROM_DOUT

SI_EEDATA 63 SPROM_CLK
R291 1 @ 2 0_0402_5% LAN_PME# 3 CS#_EECLK
<15,27> PCH_PCIE_WAKE# WAKE#
R292 1 2 0_0402_5% 11
<17,27,29,30> PLT_RST_BUF# PREST#
31
<14> CLK_PCIE_LAN PCIE_REFCLK_P
30
<14> CLK_PCIE_LAN# PCIE_REFCLK_N
C303 1 2 0.1U_0402_16V4Z PLT_RST_BUF# 1 CR_DETECT_R R293 2 1 0_0402_5% CR_DETECT
SD_DETECT/XD_WE# CR_DETECT <26>
68
CR_DATA0 R295 1 2 33_0402_5% CR_DATA0_R 25 SR_DISABLE/XD_DETECT#
<26> CR_DATA0 CR_DATA0
CR_DATA1 R296 1 2 33_0402_5% CR_DATA1_R 24 59
<26> CR_DATA1 1 2 23 CR_DATA1 MS_INS#/XD_CE#
CR_DATA2 R298 33_0402_5% CR_DATA2_R
<26> CR_DATA2 CR_DATA2
CR_DATA3 R299 1 2 33_0402_5% CR_DATA3_R 22 9
<26> CR_DATA3 52 CR_DATA3 GPIO2_MEDIA_SENSE/XD_RE#
53 CR_DATA4 57 CR_WP#_R R303 2 1 0_0402_5% CR_WP#
CR_DATA5 CR_WP#/XD_WP# CR_WP# <26>
54
55 CR_DATA6 60 CR_PWR_EN_R 2 1 0_0402_5% CR_PWR_EN
CR_DATA7 CR_LED_CR_BUS_PWR/XD_ALE
R306
CR_PWR_EN <26> For EMI request
21 CR_CLK_R R307 1 <EMI> 2 33_0402_5% CR_CLK C309
CR_CLK/XD_RY_BY# CR_CLK <26>
<EMI> 1 2
+3VS 26 CR_CMD_R R308 1 2 33_0402_5% CR_CMD
CR_CMD_XD_CLE CR_CMD <26>
R310 1 2 1K_0402_5% 58 10P_0402_50V8J
VMAIN_PRSNT
+3V_LAN
R311 1 2 4.7K_0402_5% 6
TEST1
1 2 10 40mil L24 40mil
R312 4.7K_0402_5% TEST2 16 +1.2V_LAN_OUT 1 2
SR_LX +1.2V_LAN
4.7UH_PG031B-4R7MS_1.1A_20%
4 13 1 1
LOW_PWR SR_VFB
EMI Request...2010/07/27
LAN_XTALI C310 C311
LAN_XTALO_R LAN_XTALO_R 19 0.1U_0402_16V4Z 10U_0603_6.3V6M
LAN_XTALI 18 XTALO 2 2
3 XTALI SM010005500 500ma 600ohm@100mhz DCR 0.38 3
1
R02 Modify
R314
20mil L25
15
40mil +LAN_PCIEPLLVDD 1 2
GND PLANE
200_0402_1% SR_VDDP +3V_LAN +1.2V_LAN

25MHZ_10PF_7V25000014 15mil38 14 BLM18AG601SN1D_2P
Y3 1 2 LAN_RDAC SR_VDD
1 0.1U_0402_16V4Z 1 4.7U_0603_6.3V6K 1 1
2
R315 1.24K_0402_1% RDAC C312 C313 C314 C315

1 3LAN_XTALO 12
1 3 <14> LAN_CLKREQ# CLK_REQ# 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
GND GND R550 BCM57785XA0KMLG_QFN68_8X8 2 2 2 2
1 1
69
1 2
2 4 +3V_LAN
C316 C317 10K_0402_5% PLACE NEXT P14
15P_0402_50V8J 15P_0402_50V8J 20mil
2 2 L26
+LAN_GPHYPLLVDDL 1 2 +1.2V_LAN
BLM18AG601SN1D_2P
1 1
C318 C319
0.1U_0402_16V4Z 4.7U_0603_6.3V6K
2 2
+3V_LAN
SPROM_CLK SPROM_DOUT @
(EECLK) (EEDATA) C320 1 2 0.1U_0402_16V4Z 20mil L27
2
On chip 1 0 +LAN_AVDDL 1 2
4.7K_0402_5%
4.7K_0402_5%
+1.2V_LAN
2
BLM18AG601SN1D_2P
R316
R317
1 1
AT24C02 1 1 @ C321 C322
U26 @
1
8 1 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
1
7 VCC A0 2 2 2
SPROM_CLK 6 WP A1 3
SPROM_DOUT 5 SCL A2 4
SDA GND
2
AT24C04BN-SH-T_SO8
4.7K_0402_5%
4.7K_0402_5%
2
SA00004QG00
R318
R319
4 4
@
1

LAN Boardcom 57785
Custom 1.0
A B C D E
A B C D E
BOTHHAND: S X'FORM_ GST5009-D LF LAN, SP050006B00

TIMAG:S X'FORM_ IH-160 LAN , SP050006F00 schematic-laptop.blogspot.com
LAN Connector
C474,C475 and D14
TL1 ME interefer,do not pop!!
1 24 MCT3
LAN_MIDI3+ 2 TCT1 MCT1 23 RJ45_MIDI3+ 68P_0402_50V8J
<25> LAN_MIDI3+ 3 TD1+ MX1+ 22 2 1
LAN_MIDI3- RJ45_MIDI3-
<25> LAN_MIDI3- TD1- MX1- @
4 21 MCT2 C330 JRJ1
LAN_MIDI2- 5 TCT2 MCT2 20 RJ45_MIDI2-
<25> LAN_MIDI2- LAN_MIDI2+ 6 TD2+ MX2+ 19 RJ45_MIDI2+ LAN_ACTIVITY# 10
<25> LAN_MIDI2+ TD2- MX2- <25> LAN_ACTIVITY# LED-(Y)
7 18 MCT1 2 1 9
1 8 TCT3 MCT3 17 +3V_LAN LED+(Y) 1
LAN_MIDI1+ RJ45_MIDI1+ R325 1K_0402_5% 1
<25> LAN_MIDI1+ LAN_MIDI1- 9 TD3+ MX3+ 16 RJ45_MIDI1-
<25> LAN_MIDI1- TD3- MX3-
220P_0402_50V7K
RJ45_MIDI3- 8
PR4-
C329
10 15 MCT0
LAN_MIDI0- 11 TCT4 MCT4 14 RJ45_MIDI0- 2 RJ45_MIDI3+ 7
<25> LAN_MIDI0- 12 TD4+ MX4+ 13 PR4+
LAN_MIDI0+ RJ45_MIDI0+ LAN_ACTIVITY#
<25> LAN_MIDI0+ TD4- MX4- LAN_LINK# RJ45_MIDI1- 6
PR2-
RJ45_MIDI2- 5
PR3-
1
75_0603_1%
75_0603_1%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
350UH_IH-160
3
SP050006F00 RJ45_MIDI2+ 4
PR3+
R321
R322
1 1 1 1
C325
C326
C327
C328
D12 RJ45_MIDI1+ 3
L30ESDL5V0C3-2 PR2+
1
75_0603_1%
75_0603_1%
@ RJ45_MIDI0- 2
2 2 2 2 C324 68P_0402_50V8J PR1- 14
SHLD2
R323
R324
@ RJ45_MIDI0+ 1
2 1 PR1+ 13
SHLD1
1
LAN_LINK# 12
<25> LAN_LINK# LED-(G)
RJ45_GND
Place close to TCT pin 2 1 11 40mil
+3V_LAN LED+(G)
220P_0402_50V7K
R320 1K_0402_5% 1
11/30 Modify(EMI Request)
C323
MCT3 SANTA_130452-A
MCT2 CONN@
MCT1 2 DC234005S00
MCT0
12/21 Modify
2
LSE-200NX3216TRLF_1206-2
LSE-200NX3216TRLF_1206-2
LSE-200NX3216TRLF_1206-2
LSE-200NX3216TRLF_1206-2
R04 modify for EMI
EMI Request
2 2
@ @ @ @
3/1 Add (ESD request) +3VS RJ45_GND C331 1 2 10P_0402_50V8J LANGND
100UH_SSC0301101MCF_0.18A_20%
100P_0402_50V8J
JP1 JP2 JP3 JP4 1
2
0.1U_0402_16V4Z RJ45_GND
@ C332
J3
3
1 1 1 40mil JUMP_43X39
2
L28
L30ESDL5V0C3-2
C494 C495 C496 R03 Modify
@
2
@
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
2 2 2
D13
LANGND
1
R04 modify
Card Reader Connector

JREAD1
+VDDO_CR
CR_CMD 3
<25> CR_CMD 4 CMD
5 VSS
3 +SDPWR_MMCPWR VDD +3VALW 3
R559 2 1 0_0402_5% CR_CLK_CONN 6 1 @ 2
<25> CR_CLK 7 CLK R326
VSS 0_0805_5% +SDPWR_MMCPWR
CR_DATA0 8
<25> CR_DATA0 DAT0
1
CR_DATA1 9 40mil
<25> CR_DATA1 1 DAT1
CR_DATA2 U27
<25> CR_DATA2 2 DAT2 1 8
CR_DATA3 R327
<25> CR_DATA3 CD/DAT3 2 GND VOUT 7
300_0603_5%
3 VIN VOUT 6
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
1 1 1
2
VIN VOUT
C336
C337
C338
EPAD
CR_WP# 10 4 5
<25> CR_WP# 11 WP SW EN FLG
CR_DETECT
<25> CR_DETECT CD SW
1
12 14 D
GND SW GND 1 2 2 2
13 15 2 AP2301MPG-13_MSOP8
<25> CR_PWR_EN
9
GND SW GND
C339
0.1U_0402_16V4Z
G
Q16 S
3
T-SOL_156-1000302601_11P 2N7002K_SOT23-3 2
CONN@
2/25 Change symbol of Q16 from SB000009080 to
SP07000TF00 SB00000EN00
12/23 Modify(2in1 CARD READER)
( 2.85mm) 板板
R547
4 4
C489 @ 33_0402_5% R04 modify
<EMI> 1 2 CR_CLK_C 2 1 CR_CLK_CONN
+5VS +5VS +5VALW
<EMI> @
10P_0402_50V8J
1 1 1
C333
C334
C335
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@
2 @ 2 2 Security Classification Compal Secret Data Compal Electronics, Inc.
Card Reader
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
A B C D E
A B C D E
MINI CARD(Wireless LAN)

+3VS
60mil +3VS_WLAN +3VS_WLAN +1.5VS
@ J4
1 2
+3VS_WLAN 1 2
1 1 1 1 1 1
C341 C342 C343 C344 C345 C346
JUMP_43X79 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 2 PCH_PCIE_WAKE#_R +3VALW 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
R333 4.7K_0402_5% @ J5 2 2 2 2 2 2
1 AC@ 2 DISASSOCIATE# 1 2 0.1U_0402_16V4Z
R545 4.7K_0402_5% 1 2
JUMP_43X79 Mini Card Power Rating

1 1
1 2 PCH_PCIE_WAKE#_R
<29> WLAN_PME# +1.5VS +3VS_WLAN
R330 0_0402_5%
1 @ 2
<25,29> EC_PME#
R331 0_0402_5% JMINI1
1 @ 2 1 2
<15,25> PCH_PCIE_WAKE# 3 1 2 4
R332 0_0402_5%
D31 5 3 4 6
2 1 7 5 6 8
<14> MINI1_CLKREQ# 9 7 8 10
RB751V-40_SOD323-2
11 9 10 12
<14> CLK_PCIE_MINI1# 13 11 12 14
<14> CLK_PCIE_MINI1 15 13 14 16
17 15 16 18
19 17 18 20 WL_OFF#
21 19 20 22 WL_OFF# <29>
WLAN&BT Combo module circuits 23 21 22 24
PLT_RST_BUF#
PLT_RST_BUF# <17,25,29,30>
<14> PCIE_PRX_DTX_N2 25 23 24 26
<14> PCIE_PRX_DTX_P2 27 25 26 28
29 27 28 30 MINI1_SMBCLK R337 1 2 0_0402_5%
BT on BT on 29 30
@
PCH_SMBCLK <14>
31 32 MINI1_SMBDATA R338 1 @ 2 0_0402_5%
module module <14> PCIE_PTX_C_DRX_N2 33 31 32 34 PCH_SMBDATA <14>
Enable Disable <14> PCIE_PTX_C_DRX_P2 35 33 34 36
37 35 36 38 USB20_N8 <17>
39 37 38 40 USB20_P8 <17>
41 39 40 42
2 +3VS_WLAN 41 42 2
BT_CTRL 43 44
H L 45 43 44 46 DISASSOCIATE#
47 45 46 48 DISASSOCIATE# <29>
R340 1 2 0_0402_5% E51TXD_P80DATA_R 49 47 48 50
<29> E51TXD_P80DATA 49 50
R341 1 2 0_0402_5% E51RXD_P80CLK_R 51 52
<29> E51RXD_P80CLK 51 52
BT_ON# L H
53 54
GND1 GND2
1
R541
R342 1K_0402_5% PLAST_SSM010-52-B-K
100K_0402_5% BT@ CONN@
SP07000QC00
2
BT_CTRL 11/29 Modify

BT_CTRL
+3VS_WLAN
1
D
2 Q38 1 2 E51RXD_P80CLK_R
<29> BT_ON#
G 2N7002K_SOT23-3 R349 @ 4.7K_0402_5%
S BT@
3
3 3
+3VALW +3VS_WLAN
Q17
AO3419L_SOT23-3
3 1
S
AC@ 40mil(1A)
G
2
1 AC@ 2 3VSWLAN_GATE_R 1 AC@ 2 3VSWLAN_GATE R336

+3VALW
R334 100K_0402_5% R335 1K_0402_5% 470_0603_5%
@
1
1
C347
0.1U_0402_16V7K 3VSWLAN_R
R339 AC@
2
1
D
1K_0402_5%
1 2 2 Q18
<29> WLAN_ON
AC@ G 2N7002K_SOT23-3
1
C348 S AC@
3
0.1U_0402_16V7K
1
AC@ D
2
Q19 2 3VSWLAN_GATE
2N7002K_SOT23-3 G
S @
3
4 4

MINI CARD (WLAN)
Custom
Q1VZC M/B LA-8941P Schematic 1.0

A B C D E
A B C D E
IO Board
schematic-laptop.blogspot.com R555
0_0402_5%
1 2
@
L32
2 1 USB20_N3_2
<17> USB20_N3 2 1 JIO1
3 4 USB20_P3_2 22
<17> USB20_P3 3 4 21 G2
W CM-2012-900T_4P USB20_P3_2 20 G1
1 1
USB20_N3_2 19 20
1 @ 2
USB2.0 USB20_P2_2 18 19
SM070000K00 USB20_N2_2 17 18
R556 USB2.0 16 17
0_0402_5% 16
15
<17> USB_OC1# 15
14
R557 13 14
+5VALW 13
0_0402_5% 12
1 2 11 12
<29> USB_ON# 11
@ 10
L33 9 10
2 1 USB20_P2_2 8 9
<17> USB20_P2 2 1 +5VS 8
HP_RIGHT 7
<31> HP_RIGHT 7
HP_LEFT 6
<31> HP_LEFT 6
3 4 USB20_N2_2 COM_MIC 5
<17> USB20_N2 3 4 <31> COM_MIC 5
HP_PLUG# 4
<31> HP_PLUG# 4
W CM-2012-900T_4P INT_MIC_R 3
<31> INT_MIC_R 3
2
1 @ 2 1 2
SM070000K00 1
R558
0_0402_5% CONN@
3/1 Add (ESD request) +3VALW ACES_85201-2005N
SP010011U00
1
C497
2 2
0.1U_0402_16V4Z
2
+5VALW +USB3_VCCA
USB3.0 3/29 Add (ESD request) +5VALW

C351
0.01U_0402_16V7K 1
U28
8
W=60mils
R344
1 2 2 GND VOUT 7 0_0402_5%
1 VIN VOUT
C501 3 6
USB_ON# 4 VIN VOUT 5 1 2
EN FLG USB_OC0# <17>
@ 0.1U_0402_16V4Z
2 G547I2P81U_MSOP8
For ESD request 1

+USB3_VCCA
C352
D15
U3RXDN2 1 1 10 9 U3RXDN2 @ 0.1U_0402_16V4Z W=100mils
2
U3RXDP2 2 2 9 8 U3RXDP2 1 2
3 3
470P_0402_50V7K
C354
U3TXDN2 4 4 7 7 U3TXDN2 +
USB20_N1 1 @ 2 U2DN1_L C353
<17> USB20_N1 1
U3TXDP2 5 5 6 6 U3TXDP2 R348 0_0402_5% 150U 6.3V_M
3 3 3
L31
4
2
USB3.0 Conn.
3 4
8 JUSB1
@ 2 1 1
L05ESDL5V0NA-4 SLP2510P8 2 1 U2DN1_L 2 VBUS
W CM-2012-900T_0805 U2DP1_L 3 D-
USB20_P1 1 @ 2 U2DP1_L 4 D+
<17> USB20_P1 GND
R351 0_0402_5% U3RXDN2 5
U3RXDP2 6 StdA-SSRX- 10
R343 1 @ 2 0_0402_5%
SM070001310 WCM2012F2SF-900T04 90ohm 7 StdA-SSRX+ GND 11
SM070000S80 WCM2012F2SF-670T04 67ohm U3TXDN2 8 GND-DRAIN GND 12
USB3@ L29 USB3@ U3TXDP2 9 StdA-SSTX- GND 13
2 1 PCH_USB3_TX2_P_C 3 4 U3TXDP2 StdA-SSTX+ GND
<17> PCH_USB3_TX2_P 3 4
C349 0.1U_0402_16V7K LOTES_AUSB0015-P001A
USB3@ CONN@
2 1 PCH_USB3_TX2_N_C 2 1 U3TXDN2 DC23300AI00
<17> PCH_USB3_TX2_N 2 1
C350 0.1U_0402_16V7K For USB2.0 ESD request
W CM2012F2SF-670T04_0805
R345 1 @ 2 0_0402_5% D16

1 6
R346 1 @ 2 0_0402_5% I/O1 I/O4
SM070000S80 WCM2012F2SF-670T04 67ohm 2 5 +USB3_VCCA
L30 USB3@ REF1 REF2
4 4
PCH_USB3_RX2_P 3 4 U3RXDP2 U2DP1_L 3 4 U2DN1_L
<17> PCH_USB3_RX2_P 3 4 I/O2 I/O3
AZC099-04S_SOT23
PCH_USB3_RX2_N 2 1 U3RXDN2
<17> PCH_USB3_RX2_N 2 1
W CM2012F2SF-670T04_0805
Security Classification Compal Secret Data
R347 1 @ 2 0_0402_5% 2011/11/22 2012/11/22 Title
Issued Date Deciphered Date
IO Board & USB3.0
Custom 1.0
A B C D E
A B C D E
C358
+3VALW
1
R359
2
0_0603_5% 1
1 1
+3VALW_EC
1 2 2
L34
FBMA-L11-160808-800LMT_0603
1
+EC_VCCA
2 +EC_VCCA
1
1/10 Add
+3VS LID_SW# R360 1 2 100K_0402_5%
+3VALW
0.1U_0402_16V4Z
C359
0.1U_0402_16V4Z
C360
0.1U_0402_16V4Z
C361
0.1U_0402_16V4Z
C362
1000P_0402_50V7K
C363
1000P_0402_50V7K
C364
22P_0402_50V8J
2
2 1 2 @ 1 CLK_PCI_LPC +EC_VCC C365 +3VS
@ R361 33_0402_5% +3VLP 0.1U_0402_16V4Z
2 2 2 2 1 1 2
ECAGND
6 1
1 2 <14> SMB_ALERT# SMB_ALERT#_R <30> 1 2
@ TP_CLK R363 4.7K_0402_5%
R362 0_0603_5% Q20A
DMN66D0LDW-7_SOT363-6 TP_DATA R364 1 2 4.7K_0402_5%
ECAGND <35>
111
125
R365 2 1 47K_0402_5% EC_RST#
22
33
96
67
+3VALW_EC U30
9
C366 2 1 0.1U_0402_16V4Z +3VS
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
1 1
EC_MUTE# R366 1 @ 2 10K_0402_5%
GATEA20 1 21 DISASSOCIATE#
<18> GATEA20 2 GATEA20/GPIO00 GPIO0F 23 DISASSOCIATE# <27>
EC_KBRST# BEEP#
<18> EC_KBRST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 BEEP# <31>
SERIRQ
<13,30> SERIRQ LPC_FRAME# 4 SERIRQ GPIO12 27 BT_ON#
<13,30> LPC_FRAME# 5 LPC_FRAME# ACOFF/GPIO13 BT_ON# <27>
LPC_AD3 R371
+3VALW_EC <13,30> LPC_AD3 LPC_AD2 7 LPC_AD3 C367 2 1 100P_0402_50V8J ECAGND 0_0402_5%
<13,30> LPC_AD2 LPC_AD2 PWM Output
LPC_AD1 8 63 BATT_TEMP 2 1
1 2 2.2K_0402_5% <13,30> LPC_AD1 10 LPC_AD1 BATT_TEMP/GPIO38 64 BATT_TEMP <35> <41> VR_HOT H_PROCHOT# <5,35>
R372 EC_SMB_DA1 LPC_AD0 LPC & MISC
<13,30> LPC_AD0 LPC_AD0 GPIO39 65 ADP_I
ADP_I/GPIO3A ADP_I <35,36>
3
R368 1 2 2.2K_0402_5% EC_SMB_CK1 CLK_PCI_LPC 12 AD Input 66 AD_BID0
<17> CLK_PCI_LPC 13 CLK_PCI_EC GPIO3B 75
PLT_RST_BUF# AD_PID0
<17,25,27,30> PLT_RST_BUF# 37 PCIRST#/GPIO05 GPIO42 76
EC_RST# ENBKL Q20B
+3VALW 20 EC_RST# IMON/GPIO43 ENBKL <16> 5
EC_SCI# H_PROCHOT#_EC
<18> EC_SCI# 38 EC_SCII#/GPIO0E <35> H_PROCHOT#_EC
WLAN_ON DMN66D0LDW-7_SOT363-6
<27> WLAN_ON GPIO1D 68 SUSACK# Latest design guide suggest change to
SUSACK# <15>
4
R369 1 @ 2 100K_0402_5% EC_PME# DAC_BRIG/GPIO3C 70 EN_DFAN1
PU at LAN side DA Output
EN_DFAN1/GPIO3D 71 WLAN_PME#
EN_DFAN1 <32> 74LVC1G06.
+3VS C475 55 IREF/GPIO3E 72 WLAN_PME# <27>
@ KSI0 LAN_PWR_EN#
2 1 56 KSI0/GPIO30 CHGVADJ/GPIO3F LAN_PWR_EN# <25>
EC_KBRST# KSI1
R373 1 2 2.2K_0402_5% EC_SMB_CK2 KSI2 57 KSI1/GPIO31
180P_0402_50V8J KSI3 58 KSI2/GPIO32 83 EC_MUTE#
1 2 2.2K_0402_5% 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 EC_MUTE# <31>
R375 EC_SMB_DA2 KSI4 USB_ON#
60 KSI4/GPIO34 USB_EN#/GPIO4B 85 USB_ON# <28> +3VLP
12/22 Add(ESD request) KSI5 SLP_SUS#
61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 SLP_SUS# <15>
KSI6 PS2 Interface EAPD
1 2 10K_0402_5% 62 KSI6/GPIO36 EAPD/GPIO4D 87 EAPD <31> 2 1
R376 EC_SCI# KSI7 TP_CLK
KSO0 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK <30> R374 200K_0402_5%
KSO1 40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <30> D19
C368 1 2 0.01U_0402_16V7K PLT_RST_BUF# KSO2 41 KSO1/GPIO21 2 1
KSI[0..7] 42 KSO2/GPIO22 97 ACIN <15,33,36>
KSO3
<30> KSI[0..7] 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98
2 @ KSO4 EC_RST_GATE RB751V-40_SOD323-2 2
KSO[0..15] 44 KSO4/GPIO24 W OL_EN/GPXIOA01 99 EC_RST_GATE <6> 2 1 100P_0402_50V8J
ESD request KSO5 HDA_SDO EC_ACIN C369
<30> KSO[0..15]
KSO6 45 KSO5/GPIO25 Int. K/B HDA_SDO/GPXIOA02 109 VCIN0_PH_R
HDA_SDO <13>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00
KSO7/GPIO27 SPI Device Interface
KSO8 47
X1 KSO9 48 KSO8/GPIO28 119
32.768KHZ_12.5PF_9H03200019 KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120
EC_XCLK1 2 1 EC_XCLK0 KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126
KB930&9012 Co-Layout Item
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
@ KSO12 51 128
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A +EC_VCC 1 2
1 1 KSO13/GPIO2D +3VLP
KSO14 53 R379 0_0402_5%
C370 C371 KSO15 54 KSO14/GPIO2E 73
KSO15/GPIO2F ENBKL/GPIO40 Pin 111 is a power source for HW operation of KB9012.
@ 15P_0402_50V8J 15P_0402_50V8J @ 81 74 So, power plan will be different between KB930 and KB9012.
2 2 82 KSO16/GPIO48 PECI_KB930/GPIO41 89 FSTCHG
KSO17/GPIO49 FSTCHG/GPIO50 90 FSTCHG <36>
BATT_AMB_LED#
BATT_CHG_LED#/GPIO52 91 BATT_AMB_LED# <30>
EC_SMB_CK1 77 CAPS_LED#/GPIO53 92 PWR_LED# 9012_PECI 1 2
<35,36> EC_SMB_CK1 EC_SMB_CK1/GPIO44 GPIO PW R_LED#/GPIO54 PWR_LED# <30> H_PECI <5,18>
EC_SMB_DA1 78 93 BATT_BLUE_LED# R381 43_0402_1%
<35,36> EC_SMB_DA1 79 EC_SMB_DA1/GPIO45 BATT_LOW _LED#/GPIO55 95 BATT_BLUE_LED# <30>
EC_SMB_CK2 SM Bus SYSON R524
<14> EC_SMB_CK2 80 EC_SMB_CK2/GPIO46 SYSON/GPIO56 121 SYSON <33,38>
EC_SMB_DA2 VR_ON ENBKL 1 2 100K_0402_5% Pin74(KB930),Pin118(KB9012) are with different PECI pin location,
<14> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 VR_ON <41>
PM_SLP_S4# so HW must co-layout for it.
PM_SLP_S4#/GPIO59 PM_SLP_S4# <15>
Please make sure which EC pin will be connected to PECI circuit.
PM_SLP_S3# 6 100 PCH_RSMRST#
<15> PM_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 PCH_RSMRST# <15>
PM_SLP_S5# EC_LID_OUT#
<15> PM_SLP_S5# 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 102 EC_LID_OUT# <18>
EC_SMI# VCIN1_PROCHOT_R
<18> EC_SMI# 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103
SUSWARN# H_PROCHOT#_EC
<15> SUSWARN# 17 GPIO0A H_PROCHOT#_EC/GPXIOA06 104 GPXIOA07 11/15 Power modify 9012_PCH_PWROK 2 1
<15> SUS_PWR_DN_ACK 18 GPIO0B VCOUT0_PH/GPXIOA07 105 PCH_PWROK <15>
1/11 Add "ACPRESENT" signal. (follow Q5LJ1) GPO BKOFF# R382 0_0402_5%
<15> ACPRESENT 19 GPIO0C BKOFF#/GPXIOA08 106 BKOFF# <22>
EC_DPWROK GPIO PBTN_OUT#
GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# <15>
EC_SPOK R542 1 @ 2 0_0402_5% EC_SPOK_R 25 107 PCH_PWR_EN
<35> EC_SPOK 28 EC_INVT_PW M/GPIO11 PCH_APW ROK/GPXIOA10 108 PCH_PWR_EN <33> +3VALW_EC 2 1
FAN_SPEED1 SA_PGOOD GPXIOA07
3 <32> FAN_SPEED1 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 SA_PGOOD <39> MAINPWON <35,37> 3
EC_PME# R384 0_0402_5%
<25,27> EC_PME# 30 EC_PME#/GPIO15
E51TXD_P80DATA
<27> E51TXD_P80DATA 31 EC_TX/GPIO16 110
E51RXD_P80CLK EC_ACIN Pin104 This co-layouted circuit is for power fail function of
<27> E51RXD_P80CLK 32 EC_RX/GPIO17 AC_IN/GPXIOD01 112
9012_PCH_PWROK EC_ON KB930 and KB9012.At KB930, PCH_PWROK will be connected to pin 104.
PCH_PW ROK/GPIO18 EC_ON/GPXIOD02 EC_ON <37>
1
PWR_SUSP_LED# 34 114 ON/OFF
<30> PWR_SUSP_LED#
WL_OFF# 36 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 115 LID_SW#
ON/OFF <30> At KB9012,PCH_PWROK will be connected to pin 32,
GPI R385 R386
<27> WL_OFF# NUM_LED#/GPIO1A LID_SW #/GPXIOD04 116 SUSP#
LID_SW# <30>
10K_0402_5% 10K_0402_5%
and VCOUT0_PH will be connected to pin 104.
SUSP#/GPXIOD05 117 SUSP# <33,36,38,39,40>
@ @
+3VALW GPXIOD06 118 9012_PECI
2
122 PECI_KB9012/GPXIOD07 R387 1 2 0_0402_5%
AGND/AGND
EC_XCLK1 VCIN0_PH_R
Board ID 1 2 EC_XCLK0 123 XCLKI/GPIO5D 124 +V18R
VCIN0_PH <35>
GND/GND
GND/GND
GND/GND
GND/GND
<15> SUSCLK XCLKO/GPIO5E V18R

2
Analog Board ID definition, R388 0_0402_5% 1

GND0
R389 2 1 VCIN1_PROCHOT_R R391 1 2 0_0402_5%

Please see page 3. VCIN1_PROCHOT <35>
Ra 100K_0402_5% R390 100K_0402_5% C372
4.7U_0603_6.3V6K
1 2 KB9012QF-A3_LQFP128_14X14 2
1
11
24
35
94
113
69
AD_BID0 C373 20P_0402_50V8 20mil Near EC pin for power noise.

L35
1
1 ECAGND 2 1
R392 C374 FBMA-L11-160808-800LMT_0603 SA_PGOOD ADP_I ON/OFF
Rb 8.2K_0402_5% 0.1U_0402_16V4Z
2 2 2 2
2
+3VALW +3VALW C385 C409 C410

100P_0402_50V8J 100P_0402_50V8J 100P_0402_50V8J
1 1 1 @
1
1
R395 C376
+3VALW 100K_0402_5% 0.1U_0402_16V4Z EC_SMB_DA1 EC_SMB_CK1 +EC_VCC
@ @
Project ID 2
2 2 1
2
2
4 Analog Board ID definition, U32 4

R393 2 C421 C423 C375
Please see page 3.
P
<35,37> SPOK B 4
Ra 100K_0402_5%
Y PCH_DPWROK <15> 1
100P_0402_50V8J
1
100P_0402_50V8J
2
0.1U_0402_16V4Z
I57@ EC_DPWROK 1 @
A
G
@
1
AD_PID0 MC74VHC1G08DFT2G_SC70-5
3
1
R394
1
C377 1 2 Security Classification Compal Secret Data Compal Electronics, Inc.
Rb 0_0402_5% 0.1U_0402_16V4Z R544 DS3@ 0_0402_5%
CP3@ @
2 EC ENE-KB9012
2
Custom 1.0
A B C D E
A B C D E
KSI0 1
JKB1 schematic-laptop.blogspot.com
TPM
KSI1
KSI2
2
3
1
2
KB KSI[0..7]
Conn.
3 KSI[0..7] <29>
KSO0 4
KSO1 5 4 KSO[0..15]
5 KSO[0..15] <29>
KSO2 6
KSI3 7 6 JTPM2 CONN@
KSO3 8 7
KSO4 9 8 CLKRUN# 1 2 LPC_AD3
9 <15> CLKRUN# 1 2 LPC_AD3 <13,29>
KSO5 10 PLT_RST_BUF# 3 4 LPC_AD2 R145
10 <17,25,27,29> PLT_RST_BUF# 3 4 LPC_AD2 <13,29>
KSO6 11 5 6 CLK_PCI_TPM_R_2 1 2 CLK_PCI_TPM
11 5 6 CLK_PCI_TPM <17>
1 KSO7 12 KSO15 C381 1 2 100P_0402_50V8J 7 8 LPC_FRAME# BTB@ 0_0402_5% 1
12 7 8 LPC_FRAME# <13,29>
KSO8 13 +3VALW 9 10 LPC_AD1
13 9 10 LPC_AD1 <13,29> +3VS
KSI4 14 KSO14 C382 1 2 100P_0402_50V8J +3VS 11 12 LPC_AD0
14 11 12 LPC_AD0 <13,29>
KSO9 15 13 14 LPC_PD#
KSI5 16 15 KSO13 C383 1 2 100P_0402_50V8J 15 13 14 16 SERIRQ
16 15 16 SERIRQ <13,29>
1
KSI6 17
KSO10 18 17 KSO12 C384 1 2 100P_0402_50V8J R540
KSO11 19 18 FOX_NQT510166-LOAO-7F BTB@
KSI7 20 19 10K_0402_5%
KSO12 21 20 KSI0 C386 1 2 100P_0402_50V8J
2
KSO13 22 21
KSO14 23 22 KSO11 C387 1 2 100P_0402_50V8J LPC_PD#
KSO15 24 23
24 KSO10 C388 1 2 100P_0402_50V8J @ C481 @ R546
22P_0402_50V8J 33_0402_5%
KSI1 C389 1 2 100P_0402_50V8J 2 1 2 1 CLK_PCI_TPM_R_2
25
26 GND1
GND2
ACES_85208-24071 +3VS
CONN@ TP Conn. LED Board
SP01000RY00
1
12/30 Modify. R543
KSI2 C390 1 2 100P_0402_50V8J KSO7 C391 1 2 100P_0402_50V8J 10K_0402_5% JTP1

1 +3VALW
2
KSO9 C392 1 2 100P_0402_50V8J KSO6 C393 1 2 100P_0402_50V8J 2 1 JLED1
<29> SMB_ALERT#_R 3 2 1
2 KSI3 C394 1 2 100P_0402_50V8J KSO5 C395 1 2 100P_0402_50V8J TP_CLK <11,12,14> D_CK_SCLK 4 3 PWR_LED# 2 1 2
<11,12,14> D_CK_SDATA 4 <29,30> PW R_LED# 2
TP_DATA 5 PWR_SUSP_LED# 3
5 <29> PW R_SUSP_LED# 3
KSO8 C396 1 2 100P_0402_50V8J KSO4 C397 1 2 100P_0402_50V8J 6 BATT_BLUE_LED# 4
<29> TP_DATA 6 <29> BATT_BLUE_LED# 4
7 BATT_AMB_LED# 5 7
<29> TP_CLK 7 <29> BATT_AMB_LED# 5 G1
+3VS 8 6 8
8 6 G2
3
KSO0 C400 1 2 100P_0402_50V8J KSO3 C401 1 2 100P_0402_50V8J 9
D21 10 GND ACES_51524-0060N-001
KSI5 C398 1 2 100P_0402_50V8J KSI4 C399 1 2 100P_0402_50V8J +3VS GND CONN@
ACES_87151-0807G
KSI6 C402 1 2 100P_0402_50V8J KSO2 C403 1 2 100P_0402_50V8J 1 1 1 CONN@
C406 SP010014M10
KSI7 C404 1 2 100P_0402_50V8J KSO1 C405 1 2 100P_0402_50V8J C408 C407 0.1U_0402_16V4Z
100P_0402_50V8J 100P_0402_50V8J 01/12 Change to ACES_51524-0060N-001 .
@ 2 2 2
1
AZ5125-02S.R7G_SOT23-3
+3VLP
ON/OFF BTN Power LED Lid

Switch(Hall +3VALW
2
R409
100K_0402_5% +3VALW +3VS
Effect Switch)
1
6
5
(BLUE) R526 2
1
2
2 4 D22 47K_0402_5% U39
G
G
2 C472
VDD
ON/OFF <29>
1
3 1 3 ON/OFFBTN# 1 0.1U_0402_16V4Z 3
2
3 D29 1
51_0402_5% 51_0402_5% LID_SW # 2 1 3
SW 4 R551 R528 <29> LID_SW # OUTPUT
BAV70W _SOT323-3
EVQPLMA15_4P @ RB751V-40_SOD323-2
GND
2
1
C473
1
10P_0402_50V8J AH180W G-7_SC59-3
2
2
LED1
HT-191NB5-A168_BLUE
For power button ESD request
1
D30 @
ON/OFFBTN# 2
1
PW R_LED#
PW R_LED# <29,30>
3
12/22 Modify. L30ESD24VC3-2_SOT23-3 10mil
4 4

TP/IO Port/ KB CONN/TPM
Custom 1.0
A B C D E
A B C D E
+5VS
J6
+VDDA
schematic-laptop.blogspot.com Int. Speaker Conn.
60mil 1 2 40mil SPKR+ R411 1 2 0_0603_5%
40mil SPK_R+
1 2 SPKR- R412 1 2 0_0603_5% SPK_R-
1
C411
JUMP_43X39 4.75V
3
0.1U_0402_16V4Z @ D24
2 AZ5125-02S.R7G_SOT23-3
2 1 BEEP#_R 1 2 MONO_IN JSPK1
<29> BEEP#
C412 1U_0402_6.3V6K SPK_L+ 1
R413 SPK_L- 2 1
C412 need to close U34.12 2
47K_0402_5% SPK_R+ 3 5
(output = 300 mA)
2
2 1 SPK_R- 4 3 G1 6
1 <13> PCH_SPKR 1 4 G2 1
C413 R415
1
R414 4.7K_0402_5% ACES_88266-04001
47K_0402_5% 100P_0402_50V8J CONN@
2
40mil
1
SPKL+ R416 1 2 0_0603_5% SPK_L+ 1/4 Modify SPK Pin define
SPKL- R417 1 2 0_0603_5% SPK_L-
2
D25
AZ5125-02S.R7G_SOT23-3
SM010014520 3000ma 220ohm@100mhz DCR 0.04 +PVDD_HDA

40mil
1
L36 2 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z
+VDDA
FBMA-L11-201209-221LMA30T_0805 1 1 1
C415 C416
C414
10U_0805_10V4Z
2 2 2 HD Audio Codec +INTMIC_VREFO
SM010030010 200ma 120ohm@100mhz DCR 0.2
1
Place near Pin39 Place near Pin46
R465
SM010030010 200ma 120ohm@100mhz DCR 0.2
20mil +3VS_DVDD 10U_0603_6.3V6M L37 1 2 10K_0402_5%
+AVDD_HDA +3VS
BLM18AG121SN1D_2P 15mil
20mil 1 1 1
2
L38 1 2 0.1U_0402_16V4Z C417 C418 C420 INT_MIC_R
+VDDA INT_MIC_R <28>
BLM18AG121SN1D_2P 1 1 1
2 0.1U_0402_16V4Z 2
1
C419 C422 C424 2 2 2
10U_0805_10V4Z 0.1U_0402_16V4Z C464
2 2 2 220P_0402_50V7K
Place near Pin1, 9 2
0.1U_0402_16V4Z
25
38
39
46
9
Place near Pin25, 38 U34
1U_0603_10V6K
DVDD_IO
AVDD1
AVDD2
PVDD1
PVDD2
DVDD
C461 1 2 LINE2_C_L 14
INT_MIC_R 2 1 INT_MIC 1U_0603_10V6K LINE2_L
Internal MIC R464 1K_0402_5% C462 1 2 LINE2_C_R 15
LINE2_R 35mA 40 SPKL+
C426 1 2 MIC2_C_L 16 68mA 600mA SPK_OUT_L+
4.7U_0603_6.3V6K MIC2_L
Combo MIC
COM_MIC 2 1 COM_MIC_R C425 1 2 MIC2_C_R 17 41 SPKL-
<28> COM_MIC MIC2_R SPK_OUT_L-
R420 1K_0402_5% 4.7U_0603_6.3V6K
23 45 SPKR+
LINE1_L SPK_OUT_R+
1
C463 24
1000P_0402_50V7K LINE1_R 44 SPKR-
21 SPK_OUT_R-
2
MIC1_L 32 HP_LEFT
External MIC HPOUT_L HP_LEFT <28>
22
MIC1_R 33 HP_RIGHT
HPOUT_R HP_RIGHT <28>
1 35
CBN 8 HDA_SDIN0_AUDIO 1 R422 2
SDATA_IN HDA_SDIN0 <13>
Combo MIC C427 33_0402_5%
2.2U_0603_6.3V6K 36 5
2 CBP SDATA_OUT HDA_SDOUT_AUDIO <13>
29 10
+MIC2_VREFO MIC2_VREFO SYNC HDA_SYNC_AUDIO <13>
10mil EAPD 1 281@ 2
11 HDA_RST_AUDIO# R421 0_0402_5%
RESET# HDA_RST_AUDIO# <13> +MIC2_VREFO
Internal MIC 30
3 MIC1_VREFO_R 6 3
10mil31 BCLK HDA_BITCLK_AUDIO <13>
External MIC MIC1_VREFO_L
1
+INTMIC_VREFO @ reseve for EMI
10mil 1 @ 2 1 2 C430 +3VS MIC2JD R423
R427 0_0402_5% 22P_0402_50V8J 2.2K_0402_5%
1
C431 1 2 28 R425
LDD_CAP
1
10U_0603_6.3V6M 2 R424 D 22K_0402_5%
For EMI
2
GPIO0/DMIC_DATA 4.7K_0402_5% 2 MIC2JD_R 1 2 COM_MIC
HP_PLUG# <28> Place near pin28
3 @ Q23 G
R428 2 1 20K_0402_1% JDREF 19 GPIO1/DMIC_CLK BSS138_NL_SOT23-3 S 1
2
JDREF 4 HDA_RST_AUDIO# C428
PD# EC_MUTE# <29>
1 R426
Place near C429 10U_0603_6.3V6M 22K_0402_5%
@ 2
codec
C432 1 2 2.2U_0603_6.3V6K CPVEE 34 12 MONO_IN 0.1U_0402_16V7K
1
CPVEE PCBEEP 2
HP_PLUG# R429 2 1 39.2K_0402_1% SENSE_A
10mil13 20
MIC2JD R430 2 1 20K_0402_1% SENSE_B 18 SENSE A MONO_OUT 37
1 2 47 SENSE B AVSS2
<29> EAPD EAPD
R431 0_0402_5% 27 CODEC_VREF C433 1 2 0.1U_0402_16V4Z
48 VREF
SPDIFO 10mil C434 1 2 2.2U_0603_6.3V6K
7 26
DVSS AVSS1 43 C435 1 2 10U_0603_6.3V6M
49 PVSS2 42 @
GND PVSS1
Place next pin27
J7 J8 DGND ALC271X-VB6-CG_QFN48_6X6
JUMP_43X39 JUMP_43X39
1 2 1 2
@ 1 2 @ 1 2
J9 J10
4 1 2 1 2 4
@ 1 2 @ 1 2
J11 J12
1 2 1 2
@ 1 2 @ 1 2
GND GNDA GND GNDA

HD Audio Codec ALC271X
Custom 1.0
A B C D E
FAN1 Conn
+5VS H2 H3 H4 H5 H6
H_2P5 H_2P5 H_2P5 H_2P5 H_2P5
1
D27
1
@ 1SS355_SOD323-2
40mil
2
@ @ @ @ @
D28 H7 H8 H9 H10 H11
@ BAS16_SOT23-3 H_2P5 H_2P5 H_2P5 H_2P5 H_2P5
1 2
1
C437
10U_0805_10V4Z
1 2
@ @ @ @ @
+3VS C438
1000P_0402_50V7K
1 2
1
H12 H13 H14 H15

R433 H_3P8 H_3P8 H_3P8 H_3P8
10K_0402_5%
JFAN1 CPU support plate

2
1
+VCC_FAN1 1
FAN_SPEED1 2 1
<29> FAN_SPEED1 3 2
3 @ @ @ @
1
C439 4
1000P_0402_50V7K 5 GND
GND
2
ACES_85204-0300N H16 H17 H18 H19

CONN@ H_3P6 H_3P0N H_3P2X3P5N H_3P2X3P7N
SP02000JR00
2/3 Modify.
1
@ @ @
@
12/1 Add +5VS

C436 FD1 FD2
1 2 10U_0805_10V4Z
@ @
1
U33
1 8 FIDUCIAL_C40M80 FIDUCIAL_C40M80
2 EN GND 7
+VCC_FAN1 3 VIN GND 6 FD3 FD4
2 1 4 VOUT GND 5
<29> EN_DFAN1 VSET GND
R432 300_0402_5%
1 APL5607KI-TRG_SO8 @ @
1
C470 FIDUCIAL_C40M80 FIDUCIAL_C40M80
0.1U_0402_16V4Z
2

FAN & Screw Hole
A B C D E
+5VALW TO +5VS
+3VALW to +3VALW_PCH(PCH AUX Power)
+5VALW +5VS
U35
AO4478L_SO8 +5VALW
8 1
20mil
7 2 +3VALW +3VALW_PCH
2
4.7U_0603_10V6K
C442
6 3 1 1 C443 R630
4.7U_0603_10V6K
C440
4.7U_0603_10V6K
C441
1U_0603_10V6K
1 1 5 R434 2 1 R435
4.7U_0603_6.3V6K
C445
470_0603_5% 2 100K_0402_5%
0_0603_5%
4
2 2
1
2 2 +5VS_R SUSP
1 1 <38,39,40> SUSP 1
1
D
20mil 10mil 2 Q35

<29,36,38,39,40> SUSP#
+VSB 2 1 5VS_GATE 2 SUSP G 2N7002K_SOT23-3
1
R436 S
3
20K_0402_1% 1 Q24A R439
1
3
C447 DMN66D0LDW-7_SOT363-6 10K_0402_5%
0.1U_0603_25V7K
Q24B
2
SUSP 5 2
4
+5VALW
+3VALW TO +3VS
2
R440
+3VALW +3VS 100K_0402_5%
U37 @
AO4478L_SO8
1
8 1
7 2
2
4.7U_0603_6.3V6K
C449
4.7U_0603_6.3V6K
C450
4.7U_0603_6.3V6K
C451
2 2 6 3 2 1 SYSON#
1U_0402_6.3V6K
C452
5 R441
470_0603_5%
1
D
4
1 1 1 2 SYSON 2 Q36
<29,38> SYSON
6 1
+3VS_R G 2N7002K_SOT23-3
1
S @
3
2 R442 R443 2
47K_0402_5%
10mil 100K_0402_5%
20mil 2 1 3VS_GATE 2 SUSP
+VSB
2
1 Q27A
1
3
C453 DMN66D0LDW-7_SOT363-6
0.1U_0603_25V7K
SUSP 5 2
+5VALW
Q27B
4
2
R444
100K_0402_5%
+1.5V to +1.5VS
1
+1.5V +1.5VS
U38 PCH_PWR_EN#
<20,25> PCH_PWR_EN#
AO4478L_SO8
8 1
1
D
4.7U_0603_6.3V6K
C457
7 2 2 1
2
4.7U_0603_6.3V6K
C459
4.7U_0603_6.3V6K
C454
0.1U_0402_16V4Z
C455
0.1U_0402_16V4Z
C456
6 3 2 Q28
<29> PCH_PWR_EN
1U_0402_6.3V6K
C458
2 2 1 1 5 R445 G 2N7002K_SOT23-3
1
470_0603_5% S
3
1 2
4
R446
1
1 1 2 2 +1.5VS_R 100K_0402_5%
2
6
20mil 10mil Q29A

+VSB 2 1 1.5VS_GATE DMN66D0LDW-7_SOT363-6 2 SUSP
3 R447 3
200K_0402_5% 1
1
1
C460
3
510K_0402_5%
R448
0.1U_0603_25V7K
@
2
SUSP 5
2
Q29B
4
1
D
ACIN 2 Q30
<15,29,36> ACIN
G 2N7002K_SOT23-3
@ S
3
+0.75VS +1.05VS_VTT +1.8VS +1.5V

1
R449 R450 R451 R452

22_0603_5% 470_0603_5% 470_0603_5% @ 470_0603_5%
2
+0.75VS_R +1.05VS_VTT_R +1.8VS_R +1.5V_R

1
D D D D
2 SUSP 2 SUSP 2 SUSP 2 SYSON#
G G G G
4 S Q31 S Q32 S Q33 @S Q34 4
3
2N7002K_SOT23-3 2N7002K_SOT23-3 2N7002K_SOT23-3 2N7002K_SOT23-3

DC Interface
Custom 1.0
A B C D E
5 4 3 2 1
PJP1
PL1 schematic-laptop.blogspot.com VIN +0.75VSP
HCB2012KF-121T50_0805 PJ1 @
6 4 1 2 2 1 PJ2
DCJK_IN +3VALWP +3VALW
5 GND 4 3 2 1 1 2 +0.75VS
GND 3 1 2
330P_0402_50V7K PC10
2 JUMP_43X118
2
1
1 @ PC1 @ PC2
1 JUMP_43X79
470P_0402_50V7K PC14
1000P_0402_50V7K 1000P_0402_50V7K
1
PC5
2
PC3 PC4 100P_0402_50V8J PC6
@
ACES 88266-04001 1000P_0402_50V7K 100P_0402_50V8J 1000P_0402_50V7K
2
CONN@ PJ3 PJ4
2 1 +VCCSAP 2 1 +VCCSA
D +5VALWP 2 1 +5VALW 2 1 D
@ JUMP_43X118 @ JUMP_43X118
1
PC7 @ PC8
1000P_0402_50V7K 1000P_0402_50V7K
2
@
PJ6
+1.8VSP 2 1 +1.8VS
2 1
@ JUMP_43X118
1
@ PC9
1000P_0402_50V7K
2
PJ10
+1.5VP @ JUMP_43X39
PJ9 +1.5V 1 2
+VSBP 1 2 +VSB
2 1
2 1
1
@ PC11 @ JUMP_43X118 @ PC12
1000P_0402_50V7K 1000P_0402_50V7K
2
PJ11
C 2 1 C
2 1
@ JUMP_43X118
+1.05VSP PJ12 +1.05VS_VTT
2 1
2 1
@ JUMP_43X118
1
@ PC13
1000P_0402_50V7K
- PBJ1 @ + PR1 PR2
2
560_0603_5% 560_0603_5%
2 1 1 2 1 2
+RTCBATT
ML1220T13RE
PR3
0_0402_5%
+CHGRTC 1 2
+3VLP
B B
A A

PWR DCIN / Pre-charge
Custom 1.0
5 4 3 2 1
5 4 3 2 1
footprint :SUYIN_200275MR008G15QZR_8P-T
PN:DC040007N10 SOCKET BATT C200275MR008G15QZR 8P W/FORK
PJP2
D 10 D
GND 9
GND 8
8 7
7 6 EC_SMDA
6 5 EC_SMCA
5 4 TH
4 3 BI+
3
2
2
2 1 PR58
1 100_0402_1%
2
PR59
1
100_0402_1%
SUYIN_200275GR008G16MZR
<40,41> EC_SMB_DA1 <29,36>
VL +EC_VCCA
VMB
1
1
PJ5 @
<40,41> EC_SMB_CK1 <29,36> ADP_I <29,36>
2
2 1
1 BATT+ PR60 12.4K_0402_1%
1
1K_0402_5% VL @ PR61
2
JUMP_43X118 PR62 PC65 21K_0402_1% PR78
1
1
6.49K_0402_1% 0.1U_0603_25V7K
2
PC66 PC67 2 1 PR63 CS@
+3VALW
1
1000P_0402_50V7K 0.01U_0402_25V7K 5.62K_0402_1%
2
2
PU3 @
@ PR64 1 8
2
VCC TMSNS1
1
100K_0402_1% @ PR66
PR65 2 7 2 1
VCIN0_PH <29>
2
1K_0402_1% GND RHYST1 9.53K_0402_1%
+3VLP MAINPWON 3 6
C ~OT1TMSNS2 C
<5,29> H_PROCHOT#
2
4 5 1 2
~OT2 RHYST2 VCIN1_PROCHOT <29>
1
BATT_TEMP <29>
PR67 @ G718TM1U_SOT23-8 @ PR68
1
100K_0402_1% 28.7K_0402_1%
1
D PH1
2
@ PQ32 2 100K_0402_1%_NCP15WF104F03RC PR79
2N7002KW_SOT323-3 G @ PR80 10K_0402_1%
2
0_0402_5%
S 1 2 SD034100280 10K OHM
2
PR81
0_0402_5%
1 2
<29> ECAGND
PQ19 BSS84LT1G_SOT23-3
3 1
S
D
0.22U_0603_25V7K
<29> EC_SPOK B+ +VSBP

100K_0402_1%
<29> H_PROCHOT#_EC PH1 under CPU bottom side :

1
CPU thermal protection at 92 degree C

G
PR70
PC68
2
1
1
PC69
0.1U_0603_25V7K
Recovery at 56 degree C
2
2
2
PR71
VL 22K_0402_1%
1 2
+3VALW
2
PR72
100K_0402_1%
B B
PR73
1
1K_0402_5% D
1 2 2 PQ20
1U_0402_6.3V6K
<29,37> SPOK
1
G 2N7002KW 1N SOT323-3
S @ PC70
PC71
3
1
1
0.1U_0603_25V7K
2
@ PR74 @ PR75
2
VL 10K_0402_1% 10K_0402_1%
1
2
@ PU4
@ PR76 1 8 PH2_R
100K_0402_1% VCC TMSNS1
2 7 2 1
GND RHYST1
1
3 6 @ PR77
<29,37> MAINPWON OT1 TMSNS2 47K_0402_1%
4 5
OT2 RHYST2
1
G718TM1U_SOT23-8
@ PH2
100K_0402_1%_NCP15WF104F03RC
2
For 65W adapter==>action 70W , Recovery 54W
For 90W adapter==>action 97W , Recovery 75W
A A

PWR-BATTERY CONN/OTP
Custom 1.0
5 4 3 2 1
A B C D
for reverse input protection
B+
D
1
PQ4
2
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
G 2N7002KW 1N SOT323-3
S
PC121
PC113
PC114
PC115
PC117
1
1
PR12 PR13
1 2 1 2
2
1 1M_0402_5% 3M_0402_5% 1
B+
VIN PQ5 P1 PQ6 P2 PL2 CHG_B+
SIS412DN-T1-GE3_POW ERPAK8-5 SIS412DN-T1-GE3_POW ERPAK8-5 PR14 1UH_NRS4018T1R0NDGJ_3.2A_30%
0.02_1206_1%
330P_0402_50V7K
1 1 1 4 1 2 1
330P_0402_50V7K
470P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
2 2 2
PC20
470P_0402_50V7K PC17
5 3 3 5 2 3 5 3
2200P_0402_50V7K
PC23
0.1U_0402_25V6
1
PC16
PC18
PC19
0_0402_5%
@
0.01U_0402_50V7K
PC22
1
0_0402_5%
PR15
1
VIN PQ7
PC15
PR16
4
PC25
1
@ SIS412DN-T1-GE3_POW ERPAK8-5
PC24
2
1
<BOM STRUCTURE>
2
2
PD5
2
2
BTB_GATE BAS40CW H_SOT323-3

BQ24725_BATDRV 1 2 BATT_GATE
1 2
0.1U_0402_25V6
1
0.047U_0402_25V7K PR17
PC28
1
4.12K_0603_1%
4.12K_0603_1%
PC26 4.12K_0603_1%
PC27
0.1U_0402_25V6
2
1
1 2
PR18
PR19
5
10_1206_1%
2.2_0603_5%
PR21
1
VIN
PR20
0.1U_0402_25V6
2
2
1
2 PR23 PQ8 2
1
PR22 1_0603_5% SIS412DN-T1-GE3_POW ERPAK8-5
PC29
BQ24725_BST 2
BQ24725_ACP
1
3.3_1206_5% DH_CHG 1 2 4
BQ24725_VCC2
PC30 PD6
BQ24725_LX
2
1 2 RB751V-40_SOD323-2 BATT+
1 2
DH_CHG
BQ24725_ACN
1U_0603_25V6K PC31 PL3 PR25
3
2
1
@ 1 2 10UH_FDSD0630-H-100M-P3_3.8A_20% 0.01_1206_1%
PR24 BQ24725_LX 1 2 CHG 1 4
3.3_1206_5% 1U_0603_25V6K
4.7_1206_5%
2 3
20
19
18
17
16
2
CSOP1
SIS412DN-T1-GE3_POWERPAK8-5
PU1
2200P_0402_50V7K
0.01U_0402_50V7K
CSON1
1
VCC
REGN
PHASE
HIDRV
BTST
PR26
10U_0805_25V6K
10U_0805_25V6K
1
@ 21
0.1U_0402_25V6
0.1U_0402_25V6
PC32 PAD
PC36
PC37
PC33
PC34
1
1
PQ9
@ 2.2U_0805_25V6K 1 15 DL_CHG 4
2
ACN LODRV
PC35
PC38
2
2
2 14
680P_0402_50V7K
ACP GND PR27
3
2
1
2
1
BQ24725ARGRR _VQFN20_3P5X3P5 10_0603_5%
PC39
BQ24725_CMSRC 3 13 2 CSOP1
SRP1
CMSRC SRP
1
PR28
2
6.8_0603_5%
BQ24725_ACDRV 4 12 SRN 1 2 CSON1
2
ACDRV SRN
0.1U_0402_25V6
PR29
330P_0402_50V7K
PC40
+3VLP 1 2 5 11 BQ24725_BATDRV BATT+
ACOK BATDRV
470P_0402_50V7K
ACDET
PC48
10K_0402_1%
IOUT
3 3
SDA
SCL
ILIM
1
PC63
PR30 +3VALW
6
10
2
1 2
<15,29,33> ACIN BQ24725_ILIMT PR31
1K_0402_1% ACDET= 1 2
0.01U_0402_25V7K
2.4 ~3.15 V
100K_0402_1%
PR32 316K_0402_1%
Vin=20.55~18.6V
1
ACDET VIN
PC41
PR33
1
2M_0402_1%
1 2
2
1
154K_0402_1%
280K_0402_1%
PR34
2
1
PR35
1.Change PR33 to 280K 0.1%

2.Chagee PR35 and PR36 to 0.1%.
2M_0402_1%
2
100P_0402_50V8J
100P_0402_50V8J
2
3.Change PC30 to 1000P.
1
1
4.Add PR52,PR70,PR72,PQ17,PQ21. ACDET PC149
PC148
PR36
5.Add GPIO pin,need check HW/EC.

1000P_0402_50V7K
2
66.5K_0402_1%
6.Chanrge PR31 to 1K. @ @ EC_SMB_CK1 <29,35>

1
1
PC42
PR37
1 2
EC_SMB_DA1 <29,35>
2
PR38 PQ10 PR39

PC43
100K_0402_1% PDTC115EU_SOT323-3 0_0402_5%
2
4 2 1 1 2 4
ADP_I <29,35>
1 2 2
<29> FSTCHG
1
@ PC44
100P_0402_50V8J 0.1U_0402_25V6
D
1
2 PQ11
29,33,38,39,40> SUSP#
3
G 2N7002KW 1N SOT323-3
S
100P_0402_50V8J
3
1

PC147
PWR DCIN / Pre-charge

2
Custom 1.0
A B C D
5 4 3 2 1
schematic-laptop.blogspot.com +3VLP PC52
1 2
1U_0603_10V6K
@ PC85 @ PC99
100P_0402_50V8J 100P_0402_50V8J
1 2 1 2
D PR40 PR41 D
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
VFB=2V VFB=2V
PR42 PR43
20K_0402_1% 20K_0402_1%
1 2 1 2
FB_3V
FB_5V
95.3K_0402_1%
1
118K_0402_1%
RT8243_B+ RT8243_B+
PR44
PR45
PL4
HCB2012KF-121T50_0805
B+
1
1 2
10U_0805_25V6K
2200P_0402_50V7K
2200P_0402_50V7K
0.1U_0603_25V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
CS2
CS1
PC46
PC54
1
1
PC47
PC49
PC50
PC51
PC53
5
5
2
2
PQ12 PU2 PQ13
CS2
VFB2
VREG3
VFB1
CS1
21
SIS412DN-T1-GE3_POW ERPAK8-5 EN_3V 6 PAD
C EN2 20 EN_5V C
4 EN1 4 SIS412DN-T1-GE3_POW ERPAK8-5
7
<29,35> SPOK PGOOD 19
VCLK
LX_3V 8 TPS51225CRUKR_QFN20_3X3
1
2
3
3
2
1
SW2 18 LX_5V
PL5 PR46 SW1 PR47 PC56 PL6
4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20% 1 2 1 2BST_3V 9 2.2_0603_5% 0.1U_0603_25V7K 4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%
2.2_0603_5% VBST2 17 1
BST_5V 2 1 2
1 2 PC55 VBST1 1 2
+3VALWP +5VALWP
0.1U_0603_25V7K UG_3V 10
DRVH2
1
1
16 UG_5V
4.7_1206_5%
4.7_1206_5%
VREG5
DRVL2
DRVL1
DRVH1
5
PR48
@ PR49
VO1
VIN
PQ14
PC59 220U_6.3V_M
SI7716ADN-T1-GE3_POW ERPAK8-5
1 1
2
11
12
13
14
15
2
4
PC57 + LG_5V 4 +
1
1
220U_6.3V_M LG_3V
680P_0402_50V7K
680P_0402_50V7K
PC58
@ PC60
ESR=17m ohm 2 PR52 PQ15 ESR=17m ohm 2
2
1
2
3
2
SI7716ADN-T1-GE3_POW ERPAK8-5
+5VALWP
3
2
1
1 2 Rds=13.5mΩ(min)
RT8243_B+ VL
= 16.5mΩ(max)
1U_0603_25V6K
1U_0603_10V6K
1
2.2_0603_1%
PC61
PC62
B B
Rds=13.5mΩ(min)
2
= 16.5mΩ(max)
確確PR51
2
PR51 0_0402_5% (1)SMPS1=300KHZ (+5VALWP)
EN_5V 1 2 (2)SMPS2=355KHZ (+3VALWP)
PR50 0_0402_5%
EN_3V 1 2
2 1 EN_5V3V
<29> EC_ON EN +3.3VALWP +5VALWP
PR69 2.2K_0402_5%
2 1 Rising=1.6~0.3V Ipeak=5.6A ; 1.2Ipeak=6.72A; Imax=3.92A Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A
<29,35> MAINPWON f=375KHz, L=4.7UH f=300KHz, L=4.7UH,Rentrip=154k ohm
PR54 0_0402_5% Rdson=13~16m ohm Rdson=15~18m ohm
1/2Delta I = 1/2 *(19-3)*(3/19)/(375KHz*4.7UH)=1.48/2=0.74A 1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.63/2=0.815A
Vlimit=10*10^-6*150Kohm/10=0.15V Vlimit=10*10^-6*154Kohm/10=0.15V
Ilimit=0.15/(16m*1.2)~0.15/(13m)=7.82A~11.53A Ilimit=0.15/(18m*1.2)~0.15/(15m)=7.13~10.26A
Iocp=7.7A (8.536A>8.4A -> ok) Iocp=14.2A
402K_0402_1%
4.7U_0603_6.3V6M
1
A A
1
PR56
PC64
2
@
2

3VALWP/5VALWP
Custom 1.0
5 4 3 2 1
A B C D
PJ18
1
1.5V_B+ 1
1 2
2 B+ 1
JUMP_43X79 @
10U_0805_25V6K
1
PC72
5
2
+1.5VP
PQ30
4 SIS412DN-T1-GE3_POW ERPAK8-5
1
PJ15
1
JUMP_43X79
3
2
1
2
LDO_IN
PR96 PC76
BST_1.5V
0_0603_5% 0.1U_0603_25V7K PL16
UG_1.5V
LX_1.5V
1 2 BST_1.5V-1 1 2 1 2
+0.75VSP
靠靠Output Cap PAD 1.5UH +-20% PCMC063T- 9A
+1.5VP
10U_0805_25V6K
10U_0805_25V6K
1
5
20
19
18
17
16
1
1
PC97
PC73
PU8 PR175
4.7_1206_5% 1
VTT
VLDOIN
BOOT
UGATE
PHASE
220U 2V Y D2 ESR15M
21
2
2
PAD +
PC232
1 15 LG_1.5V 4
VTTGND LGATE
1
2
PC75 2 2
2 14 680P_0402_50V7K
2
VTTSNS PGND PR170
3
2
1
21.5K_0402_1%
3 13 2
1.5V_CS 1 PQ29
GND RT8207MZQW _W QFN20_3X3 CS SI7716ADN-T1-GE3_POW ERPAK8-5
Rds=13.5mΩ(Typ)
4 12
+VTT_REFP VTTREF VDDP 16.5mΩ(Max)
5 11 VDD_1.5V 2 1
+1.5VP VDDQ VDD
+5VALW
PGOOD
PR174
+3VALW
1
5.1_0603_5% need change OCP setting
1U_0603_10V6K
TON
PC98
FB
S3
S5
0.033U_0402_16V7K
2
1
PC77
10K_0402_5%
6
10
PR97
PC78
1U_0603_10V6K
S3_1.5V
S5_1.5V
2
PR173
680K_0402_1% @
2
1 2 PGOOD_1.5V
<29,33,36,39,40> SUSP#
PR171 1.5V_TON
PR172
0_0402_5% 887K_0402_1%
1 2 2 1 1.5V_B+
<29,33> SYSON
PR95
1
PC325 @ PC96 10.5K_0402_1%

0.1U_0402_16V7K 0.1U_0402_16V7K FB_1.5V 2 1
2
PC100
1
3
100P_0402_50V8J 3
1 2
1
PQ31 D PR169
2
2 10K_0402_1%
<33,39,40> SUSP G FB=0.75V
2N7002KW _SOT323-3 To GND = 1.5V
S
3
To VDD = 1.35V
<Vo=1.5V> VFB=0.75V
STATE S3 S5 1.5VP VTT_REFP 0.75VSP V=0.75*(1+10K/10.5K)=1.52V
Fsw=286K to 200KHz
S0 Hi Hi On On On
Off Cout ESR=17m ohm Rdson(max)=16.5 mohm Rdson(typ)=13.5 mohm.
S3 Lo Hi On On (Hi-Z) Ipeak=12 A, Imax=8.4A, Iocp=14.4A
S4/S5 Lo Lo Off Off Off Delta I=((Vin-Vo)*(Vo/Vin))/(L*Fsw)=2.195A

=>1/2Delta I=1.099A
(Discharge) (Discharge) (Discharge)
Iocpmax=((21.5K*11uA)/0.0135)+0.5 delta I= A
4
Iocpmin=((21.5K*9uA)/(0.0165))+0.5 delta I=15.6A 4
Note: S3 - sleep ; S5 - power off

PWR-+1.5VP
Custom 1.0
A B C D
5 4 3 2 1
3
5 DMN66D0LDW-7_SOT363-6
<33,38,40> SUSP PQ34B +1.8VSP
@
68P_0402_50V8J
1
1
PC80
D D
PR84
20K_0402_1%
2
1.8VSP
2
PU6
1 2 EN_1.8V 1 6 FB_1.8V Ipeak=1.24A
<29,33,36,38,40> SUSP# EN FB FB=0.6Volt Vout=0.6*(1+(20K/10K))=1.8V
PR85 200K_0402_5% 2 5
0.1U_0402_10V7K
GND PG
1
PC83
1
PR86 3 4
1M_0402_5% LX IN PR87
10K_0402_1%
2
SY8032ABC_SOT23-6
2
<BOM Structure>
PL9
PJ16
1UH +-20% VMPI0703AR-1R0M-Z01 11A
2 1LX_1.8V 8032_IN 1 2
+1.8VSP 1 2 +3VALW
JUMP_43X79
1
4.7_0603_5%
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
PC79
PR83
@
22U_0805_6.3V6M
PC82
PC81
2
2
1
680P_0402_50V7K
PC84
2
C C
PU7 SY8037DDCC DFN 12P PL10

PJ17
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
+3VALW 1 2 +VCCSA_PWR_SRC 12 1 +VCCSA_PHASE 1 2 +VCCSAP
2200P_0402_50V7K
1 2 PVIN LX
22U_0805_6.3V6M
11 2
0.1U_0402_25V6
JUMP_43X79 PVIN LX
1
@
PC86
.1U_0402_16V7K
22U_0805_6.3V6M
22U_0805_6.3V6M
2200P_0402_50V7K
SA_PGOOD <29>
2
PC88 10 3 PR89 PR88

PC89
SVIN LX
1
68P_0402_50V8J 100K_0402_5% 4.7_0603_5%
PC87
PC90
PC91
PC92
PC93
2 1 FB_VCCSA_IC9 4 1 2
+3VS
1
2 FB PG
2
8 5 +VCCSA_EN 1 2 VCCPPWRGOOD <40>
VOUT EN PR90
GND
1
7 6 0_0402_5% @ PC94
VID1 VID0 680P_0402_50V7K
2
13
2
@ PC95
.1U_0402_16V7K
1
PC146
100P_0402_50V8J
H_VCCSA_VID0 <9>
@
1
FB_VCCSA
PR91
1K_0402_5%
2
B B
2 1 The 1k PD on the VCCSA VIDs are empty.
PR92 These should be stuffed to ensure that
1
1K_0402_5% VCCSA VID is 00 prior to VCCIO stability.

PC145 2 1
100P_0402_50V8J
2
@
H_VCCSA_VID1 <9> PR93
100_0402_1%
2 1
PR94
0_0402_5%
2 1
VCCSA_SENSE <9>
VID [0] VID[1] VCCSA Vout(ULV only)

0 0 0.9V
+VCC_SAP 0 1 0.85V
TDC 4.2A
Peak Current 6A 1 0 0.775V
A
OCP current 7.2A 1 1 0.75V A
output voltage adjustable network

PWR +VCCSAP
C 1.0
5 4 3 2 1
5 4 3 2 1
D D
PL11
HCB2012KF-121T50_0805
1.05V_B+ 2 1 B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
0.1U_0402_25V6
1
1
PC105
PC101
PC102
PC103
PC104
SIS412DN-T1-GE3_POWERPAK8-5
C 0.1U_0402_25V6 C
2
+1.05VSP 4
PQ23
2
PR98
3
2
1
10K_0402_1%
PR99 PC106 PL12

1
PU9 2.2_0603_5% 0.1U_0603_25V7K 1UH +-20% VMPI0703AR-11A

<39> VCCPPW RGOOD 1 10 BST_1.05V 1 2 BST_1.05V-1 1 2 1 2
PR100 84.5K_0402_1% PGOOD VBST
+1.05VSP
5
6
7
8
PR101 2 1 2 9 UG_1.05V
2200P_0402_50V7K
TRIP DRVH
1
330K_0402_1%
1 2 1.05V_EN 3 8 LX_1.05V
<29,33,36,38,39> SUSP# EN SW +5VALW PR102 1
330U_D2_2V_Y_R9
0.1U_0402_25V6
1
4 7 4.7_1206_5%
VFB V5IN
1
PC107 4 +
PC257
PC109
2
0.1U_0402_16V7K VFB=0.7V 5 6 LG_1.05V
2
@ PR103 TST DRVL
2
30K_0402_5% 11 PQ24 2
2
TP
1
1
AO4456_SO8
PC110
3
2
1
TPS51212DSCR_SON10_3X3 PC111 PC112
0.1U_0402_16V7K
PR104 2 4.7U_0805_10V6K 680P_0603_50V7K
1
B 470K_0402_1% B
PC124
6
FB_1.05V
2
2 DMN66D0LDW -7_SOT363-6
<33,38,39> SUSP PQ34A
@
1
Rds=4.5mΩ(min)- 5.6mΩ(Max) PR176

1 2 1 2 VCCIO_SENSE <8>
4.99K_0402_1% PR188
100_0402_1%
1
1 2 1 2
PR106 1000P_0402_50V7K 1.2K_0402_1%

10K_0402_1% PC122 PR186
2
<Vo=1.05V> VFB=0.75V
V=0.704*(1+4.02K/10K)=1.052V
Fsw=290KHz
Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm.

Ipeak=15.6A, Imax=10.92A, Iocp=18.72A
A A
Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=2.06A
Iocpmax=((15K*11uA)/0.0045)+1.665A=23.54A
Iocpmin=((15K*9uA)/(0.0056*1.3))+1.665A=19A
Iocp=A
PWR +1.05VS_VCCPP/+0.75VSP
Custom 1.0
5 4 3 2 1
A B C D E
+GFX_B+ PL17
1
@ PC125
1000P_0402_50V7K HCB2012KF-121T50_0805
2 1
B+
2 2
1 local sense revese HW <9> VCC_GFXSENSE 1
PC142 1
<9> VSS_GFXSENSE
33U_25V_M
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K PC127
PC160
+
0.1U_0402_25V6
0.01UF_0402_25V7K
1
649 +-1% 0402
1 2
2
PC130
PC131
PC133 PC134 PC132
2
PR139
68P_0402_50V8J 470P_0402_50V7K
2 1 2 1 2 1
1
PR134 UGA_GFX 4
PH6 PR135 PC136 499_0402_1%
1
10K_0402_1%_ERTJ0EG103FA 430_0402_1% 150P_0402_50V8J PQ27
VSUMG- 2 1 2 1 2 1 2 1
2
PR136 PR140 MDV1525URH
3
2
1
137K_0402_1% 2.55K_0402_1% PL15 +VGFX_CORE
0.22UH 20% FDUE0640J-H-R22M=P3 25A
33.2K_0402_1%
.1U_0402_16V7K
0.1U_0603_25V7K
PHASEA_GFX 2 1
1
PC137
PR143
0.022U_0402_25V7K
2 1
5
11K_0402_1%
0.1U_0603_25V7K SH00000O200
MDU1511RH_POWERDFN56-8-5
2.61K_0402_1%
1
PR142
PC140
PC141
PC183
1
PR141
PR205 2
BOOTA_GFX 1 2 1
2K_0402_1% PR182 2.2_0603_5%
+3VS
2
PQ28
PR154
1
LGA_GFX 4 4.7_0603_5% PR130 PR138
2
1.91K_0402_1%
3.65K_0402_1% 1_0402_5%
1 2
1
VSUMG+
1
BOOTA_GFX PC194 PC135
3
2
1
470P_0402_50V7K 680P_0402_50V7K
VSUMG+
UGA_GFX
VSUMG-
2
PHASEA_GFX
PR147
LGA_GFX
+5VS
PU13 GT2
33
32
31
30
29
28
27
26
25
PR152
61.9K_0402_1%
+GFX_CORE Iccmax=29A
ISUMPG
ISUMNG
RTNG
FBG
COMPG
PGOODG
BOOTG
UGATEG
PAD
Load line = -3.9m ohm
1U_0603_10V6K
2 2 1 2
PR158
0.22uH DCR= 0.97+-5% m ohm
Max Istep=13A
1
3.83K_0402_1% PH4
PS1 current=20A
0_0603_5%
PC258
PR159
1 2 2 1 NTCG 1 24 PR162
470K_0402_5%_ TSM0B474J4702RE NTCG PHASEG 1_0603_5%
1 2 2 23 TDP=18.3A
1
<29> VR_ON PR165 0_0402_5% VR_ON LGATEG
2
SVID_CLK 3 22
<8> SVID_CLK SCLK VCCP
SVID_ALERT# 4 ISL95833HRTZ-T_TQFN32_4X4 21
<8> SVID_ALERT# ALERT# VDD
1U_0603_10V6K
@ PR185 1.91K_0402_1%
PC261
SVID_DATA 5 20 2 1
<8> SVID_DATA
SVID_DATA
1 SVID_ALERT#
SDA PWM2
1
6 19 LG1_CPU
1 SVID_CLK
<29> VR_HOT VR_HOT# LGATE1
2
7 18 PHASE1_CPU
NTC PHASE1
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
1 2 8 17 UG1_CPU
PGOOD
PL18
BOOT1
ISUMN
ISUMP
ISEN2
COMP
UGATE1
ISEN1
+CPU_B+
RTN
1
1
PC144
PC161
PC163
54.9_0402_1%
10U_0805_25V6K
10U_0805_25V6K
@ PC263 PR196 BOOT_CPU HCB2012KF-121T50_0805
FB
2
2
0_0402_5%
130_0402_1%
75_0402_5%
PR168
PR156
PR200
PR160
47P_0402_50V8J 0_0402_5% 2 1
B+
330P_0402_50V7K
0.1U_0402_25V6
+5VS 1
2
2
10
11
12
13
14
15
16
33U_25V_M
470P_0402_50V7K
PC118
PC119
PC120
@ @ @
PC116
PC21
@ @ 1 2 +
1
470K_0402_5%_ TSM0B474J4702RE
61.9K_0402_1%
PC45
1
1
@ PR197
1
0_0402_5% VGATE <15> 2
2
1
5
PR201
PR202 1.91K_0402_1%
+5VS +3VS
PH5
2 1
+1.05VS_VTT
1
PQ25
2
@ PC126 PR179 0_0603_5%

2
0.1U_0402_16V7K UG1_CPU 2 1 UG1_CPU-1 4

2
3.83K_0402_1%
MDU1516URH_POWERDFN56-8-5
1
+CPU_CORE
PR204
PL14
0.22UH +-20% PCMB104T-R22MS 35A
5 3
2
1
PHASE1_CPU 2 1
5
2
680P_0402_50V7K 4.7_0603_5%
PR181 PC171 0.1U_0603_25V7K
2.2_0603_5%
PR128
BOOT_CPU 2 1 2 1
3 3
PQ33
LG1_CPU 4 4
2
LG1_CPU
2
CM@
PR129 PR137
1
PQ26 3.65K_0402_1% 1_0402_5%
3
2
1
3
2
1
PC123
PC162 PR203 PR177 VSUM+
1
2
1
470P_0402_50V7K 2K_0402_1% 42.2K_0402_1%
11K_0402_1%
2.61K_0402_1%
2 1 2 1 2 1
1
0.047U_0402_25V7K
0.1U_0603_25V7K
PR180
348_0402_1%
PC169
1
1
PC259
PC260 PC170 VSUM+
2200P_0402_50V7K 649 +-1% 0402
PR187
470P_0402_50V7K 68P_0402_50V8J Close Phase 1 choke
12
1
2
PR146
2 1 2 1 2 1 VSUM-
2
PR184
PR183 PH3
499_0402_1%
2 10K_0402_1%_ERTJ0EG103FA
2
2
PR189 PC264 VSUM-
1.91K_0402_1% 150P_0402_50V8J ICCMAX=33A
1
PC143
2 1 2 1 2 1 1
+CPU_CORE I tdc=15.8~ 20 (Tdc-up)A
.1U_0402_16V7K
PR190
Load line= -2.9 mohm
PC266
137K_0402_1%
PS1=20A
2
0.22uH DCR= 0.85+-5% m ohm

2
local sense revese HW Max Istep=28A
@ PC265
330P_0402_50V7K
2 1
<8> VCCSENSE
<8> VSSSENSE 2 1
4
PC262 4
0.01UF_0402_25V7K
local sense revese HW

CPU/GFX_CORE
R&D Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size Rev
1.0
A B C D E
D
1.0
Rev
PWR - PROCESSOR DECOUPLING
Q1VZC M/B LA-8941P Schematic
45
Mid-Frequency Decoupling
Compal Electronics, Inc.

High-Frequency Decoupling
of
42
Sheet
1
1
Decoupling 2x330 µF 9m
6x10µF 0603
Friday, April 20, 2012

Document Number
+VGFX_CORE
11x1µF
Low-Frequency
Date:
Title
Size
PC172
22U_0805_6.3V6M
1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2 1
10U_0603_6.3V6M
PC178
PC168 1U_0402_6.3V6K 1U_0402_6.3V6K
22U_0805_6.3V6M PC209 PC223
1
2 1
10U_0603_6.3V6M
1U_0402_6.3V6K 1U_0402_6.3V6K
PC177
PC167 PC208 PC222
2012/11/22
22U_0805_6.3V6M 2 1
1
10U_0603_6.3V6M
1
2
2
2
PC210
2 1 1U_0402_6.3V6K 1U_0402_6.3V6K
10U_0603_6.3V6M
PC207 PC221
PC176
PC166
1
22U_0805_6.3V6M 2 1
10U_0603_6.3V6M
1U_0402_6.3V6K 1U_0402_6.3V6K
1
PC211
2 1 PC206 PC220
10U_0603_6.3V6M
1
PC175
PC165
22U_0805_6.3V6M 1U_0402_6.3V6K 1U_0402_6.3V6K 2 1
Deciphered Date
6x22µF
Compal Secret Data

10U_0603_6.3V6M
PC205 PC219
+
1
2 1 PC212
1
10U_0603_6.3V6M 330U_D2_2V_Y
PC174 PC185
PC164 1U_0402_6.3V6K
22U_0805_6.3V6M PC204 2 1 Decoupling 1x330 µF 9m
10U_0603_6.3V6M
+
1
2 1 PC213
10x10µF
10U_0603_6.3V6M 330U_D2_2V_Y
+VGFX_CORE
PC173 PC184
2 1
10U_0603_6.3V6M
PC214
2 1
10U_0603_6.3V6M
Low-Frequency
PC215
2011/11/22
2 1
10U_0603_6.3V6M
PC216
3
3
2 1
10U_0603_6.3V6M
PC217
Security Classification
2 1
10U_0603_6.3V6M
PC218
Issued Date
PC159
22U_0805_6.3V6M
2 1
1
10U_0603_6.3V6M 330U_D2_2V_Y
PC224
+
1
2
+1.05VS_VTT
PC203
PC158
22U_0805_6.3V6M
1
PC233
22U_0805_6.3V6M
16x2.2µF
1U_0402_6.3V6K 1U_0402_6.3V6K
1
PC227 PC244
2
+CPU_CORE
PC234
470P_0402_50V7K
22U_0805_6.3V6M 1U_0402_6.3V6K 1U_0402_6.3V6K
PC108
PC225 PC242
1
Decoupling 3x330 µF 9m
2
2 1
330P_0402_50V7K
PC157 1U_0402_6.3V6K 1U_0402_6.3V6K
22U_0805_6.3V6M PC226 PC241
1 2
1
2
PC74
4
4
1U_0402_6.3V6K 1U_0402_6.3V6K
PC156 PC193 PC202 PC228 PC243

22U_0805_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
2
1
2
1U_0402_6.3V6K 1U_0402_6.3V6K
330U_D2_2V_Y
PC229 PC245
CR PDDG Rev 0.95
Low-Frequency
PC192 PC201
+
1
2
PC155 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
PC182
22U_0805_6.3V6M 1U_0402_6.3V6K 1U_0402_6.3V6K
2
PC235 PC247
1
2
330U_D2_2V_Y
PC191 PC200
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 1U_0402_6.3V6K 1U_0402_6.3V6K
+
1
2
PC154 PC230 PC246
2
PC181
22U_0805_6.3V6M
2
1
PC190 PC199 1U_0402_6.3V6K 1U_0402_6.3V6K

330U_D2_2V_Y
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M PC231 PC248
+
1
2
PC180
PC153 1U_0402_6.3V6K 1U_0402_6.3V6K
22U_0805_6.3V6M PC189 PC198 PC236 PC250
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
12x22µF
2
330U_D2_2V_Y
2
1U_0402_6.3V6K 1U_0402_6.3V6K
+
1
27x1µF
PC237 PC249
PC179
PC152 PC188 PC197
2
22U_0805_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
1U_0402_6.3V6K 1U_0402_6.3V6K
2
PC238 PC251
2
PC187 PC196
5
5
PC151 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 1U_0402_6.3V6K 1U_0402_6.3V6K
22U_0805_6.3V6M PC240 PC252
2
1
2
PC186 PC195 1U_0402_6.3V6K 1U_0402_6.3V6K
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M PC239 PC253
PC150
2
22U_0805_6.3V6M 1U_0402_6.3V6K
PC254
2
+1.05VS_VTT
+CPU_CORE
A
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1
for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
D D
2010/12/29
1 0.1
2 0.1 --- 2010/12/29
3 2011/02/08
4 2011/02/08
2011/02/08
5
C C
---
6 2011/02/08
--- 2011/02/16
7
8 --- 2011/05/13 PVT2
9 --- 2011/05/13 PVT2
B 10 --- 2011/05/13 PVT2 B
11 --- 2011/05/13 PVT2
12 2011/05/13 PVT2
13
14
A A
15

PIR (PWR)
Custom 1.0
5 4 3 2 1
5 4 3 2 1
(PU13)
VR_ON +CPU_CORE
RT8167BGQW
WQFN40 Page 41
+VGFX_CORE
ADAPTER
D D
SYSON (PU8) (U38)
+1.5V SUSP J1
RT8207MZQW AO4478L_SO8 +1.5VS +1.5V_CPU_VDDQ
SUSP# +0.75VS Page 33
B+ WQFN20 Page 38
(PU9) PJ11 & PJ12

BATTERY SUSP# +1.05VSP +1.05VS_VTT
TPS51212DSCR
SON10 Page 40
VCCPPWRGOOD (PU7) PJ4

SY8037DCC +VCCSAP +VCCSA
CHARGER DFN12 Page 39
(PU2)
EC_ON RT8243BZQW
MAINPWON WQFN20 Page 37
C C
+LED_VOUT R630
+5VALW +3VALW +3VALW_PCH
SUSP SYSON# PCH_PWR_EN# PCH_PWR_EN# PCH_PWR_EN# SUSP WLAN_ON CR_PWR_EN
(U35) (U28) (Q8) (Q68) (U37) (U27)

AO4478L G547I2P81U AP2301GN-HF AP2301GN-HF R285 Q37 R359 AO4478L +3VS_WLAN AP2301MPG
SOP8 Page 33 MSOP8 SOT23-3 Page 20 SOT23-3 Page 20 SOP8 Page 33 MSOP8 Page 26
+5VS +USB3_VCCA +5VREF_SUS +VCCSUS3_3 +3V_LAN +3VALW_EC +3VS +SDPWR_MMCPWR
(U25) PCH_ENVDD
+CRT_VCC
BCM57785 (Q10)
B B
+DVDD_AUDIO AO3419L
SO23-3 Page 22
+HDMI_5V_OUT
+1.2V_LAN J4
+3VS_WLAN
+LCDVDD
+5VS_HDD
R453
+CAM_VCC
(U34)
+VDDA ALC271X-VB6
TPM
(U33)
APL5607KI-TRG
TP
A A

Power Rail
5 4 3 2 1
5 4 3 2 1
D D
PCH_PWR_EN# 2
Q68,+VCCDSW3_3
V
A1 Q8,+5VREF_SUS
AC
MODE VIN +VCCDSW3_3
3
V V
A2 A3 B5 +5VREF_SUS
VV
PU1 A5 2
V
PU2
V
PCH_PWROK
B+
V +3VALW B7 2
BATT BATT
+5VALW V
V V
MODE SYS_PWROK
V
B1 B+ B4 U19
B2 10
V 9012_PCH_PWROK
V
EC
13
V V
PQ17 4
PCH_RSMRST# PCH
V
U30 PM_DRAM_PWRGD U2
V
V V
B3 A5 B7 5
U16 14
CPU
PBTN_OUT# H_CPUPWRGD
V V
UCPU1
V
51ON# EC_ON
C
PM_SLP_S3# 15 C
PM_SLP_S4# PLT_RST#
PM_SLP_S5#
PM_SLP_A#
A4 B6 PM_SLP_SUS# 6
V
V
ON/OFF
SYSON 7 SYSON# PU8
V
+1.5VP
SUSP#,SUSP 8
U35
V
11
+5VS
VGATE
U37
V
+3VS
B B
U38
V
+1.5VS
PU6
V
+1.8VS
SUSP#,SUSP
PU8
V
+0.75VSP
PU9 VCCPPWRGOOD PU7

V
V
+1.05VSP +VCCSAP
VR_ON 9 PU10
V
A +CPU_CORE A
+VGFX_CORE

Power sequence
5 4 3 2 1

Acer Ao756 q1vzc - La-8941pr10

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A B C D E

Model Name : Q1VZC

Q1VZC M/B Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

Intel BANK 0, 1, 2, 3 page 11,12

4 DC/DC Interface CKT. 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Voltage Rails Full ON HIGH HIGH HIGH HIGH ON ON ON ON

Security Classification Compal Secret Data Compal Electronics, Inc.

schematic-laptop.blogspot.com PEG_ICOMPI and RCOMPO signals should be

PCI EXPRESS -- GRAPHICS

<25 mohms <15> FDI_LSYNC0

PEG_TX#[14] J4 AV8062701147601 AV8062701147801 AV8062701048004

AE6 eDP_TX[2] PEG_TX[15]

SA00005L9B0 SA00005K5B0 CR(Ivy Bridge)

Security Classification Compal Secret Data Compal Electronics, Inc.

schematic-laptop.blogspot.com 0921 LVDS@->@ +1.05VS_VTT

CLK_CPU_DPLL# R4 2 LVDS@ 1 1K_0402_5%

CLK_CPU_DPLL R5 2 LVDS@ 1 1K_0402_5%

Checklist1.5 P.67 Graphis Disable Guide

2 DDR3 Compensation Signals 2

JTAG & BPM

0.1U_0402_16V4Z L59 XDP_TDO @ PAD T6

0_0402_5% U1 R15 R13 0_0402_5% K58 XDP_DBRESET# XDP_DBRESET# <15>

0.1U_0402_16V4Z C867@ XDP_DBRESET# R17 2 1 1K_0402_5%

U2 Debug port DG1.1-1.3 50~5K ohm

<15> SYS_PW ROK B 4 PM_SYS_PW RGD_BUF 1 2 PM_DRAM_PW RGD_R

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Friday, April 20, 2012 Sheet 5 of 45

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY B

Follow CRB1.0 +1.5V

1: (Default) PEG Train immediately following

0: PEG Wait for BIOS for training

Security Classification Compal Secret Data Compal Electronics, Inc.

C26 VCC[8] VCCIO[12] AL14 PD0.8

PEG IO AND DDR IO

Security Classification Compal Secret Data Compal Electronics, Inc.

PD0.8 AC61 VAXG[10] @ @ INTEL Recommend VDDQ

INTEL Recommend VCCPLL

+ C94 V17 VCCSA[12] D48 H_VCCSA_VID0

330U_D2_2V_Y V18 D49 H_VCCSA_VID1 1 0 0.775V X V

Place BOT OUT BGA C867@

4 INTEL Recommend VCCSA C100 C101 C102 C103 C104 4

Security Classification Compal Secret Data Compal Electronics, Inc.

AE8 AU1 F13 T52

DDR_A_DQS#6 169 170

DIMM_1 Standard H:4.0mm

1 133 134 1 1 R66

DDR_B_DQS6 171 172

RTCRST close RAM door J1

R79 1 2 330K_0402_5% PCH_INTVRMEN +3VS

+3VS PCH_RTCX1 A20 C38 LPC_AD0

<31> HDA_BITCLK_AUDIO SATA5RXN

33_0402_5% PAD T9 @ PCH_JTAG_TMS H7 Y11 +1.05VS_VTT

JTAG_TDO AB12 +1.05VS_VTT

PCH_SPI_CLK_1 2 R98 1 33_0402_5% PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2

12/7 Change symbol of U18 from SA00000XT00 to SA000041O00 PCH_SPI_CLK_2 1 2 1 2 C466

BJ34 PERN1 E12 SMB_ALERT#

Y37 BJ30 CLKIN_GND1# R133 1 2 10K_0402_5%

V45 K45 CLK_BUF_ICH_14M R139 1 2 10K_0402_5%

R140 @ C175 @ 22P_0402_50V8J

CLKOUT_PCIE7P F47 CLK_FLEX1 @ 3 1