Hardwired Control Unit

A Case-Study report Submitted for the requirement of

University of Mumbai

For the work done during Semester-VI

Computer Organization
& Architecture
(Electronics Engineering)
by

Pooja Shinde(17EE5517)
Rashmi Jadhav (17EE5524)
Aarti Kokate (17EE5509)

Department of Electronics Engineering

Ramrao Adik Institute of Technology,
Sector 7, Nerul, Navi Mumbai
(Affiliated to University of Mumbai)
April 2019
Abstract

To execute an instruction, the control unit of the CPU must generate the required
control signal in the proper sequence. There are two approaches used for generating
the control signals in proper sequence as Hardwired Control unit and Micro-
programmed control unit. The control hardware can be viewed as a state machine that
changes from one state to another in every clock cycle, depending on the contents of
the instruction register, the condition codes and the external inputs. The outputs of the
state machine are the control signals. The sequence of the operation carried out by
this machine is determined by the wiring of the logic elements and hence named as
“hardwired”. Control unit generates timing and control signals for the operations of the
computer. The control unit communicates with ALU and main memory. It also controls
the transmission between processor, memory and the various peripherals. It also
instructs the ALU which operation has to be performed on data. It is implemented with
the help of gates, flip flops, decoders etc. in the hardware. The inputs to control unit
are the instruction register, flags, timing signals etc. This organization can be very
complicated if we have to make the control unit large.

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List of Figures

1.1 Basic Opamp...................................................................................................... 2

1.2 Inverting Opamp ............................................................................................... 2
1.3 Non-Inverting Opamp ....................................................................................... 3

4.1 Input of Inverting opamp .................................................................................6

4.2 Output of Inverting opamp............................................................................... 6
4.3 Input to Non-Inverting opamp ......................................................................... 7
4.4 Output of Non-Invertingopamp ....................................................................... 7

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Contents

Abstract i

1 Introduction 1
1.1 Inverting OpAmp ............................................................................................... 2
1.2 Non-Inverting OpAmp ....................................................................................... 2

2 Circuit Diagram 4
2.1 Inverting Opamp................................................................................................ 4
2.2 Non-Inverting Opamp ....................................................................................... 4

3 Software Required 5
3.1 LTspice ................................................................................................................... 5

4 Results 6

5 Applications 8

6 Conclusion 9

Bibliography 10

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Abstract
Introduction

To execute an instruction, the control unit of the CPU must generate the required
control signal in the proper sequence. There are two approaches used for generating
the control signals in proper sequence as Hardwired Control unit and Micro-
programmed control unit. The control hardware can be viewed as a state machine that
changes from one state to another in every clock cycle, depending on the contents of
the instruction register, the condition codes and the external inputs. The outputs of the
state machine are the control signals. The sequence of the operation carried out by
this machine is determined by the wiring of the logic elements and hence named as
“hardwired”. Control unit generates timing and control signals for the operations of the
computer. The control unit communicates with ALU and main memory. It also controls
the transmission between processor, memory and the various peripherals. It also
instructs the ALU which operation has to be performed on data. It is implemented with
the help of gates, flip flops, decoders etc. in the hardware. The inputs to control unit
are the instruction register, flags, timing signals etc. This organization can be very
complicated if we have to make the control unit large.

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 Figure 1.1: Basic Opamp

opamps are used in two different configurations: inverting and non-inverting. With
the inverting configuration.

1.1 Inverting OpAmp

The input voltage is connected to the inverting input and the non-inverting input is
connected to ground. This causes gain, or the ratio of the output to input, to be negative,
which in turn causes the sine waves of the output and input to oscillate at an offset of
pi. The output voltage then appears to be an inversion of the input voltage. Also, for
this configuration, the feedback loop sends output voltage back through Rf into the
inverting input. Were Vin to rise, it would increase the voltage at the input directly as
well as decrease the output voltage. The output voltage would cause the feedback loop
to decrease the voltage at the inverting input returning the system to equilibrium

Figure 1.2: Inverting Opamp

1.2 Non-Inverting OpAmp

In the non-inverting configuration the voltage source is connected to the non-inverting
input, and the inverting input is connected to the output and to ground through resistors.

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This causes the gain to be positive. When we look at the sine waves of the output and
input verses time we can see that they oscillate with no offset and so the output does
not appear inverted. In this configuration, the feedback loop sends the output voltage
through Rf into the inverting input. Should Vin increase the output would also increase.
The feedback loop would then send the output voltage through Rf and into the non-
inverting terminal, which would decrease the output voltage, returning the circuit to
equilibrium.

Figure 1.3: Non-Inverting Op

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Block Diagram

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Explanation
The name - hardwired control unit originates from the fact that a part of the control unit
- the control signal generator, is hardwired. It means that the control signals that are
necessary for instruction execution control are generated by specially designed hardware
logical circuits, in which we can not modify the signal generation method without
physical change (redesign) of the circuit structure.

Basic data for control signal generation are contained in the operation code (op code) of
an instruction. The operation code is decoded in the instruction decoder. The instruction
decoder constitutes (in general) a set of many decoders that decode different fields of the
instruction op code. As a result, usually several output lines going out from the
instruction decoder obtain active signal values. These lines are connected to the inputs
of the matrix that generates control signals for executive units of the computer. This
matrix implements logical combinations of the decoded signals from the instruction op
code with the outputs from the matrix that generates signals representing consecutive
control unit states and with signals coming from the outside of the processor, e.g.
interrupt signals. The matrices are built in a similar way as programmable logical arrays
(see Lecture III).

Control signals for an instruction execution have to be generated not in a single time
point but during entire time interval that corresponds to the instruction execution cycle.
Following the structure of this cycle, the appropriate sequence of internal states is
organized in the control unit. A number of signals generated by the control signal
generator matrix is sent back to inputs of the next control state generator matrix. This
matrix combines these signals with the timing signals generated by the timing unit based
on the rectangular patterns usually supplied by the quartz generator. When a new
instruction arrives to the control unit, the control units is in the initial state of new
instruction fetching. Instruction decoding makes the control unit enter the first state
relating execution of the new instruction, which lasts as long as the timing signals and
other input signals as flags and state information of the computer, remain unchanged. A
change of any of the mentioned signals stimulates the change of the control unit state.
This causes that a new respective input is generated for the control signal generator
matrix. When an external signal appears, e.g. an interrupt, the control unit enters a next
control state that is the state concerned with the reaction to this external signal, e.g.
interrupt processing. The values of flags and state variables of the computer are used to
select appropriate states for the instruction execution cycle. The last states in the cycle
are control states that initiate fetching the next instruction of the program: sending the
program counter content to the main memory address buffer register and next, reading
the instruction word to the instruction register of the computer. When the current

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instruction is the stop instruction that ends program execution, the control unit enters
an operating system state, in which it waits for a next user directive.

The block diagrams of microprogrammed control units are shown in next two figures.
The basic difference between these unit structures and the structure of the hardwired
control unit is the existence of the control store (microprogram memory) that is
used for storing words containing encoded control signals necessary for instruction
execution. In microprogrammed control units, subsequent instruction words are fetched
into the instruction register in a usual way. However, the operation code of each
instruction is not directly decoded to enable immediate control signal generation but it
constitutes the initial address of a microprogram contained in the control store.

We will now discuss the functioning of the microprogrammed control unit with a single
level control unit (see the block diagram below).

The instruction op code from the instruction register is sent to the control store address
register. Based on this address, the first microinstruction of a microprogram
that interprets execution of this instruction is read to the microinstruction register.
This microinstruction contains in its operation part encoded control signals, usually as
several bit fields. The fields are decoded in a set microinstruction field decoders. Besides
the encode control signal fields, the microinstruction contains the address of the next
microinstruction of the given instruction microprogram and a control field used to
control activities of the microinstruction address generator. The last mentioned field
determines the addressing mode (addressing operation) to be applied to the address
embedded in the current microinstruction. In microinstructions with the conditional
addressing mode, this address is modified with the use of the processor condition flags
that represent the status of computations in the current program. The last
microinstruction in the microprogram of a given instruction is the microinstruction that
fetches the next instruction from the main memory to the instruction register.

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Hardwired Vs Microprogrammed

2.1 Non-Inverting Opamp

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Hardwired vs Microprogrammed

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Types Of Hardwired Control Unit

STATE TABLE METHOD

1) It is the most basic type of hardwired control unit.

2) Here the behavior of the control unit is represented in the form of a table called the
state table.
3) The rows represent the T-states and the columns indicate the instructions.
4) Each intersection indicates the control signal to be produced, in the
corresponding T-state of every instruction.
5) A circuit is then constructed based on every column of this table, for each instruction.

INSTRUCTIONS
T-STATES
I1 I2 … IN

T1 Z1,1 Z1,2 … Z1,N

T2 Z2,1 Z2,2 … Z2,N
… … … … …
TM ZM,1 ZM,2 … ZM,N

ADVANTAGE:
It is the simplest method and is ideally suited for very small instruction sets.

DRAWBACK:
As the number of instructions increase, the circuit becomes bigger and hence more
complicated.
As a tabular approach is used, instead of a logical approach (flowchart), there are
duplications of many circuit elements in various instructions.

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DELAY ELEMENT METHOD
1) Here the behavior of the control unit is represented in the form of a flowchart.
2) Each step in the flowchart represents a control signal to be produced.
3) Once all steps of a particular instruction, are performed, the complete instruction
gets executed.
4) Control signals perform Micro-Operations, which require one T-states each.
5) Hence between every two steps of the flowchart, there must be a delay element.
6) The delay must be exactly of one T-state. This delay is achieved by D Flip-Flops.
7) These D Flip-Flops are inserted between every two consecutive control
signals.

8) Of all D Flip-Flops only one will be active at a time. So the method is also called
“One Hot Method”.
9) In a multiple entry point, to combine two or more paths, we use an OR gate.

10) A decision box is replaced by a set of two complementing AND gates

ADVANTAGE:
As the method has a logical approach, it can reduce the circuit complexity.
This is done by re-utilizing common elements between various instructions.
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SEQUENCE COUNTER METHOD

1) This is the most popular form of hardwired control unit.

2) It follows the same logical approach of a flowchart, like the Delay element
method, but does not use all those unnecessary D Flip-Flops.
3) First a flowchart is made representing the behavior of a control unit.
4) It is then converted into a circuit using the same principle of AND & OR gates.
5) We need a delay of 1 T-state (one clock cycle) between every two consecutive
control signals.
6) That is achieved by the above circuit.
7) If there are “k” number of distinct steps producing control signals, we employ
a “mod k” and “k” output decoder.
8) The counter will start counting at the beginning of the instruction.
9) The “clock” input via an AND gate ensures each count will be generated after 1 T-
state.
10) The count is given to the decoder which triggers the generation of “k” control
signals, each after a delay of 1 T-state.
11) When the instruction ends, the counter is reset so that next time, it begins from
the first count.

ADVANTAGE:
Avoids the use of too many D Flip-Flops.

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Advantages

1. They operate at very high speeds making it crucial for real time and other applications
where time is a major factor. Hardwired control units don’t need separate control
memory for storage of control word for generation of control signals. They perform the
same task using logical circuitry which is also the reason they are so fast.
2. Hardwired control units are known to be more power efficient than their counterparts
making them an ideal choice for processors in mobile devices.
3. Hardwired control units are now widely employed in RISC processors which are
known for their speed, reduced instruction set and support for limited addressing modes

Disadvantages
1. Instruction set, the control logic is directly implemented.
2. Requires change in wiring if the design has to be controlled.
3. An occurrence of an error is more.
4. Complex decoding and sequencing logic.
5. It requires a more chip area, therefore, it is a costlier control unit.

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3.1 LTspice
LTspice is freeware computer software implementing a SPICE electronic circuit simulator,
produced by semiconductor manufacturer Linear Technology (LTC), now part of Analog
Devices.It is used in-house at Linear Technology for IC design, and the most widely
distributed and used SPICE program in the industry. LTspice is a high performance
SPICE simulator, schematic capture and waveform viewer with enhancements and models
for easing the simulation of switching regulators. Our enhancements to SPICE have made
simulating switching regulators extremely fast compared to normal SPICE simulators,
allowing the user to view waveforms for most switching regulators in just a few minutes.
Included in this download are LTspice , Macro Models for 80Linear Technology’s switching
regulators, over 200 op amp models, as well as resistors, transistors and MOSFET models.

LTspice Simulators are very powerful tools for circuit analysis.LT Spice IV differs
from other Spice simulators in that it was developed by and populated with Linear Tech-
nology devices. You can import external libraries to add a specific part using generic
Spice files easily if you need to make a specific simulation with parts you have specced in
advance.

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Chapter 4
Results

Figure 4.1: Input of Inverting opamp

Figure 4.2: Output of Inverting opamp

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Figure 4.3: Input of Non-Inverting opamp

Figure 4.4: Output of Non-Invertingopamp

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Chapter 5
Applications

• Operational amplifiers are popular building blocks in electronic circuits and they
find applications in most of the consumer and industrial electronic systems.

• Op-amps can be configured to work as different types of signal amplifiers like in-
verting, non-inverting, differential, summing, etc. as well as it is used to perform
mathematical operations like addition, subtraction, multiplication, division and also
differentiation and integration.

• Operational amplifiers can be used in construction of active filters, providing high-

pass, low-pass, band-pass, band-reject and delay functions.

• An operational amplifier can, if necessary, be forced to act as a comparator. The

smallest difference between the input voltages will be amplified considerably.

• Op-amps are used in the construction of oscillators, like an Wein bridge oscillator.
Op-amps are also used in non-linear circuits such as logarithmic and anti-logarithmic
amplifiers.

• Op-amps find applications as Voltage sources, Current sources, and Current sinks
and also as DC, AC Voltmeters. Op-amps are also used in signal processing circuits
such as Precision Rectifiers, Clamping circuits and Sample-and-Hold circuits.

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Chapter 4
Conclusion
1) Since they are based on hardware, as the instruction set increases, the circuit
becomes more and more complex. For modern processors having hundreds
of instructions, it is virtually impossible to create Hardwired Control Units.
2) Such large circuits are very difficult to debug.
3) As the processor gets upgraded, the entire Control Unit has to be
redesigned, due to the rigid nature of hardware design.

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Bibliography

[1] https://www.tutorialspoint.com/computer_organization/hardwired_control_circ
uit_design.asp

[2] https://www.includehelp.com/cso/control-unit.aspx

[3] https://www.studytonight.com/computer-architecture/design-of-control-unit

[4] https://www.cs.helsinki.fi/u/kerola/tikra/s2003/luennot/ch16_v.pdf

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