FQD8P10 / FQU8P10 — P-Channel QFET® MOSFET

November 2013

FQD8P10 / FQU8P10
P-Channel QFET® MOSFET
-100 V, -6.6 A, 530 mΩ

Description Features
This P-Channel enhancement mode power MOSFET is • -6.6 A, -100 V, RDS(on) = 530 mΩ (Max) @ VGS = -10 V,
produced using Fairchild Semiconductor’s proprietary ID = -3.3 A
planar stripe and DMOS technology. This advanced
• Low Gate Charge (Typ. 12 nC)
MOSFET technology has been especially tailored to
reduce on-state resistance, and to provide superior • Low Crss (Typ. 30 pF)
switching performance and high avalanche energy
strength. These devices are suitable for switched mode • 100% Avalanche Tested
power supplies, audio amplifier, DC motor control, and
variable switching power applications.

D
G
G
S D-PAK I-PAK
G
D
S

Absolute Maximum Ratings T C

o
= 25 C unless otherwise noted.

Symbol Parameter FQD8P10TM / FQU8P10TU Unit

VDSS Drain-Source Voltage -100 V
ID Drain Current - Continuous (TC = 25°C) -6.6 A
- Continuous (TC = 100°C) -4.2 A
IDM Drain Current - Pulsed (Note 1) -26.4 A
VGSS Gate-Source Voltage  30 V
EAS Single Pulsed Avalanche Energy (Note 2) 150 mJ
IAR Avalanche Current (Note 1) -6.6 A
EAR Repetitive Avalanche Energy (Note 1) 4.4 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) -6.0 V/ns
PD Power Dissipation (TA = 25°C) * 2.5 W
Power Dissipation (TC = 25°C) 44 W
- Derate above 25°C 0.35 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
Maximum lead temperature for soldering purposes,
TL 300 °C
1/8" from case for 5 seconds

Thermal Characteristics
Symbol Parameter FQD8P10TM Unit
FQU8P10TU
RJC Thermal Resistance, Junction to Case, Max. 2.84
oC/W
Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max. 110
RJA 2
Thermal Resistance, Junction to Ambient (*1 in Pad of 2-oz Copper), Max. 50

©2010 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com

FQD8P10 / FQU8P10 Rev. C2
 FQD8P10 / FQU8P10 — P-Channel QFET® MOSFET
Package Marking and Ordering Information
Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity
FQD8P10TM FQD8P10 D-PAK Tape and Reel 330 mm 16 mm 2500 units
FQU8P10TU FQU8P10 I-PAK Tube N/A N/A 70 units

Electrical Characteristics T C
o
= 25 C unless otherwise noted.

Symbol Parameter Test Conditions Min Typ Max Unit


Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 A -100 -- -- V
BVDSS Breakdown Voltage Temperature
ID = -250 A, Referenced to 25°C -- -0.1 -- V/°C
/ TJ Coefficient
IDSS VDS = -100 V, VGS = 0 V -- -- -1 A
Zero Gate Voltage Drain Current
VDS = -80 V, TC = 125°C -- -- -10 A
IGSSF Gate-Body Leakage Current, Forward VGS = -30 V, VDS = 0 V -- -- -100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = 30 V, VDS = 0 V -- -- 100 nA

On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 A -2.0 -- -4.0 V
RDS(on) Static Drain-Source
VGS = -10 V, ID = -3.3 A -- 0.41 0.53 
On-Resistance
gFS Forward Transconductance VDS = -40 V, ID = -3.3 A -- 4.1 -- S

Dynamic Characteristics
Ciss Input Capacitance VDS = -25 V, VGS = 0 V, -- 360 470 pF
Coss Output Capacitance f = 1.0 MHz -- 120 155 pF
Crss Reverse Transfer Capacitance -- 30 40 pF

Switching Characteristics
td(on) Turn-On Delay Time -- 11 30 ns
VDD = -50 V, ID = -8.0 A,
tr Turn-On Rise Time -- 110 230 ns
RG = 25 
td(off) Turn-Off Delay Time -- 20 50 ns
(Note 4)
tf Turn-Off Fall Time -- 35 80 ns
Qg Total Gate Charge VDS = -80 V, ID = -8.0 A, -- 12 15 nC
Qgs Gate-Source Charge VGS = -10 V -- 3.0 -- nC
Qgd Gate-Drain Charge (Note 4) -- 6.4 -- nC

Drain-Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain-Source Diode Forward Current -- -- -6.6 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- -26.4 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -6.6 A -- -- -4.0 V
trr Reverse Recovery Time VGS = 0 V, IS = -8.0 A, -- 98 -- ns
Qrr Reverse Recovery Charge dIF / dt = 100 A/s -- 0.35 -- C


1. Repetitive rating : pulse-width limited by maximum junction temperature.
2. L = 5.2 mH, IAS = -6.6 A, VDD = -25 V, RG = 25 Ω, starting TJ = 25oC.
3. ISD ≤ -8.0 A, di/dt ≤ 300 A/μs, VDD ≤ BVDSS, starting TJ = 25oC.
4. Essentially independent of operating temperature.

©2010 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com

FQD8P10 / FQU8P10 Rev. C2
 FQD8P10 / FQU8P10 — P-Channel QFET® MOSFET
 !   

VGS
Top : -15.0 V
1
10 -10.0 V
1
-8.0 V 10
-7.0 V
-6.5 V

-ID , Drain Current [A]

-ID, Drain Current [A]

-5.5 V
-5.0 V
0
10 Bottom : -4.5 V
150℃

0
10
25℃
-1
10
-55℃
※ Notes : ※ Notes :
1. 250μ s Pulse Test 1. VDS = -40V
2. TC = 25℃ 2. 250μ s Pulse Test
-2 -1
10 10
10
-1
10
0
10
1 2 4 6 8 10

-VDS, Drain-Source Voltage [V] -VGS , Gate-Source Voltage [V]

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

1.5
Drain-Source On-Resistance

-IDR , Reverse Drain Current [A]

1.2 VGS = - 10V 10
RDS(on) [],

0.9 VGS = - 20V

0
0.6 10

150℃ 25℃
0.3 ※ Notes :
1. VGS = 0V
※ Note : TJ = 25℃
2. 250μ s Pulse Test

0.0 -1
10
0 5 10 15 20 25 0.0 0.5 1.0 1.5 2.0 2.5 3.0
-ID , Drain Current [A] -VSD , Source-Drain Voltage [V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation vs. Source Current
and Temperature

900 12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
800
Coss Crss = Cgd VDS = -20V
10
-VGS, Gate-Source Voltage [V]

700 Ciss VDS = -50V

VDS = -80V
600 8
Capacitance [pF]

※ Notes :
1. VGS = 0 V
500 2. f = 1 MHz
6
400
Crss
300 4

200
2
100 ※ Note : ID = -8.0 A

0 0
10
-1
10
0
10
1 0 2 4 6 8 10 12 14

-VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

©2010 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com

FQD8P10 / FQU8P10 Rev. C2
 FQD8P10 / FQU8P10 — P-Channel QFET® MOSFET
 !   



  

1.2 3.0
Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
-BVDSS, (Normalized)

1.1

RDS(ON), (Normalized)
2.0

1.0 1.5

1.0

0.9 ※ Notes :
1. VGS = 0 V ※ Notes :
2. ID = -250 μA 0.5 1. VGS = -10 V
2. ID = -3.3 A

0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

vs. Temperature vs. Temperature

2 7
10
Operation in This Area
is Limited by R DS(on) 6

100 s
-ID, Drain Current [A]

5
-ID, Drain Current [A]

1
10 1 ms
4
10 ms
DC
3

0
10
2
※ Notes :
o
1. TC = 25 C
o 1
2. TJ = 150 C
3. Single Pulse
-1
10 0
10
0 1
10 10
2 25 50 75 100 125 150

-VDS, Drain-Source Voltage [V] TC, Case Temperature [℃]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
ZJC(t), Thermal Response [oC/W]

D = 0 .5
0
10
※ N o te s :
0 .2 1 . Z θ J C ( t) = 2 .8 4 ℃ /W M a x .
2 . D u t y F a c to r , D = t 1 / t 2
3 . T J M - T C = P D M * Z θ J C ( t)
0 .1

0 .0 5

-1 0 .0 2 PDM
10
0 .0 1 t1
s in g le p u ls e
t2

-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10

t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]

Figure 11. Transient Thermal Response Curve

©2010 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com

FQD8P10 / FQU8P10 Rev. C2
 FQD8P10 / FQU8P10 — P-Channel QFET® MOSFET
VGS
Same
Same T
Tyype
50KΩ
50K Ω
as DUT
DUT Qg
12V 200nF
200nF
300nF
300nF

VDS
VGS Qgs Qgd

DUT
DUT
IG = const.

Charg
Charge
e

Figure 12. Gate Charge Test Circuit & Waveform

RL
VDS t on t of
offf

td(on tr td(of
VGS VDD d( on)) d( offf) tf

RG VGS
10
10%
%

VGS DUT

90%
VDS

Figure 13. Resistive Switching Test Circuit & Waveforms

L BVDS
1 DSSS
VDS EAS = ---- L IAS2 -------
-----------
--------
---------
-----
2 BVDSDSSS - VDD

tp Tim
Time
ID

RG VDD VDS (t)

VDD
ID (t
(t))
VGS DUT
DUT
IAS
tp BVDSS

Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms

©2010 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com

FQD8P10 / FQU8P10 Rev. C2
 FQD8P10 / FQU8P10 — P-Channel QFET® MOSFET
+

VDS

DUT _

I SD
L

Driver
Driv er
RG
Compliment of DUT
Comp
(N-C
(N-Channel
hannel)) VDD

VGS • dv/dt contntrrolled by RG

• ISD con
onttrol
ollled by pu
pullse pe
perriod

Gate Pul se W idth

uls
VGS D = --------------------------
Gate
Ga te Pu
Pullse Per
Period 10
10VV
( Driv
Driver
er )

Body
Bo dy Diod
odee Reverse Curren
entt
I SD
( DUT ) IRM

di//dt
di

IFM , Bo
Body
dy Diod
odee For
orw
ward Curren
entt
VDS VSD
( DUT )

Body
Bo dy Diode VDD
For
Forw
ward Vol
olttag
agee Drop
Drop

Body
Bo dy Di
Diod
odee Recov
coveery dv
dv/d
/dtt

Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

©2010 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com

FQD8P10 / FQU8P10 Rev. C2
 FQD8P10 / FQU8P10 — P-Channel QFET® MOSFET
Mechanical Dimensions

Figure 16. TO252 (D-PAK), Molded, 3-Lead, Option AA&AB

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT252-003

©2010 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com

FQD8P10 / FQU8P10 Rev. C2
 FQD8P10 / FQU8P10 — P-Channel QFET® MOSFET
Mechanical Dimensions

Figure 17. TO251 (I-PAK), Molded, 3-Lead

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TO251-003

©2010 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com

FQD8P10 / FQU8P10 Rev. C2
 FQD8P10 / FQU8P10 — P-Channel QFET® MOSFET
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Definition of Terms
Datasheet Identification
Advance Information
Product Status Definition
Datasheet contains the design specifications for product development. Specifications
Formative / In Design
may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later

Preliminary First Production date. Fairchild Semiconductor reserves the right to make changes at any time without
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Datasheet contains final specifications. Fairchild Semiconductor reserves the right to

No Identification Needed Full Production
make changes at any time without notice to improve the design.

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Obsolete Not In Production
Semiconductor. The datasheet is for reference information only.
Rev. I66

©2010 Fairchild Semiconductor Corporation 9 www.fairchildsemi.com

FQD8P10 / FQU8P10 Rev. C2
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