Linear Regulators: Fundamentals and Compensation

Vahe Caliskan, Sc.D.

Senior Technical Expert

Motorola Automotive
Government & Enterprise Mobility Solutions

February 15, 2012

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 1 / 32

1 Introduction

2 Review of Linear Regulator Topologies

3 Transfer Functions

4 Poles & Zeros

5 Bode Magnitude & Phase Plots

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 2 / 32

Outline

1 Introduction

2 Review of Linear Regulator Topologies

3 Transfer Functions

4 Poles & Zeros

5 Bode Magnitude & Phase Plots

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 3 / 32

Introduction to Seminar Series

Goals of the Seminar Series

Provide an overview of power conversion techniques
Power supplies are common subsystems in most of our products
Present follow-up seminars in related areas
→ switching regulator topologies/compensation, simulation
Offer refresher seminars in fundamental areas
→ mathematical modeling, circuit analysis, control design

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 4 / 32

Previous Seminars

Overview of Linear and Switching Power Supplies

Two seminars were held on September 15 and October 17, 2005
a total of 83 people attended these seminars
Follow-up seminars in linear and switching regulators were requested

http://compass.mot.com/go/powerconversion

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 5 / 32

Outline

1 Introduction

2 Review of Linear Regulator Topologies

3 Transfer Functions

4 Poles & Zeros

5 Bode Magnitude & Phase Plots

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 6 / 32

Linear Regulator Basics

Three-terminal devices – input, output, common (ground)

Linear regulators may be classified by their series (pass) transistor
− Series element may consist of bipolar of field-effect transistors
Bipolar outputs → Darlington NPN, PNP, NPN-PNP
Majority of regulators use bipolars (FET-based regulators $)
Series transistor structure determines Vdropout , Ibias , Iq , Pdiss
Frequency compensation and protection circuity also important

Vdropout minimum input-output voltage difference to stay in regulation

Ibias bias current for the pass transistor
Iq regulator quiescent current of which Ibias is one component
Pdiss regulator power dissipation

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 7 / 32

Linear Regulator – Typical Usage

TPS76433

Vin IN OUT Vout

4.7µF
1µF
EN BYPASS
ESR
GND 0.01µF

TPS76433 – 3.3V, 150mA, PMOS LDO linear regulator

Low output voltage noise (50µV), Low power (Iq = 140µA)
0.01µF bypass capacitor filters reference voltage
Capacitor ESR important for stability (not too high, not too low)
Current limit (1A), thermal protection (165◦ C shutdown)

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 8 / 32

NPN Regulator

NPN Regulator Characteristics

NPN Darlington pass
Vin Iload Vout
PNP driver
R1
Used in 78xx series
Error Amp Ibias ≈ Iload /β 3
−
Smallest chip area
+ R2
Small comp. capacitor
Ibias Vref +
−
GND Least expensive
Vdo = 2VBE +Vsat ≈ 2.0V
No reverse battery
protection

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 9 / 32

PNP Low Dropout (LDO) Regulator

PNP (LDO) Regulator Characteristics

PNP pass
Vin Iload Vout
NPN or EA direct drive
R1
Vdo = Vsat ≈ 600mV
Error Amp Inherent reverse battery
− protection
+ R2 Ibias ≈ Iload /βpnp
+
Ibias Vref − Large chip area
GND
Large comp. capacitor
More expensive

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 10 / 32

Composite (Quasi-LDO) Regulator

Composite Regulator Characteristics

NPN pass
Vin Iload Vout
PNP driver
R1
Vdo = VBE + Vsat ≈ 1.3V
Error Amp Ibias ≈ Iload /β 2
−
Compromise between
+ R2 NPN and PNP
+
Ibias Vref − Larger chip area than
GND
NPN
Large comp. capacitor
No reverse battery
protection

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 11 / 32

PMOS LDO Regulator

PMOS Regulator Characteristics

PMOS pass
Vin Iload Vout
NPN driver
R1
Very low Vdo (≈ 50mV)
Error Amp Vdo controlled by Rds,on
+
Very low Ibias
− R2
Can’t enhance FET for
+
Ibias Vref − Vin < 3V
GND

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 12 / 32

NMOS LDO Regulator

NMOS Regulator Characteristics

NMOS pass
Vin Iload Vout
Direct drive
R1
Very low Vdo
Vbias
Lower Rds,on than PMOS
−
Lower output impedance
Error Amp + R2
Smaller external caps
+
Vref −
GND Needs Vbias > Vout to
enhance FET

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 13 / 32

Summary of Linear Regulator Advantages/Disadvantages
Topology Advantages
NPN smallest die size
fastest transient response
smallest comp. capacitor
PNP LDO low dropout voltage
rev. battery protection
NPN/PNP moderate dropout voltage
lower Iq than PNP
PMOS LDO very low Vdo and Ibias
Vdo ∝ Rds,on
NMOS LDO very low Vdo , low Rout
lower Rds,on than PMOS
smaller external capacitors
Vahe Caliskan, Sc.D. (g17823) Linear Regulators
Disadvantages
large dropout voltage
no rev. batt. protection
high quiescent current
large comp. capacitor
large die size
large comp. capacitor
no rev. battery protection
need Vin > 3V
need Vbias > Vout
February 15, 2012 14 / 32
Outline

1 Introduction

2 Review of Linear Regulator Topologies

3 Transfer Functions

4 Poles & Zeros

5 Bode Magnitude & Phase Plots

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 15 / 32

Transfer Function Fundamentals

response
Transfer function is a ratio of response to excitation ( excitation )
Use of ( output
input ) for TFs is vague (E and R can be at same port)
Expressed in frequency domain using Laplace or Fourier Transforms

R 1
Voltage Gain (V/V), ωc = RC = corner frequency
+
vin +
− C vout vout (s) 1
1 1
− A(s) = = sC 1 = =
vin (s) R + sC 1 + sRC 1 + ωsc

R Input Impedance (Ω)

s
+ vin (s) 1 1 + sRC 1+
iin vin C Zin (s) = = R+ =R = R s ωc
− iin (s) sC sRC ωc

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 16 / 32

Poles & Zeros

num(s)
Transfer function is a ratio of two polynomials A(s) = den(s)
Poles are values of s that make den(s) = 0
Also called roots or natural frequencies
Response to initial conditions, independent of applied excitation
Determine stability
Zeros are values of s that make num(s) = 0
Also called transmission zeros
No impact on stability
Determine undershoot, transient response (with poles)
Evaluate TF by letting s = jω and take complex magnitude and phase
 
1 1 ω
A(jω) = ω = r ∠ − tan −1
1 + j ωc   2 ωc
1 + ωωc | {z }
phase
| {z }
magnitude

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 17 / 32

Bode Plots & Stability

Loop gain T (s) is the product of forward and feedback gains

Closed-loop system can be unstable even if T (s), G (s) have no RHP poles
Undesired ringing and overshoot can occur even in stable systems
Crossover frequency ωc is where kT (jωc )k = 1 ⇒ 0dB
Phase margin φm = 180◦ + ∠T (jωc )
If φm > 0◦ ⇒ feedback system stable (no RHP poles)
Small φm ⇒ high-Q resonant poles near ωc ⇒ overshoot & ringing
We normally need φm ≥ 45◦ in practical feedback systems
If φm < 0◦ ⇒ feedback system unstable (at least one RHP pole)

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 18 / 32

Outline

1 Introduction

2 Review of Linear Regulator Topologies

3 Transfer Functions

4 Poles & Zeros

5 Bode Magnitude & Phase Plots

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 19 / 32

1st Order Poles and Zeros

1 1st Order Zero 1 + s/ωc

1st Order Pole 1+s/ωc

40dB
0dB
+20dB/dec
3dB −20dB/dec 20dB
−20dB 3dB
0dB ω
−40dB 0.1ωc ωc 10ωc
ω
0.1ωc ωc 10ωc
90◦
0◦ ω
5.7◦
5.7◦ 45◦ +45◦/dec
−45◦ −45◦/dec ◦
5.7

−90◦ 0◦ ω
5.7◦ 0.1ωc ωc 10ωc

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 20 / 32

Outline

1 Introduction

2 Review of Linear Regulator Topologies

3 Transfer Functions

4 Poles & Zeros

5 Bode Magnitude & Phase Plots

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 21 / 32

 Bode Plot (magnitude & phase)
100

80

60
Magnitude (dB)

40
-20dB/dec
20

-20

-40

-60
180
135
90
Phase (deg)

45
0
-45
-90
-135
-180
-225-1
10 10 0 10 1 10 2 10 3 10 4 10 5
Frequency (rad/sec)

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 22 / 32

 LDO System (3.3V/100mA)

TPS76433
Vout

Iload
R1
0.64R
Co
Error Amp 10µF
+ + Cb RL
Vin −
0.5µF
− RC
R2 2Ω
Vref + 0.36R
−
1.192V

R1 0.64R
Vout = (1 + R2 )Vref = (1 + 0.36R ) 1.192V = 3.31V
RL = Vout /Iload = 3.3V/100mA = 33Ω

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 23 / 32

 LDO System Model

S rds D Vout

vgs Cgs R1
gm vgs 0.64R
Co
G Error Amp
+
10µF
Vin −
+ Cb RL
0.5µF 33Ω
− RC
Roa R2 2Ω
Vref +− 0.36R
1.192V

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 24 / 32

 LDO System Model Simple
1 1
rds Zo (s) ≈ (Rc + sCo )k sCb kRL vout
D

Gpmos vgs = − R1
+
(gm rds )vgs 0.64R
Co
S 10µF
Cb RL
Roa vs
0.5µF 33Ω
G Rc
R2 2Ω
Cgs + G v 0.36R
vgs − ea s

S
z }| {
Gea (vs − Vref )
|{z}
→0

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 25 / 32

LDO System Loop Gain

Goa (s) −Gpmos G (s)

EA – PMOS
Frequency Response
PMOS Voltage Gain Load & Filter
vgs vout
1 Zo (s)
1+sRoa Cgs −gm rds rds +Zo (s)

Gfb
+ vs R2
Gea R1 +R2

Error Amp Gain − Feedback Divider

Vref = 0

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 26 / 32

LDO System Loop Gain (redrawn)

Goa (s) Gpmos G (s)

EA – PMOS
Error Amp Gain PMOS Voltage Gain Load & Filter
Frequency Response

+ vgs vout
1 Zo (s)
Gea 1+sRoa Cgs gm rds rds +Zo (s)
Vref = 0
−
vs T (s)

R2
R1 +R2

Gfb
Feedback Divider

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 27 / 32

Loop Gain Calculation

1 + s/ωz RL
G (s) ≈ G0 with G0 =
(1 + s/ωo )(1 + s/ωb ) rds + RL
1 + s/ωz
T (s) ≈ Gpmos G0 Gfb Gea
(1 + s/ωo )(1 + s/ωb )(1 + s/ωoa )

T0 = Gpmos G0 Gfb Gea ⇒ Low-frequency loop gain

ωo ≈ 1/[Co (Rc + rds kRL )] ⇒ Load pole
ωoa = 1/[Roa Cgs ] ⇒ Pole due to opamp-PMOS interaction
ωb ≈ 1/[Cb Rc (rds kRL )/(Rc + (rds kRL ))] ⇒ Pole due to bypass cap
ωz = 1/[Rc Co ] ⇒ Zero due to ESR

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 28 / 32

Parameters, Gains, Pole/Zero Locations

Vout 3.3V Iload 100mA

RL 33Ω Roa 300kΩ
Rc 2Ω Co 10µF
gm 123mA/V Cb 0.5µF
rds 65Ω Cgs 200pF
R1 64kΩ R2 36kΩ

Gpmos gm rds 8 ⇒ 18.1dB

Gfb R1 /(R1 + R2 ) 0.36 ⇒ −8.9dB
Go RL /(rds + RL ) 0.337 ⇒ −9.45dB
Gea N/A 56.2 ⇒ 35dB
T0 Gpmos G0 Gfb Gea 54.5 ⇒ 34.7dB
ωo 1/[Co (Rc + rds kRL )] 4.2krad/s ⇒ 667Hz
ωoa 1/[Roa Cgs ] 16.7krad/s ⇒ 2.65kHz
ωb 1/[Cb Rc k(rds kRL )] 1.1Mrad/s ⇒ 172kHz
ωz 1/[Rc Co ] 50krad/s ⇒ 8kHz

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 29 / 32

Conclusion

item 1
item 2
item 3
item 4
item 5

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 30 / 32

References

Everett Rogers, “Stability Analysis of low-dropout linear regulators with a PMOS pass element”
Texas Instruments Analog Applications Journal, Dallas, TX, August 1999.

Bang S. Lee, “Understanding the stable range of equivalent series resistance of an LDO regulator”
Texas Instruments Analog Applications Journal, Dallas, TX, November 1999.

Chester Simpson, “Linear Regulators: Theory of Operation and Compensation”

National Semiconductor Application Note AN–1188, Santa Clara, CA, May 2000.

Kieran O’Malley, “Compensation for Linear Regulators”

ON Semiconductor Application Note SR0003AN/D, Phoenix, AZ, April 2001.

Kieran O’Malley, “Linear Regulator Output Structures”

ON Semiconductor Application Note SR0004AN/D, Phoenix, AZ, April 2001.

Todd Schiff, “Stability in High Speed Linear LDO Regulators”

ON Semiconductor Application Note AND8037/D, Phoenix, AZ, October 2000.

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 31 / 32

Sources of information on the web

http://www.analog.com —– Analog Devices

http://www.infineon.com – Infineon Technologies
http://www.linear.com —– Linear Technology
http://www.maxim-ic.com – Maxim
http://www.national.com – National Semiconductor
http://www.onsemi.com —– ON Semiconductor
http://www.ti.com ———– Texas Instruments

Vahe Caliskan, Sc.D. (g17823) Linear Regulators February 15, 2012 32 / 32