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COURSE HAND-OUT

B.TECH. - SEMESTER III

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING


Semester III, Course Hand-Out

RAJAGIRI SCHOOL OF ENGINEERING AND TECHNOLOGY (RSET)

VISION

TO EVOLVE INTO A PREMIER TECHNOLOGICAL AND RESEARCH INSTITUTION,


MOULDING EMINENT PROFESSIONALS WITH CREATIVE MINDS, INNOVATIVE
IDEAS AND SOUND PRACTICAL SKILL, AND TO SHAPE A FUTURE WHERE
TECHNOLOGY WORKS FOR THE ENRICHMENT OF MANKIND

MISSION

TO IMPART STATE-OF-THE-ART KNOWLEDGE TO INDIVIDUALS IN VARIOUS


TECHNOLOGICAL DISCIPLINES AND TO INCULCATE IN THEM A HIGH DEGREE
OF SOCIAL CONSCIOUSNESS AND HUMAN VALUES, THEREBY ENABLING
THEM TO FACE THE CHALLENGES OF LIFE WITH COURAGE AND CONVICTION

Department of EC, RSET 2


Semester III, Course Hand-Out

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING


(EC), RSET

VISION

TO EVOLVE INTO A CENTRE OF EXCELLENCE IN ELECTRONICS AND


COMMUNICATION ENGINEERING, MOULDING PROFESSIONALS HAVING
INQUISITIVE, INNOVATIVE AND CREATIVE MINDS WITH SOUND PRACTICAL
SKILLS WHO CAN STRIVE FOR THE BETTERMENT OF MANKIND

MISSION

TO IMPART STATE-OF-THE-ART KNOWLEDGE TO STUDENTS IN ELECTRONICS


AND COMMUNICATION ENGINEERING AND TO INCULCATE IN THEM A HIGH
DEGREE OF SOCIAL CONSCIOUSNESS AND A SENSE OF HUMAN VALUES,
THEREBY ENABLING THEM TO FACE CHALLENGES WITH COURAGE AND
CONVICTION

Department of EC, RSET 3


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B.TECH PROGRAMME

PROGRAMME EDUCATIONAL OBJECTIVES (PEOs)

1. Graduates shall have sound knowledge of the fundamental and advanced concepts of
electronics and communication engineering to analyze, design, develop and
implement electronic systems or equipment.
2. Graduates shall apply their knowledge and skills in industrial, academic or research
career with creativity, commitment and social consciousness.
3. Graduates shall work in a team as a member or leader and adapt to the changes taking
place in their field through sustained learning.

PROGRAMME OUTCOMES (POs)

Graduates will be able to

1. Engineering knowledge: Apply the knowledge of mathematics, science, Engineering


fundamentals, and Electronics and Communication Engineering to the solution of
complex Engineering problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze
complex Engineering problems reaching substantiated conclusions using first
principles of mathematics, natural sciences, and Engineering sciences.
3. Design/development of solutions: Design solutions for complex Engineering
problems and design system components or processes that meet the specified needs
with appropriate consideration for the public health and safety, and the cultural,
societal, and environmental considerations.
4. Conduct investigations of complex problems: Use research based knowledge and
research methods including design of experiments, analysis and interpretation of data,
and synthesis of the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and
modern engineering and IT tools including prediction and modeling to complex
Engineering activities with an understanding of the limitations.
6. The Engineer and society: Apply reasoning informed by the contextual knowledge
to assess societal, health, safety, legal and cultural issues and the consequent
responsibilities relevant to the professional Engineering practice.
7. Environment and sustainability: Understand the impact of the professional
Engineering solutions in societal and environmental contexts, and demonstrate the
knowledge of, and the need for sustainable developments.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities
and norms of the Engineering practice.

Department of EC, RSET 4


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9. Individual and team work: Function effectively as an individual,and as a member or


leader in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex Engineering activities with
the Engineering Community and with society at large, such as, being able to
comprehend and write effective reports and design documentation, make effective
presentations, and give and receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
Engineering and management principles and apply these to one‟s own work, as a
member and leader in a team, to manage projects and in multi disciplinary
environments.
12. Life -long learning: Recognize the need for, and have the preparation and ability to
engage in independent and life- long learning in the broadest context of technological
change.

Programme-Specific Outcomes (PSOs)

Engineering graduates will be able to:

1. demonstrate their skills in designing, implementing and testing analogue and digital
electronic circuits, including microprocessor systems, for signal processing,
communication, networking, VLSI and embedded systems applications;

2. apply their knowledge and skills to conduct experiments and develop applications
using electronic design automation (EDA)tools;

3. demonstrate a sense of professional ethics, recognize the importance of continued


learning, and be able to carry out their professional and entrepreneurial
responsibilities in electronics engineering field giving due consideration to
environment protection and sustainability.

Department of EC, RSET 5


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INDEX

1. Semester Plan 7
2. Scheme 8
3. Linear Algebra & Complex Analysis 9
3.1. Course Information Sheet 10
3.2. Course Plan 17
3.3. Sample Questions 18
4. Network Theory 28
4.1. Course Information Sheet 29
4.2. Course Plan 34
4.3. Sample Questions 37
5. Solid State Devices 49
5.1. Course Information Sheet 50
5.2. Course Plan 58
5.3. Sample Questions 61
6. Electronic Circuits 64
6.1. Course Information Sheet 65
6.2. Course Plan 72
6.3. Sample Questions 75
7. Logic Circuit Design 90
7.1. Course Information Sheet 91
7.2. Course Plan 99
7.3. Sample Questions 101
8. Electronic Devices & Circuits Lab 106
10.1. Course Information Sheet 107
10.2. Course Plan 113
10.3. Sample Questions 114
9. Electronic Design Automation Lab 118
11.1. Course Information Sheet 119
11.2. Course Plan 124
11.3. Sample Questions 125

Department of EC, RSET 6


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1.SEMESTER PLAN

2018 S3 SemesterPlan - KTU

Department of EC, RSET 7


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3. SCHEME: B.TECH 3 RD SEMESTER


(Electronics & Communication Engineering)

Course Course Name L-T-P Credits Exam


Code Slot
MA201 Linear Algebra & Complex Analysis 3-1-0 4 A

EC201 Network Theory 3-1-0 4 B


EC203 Solid State Devices 3-1-0 4 C
EC205 Electronic Circuits 3-1-0 4 D
EC207 Logic Circuit Design 3-0-0 3 E
HS200/ Business Economics/Life Skills 3-0-0/ 3 F
HS210 2-0-2
EC231 Electronic Devices & Circuits Lab 0-0-3 1 S
EC223 Electronic Design Automation Lab 0-0-3 1 T

Total Credits = 24 Hours: 28/29


Cumulative Credits= 71

Department of EC, RSET 8


Semester III, Course Hand-Out

MA 201

LINEAR ALGEBRA & COMPLEX ANALYSIS

Department of EC, RSET 9


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4.1 COURSE INFORMATION SHEET-LINEAR ALGEBRA&COMPLEX ANALYSIS

PROGRAMME: ENGINEERING DEGREE: BTECH


COURSE: LINEAR SEMESTER: 3 CREDITS: 4
ALGEBRA&COMPLEX
ANALYSIS
COURSE CODE: MA201 COURSE TYPE: CORE /ELECTIVE /
REGULATION: BREADTH/ S&H
COURSE AREA/DOMAIN: CONTACT HOURS: 3+1 (Tutorial)
hours/Week.
CORRESPONDING LAB COURSE CODE LAB COURSE NAME:
:

SYLLABUS:
UNIT DETAILS HOURS
I Complex Differentiation 9
Limit, continuity and derivative of complex functions
Analytic functions,Cauchy –Riemann
equation,Laplacesequation,Harmonic functions
Harmonic conjugate

II Conformal Mapping 10

Geometry of Analytic functions,conformalmapping,Mapping


w=z^2,conformality of w=e^z
The mapping w=z+1/z Properties of w=1/z
Circles and straight lines,extended complex plane,fixed points
Special linear fractional transformation,cross ratio, cross ratio property-mapping
of disks and half planes
Conformal mapping by w=sinz,w=cosz
III Complex Integration 10
Definition of Complex Line integrals,first evaluation method,second
evaluation method ,cauchys integral theorem,Independencce of path,
cauchys integral theorem for multy connected domains, cauchys
integral formula-Derivatives of analytic finctions,application of
Derivatives of analytic finctions,Taylor and Maclaurin series
Power series as Taylor series,laurents series

IV 9
Residue theorem
Singlarities,Zeros,Poles,Essential
singularity,Zeros of an analytic
functions,Residue integration
method,formulas,several

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singularities inside the contour


residue theorem,Evalution of
real integral
V Linear system of equations 9

Linear system of equations,Coefficientmatrix,Augmentedmatrix,Gauss


Elimination and back substitution,Elementary row operations,Row
equivalent systems,Gauss elimination –three possible cases,Row echelon
form and information from it,Linear independence –rank of a
matrix,vectorSpaceDimension-basis,Vector space R^3,Solution of linear
systems,Fundamental theorem of non homogeneous linear systems,
homogeneous linear systems
VI Matrix Eigen value Problem 9

Determination of Eigen values and Eigen vectors,Eigenspace,Symmetric


,skewsymmetric and Orthogonal matrices-Simple properties,Basis of
Eigen vectors, Similar matrices,Diagonalisation of a matrix,Principal axis
theorem Quadratic forms

TOTAL HOURS 52

TEXT/REFERENCE BOOKS:
T/R BOOK TITLE/AUTHORS/PUBLICATION
T Erin Kreyszig:Advanced Engineering Mathematics,10thedition.wiley

R Dennis g Zill&Patric D ShanahanA first course in complex analysis with applications-


Jones &Bartlet publishers
R B.S Grewal-Higher Engineering mathematics,Khannapublishers,New Delhi
R Lipschutz,Linear Algebra,3e(Schaums Series)McGraww Hill Education India2005
R Complex variables introduction and applications-second edition-Mark.J.Owitz-
Cambridge publication

COURSE PRE-REQUISITES:
C.CODE COURSE NAME DESCRIPTION SEM
Higher secondary level To develop basic ideas on matrix
mathematics operations, calculus, complex
numbersetc

COURSE OBJECTIVES:
1 To equip the students with methods of solving a general system of linear equations
2 To familarize them with the concept of Eigen value and Diagonalisation of a matrix which have many
3 To understand the basic theory of functionsof a complex variable and conformal transformations

Department of EC, RSET 11


Semester III, Course Hand-Out

CO mapping with PO, PSO

PO PO
PO1 PO2 PO3 PO5 PO6 PO7 PO8 PO9 PO10 PO12
4 11

CO1 3
CO2 3
CO3 3 1 3
CO4 3 3
CO5 3 3
CO6 3 1 3
#D
1.66 #DIV/ #DI #####
EC010 804 L02 3 3 IV/
6667 0! V/0! #
0!

Mapping to be done based on extent of correlation between specific CO and PO. Refer SAR Format, J

* Average of the correlation values of each CO mapped to the particular PO/PSO, corrected to the near

Justification for the correlation level assigned in each cell of the table
above.

PO PO1
PO1 PO2 PO3 PO4 PO5 PO6 PO8 PO9 PO10 PO12
7 1

Fundamenta
l knowlegde
in complex
analysis
CO1 will help to
analyze the
Engineering
problems
ver easily
Comp
lex
Basic
analy
knowledge
sis
in
may
Conformal
addre
mapping
ss
CO2 will help to
vario
model
us
various
societ
problems in
y
engineering
relate
fields
d
probl

Department of EC, RSET 12


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ems

Com
plex
integ
ratio
n
will
help
Complex
to
integration
desi
will help to
gn
simplify
solut
CO3 problems
ions
with high
to
complexity
vari
in
ous
Engineering
com
plex
engi
neeri
ng
prob
lems

Sing
ulari
ties
and
Seri
Singularitie
es
s and Series
expa
expansions
nsio
will help to
CO4 ns
enrich the
will
analysis of
help
Engineering
to
problems
desi
gn
solut
ions
to
vari

Department of EC, RSET 13


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ous
com
plex
engi
neeri
ng
prob
lems
Will
Matrix able to
theory will analyse
give a various
thorough method
CO5
knowledge s of
in the solution
application s of
problems equatio
ns
The
solut
ions
Eigen for
value, vari
Eigen ous
vectors and engi
related neeri
CO6 theories will ng
help to prob
design lems
several requ
engineering ires
problems Matr
ix
theo
ry

COURSE OUTCOMES:

CO1 Students will understand about complex numbers and functions


CO2 Students will get an idea of Conformal mapping
CO3 Students will understand the integration of complex functions
CO4 Students will gain knowledge of various singularities and series expansions
Students will be able to find the rank of a matrix and solution of equations using
CO5
matrix theory
CO6 Students will understand the matrix Eigen value problems

PO MAPPING

Department of EC, RSET 14


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GAPS IN THE SYLLABUS - TO MEET INDUSTRY/PROFESSION REQUIREMENTS:


SLNO DESCRIPTION PROPOSED
ACTIONS
1 Basic concepts on complex analysis Reading,
Assignments
2 Application of complex analysis in solving various Engineering Reading
problems
3 Importance of matrix application in different fields of our society Reading

TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN

Application of analytic functions in Engineering

Application of Complex integration in Engineering


Advanced matrix operations
Some applications of eigen values
WEB SOURCE REFERENCES:
1 http://www.math.com/
2 https://www
3 http://www.
4 http
5 http:

DELIVERY/INSTRUCTIONAL METHODOLOGIES:
☐ CHALK & ☐ STUD. ☐ WEB
TALK ASSIGNMENT RESOURCES
☐ LCD/SMART ☐ STUD. ☐ ADD-ON
BOARDS SEMINARS COURSES

ASSESSMENT METHODOLOGIES-DIRECT
☐ ASSIGNMENTS ☐ STUD. ☐ TESTS/MODEL ☐ UNIV.
SEMINARS EXAMS EXAMINATION
☐ STUD. LAB ☐ STUD. VIVA ☐ MINI/MAJOR ☐
PRACTICES PROJECTS CERTIFICATIONS
☐ ADD-ON ☐ OTHERS
COURSES

ASSESSMENT METHODOLOGIES-INDIRECT

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☐ ASSESSMENT OF COURSE OUTCOMES ☐ STUDENT FEEDBACK ON


(BY FEEDBACK, ONCE) FACULTY (TWICE)
☐ ASSESSMENT OF MINI/MAJOR ☐ OTHERS
PROJECTS BY EXT. EXPERTS

Prepared by Approved by
Dr.Jobin K Antony
Fr. Ajeesh Puthussery & Maria Paulose ( HOD)

Department of EC, RSET 16


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4.2 COURSE PLAN

SL NO MODULE TOPICS
1 1 INTRODUCTION
2 1 INFINITE SERIES
3 1 GEOMETRIC SERIES
4 1 CONVERGENCE TESTS
5 1 ABSOLUTE CONVERGENCE
6 1 TAYLOR AND MACLAURIN SERIES
7 1 POWER SERIES
8 2 PARTIAL DERIVATIVES
9 2 LOCAL LINEARITY
10 2 DIFFERENTIABILITY
11 2 CHAIN RULE
12 2 MAXIMA MINIMA
13 2 RELATIVE EXTREMA
14 2 VECTOR VALUED FUNCTIONS
15 2 LIMITS CONTINUITY
16 3 TANGENT LINES
17 3 DIRECTIONAL DERIVATIVES
18 3 GRADIENTS
19 4 DOUBLE INTEGRALS
20 4 ORDER OF INTEGRATION
21 4 FINDING AREAS
22 4 TRIPLE INTEGRALS
23 4 FINDING VOLUMES
24 5 VECTOR AND SCALAR FIELDS
25 5 GRADIENT FIELDS
26 5 DIVERGENCE AND CURL
27 5 LINE INTEGRALS
28 5 WORK AS LINE INTEGRAL
29 6 GREENS THEOREM
30 6 SURFACE INTEGRALS
31 6 DIVERGENCE THEOREM

Department of EC, RSET 17


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4.3 SAMPLE QUESTIONS

Module 1

ASSIGNMENT QUESTIONS

State True or False and Justify ( Q.1 a) -1 r))

a) . If f(z) is analytic, then f'(z) exists.


b) . Function f(z) may be differentiable at z = z0, but not analytic near z = z0.
c) . Function v(x, y) = -3xy2 + x3 is an harmonic function.
d) . The harmonic conjugate of u(x, y) = -2xy is
e) If f(z0) exists, then function f must be continuous at z = z0.
f) If lim z zo f(z) exists, then function f must be continuous at z = z0.
g) . The function f(z) = sin(1/z) is continuous everywhere.

h). The function f(z) = cos(z3) is continuous everywhere.

i). If function f is continuous at z = z0, then f must be differentiable there.

j) If f(z) = | z |2, then for all z, f '(z) = 2z.

k).If f(z) = (iz + 2)2, then f '(z) = 4i - 2z.

l). If f(z) = cos(z3), then f '(z) = - sin(z3).

m). If f(z) = u + iv and the Cauchy-Riemann equations hold for u, v, then f '(z) must exist.
n). For f = u + iv, the Cauchy-Riemann equations are ux = vy and vx = uy.

o). If f(z) = (x2 - y2 + 2) + 2ixy = u + iv, then the Cauchy-Riemann equations hold.

p). If f(z) is differentiable, then f '(z) = vy - i uy.

q) A smooth continuous arc is a contour.

r) If C is a contour, then C must be a smooth continuous arc.

x
2. Define harmonic function. Verify that u  is a harmonic. Also find the conjugate
x  y2
2

harmonic function of u.

3. a) Show that is a harmonic conjugate of

b) Show that is a harmonic function and find the harmonic


conjugate .

c) Determine where the following functions are harmonic.

Department of EC, RSET 18


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and .

d)Find the value of a if u(x, y) = ax2 – y2 + xy is harmonic.

e) Let a, b and c be real constants. Determine a relation among the coefficients that will
guarantee that the function is harmonic.

4. Let for . Compute the partial derivatives of and


verify that satisfies Laplace's equation.

5. Find an analytic function for the following expressions.


a)

. b) .

c) .

d) .

e) .

f) .

6. Show that are harmonic functions but that their


product is not a harmonic function.
7. Let be a harmonic conjugate of . Show that is the harmonic
conjugate of .

8. Let be a harmonic conjugate of . Show


that is a harmonic function.

9. Suppose that is a harmonic conjugate of and that is the


harmonic conjugate of .

10. Consider the function u( x, y)  e x sin( y) . Is it harmonic ? If so, find its harmonic conjugate.
Do the same for (a) u( x, y)  x 3  2 xy  xy3 (b) u( x, y)  e y cos(x)

TUTORIAL QUESTIONS

11. Prove that u  2x  x 3  3 xy2 is harmonic and find its harmonic conjugate. Also find the
corresponding analytic function.

Department of EC, RSET 19


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12. (i) Show that ex( x cos y – y sin y) is harmonic function. Find the analytic function f(z)
for which ex (x cos y – y sin y) is the imaginary part.
(ii) Find f(z) whose imaginary part is v = x2 – y2 + 2xy – 3x -2y
13. (i) If u + v = (x – y) (x2+4xy +y2) and f(z) = u + iv find f(z) in terms of z
(ii) If u – v = (cos y – siny) find f(z) in terms of z

14. Show that the function defined by

is not differentiable at the point even though the Cauchy-Riemann equations (3-
16) are satisfied at the point .

15. Show that the function is nowhere differentiable.


16. Prove that the function

x 2 y 5 x iy  if z  0
f z   
0 if z  0

satisfies C-R equations at z  0 , but it is not analytic at z  0 .

17. If f(z) is analytic and uniformly bounded in every domain then

(a)f(z) is zero b) f(z) is constant

(c)f(z) is discontinuous d) None of these

b). If u = x3 – 3xy2, show that there exists a function v(x,y) such that w = u + iv is analytic in a
finite region.

 xy 2 ( x  iy )
 if z  0
c). Show that f ( z)   x 2  y 2 is not differentiable at z = 0.
0 if z  0

18.a) Does an analytic function exist for


which ? Why or why not?

b)Let ( ) and ( ) . Find derivative of

f (z)  z 2 by using the definition.

Department of EC, RSET 20


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18. Show that the function f


(z
)(3
x32
xy
)i
(3
x2
y3
y)
is differentiable.

20. If f (z) | z | show that f (z) is differentiable only at z = 0.


2

Module 2
ASSIGNMENT QUESTIONS

1. Show that the transformation w z 2 transforms the families of lines x  h and y k into
confocal parabolas, having w  0 as the common focus.

2. Find the bilinear transformation which maps 1, 0,1 of the z-plane anto 1, i,1 of the w-
plane. Show that under this transformation the upper half of the z-plane maps anto the
interior of the unit circle w 1 .

1
3. Show that by means of the inversion w  the circle given by z 3  5 is mapped into the
z
3 5
circle w   .
16 16

4) Show that the transformation w z1/ 2 maps the upper half of the inside of the
parabola y2  4c2 c2  x  into the infinite strip bounded by 0  u  , 0  v  c where
w  u iv .

5)Find the image of the hyperbola x2 – y2 = 10 under the transformation w = z2


6z  9
6).Find the fixed points of the transformation w 
z
1
7)Find the invariant point of the transformation w
z  2i
8)Find the bilinear transformation that maps z = (1, i, –1) into w=(2, i, –2).

9)Find the image of the circle |z| = 2 by the transformation w = z + 3 +2i

TUTORIAL QUESTIONS

10)Find the image of the circle |z-1| = 1 in the complex plane under the mapping

w=

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11)Find the bilinear transformation which maps the points z1 = -1 z2 = 0 z3 = 1 into the points
w1 = 0 w2 = i w3 = 3i respectively

12)Determine the bilinear transformation which maps z1 = 0 z2 = 1 z3 = ∞ into w1 = i w2 = -


1 w3 = -i respectively

13)Find the bilinear transformation which transforms (0, -i, -1) into the points (i, 1, 0)

14) Find the bilinear transformation which maps the points z1 = 2, z2 = i and z3 = 2 onto w1 = 1,
w2 = i and w3 = 1 respectively.
5  4z
15) Show that the transformation w maps the unit circle |z|=1 into a circle of radius
4z  2
unity and centre 1/2.
16)Answer in one or two sentences:
a)The function f(z) = Rez is no where differentiable. Give reason.

b) The transformation w z is not a bilinear transformation. Why?

c) Prove that any bilinear transformation can be expressed as a product of translation, rotation,
magnification or contraction and inversion.
MODULE 5
) ASSIGNMENT QUESTIONS
)
8
1.) Solve the following linear system given explicitly or by its augmented matrix by
Gauss elimination method:
)
a)
)
)
)
) b) [ ]

(
K
2. Find the rank and basis for the row space and a basis for the column space.
K
) a) [ ]
)
)
b) [ ]
.

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3. Are the following set of vectors linearly independent:

a) [ ] [ ], [ ]

b) [ ], [ ], [ ]

4. Is the given set of vectors a vector space? Give reason. If yes determine the dimension
and find a basis.

a) All vectors in with

b) All vectors in with

5. Find the rank of the matrix

[ ]

6. Solve the linear system by its augmented matrix

[ ]

7. Is the given set of vectors a vector space give a reason. If yes determine the dimension
and find the basis.( denote components)

(a) All vectors in such that 4 + =k

(b) All vectors in such that 3 -2 + = 0, 4 + =0

(c) All real numbers.

8. Solve by Gauss elimination method

2w+3x +y-11z = 1

5w -2x +5y -4z =5

w –x+3y -3z =3

3w+ 4x -7y +2z = -7

9.solve the following

a) 4y+3z=8

2x-z=2

3x+2y=5

b)

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[ ]

10) Which of the following matrices have linearly dependent rows?

1 0 0 1 2 3 2 3 8 
A = 0 1 0 B =  4 5 6 C = 15 5 9 
     
0 0 1 7 8 9  6 9 24
Tutorial Questions
11) Determine the row-rank of

12) Solve the following linear system.

1. and

2. and

13) Find the condition on a,b,c so that the linear system

is consistent.

14) Let be an n x n matrix. If the system has a non trivial solution then
show that also has a non trivial solution.

15) Solve the system of equations given by:

x  3 y  2 z  10 x  3 y  2 z  10
a) 2 x  y  3z  8 b) 2 x  y  3z  8
3x  2 y  5 z  18 3x  2 y  5 z  19
x1  x2  3x3  x4  x5  10 3x  y  2 z  0
x1  2 x2  x4  12 2 x  2 y  5z  0
c) d)
x3  2 x4  x5  16 5x  3 y  2 z  0
Department of EC, RSET 24
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2 3 5 8 
 
16) Row reduce 2 0 2 4 .
1 3 4 0
 3 1 2
17) What is the rank of A  2 0 5 ?
. 1 2 3
18) Find conditions on the constant a such that the linear system

x  y  3z  a
ax  y  5 z  4
x  ay  4 z  a
has zero, one or infinitely many solutions

19) Classify these systems as either consistent or inconsistent. If the system is


consistent, further categorize it as underdetermined or uniquely determined. Explain
why the system fits into that category. Also, explain what this means graphically for
each system.

1.2x1 + 3x2 = 9 and 3x1 + 4 x2 = 13

2.3x1 + 4x2 = 7 and 9x1 + 12x2 = 21

3. 2x1 + 3x2 = 8 and 3x1 + 4x2 = 11

20) For what values of and -the following systems have no solution, a unique solution
and infinite number of solutions.

a.
b.
c.
d.
e.

Module 6

Assignment Problems
1. Find the eigenvalues and eigenvectors of the matrix

Department of EC, RSET 25


Semester III, Course Hand-Out

5 4 2
A   4 5 2
 2 2 2

0 1 2
A   2 3 0 
0 4 5 

2. Find the eigenvalues and the eigenvectors of A where

 0 2
(i) A   
 3 5

 0 5
(ii) A   
 0 1 

 1  3 3
 
(iii) A   3  5 3
 6  6 4
 

3. Find the eigenvectors of


 3  1.5
A 
 0.75 0.75 
4. Find the eigenvalues and eigenvectors of

 1.5 0 1 
[ A]   0.5 0.5  0.5

 0.5 0 0 

5. What are the eigenvalues of

6 0 0 0 
7 3 0 0 
[ A]  
9 5 7.5 0 
 
2 6 0  7.2

6. Find the eigenvalues and eigenvectors for the following matrices


2 3
A
1 2 

Department of EC, RSET 26


Semester III, Course Hand-Out

 2 1
B 
 2 0 

 1 2 3
C   0 2 1 
 2 0 3 

7. Find the eigenvalues and eigenvectors for the following matrices


 4  6
A
 3 5 

8. Find the eigenvalues and eigenvectors for the following matrices


2 1 0
2  12
A  0 2 0 A 
1  5 
0 0 2
9. Determine whether the following vectors in 4 are linearly dependent or
independent.
(1, 3, -1, 4), (3, 8, -5, 7), (2, 9, 4, 23).
10. Which of the following matrices have linearly dependent rows?

1 0 0 1 2 3 2 3 8 
A = 0 1 0 B =  4 5 6 C = 15 5 9 
     
0 0 1 7 8 9  6 9 24

Department of EC, RSET 27


Semester III, Course Hand-Out

5
EC 201
NETWORK THEORY

Department of EC, RSET 28


Semester III, Course Hand-Out

5.1 COURSE INFORMATION SHEET

PROGRAMME: UG PROGRAMME IN DEGREE: B. TECH.


ELECTRONICS & COMMUNICATION
ENGINEERING
COURSE: NETWORK THEORY SEMESTER: III
CREDITS: 4
COURSE CODE: EC201 COURSE TYPE: CORE
REGULATION: 2015
COURSE AREA/DOMAIN: CONTACT HOURS: 3+1 (Tutorial)
hours/Week.
CORRESPONDING LAB COURSE CODE LAB COURSE NAME:
(IF ANY):

SYLLABUS:
UNIT DETAILS HOURS
Introduction to circuit variables and circuit elements, Review of Kirchhoff‟s
I Laws, Independent and dependent Sources, Source transformations. Network 8
topology, Network graphs, Trees, Incidence matrix, Tie-set matrix and Cut-
set matrix. Solution methods applied to dc and phasor circuits: Mesh and
node analysis of network containing independent and dependent sources
Network theorems applied to dc and phasor circuits: Thevenin‟s theorem, 10
II Norton‟s theorem, Superposition theorem, Reciprocity theorem, Millman‟s
theorem, Maximum power transfer theorem. Laplace Transforms and
inverse Laplace transform of common functions, Important theorems: Time
shifting theorem, Frequency shifting theorem, Time differentiation theorem,
Time integration theorem, s domain differentiation theorem, s domain
integration theorem, Initial value theorem, Final value theorem
Partial Fraction expansions for inverse Laplace transforms, Solution of
III differential equations using Laplace transforms 11
Transformation of basic signals and circuits into s-domain. Transient
analysis of RL, RC, and RLC networks with impulse, step, pulse,
exponential and sinusoidal inputs .
Analysis of networks with transformed impedance and dependent sources.
Network functions for the single port and two ports, properties of driving
IV point and transfer functions, Poles and Zeros of functions, Significance of 7
Poles and Zeros. Time domain response from pole zero plot, Impulse
Response. Network functions in the sinusoidal steady state, Magnitude and
Phase response
Parameters of two port network: impedance, admittance, transmission and
V hybrid parameters, Interrelationship among parameter sets. Series and 11
parallel connections of two port networks .Reciprocal and Symmetrical two
port network .
Characteristic impedance, Image impedance and propagation constant

Department of EC, RSET 29


Semester III, Course Hand-Out

(derivation not required)


Coupled circuits: single tuned and double tuned circuits, dot convention,
VI coefficient of coupling, Analysis of coupled circuits. Resonance: Series 7
resonance, bandwidth, Q factor and Selectivity, Parallel resonance.

TOTAL HOURS 54

TEXT/REFERENCE BOOKS:
T/R BOOK TITLE/AUTHORS/PUBLICATION
1 Ravish R., Network Analysis and Synthesis, 2/e, McGraw-Hill, 2015.
2 Valkenburg V., Network Analysis, 3/e, PHI, 2011.
3 Sudhakar A,S. P. Shyammohan, Circuits and Networks- Analysis and Synthesis, 5/e,
McGraw-Hill, 2015.
4 Choudhary R., Networks and Systems, 2/e, New Age International, 2013.
5 Franklin F. Kuo, Network Analysis and Synthesis, 2/e, Wiley India, 2012.
6 Pandey S. K., Fundamentals of Network Analysis and Synthesis, 1/e, S. Chand, 2012.
7 Edminister, Electric Circuits – Schaum‟s Outline Series, McGraw-Hill,2009.
COURSE PRE-REQUISITES:
COURSE COURSE NAME DESCRIPTION SEM
CODE
Basic Electrical Should have knowledge of the 1&2
properties of different circuit elements
and basic laws.
Engineering Mathematics Should have knowledge of 1&2
mathematics (complex algebra,
differential calculus and integral
calculus).
Basic Physics Should have knowledge of basic 1&2
physics (electromagnetism)

COURSE OBJECTIVES:
Sl. DESCRIPTION
No.
1 To make the students capable of analyzing any linear time invariant electrical network.
2 To study time domain, phasor and Laplace transform methods of linear circuit analysis.
3 To study the transient response of networks subject to test signals.
4 To develop understanding of the concept of resonance, coupled circuits and two port
networks.

COURSE OUTCOMES:
Sl. DESCRIPTION
No.
1 Graduates will be able to understand the basic circuit elements, circuit variables and
Kirchoff laws.

Department of EC, RSET 30


Semester III, Course Hand-Out

2 Graduates will be able to solve problems using mesh and node analysis.
3 Graduates will be able to analyse circuits in the phasor form.
4 Graduates will be able to analyse circuits in Laplace domain.
5 Graduates will be able to understand the concept of two port networks
6 Graduates can understand tuned circuits & resonance.

CO-PO-PSO MAPPING:

Programme-
Programme Outcomes (POs) specific
CO
Outcomes (PSOs)
No.
PO PO PO PO PO PO PO PO PO PO1 PO1 PO1 PS PSO PS
1 2 3 4 5 6 7 8 9 0 1 2 O1 2 O3
CO
3 2 1 3 2 1
1
CO
2 1 1 3 1 2
2
CO
2 2 2 1
3
CO
2 2 2 1
4
CO
2 1 1 1
5
CO
2 1 1
6

JUSTIFICATION FOR CO-PO MAPPING

MAPPING LEVEL JUSTIFICATION

CO1-PO1 3 Analyse various circuits using laws


CO1-PO2 2 Solve problems using using different theorems
CO1-PO3 1 To provide solutions for electrical circuits
CO1-PO12 3 With the basic laws and theorems, analysis of various types
electrical circuits is possible
CO2-PO1 2 Analyse electrical circuits
CO2-PO2 1 Solve problems by different methods
CO2-PO3 1 To provide solutions for electrical circuits
CO3-PO1 2 Analyse time domain and S domain circuits
CO3-PO2 2 Analyse single and 2 port networks
CO3-PO3 2 Different parameters of 2 port networks
CO4-PO1 2 Analyse s domain circuits
CO4-PO2 2 Theorems in Laplace transform
CO4-PO3 2 Inverse Laplace Transform for solving circuits
CO5-PO1 2 Anlyse 2 port networks

Department of EC, RSET 31


Semester III, Course Hand-Out

CO5-PO2 1 Anlyse 2 port networks


CO5-PO3 1 Find solutions of 2 port networks
CO6-PO1 2 Analyse resonance circuits
CO6-PO2 1 Analysis of coupled circuits

JUSTIFICATION FOR CO-PSO MAPPING

MAPPING LEVEL JUSTIFICATION


CO1-PSO1 2 Understand the basics of circuits
CO1-PSO2 1 Useful in developing instrument systems
CO2-PSO1 1 Understand the basics of circuits
CO2-PSO2 2 Useful in developing instrument systems
CO3-PSO1 1 Understands the concepts of resonance
CO4-PSO1 1 Understand the basics of circuits
CO5-PSO1 1 Understand the basics of 2 port networks
CO6-PSO1 1 Understand the concepts of resonance

GAPS IN THE SYLLABUS - TO MEET INDUSTRY/PROFESSION REQUIREMENTS:


Sl. DESCRIPTION PROPOSED ACTIONS PO MAPPING
No.
1 System modeling and analysis- Assignments on Laplace 1,2,3,4
checking stability and energy Transform, Z transform etc
conservation.
2 Solving first order linear homogeneous Assignment (Mathematics) 1,2,3,4
and non homogeneous equations
3 Filter Design NPTEL course 1,2,3,4,5,6,12
PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY
VISIT/GUEST LECTURER/NPTEL ETC

TOPICS BEYOND SYLLABUS/ADVANCED TOPICS:


Sl. DESCRIPTION PO MAPPING
No.
1 Introduction to PSpice 1,2,3,4,5
2 MATLAB examples 1,2,3,4,5

DESIGN AND ANALYSIS TOPICS:


Sl. DESCRIPTION PO MAPPING
No.
1 Analyze ideal op-amp based circuits using network theorems. 1,2,3,4
2 Steady state and transient analysis of ac circuits 1,2,3,4
3 Analysis of transistor and transformer circuits using two port 1,2,3,4
parameters

Department of EC, RSET 32


Semester III, Course Hand-Out

WEB SOURCE REFERENCES:


Sl. DESCRIPTION
No.
1 http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-002-circuits-
and-electronics-spring-2007/
2 http://en.wikibooks.org/wiki/Circuit_Theory
3 http://nptel.iitm.ac.in/video.php?subjectId=108102042
4 http://opencourses.emu.edu.tr/course/view.php?id=3
5 http://nptel.iitm.ac.in/video.php?subjectId=108102042

DELIVERY/INSTRUCTIONAL METHODOLOGIES:
 CHALK & TALK  STUD. ☐ WEB
ASSIGNMENT RESOURCES
☐ LCD/SMART ☐ STUD. SEMINARS ☐ ADD-ON
BOARDS COURSES

ASSESSMENT METHODOLOGIES-DIRECT [Append details of assessment


methodologies actually employed (including design and analysis assessment) in spreadsheet
format after the completion of each semester]

 ASSIGNMENTS ☐ STUD.  TESTS/MODEL  UNIV.


SEMINAR EXAMS EXAMINAT
S ION
☐ STUD. LAB ☐ STUD. ☐ MINI/MAJOR ☐
PRACTICES VIVA PROJECTS CERTIFICATIONS
☐ ADD-ON COURSES ☐
OTHERS

ASSESSMENT METHODOLOGIES-INDIRECT
 ASSESSMENT OF COURSE  STUDENT FEEDBACK ON
OUTCOMES (BY FEEDBACK, ONCE) FACULTY (TWICE)
☐ ASSESSMENT OF MINI/MAJOR ☐ OTHERS
PROJECTS BY EXT. EXPERTS

Prepared by (Course In-charge) Approved by


Dr. Jobin K Antony HOD-ECE
Dr. Rithu James
Ms. Neethu Radha Gopan

Department of EC, RSET 33


Semester III, Course Hand-Out

5.2 COURSE PLAN

SL MODUL TOPICS
NO E
1 1 Introduction to circuit variables and circuit elements
2 1 Kirchhoff‟s Laws
3 1 Independent and dependent Sources
4 1 Source transformations
5 1 Mesh analysis applied to dc circuits
6 1 Mesh analysis applied to ac circuits
7 1 Mesh analysis applied to dc and ac circuits with dependent sources
8 1 Nodal analysis applied to dc circuits
9 1 Nodal analysis applied to ac circuits
10 1 Nodal analysis applied to dc and ac circuits with dependent sources
11 1 Network topology -Network graphs
12 1 Trees - Incidence matrix
13 1 Tie-set matrix
14 1 Cut-set matrix
15 1 Tutorial
16 2 Superposition theorem
17 2 Superposition theorem
18 2 Reciprocity theorem
19 2 Millman‟s theorem
20 2 Thevenin‟s theorem
21 2 Thevenin‟s theorem
22 2 Norton‟s theorem
23 2 Nortons theorem
24 2 Maximum power transfer theorem
25 2 Laplace transform and inverse Laplace transform of common functions
26 2 Time shifting theorem & Frequency shifting theorem

Department of EC, RSET 34


Semester III, Course Hand-Out

26 2 Time shifting theorem & Frequency shifting theorem


27 2 Time differentiation theorem & Time integration theorem
28 2 S domain differentiation theorem & S domain integration theorem
29 2 Initial value theorem & Final value theorem
30 3 Partial Fraction expansions for inverse Laplace transforms
31 3 Solution of differential equations using Laplace transforms
32 3 Solution of differential equations using Laplace transforms
33 3 Transformation of basic signals and circuits into s-domain
34 3 Transient analysis of RL, RC, and RLC networks with impulse and step
signal
35 3 Transient analysis of RL, RC, and RLC networks with impulse and step
signal
36 3 Transient analysis of RL, RC, and RLC networks with pulse, exponential
and sinusoidal inputs
37 3 Analysis of networks with transformed impedance and dependent sources
38 3 Analysis of networks with transformed impedance and dependent sources
39 4 Network functions for the single port and two ports
40 4 properties of driving point and transfer functions
41 4 Poles and Zeros of network functions
42 4 Significance of Poles and Zeros
43 4 Time domain response from pole zero plot & Impulse Response
44 4 Network functions in the sinusoidal steady state
45 4 Magnitude and Phase response
46 4 Magnitude and Phase response
47 5 Parameters of two port network: impedance, admittance, transmission and
hybrid parameters
48 5 Parameters of two port network: impedance, admittance, transmission and
hybrid parameters
49 5 Parameters of two port network: impedance, admittance, transmission and
hybrid parameters
50 5 Interrelationship among parameter sets
51 5 Interrelationship among parameter sets
52 5 Series and parallel connections of two port networks
53 5 Series and parallel connections of two port networks

Department of EC, RSET 35


Semester III, Course Hand-Out

53 5 Series and parallel connections of two port networks


54 5 Reciprocal and Symmetrical two port network
54 5 Reciprocal and Symmetrical two port network
55 5 Characteristic impedance, Image impedance and propagation constant
56 5 Characteristic impedance, Image impedance and propagation constant
57 6 Resonance: Series resonance & bandwidth
58 6 Q factor and Selectivity
59 6 Parallel resonance
60 6 Coupled circuits: single tuned and double tuned circuits
61 6 Coupled circuits: single tuned and double tuned circuits
62 6 dot convention & coefficient of coupling
63 6 Analysis of coupled circuits
63 6 Analysis of coupled circuits
64 6 Tutorial
65 6 Tutorial

Department of EC, RSET 36


Semester III, Course Hand-Out

5.3 SAMPLE QUESTIONS


MODULE I

1. Explain the basic circuit variables and elements in an electrical circuit.


2. State Kirchoff‟s Laws.
3. Explain the classification of energy sources.
4. State and explain the significance of source transformation theorem.
5. Explain the following terms: (a) network graph (b) tree (c) link (d) branch (e) chord (f)
co-tree
6. Draw a circuit with three nodes. Draw its directed graph. Write its incidence matrix and
reduced incidence matrix. Draw a tree of the graph. Write its tie-set matrix and cut-set
matrix.
7. Write the step-by-step procedure to solve a circuit, if voltage and current sources are
present in the circuit using (a) mesh analysis (b) nodal analysis.
8. Find vxandixin the circuit

9. Find the currents through and the voltage in the circuit

10. Find Vo and the power dissipated in all the resistors in the circuit

11. Find the voltage gain of the circuit shown below.

Department of EC, RSET 37


Semester III, Course Hand-Out

12. Find current Io in the circuit shown

13. If the voltage across the resistor in the circuit is 10 cos 2t V, obtain is.(use phasor
analysis)

14. Find io(t) using nodal analysis

15. Find i(t)

16. Determine vx in the circuit using source transformation.(4.31)

Department of EC, RSET 38


Semester III, Course Hand-Out

MODULE II

1. State the following theorems and explain: Thevenin‟s theorem, Norton‟s theorem,
Superposition theorem, Reciprocity theorem, Millman‟s theorem, Maximum power
transfer theorem, Maximum average power transfer theorem.
2. Derive the Laplace transform of the given functions: (a) step function (b) ramp function.
3. Give the properties of unit impulse function and provide its Laplace transform.
4. State and prove the following Time shifting theorem, Frequency shifting theorem, Time
differentiation theorem, Time integration theorem, s domain differentiation theorem, s
domain integration theorem, Initial value theorem, Final value theorem.
5. For the circuit below, use superposition to compute the current ix.

6. For the circuit below, use superposition to obtain the voltage across each current source.

7. Using repeated source transformations, determine the Norton equivalent of the


highlighted network in the circuit

8. Use Thévenin‟s theorem to find the current through the 2Ωresistor in the circuit. Prove
reciprocity theorem for the circuit given.

9. Determine the Thévenin and Norton equivalents of the circuit. Using Millman‟s
theorem, find the Thevenin equivalent of the circuit again.

Department of EC, RSET 39


Semester III, Course Hand-Out

10. Find the Thévenin equivalent for the network below:

11. Find the Norton equivalent for the network below:

12. If superposition is used on the circuit below, find V1 with (a) only the 20/0◦ mA source
operating; (b) only the 50/−90◦ mA source operating.

13. For the circuit below find the (a) open-circuit voltage Vab; (b) downward current in a
short circuit between a and b; (c) Thévenin equivalent impedance Zabin parallel with
the current source.

14. Determine the current ithrough the 4Ωresistor.

Department of EC, RSET 40


Semester III, Course Hand-Out

15. Find the Laplace Transforms of the given periodic functions:

(b) (c)
16. Find the Laplace Transforms of the given functions:
17. 8e-3tcosh t u(t - 2) (b) [sin βt]/t u(t) (c) t2cos (2t + 30o) u(t)
()
(d) 5 u(t/2) (e) (f) 5 cos(2t - 1) u(t)
18. Find the Laplace Transforms of the given functions:

(b)

19. If , find f(0) and f(∞) using initial value theorem and final value
theorem respectively. Verify the result by finding f(t), using partial fractions.
20. Determine the initial and final values of f(t), if they exist:

Department of EC, RSET 41


Semester III, Course Hand-Out

MODULE III

1. Explain the significance of Laplace transform in network analysis.


2. Explain the transformation of basic circuit elements into the s-domain, considering non-
zero initial conditions.
3. Perform the transient analysis of a series RLC circuit to impulse, step, pulse, exponential
and sinusoidal inputs.
4. Perform the transient analysis of a parallel RLC circuit to impulse, step, pulse,
exponential and sinusoidal inputs.
5. Find the inverse Laplace transform of the following functions:

a. b. c.

d. e. f.

g. h.
6. Solve for y(t) in the following differential equation if the initial conditions are zero:

7. Solve the integrodifferential equation:

8. Given v(0) = 2 and dv(0)/dt = 4, solve


9. Solve the following differential equations subject to the specified initial conditions.

10.
11. The switch moves from position A to position B at t=0. Find v(t) for t >0.

(11a) (11b)
12. Find i(t); t>0

(12a) (12b)

Department of EC, RSET 42


Semester III, Course Hand-Out

13. Find v(t); t>0

(13a) (13b) (13c)


14. The step response of a parallel RLC circuit is:
when the inductor is 50 mH. Find R
and C.
15. The step responses of a series RLC circuit are given below. Find R, L, C.

16. Find the voltage across the capacitor for t>0.

(6a)vo(0-) = 0 V (6b) v(0+) = 4V, i(0+)


= 2A
17. In the circuit below, the switch has been in position 1 for a long time but moved to
position 2 at t = 0. Find : (a) v(0+) (b) dv(0+)/dt (c) v(t); t>0

18. Find io(t); t>0

Department of EC, RSET 43


Semester III, Course Hand-Out

MODULE IV

1. What is a port? Differentiate between single-port and two-port networks.


2. Explain the different types of network functions with suitable examples.
3. What are poles and zeros of a network function. Illustrate using an example. Why are
poles and zeros considered to be significant?
4. How is the impulse response of a network related to its transfer function? Show the
relationship between them.
5. How can the time-domain behaviour of a circuit be determined from its pole-zero plot?
Explain.
6. How can the sinusoidal steady-state response of a network be obtained from its network
function? Explain.
7. List the properties of a driving point function.
8. List the properties of a transfer function.

MODULE V

1. Provide the relation between the parameters characterizing the following parameter sets:
2. impedance, admittance, transmission and hybrid parameters
3. Derive the relation between the parameter sets of two networks connected in (a) series
(b) parallel.
4. Define the following (a) reciprocal network (b) symmetrical network.
5. Explain the significance of image parameters of a two-port network. Define the
following: (a) Characteristic impedance (b) Image impedances (c) Propagation constant.
6. Obtain the z-parameters for the given circuit

(a) (b)
7. For the two-port circuit: (a) Find ZLfor maximum power transfer to the load.
(b) Calculate the maximum power delivered to the load.

Given
8. Determine the z and y parameters for the circuit.

9. (a) Find the y parameters of the two-port network. (b) Determine V2(s) for vs= 2u(t) V.

Department of EC, RSET 44


Semester III, Course Hand-Out

10. Find the voltage gain, current gain, input impedance and output impedance of the circuit
below. Given h11 = 1 kΩ, h12 = 2.5 x 104, h21 = 50 and h22 = 20 µS. Also find the output
voltage, Vo.

11. Determine the h-parameters for the network.

12. Find the transmission parameters for the circuit

(a) (b)
13. Given the transmission parameters, obtain the other five two-port parameters.

14. What is the y parameter representation of the circuit?

15. Obtain the y-parameters as functions of s

Department of EC, RSET 45


Semester III, Course Hand-Out

16. Obtain the h-parameters of the network at ω = 1 rad/s

17. Design a symmetrical T-type attenuator with characteristic impedance Ro and


attenuation N.
MODULE VI

1. Define resonance.
2. Derive the expressions for resonant frequency, cut-off frequencies, bandwidth, Q factor
of a series resonant circuit.
3. Derive the expressions for resonant frequency, cut-off frequencies, bandwidth, Q factor
of a
4. parallel resonant circuit.
5. Show that in a series RLC circuit, resonant frequency is the geometric mean of half-
power frequencies Also, prove that the cut-off frequencies are ωo±B/2(approx.) for high
Q circuits, where ωo is the resonant frequencies and B is the bandwidth of the circuit.

6. Analyse a single-tuned circuit and find the maximum output voltage possible for a given
input. Also determine the critical value of mutual inductance. Repeat the same for a
double-tuned circuit.
7. Briefly explain the dot convention used in the analysis of coupled circuits.
8. What is coefficient of coupling? How can it be determined given the self and mutual
inductances of a coupled coil set?
9. The physical construction of three pairs of coupled coils is shown. Show the two
different possible locations for the two dots on each pair of coils.

10. For the three coupled coils, calculate the total inductance.

Department of EC, RSET 46


Semester III, Course Hand-Out

11. For the circuit, find Vo.

12. Two coils are mutually coupled, with L1 = 50 mH, L2 = 120 mH and k = 0.5. Calculate
the maximum possible equivalent inductance if:
a. The two coils are connected in series
b. The coils are connected in parallel
13. Find the Norton equivalent for the circuit at terminals a-b.

14. For the circuit find Zab and io.

15. Find currents I1, I2 and I3 in the circuit.

16. In the circuit, find the value of the coupling coefficient that will make the resistor
dissipate 320 W. For this value of k, find the energy stored in the coupled coils at t =1.5
s.

17. Find current Io

Department of EC, RSET 47


Semester III, Course Hand-Out

18. Obtain the Thevenin equivalent circuit for the circuit at terminals a-b

19. Let vs(t) = 20 cos(at) V in the circuit. Find ω0, Q, and B, as seen by the capacitor.

20. For the “tank” circuit, find the resonant frequency.

21. For the circuit shown, find B, ωo and Q, as seen by the voltage across the inductor.

Department of EC, RSET 48


Semester III, Course Hand-Out

6
EC 203
SOLID STATE DEVICES

Department of EC, RSET 49


Semester III, Course Hand-Out

6.1 COURSE INFORMATION SHEET

PROGRAMME: ELECTROICS AND DEGREE: B.TECH


COMMUNICATION

COURSE: SOLID STATE DEVICES SEMESTER: 3 CREDITS: 4

COURSE CODE: EC 203 COURSE TYPE: CORE


REGULATION: 2016

COURSE AREA/DOMAIN: CONTACT HOURS: 3+1 (Tutorial)


Hours/Week.
ELECTRONICS

CORRESPONDING LAB COURSE CODE LAB COURSE NAME: NA


(IF ANY): NIL

SYLLABUS:

Sem.
HO
UNIT DETAILS Exam
URS
Marks

Elemental and compound semiconductors, Fermi-Dirac distribution,


Equilibrium and steady state conditions, Equilibrium concentration of 4
electrons and holes, Temperature dependence of carrier concentration
I 15
Carrier transport in semiconductors, drift, conductivity and mobility,
variation of mobility with temperature and doping, High Field Effects, 5
Hall effect

Excess carriers in semiconductors: Generation and recombination


II mechanisms of excess carriers, quasi Fermi levels, diffusion, Einstein 9 15
relations, Continuity equations, Diffusion length, Gradient of quasi
Fermi level

FIRST INTERNAL EXAM

Department of EC, RSET 50


Semester III, Course Hand-Out

PN junctions : Contact potential, Electrical Field, Potential and Charge


density at the junction, Energy band diagram, Minority carrier
III distribution, Ideal diode equation, Electron and hole component of 9 15
current in forward biased p-n junction, piecewise linear model of a
diode effect of temperature on V-I characteristics

Diode capacitances, switching transients, Electrical Breakdown in PN


junctions, Zener and avalanche break down (abrupt PN junctions
IV 9 15
only), Tunnel Diode basics only, Metal Semiconductor contacts,
Ohmic and Rectifying Contacts, current voltage characteristics

SECOND INTERNAL EXAM

Bipolar junction transistor , current components, Minority carrier


V distributions, basic parameters, Evaluation of terminal currents (based 9 20
on physical dimensions),Transistor action, Base width modulation

Metal Insulator semiconductor devices: The ideal MOS capacitor,


band diagrams at equilibrium, accumulation, depletion and inversion,
surface potential, CV characteristics, effects of real surfaces, work 9
VI function difference, interface charge, threshold voltage MOSFET: 20
Output characteristics, transfer characteristics, sub threshold
characteristics, MOSFET scaling (basic concepts)

FinFET-structure and operation 1

END SEMESTER EXAM

TEXT/REFERENCE BOOKS:

T/R BOOK TITLE/AUTHORS/PUBLICATION

Ben G. Streetman and Sanjay Kumar Banerjee, Solid State Electronic Devices, Pearson,
T1
6/e, 2010

T2 Achuthan, K N Bhat, Fundamentals of Semiconductor Devices, 1e, McGraw Hill,2015

R1 Tyagi M.S., Introduction to Semiconductor Materials and Devices, Wiley India, 5/e, 2008

Department of EC, RSET 51


Semester III, Course Hand-Out

R2 Sze S.M., Physics of Semiconductor Devices, John Wiley, 3/e, 2005

R3 Neamen, Semiconductor Physics and Devices, McGraw Hill, 4/e, 2012

R4 Pierret, Semiconductor Devices Fundamentals, Pearson, 2006

R5 Rita John, Solid State Devices, McGraw-Hill, 2014

R6 Bhattacharya .Sharma, Solid State Electronic Devices, Oxford University Press, 2012

R7 Dasgupta and Dasgupta , Semiconductor Devices : Modelling and Technology (PHI)

COURSE PRE-REQUISITES:

C.CODE COURSE NAME DESCRIPTION SEM

ENGINEERING To develop basic idea about calculus and


1
MATHEMATICS I differential equations.

To have a basic idea of semiconductor


ENGINEERING
devices, Quantum mechanics, LEDs, laser 1
PHYSICS
diodes etc.

COURSE OBJECTIVES:

1 To provide an insight into the basic semiconductor concepts.

To provide a sound understanding of current semiconductor devices and technology to


2
appreciate its applications to electronics circuits and system

COURSE OUTCOMES:

Sl. Blooms’ Taxonomy


DESCRIPTION
No. Level

Department of EC, RSET 52


Semester III, Course Hand-Out

Knowledge &
Graduates will be able to define and understand the concepts in
1 Understand (level
semiconductor physics.
1,2)

Graduates will be able to describe and apply the generation and Understand & Apply
2
recombination processes in semiconductors. (level 2,3)

Graduates will be able to explain the structure, creation of electric field Understand (level 2)
3
and working of PN junction semiconductor diodes.

Graduates will be able to illustrate the minority carrier distribution Apply (level 3)
4
across PN junction semiconductor diodes.

Graduates will develop skills and can do research in new concepts and Create (level 6)
5
devices.

Graduates can summarize concepts that studied relating different Evaluate & Analyze
modes of operation and the various current components in BJTs and (level 5,4)
6
analyze energy band diagram of PN junction diodes, BJTs, metal
semiconductor junctions and MOS capacitors.

CO-PO AND CO-PSO MAPPING

PO PO PO PO PO PO PO PO PO PO1 PO1 PO1 PSO PSO PSO


1 2 3 4 5 6 7 8 9 0 1 2 1 2 3

CO.1 3 2 - - - - - - - - - 3 2 3 -

CO.2 2 2 - 1 - - - - - - - - - - -

CO.3 2 2 - 1 - - - - - - - - - - -

CO.4 2 2 - 1 - - - - - - - - - - -

CO.5 2 2 - 3 - - - - - - - 2 - - -

CO.6 2 2 - 1 - - - - - - - - - - -

Department of EC, RSET 53


Semester III, Course Hand-Out

EC 2.1 2.5
2 - 1.4 - - - - - - - 2 3 -
203 67

JUSTIFATIONS FOR CO-PO-PSO MAPPING

MAPPING LOW/ JUSTIFICATION


MEDIU
M/HIG
H

PO1-CO.1 3 Application of fundamental knowledge in semiconductor physics

PO1- 2 Application of basic knowledge to complex engineering problems


CO.2,3,4,5,
6

PO2- 2 Identification and analysis of complex engineering problems


CO.1,2,3,4,
5,6

PO4- 1 Analysis and produce valid conclusions


CO.2,3,4,6

PO4-CO.5 3 develop new skills and to produce valid conclusions

PO12-CO1 3 understanding of semiconductor physics will help them in life long


learning

PO12-CO5 2 Research in new concepts helps them in independent learning

PSO1-CO.1 2 Knowledge in semiconductor physics will help them in VLSI systems

PSO2-CO.1 3 Knowledge in semiconductor physics will help them in developing


applications using EDA tools

GAPS IN THE SYLLABUS - TO MEET INDUSTRY/PROFESSION REQUIREMENTS:

Department of EC, RSET 54


Semester III, Course Hand-Out

Proposed
SNO Description
Actions

1 Fabrication of PN Junctions, FETs etc. NPTEL + Reading Assignments

2 Physics of HEMT devices NPTEL

PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY


VISIT/GUEST LECTURER/NPTEL ETC

TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:

Proposed
SNO Description
Actions

1 Recent Developments Web reference [10,9]

2 Heterojunction FET Web reference [1,8]

3 Hetrojunction bipolar transistor Web reference [6,7]

4 Device Fabrication Web reference [2,3]

5 SPICE models Web reference [5,3]

WEB SOURCE REFERENCES:

1 https://engineering.purdue.edu/~ee606/downloads/modern-MOSFET-sci-am.pdf

2 http://nptel.iitm.ac.in/video.php?subjectId=117106091

http://nptel.iitm.ac.in/courses/Webcourse-contents/IIT-Delhi/Semiconductor%20
3
Devices/index.htm

4 http://nptel.iitm.ac.in/courses/Webcourse-contents/IIT-%20Guwahati/ic_tech/ index.html

Department of EC, RSET 55


Semester III, Course Hand-Out

5 http://education.jlab.org/itselemental/ele014.html

http://www.cdeep.iitb.ac.in/nptel/Core%20Science/Engineering%20Physics%202/Course_
6
home-Lec-30.htm

http://www.cdeep.iitb.ac.in/nptel/Core%20Science/Engineering%20Physics%202/Course_
7
home-Lec-32.htm

http://www.cdeep.iitb.ac.in/nptel/Core%20Science/Engineering%20Physics%202/Course_
8
home-Lec-33.htm

http://www.cdeep.iitb.ac.in/nptel/Core%20Science/Engineering%20Physics%202/Course_
9
home-Lec-34.htm

http://www.cdeep.iitb.ac.in/nptel/Core%20Science/Engineering%20Physics%202/Course_
10
home-Lec-35.htm

DELIVERY/INSTRUCTIONAL METHODOLOGIES:

✓CHALK & TALK ✓STUD. ✓WEB


ASSIGNMENT RESOURCES

☐ LCD/SMART ☐ STUD. ☐ ADD-ON


BOARDS SEMINARS COURSES

ASSESSMENT METHODOLOGIES-DIRECT

✓ ASSIGNMENTS ☐ STUD. ✓TESTS/MODEL ✓UNIV.


SEMINARS EXAMS EXAMINATION

☐ STUD. LAB ☐ STUD. VIVA ☐ MINI/MAJOR ☐


PRACTICES PROJECTS CERTIFICATIONS

☐ ADD-ON COURSES ☐ OTHERS

ASSESSMENT METHODOLOGIES-INDIRECT

Department of EC, RSET 56


Semester III, Course Hand-Out

✓ ASSESSMENT OF COURSE OUTCOMES ✓STUDENT FEEDBACK ON FACULTY


(BY FEEDBACK, ONCE) (TWICE)

☐ ASSESSMENT OF MINI/MAJOR PROJECTS ☐ OTHERS


BY EXT. EXPERTS

Prepared by Approved by

Mr. Sreekumar G, Mr. Ajai V Babu& Mr. Bonifus P L Dr. Jobin K


Antony

(Faculty) (HOD)

Department of EC, RSET 57


Semester III, Course Hand-Out

6.2 COURSE PLAN

SL NO MODULE TOPICS
1 1 Elemental and compound semiconductors
2 1 Fermi-Dirac distribution
3 1 Equilibrium and steady state conditions
4 1 Equilibrium concentration of electrons and holes
5 1 Temperature dependence of carrier concentration
6 1 Carrier transport in semiconductors, drift
7 1 conductivity and mobility
8 1 variation of mobility with temperature and doping,
9 1 High Field Effects, Hall effect
10 1 Tutorials
11 1 Tutorials
12 1 Tutorials
13 2 Excess carriers in semiconductors
14 2 Generation and recombination mechanisms of excess carriers,
15 2 Generation and recombination mechanisms of excess carriers
16 2 quasi Fermi levels
17 2 diffusion
18 2 Einstein relations
19 2 Continuity equations
20 2 Diffusion length
21 2 Gradient of quasi Fermi level
22 2 Tutorials
23 2 Tutorials
24 2 Tutorials
25 2 Tutorials
26 3 PN junctions
27 3 Contact potential

Department of EC, RSET 58


Semester III, Course Hand-Out

28 3 Electrical Field
29 3 Potential and Charge density at the junction
30 3 Energy band diagram
31 3 Minority carrier distribution
32 3 Ideal diode equation
33 3 Ideal diode equation
Electron and hole component of current in forward biased p-n
34 3 junction
35 3 piecewise linear model of a diode
36 3 effect of temperature on V-I characteristics
37 3 Tutorials
38 3 Tutorials
39 4 Diode capacitances
40 4 switching transients
41 4 switching transients
42 4 Electrical Breakdown in PN junctions
43 4 Zener and avalanche break down
44 4 Tunnel Diode basics
45 4 Metal Semiconductor contacts
46 4 Ohmic and Rectifying Contacts
47 4 Ohmic and Rectifying Contacts
48 4 current voltage characteristics
49 4 Tutorials
50 4 Tutorials
51 4 Tutorials
52 5 Bipolar junction transistor
53 5 current components
54 5 Minority carrier distributions
55 5 basic parameters
56 5 Evaluation of terminal currents (based on physical dimensions)

Department of EC, RSET 59


Semester III, Course Hand-Out

57 5 Evaluation of terminal currents (based on physical dimensions)


58 5 Transistor action
59 5 Base width modulation
60 6 Metal Insulator semiconductor devices
61 6 The ideal MOS capacitor
62 6 band diagrams at equilibrium, accumulation depletion and inversion
63 6 surface potential
64 6 CV characteristics
65 6 effects of real surfaces, work function difference
66 6 interface charge
67 6 threshold voltage
68 6 MOSFET: Output characteristics, transfer characteristics
69 6 sub threshold characteristics, MOSFET scaling (basic concepts)
70 6 FinFET-structure and operation

Department of EC, RSET 60


Semester III, Course Hand-Out

6.3 SAMPLE QUESTIONS

Assignment 1

1) Derive n0p0 = ni2 from fundamentals


2) A Silicon sample is doped with 1017 boron atoms/cm3. What is the equilibrium electron
and hole concentrations at 300K? Where is EF relative to Ei. Draw the energy band
diagram. Intrinsic carrier concentration of Silicon is 1.5 x 1010 at300K.
3) A Silicon bar of 100 cm long and 1 cm2 cross sectional area is doped with 1017Arsenic=
atoms/cm3. Calculate electron and hole concentrations at 300K. Also find the conductivity
and the current with 10V applied. Electron mobility at this doping is 700 cm2/V-sec.
4) How will you determine the type of a semiconductor specimen?

Assignment 2

1) Derive the expression for minority carrier distribution and terminal currents in a transistor.
2) A Silicon n-channel MOSFET has μn= 600 cm2/V-sec, Cox= 1.2x1017 F/cm2, z=50 μm,
L=10 μm and VTH= 0.8V. Find he drain current when i) VGS=2V and VDS=1V ii) VGS=3V
and VDS=5V.
3) Derive the expression for drain current of a MOSFET.
4) Draw and explain the structure of FINFET.

Module 1

1. With neat energy diagram, explain the location of Fermi level in intrinsic, n type and p

type semiconductors.

2. Explain direct and indirect band gap semiconductors with examples.

3. Draw energy band diagrams for metal, semiconductor and insulator.

4. properties of an intrinsic semiconductor.

5. Explain Fermi- Dirac distribution function

6. What is effective mass?

7. Define and explain Mobility and conductivity. With necessary diagrams and equations,

explain the dependence of the above two in a semiconductor on temperature

8. Explain the bonding in (i) metals; (ii) semiconductors; and (iii) insulators.

9. Show that the intrinsic Fermi level lies in the middle of the band gap

10. Explain the effect of temperature and doping on the mobility and conductivity of a
semiconductor

Department of EC, RSET 61


Semester III, Course Hand-Out

Module 2

1. Derive tire expression for carrier concentration in a semiconductor and explain


2. State and explain the significance of Einstein equation
3. Explain about excess carriers
4. Explain generation and recombination mechanism.
5. what do you mean by quasi fermi level
6. Derive continuity equation
7. Derive the equation for gradient of quasi fermi level
8. Derive the diffusion length
9. what is the importance of gradient of quasi fermi level
10. Explain recombination in a indirect material

Module 3

1. Derive the equation for contact potential


2. draw the electric field at the junction
3. Draw the charge density at the junction
4. Derive ideal diode equation
5. Draw all components of current n a forward based diode
6. derive the equation for potential at the junction
7. what do you mean by piece wise linear model
8. effect of temperature on VI characteristics
9. Draw the energy band diagram of a diode.
10. Explain the working of PN junction

Module 4

1. Explain Diffusion capacitance and space charge capacitance of a pn junction


2. Explain the phenomena of Zener breakdown. Describe clearly, why it is not a destructive
type.
3. Application of tunnel diode
4. Explain the constructional details and principle of tunnel diode
5. explain the avalanche breakdown
6. explain the working of Metal - semiconductor.
7. Explain in detail the V-I characteristics of Zener diode
8. sketch the VI characteristics (forward and reverse) of a rectifier diode.
9. What is ratifying contact
10. what will happen if a high switching signal is applied

Module 5

1. Explain the working of BJT


2. Discuss about the current components in BJT
3. explain about the minority carrier distribution in BJT
4. what are the parameters of BJT
5. What is base width modulation

Department of EC, RSET 62


Semester III, Course Hand-Out

6. what do you mean by early effect


7. Draw the input and output characteristics on BJT
8. How doping affect parameters
9. Draw energy band diagram of non transistor
10. Explain about transistor action

Module 6

1. Importance of Metal- semiconductor device


2. explain about ideal MOS capacitor
3. Explain about the accumulation process
4. discuss about the effects of real surface
5. What do you mean by work function
6. Discuss about MOSFET output characteristics
7. Explain about depletion and inversion
8. Discuss about MOSFET transfer characteristics
9. Discuss about MOSFET Scaling
10. Discuss about Fin FET

Department of EC, RSET 63


Semester III, Course Hand-Out

7
EC 205
ELECTRONIC CIRCUITS

Department of EC, RSET 64


Semester III, Course Hand-Out

7.1 COURSE INFORMATION SHEET

PROGRAMME: Electronics & DEGREE: BTECH


Communication Engg.
COURSE: Electronic Circuits SEMESTER: S3 CREDITS: 4
COURSE CODE: EC205 COURSE TYPE: CORE /ELECTIVE /
REGULATION: 2016 BREADTH/ S&H
COURSE AREA/DOMAIN: ELECTRONICS CONTACT HOURS: 3+1 (Tutorial)
hours/Week.
CORRESPONDING LAB COURSE CODE LAB COURSE NAME:Electronic Circuits Lab
(IF ANY): EC 207

SYLLABUS:
UNIT DETAILS HOURS
I
RC Circuits: Response of high pass and low pass RC circuits to sine, step,
pulse and square wave inputs, Differentiator, Integrator BJT biasing circuits:
10
Types, Q point, Bias stability, Stability factors, RC coupled amplifier and
effect of various components, Concept of DC and AC load lines, Fixing of
operating point, Classification of amplifiers.
II
Small signal analysis of CE, CB and CC configurations using small signal
hybrid π model (gain, input and output impedance). Small signal analysis of 7
BJT amplifier circuits, Cascade amplifier
III
High frequency equivalent circuits of BJT, Short circuit current gain, cutoff
frequency, Miller effect, Analysis of high frequency response of CE, CB and 8
CC amplifiers Wide band amplifier: Broad banding techniques, low
frequency and high frequency compensation, Cascode amplifier
IV
Feedback amplifiers: Effect of positive and negative feedback on gain,
frequency response and distortion, Feedback topologies and its effect on input
and output impedance, Feedback amplifier circuits in each feedback
topologies (no analysis required) Oscillators & Tuned Amplifiers: 9
Classification of oscillators, Barkhausen criterion, Analysis of RC phase shift
and Wien bridge oscillators, Working of Hartley, Colpitts and Crystal
oscillators; Tuned amplifiers, synchronous and stagger tuning
V Power amplifiers: Classification, Transformer coupled class A power
amplifier, push pull class B and class AB power amplifiers, efficiency and
distortion, Transformer-less class B and Class AB power amplifiers, Class C 11
power amplifier (no analysis required) Switching Circuits: Simple sweep
circuit, Bootstrap sweep circuit, Astable, Bistable, and
Monostablemultivibrators, Schmitt Trigger

Department of EC, RSET 65


Semester III, Course Hand-Out

VI Transistor based voltage regulator: Design and analysis of shunt and series
voltage regulator, load and line regulation, Short circuit protection MOSFET
amplifiers: Biasing of MOSFET amplifier, DC analysis of single stage 9
MOSFET amplifier, small signal equivalent circuit. Small signal voltage and
current gain, input and output impedances of CS configuration,
MOSFETCascade amplifier
TOTAL HOURS 54 hrs.

TEXT/REFERENCE BOOKS:
T/R BOOK TITLE/AUTHORS/PUBLICATION
1 Sedra and Smith: Microelectronic Circuits, 4/e, Oxford University Press 1998.
2 B. Razavi , “Fundamentals of Microelectronics”, Wiley
3 Donald A Neamen. : Electronic Circuit Analysis and Design, 3/e, TMH.

4 Millman and Halkias: Integrated Electronics, TMH, 2004.

5 Spencer &Ghausi: Introduction to Electronic Circuit Design, Pearson Education, 2003.


6 Roger T. Howe, Charles G. Sodini: Microelectronics: An Integrated Approach, Pearson
Education, 1997.

7 R E Boylstead and L Nashelsky: Electronic Devices and Circuit Theory, 9/e, Pearson
Education

COURSE PRE-REQUISITES:
C.CODE COURSE NAME DESCRIPTION SEM
BE101- Basic Electronics Engineering Students should know about basic 1stSem
104 electronics components like BJT,
diode, Resistor etc&its working

COURSE OBJECTIVES:
1 To understand concept of RC circuits
2 To provide insight into the working , analysis and design of basic analog circuits using
BJT
3 To understand different types of power amplifiers, feedback amplifiers& Oscillators
4 To understand concepts of switching circuits
5 To provide insight into the working , analysis and design of different types of voltage
regulator
6 To provide insight into the working , analysis and design of basic analog circuits using
MOSFET

COURSE OUTCOMES:
SNO DESCRIPTION
1 Student has knowledge about the working of RC circuits&working of amplifier

Department of EC, RSET 66


Semester III, Course Hand-Out

using BJT

2 Student has knowledge about BJT with different configurations and its small signal
analysis

3 Student has knowledge about BJT with high frequency analysis

4 Student has knowledge about feedback amplifiers& Oscillators

5 Student has knowledge about power amplifiers& switching circuits

6 Student has knowledge about Design & analysis of voltage regulator .

Student has knowledge about working of amplifier using MOSFET &its small
signal analysis

CO-PO-PSO MAPPING:
Programme-
CO Programme Outcomes (POs) specific Outcomes
No. (PSOs)
1 2 3 4 5 6 7 8 9 10 11 12 1 2 3
1 3 3 3 2 2 2 2 1 3 3 1
2 3 3 3 2 2 2 2 1 3 3 1
3 3 3 3 2 2 2 2 1 3 3 1
4 3 3 3 2 2 2 2 1 3 3 1
5 3 3 3 2 2 2 2 1 3 3 1
6 3 3 3 2 2 2 2 1 3 3 1
EC01
3 3 3 2 2 2 2 1 3 3 1
0 205

JUSTIFICATION FOR CO-PO-PSO CORRELATION:

P PO PSO
PO1 PO2 PO3 PO4 PO5 PO6 PSO1 PSO2
O9 10 3
Imple Gro
Working Working Can ment up
Circu Imple
of RC of RC impl ation Assi
it ment
circuits/ circuits/ eme & gnm
Design Impl Mi ation
BJT BJT nt Desig ent,
of Design/p emen cr se &
C derivatio derivatio circu n of Sem
Integrato roblems taion o mi Desig
O n– n– it for analo inar
r& of RC using Pr nar n of
1 require require daily g and
Differen Circuit TIN oje s analo
mathem mathem life Circu Stud
tiator A TI/ ct g
atical atical appli its y of
PSPI Circu
backgro backgro catio using syst
CE its
und und ns TIN em
A TI/ upgr

Department of EC, RSET 67


Semester III, Course Hand-Out

PSPI adat
CE ion

Imple Gro
ment up
Analysis Can ation Assi
Circu Imple
of impl & gnm
it ment
CB/CC/ Analysis eme Desig ent,
Design / Impl M ation
CE of Design nt n of Sem
Design/p emen icr se &
C config: - CB/CC/ of circuit circu analo inar
roblems taion o mi Desig
O BJT CE – it for g and
of circuit using Pr nar n of
2 require config: - amplifie daily Circu Stud
amplifie TIN oje s analo
mathem BJT r-bjt life its y of
r-bjt A TI/ ct g
atical appli using syst
PSPI Circu
backgro catio TIN em
CE its
und ns A TI/ upgr
PSPI adat
CE ion
Imple Gro
High
ment up
frequenc
Can ation Assi
y Circu Imple
High impl & gnm
Analysis it ment
frequenc eme Desig ent,
of Impl Mi ation
y Amplifie nt n of Sem
CB/CC/ Amplifie emen cr se &
C Analysis r circu analo inar
CE r taion o mi Desig
O of design/p it for g and
config: - design( using Pr nar n of
3 CB/CC/ blm daily Circu Stud
BJT HF) TIN oje s analo
CE (HF) life its y of
require A TI/ ct g
config: - appli using syst
mathem PSPI Circu
BJT catio TIN em
atical CE its
ns A TI/ upgr
backgro
PSPI adat
und
CE ion
Gro
up
Can Assi
Circu Imple
impl gnm
Circuit it ment
Feed Feed Circuit eme ent,
design/p Impl Mi ation
back back design nt using Sem
roblems emen cr &
C amplifie amplifie Feed circu Se TIN inar
Feed taion o Desig
O r/Oscilla r/Oscilla back it for mi A TI/ and
back using Pr n of
4 tirs - tors - amplifie daily nar PSPI Stud
amplifie TIN oje analo
derivatio derivatio r/Osciila life CE y of
r/Osciila A TI/ ct g
n n tors appli syst
tors PSPI Circu
catio em
CE its
ns upgr
adat
ion

Department of EC, RSET 68


Semester III, Course Hand-Out

Gro
up
Can Assi
Circu Imple
impl gnm
it ment
power Circuit eme ent,
power Circuit Impl Mi ation
amplifie design/p nt using Sem
amplifie design emen cr &
C r/Multivi roblems circu Se TIN inar
r/Multivi power taion o Desig
O brators - power it for mi A TI/ and
brators - amplifie using Pr n of
5 - amplifie daily nar PSPI Stud
derivatio r/Multivi TIN oje analo
derivatio r/Multivi life CE y of
n brators - A TI/ ct g
n brators - appli syst
PSPI Circu
catio em
CE its
ns upgr
adat
ion
Gro
up
Can Assi
Circu Imple
Circuit impl gnm
it ment
Voltage Voltage design/p eme ent,
Circuit Impl Mi ation
Regulato Regulato roblems nt using Sem
design emen cr &
C rs/MOS rs/MOS Voltage circu Se TIN inar
Voltage taion o Desig
O FET – FET – Regulato it for mi A TI/ and
Regulato using Pr n of
5 derivatio derivatio rs/MOS daily nar PSPI Stud
rs/MOS TIN oje analo
n, n, FET – life CE y of
FET – A TI/ ct g
Analysis Analysis amplifie appli syst
PSPI Circu
r catio em
CE its
ns upgr
adat
ion

GAPS IN THE SYLLABUS - TO MEET INDUSTRY/PROFESSION REQUIREMENTS:


SNO DESCRIPTION PROPOSED
ACTIONS
1 Introduction to MOSFET, characteristics, region of Lecture/Test
operations

PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY


VISIT/GUEST LECTURER/NPTEL ETC

TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:


S DESCRIPTION PO MAPPING
No:
1 To learn TINA TI software by simulating the 1,2,3,4,5,6,9,10
circuits in the syllabus and this will help the
students to perform well in the lab also.

Department of EC, RSET 69


Semester III, Course Hand-Out

DESIGN AND ANALYSIS TOPICS:


Sl. DESCRIPTION PO MAPPING
No.
1 Design & analysis of RC coupled amplifier 1,2,3,4,5,6,9,10

WEB SOURCE REFERENCES:


1 cc.ee.ntu.edu.tw/~lhlu/eecourses/Electronics1/Electronics_Ch4.pdf
2 www.techpowerup.com/articles/overclocking/voltmods/21

3 www.electronics-tutorials.ws › RC Networks
4 www.pa.msu.edu/courses/2014spring/PHY252/Lab4.pd
5 www.iet.ntnu.no/courses/ttt4100/oppg1_eng.pdf

DELIVERY/INSTRUCTIONAL METHODOLOGIES:
☑ CHALK & TALK ☑ STUD. ☑ WEB
ASSIGNMENT RESOURCES
☐ LCD/SMART STUD. SEMINARS ☐ ADD-ON
BOARDS COURSES

ASSESSMENT METHODOLOGIES-DIRECT
☑ ASSIGNMENTS STUD. SEMINARS ☑ TESTS/MODEL ☑ UNIV.
EXAMS EXAMINATION
☐ STUD. LAB ☐ STUD. VIVA ☐ MINI/MAJOR ☐
PRACTICES PROJECTS CERTIFICATIONS
☐ ADD-ON ☐ OTHERS
COURSES

ASSESSMENT METHODOLOGIES-INDIRECT
☑ ASSESSMENT OF COURSE OUTCOMES ☑ STUDENT FEEDBACK ON
(BY FEEDBACK, ONCE) FACULTY (TWICE)
☐ ASSESSMENT OF MINI/MAJOR ☐ OTHERS

Department of EC, RSET 70


Semester III, Course Hand-Out

PROJECTS BY EXT. EXPERTS

Prepared by Approved by

Jisa David Dr. Jobin K Antony


(Faculty) (HOD)

Department of EC, RSET 71


Semester III, Course Hand-Out

7.2 COURSE PLAN

SL MODUL TOPICS
NO E
1 1 Introduction to the course
2 1 RC LPF & HPF - Response to sinusoidal inputs - Qualitative and
Quantitative analysis
3 1 RC LPF & HPF - Response to step input - Qualitative and Quantitative
analysis
4 1 RC LPF & HPF - Response to sinusoidal inputs - Qualitative and
Quantitative analysis
5 1 Tutorial - Problem Solving - RC circuits
6 1 RC LPF & HPF - Response to pulse inputs
7 1 RC LPF & HPF - Response to pulse input
8 1 RC LPF & HPF - Response to periodic pulse train
9 1 RC LPF & HPF - special cases of time constant
10 1 RC LPF & HPF - special cases of time constant
11 1 RC Integrator & Differentiator
12 1 Problem Solving - RC circuits
13 1 Tutorial - RC circuits
14 1 Biasing - need, stabilization & stability factors
15 1 BJT biasing circuits - Fixed and Emitter bias circuits
16 1 BJT biasing circuits - Voltage divider and Collector feedback circuits
17 1 Tutorial - BJT Biasing circuits
18 1 Transistor in the active region; Fixing of Q-point
19 1 RC Coupled amplifier & Concept of AC and DC loadlines
20 2 Small-signal hybrid pi model of a BJT
21 2 Small signal analysis of CE amplifier
22 2 Small signal analysis of CE amplifier
23 2 Small signal analysis of CE amplifier without emitter bypass capacitor
24 2 Small signal analysis of CB amplifier
25 2 Small signal analysis of CC amplifier
26 2 Cascade Amplifier

Department of EC, RSET 72


Semester III, Course Hand-Out

27 2 Small signal analysis of BJT amplifiers - Tutorial


28 3 High frequency equivalent circuit of BJT, short circuit current gain, cut-
off frequency
29 3 Miller effect, Analysis of High frequency response of CE Amplifier
30 3 Analysis of High frequency response of CB Amplifier
31 3 Analysis of High frequency response of CC Amplifier
32 3 Cascode Amplifier
33 3 Broad banding Techniques - Low frequency and high frequency
compensation
34 4 Feedback Amplifiers - Effect on gain, frequency response and distortion
35 4 Feedback topologies & circuits, effect of feedback on input & output
impedances
36 4 Oscillators - Classification, Barkheusen criterion, Analysis of RC phase
shift oscillator
37 4 Analysis of Wien Bridge Oscillator, Working of Hartley, Colpitts and
Crystal oscillators
38 4 Tuned Amplifiers - synchronous and stagger tuning
39 4 Tuned Amplifiers - synchronous and stagger tuning
40 5 Power Amplifiers - Classification, Transformer coupled Class A power
amplifier
41 5 Power Amplifiers - Push-pull class B and class AB power amplifiers
42 5 Transformerless class B and class AB power amplifiers, class C power
amplifier
43 5 Switching Circuits: Simple sweep circuit, Bootstrap sweep circuit
44 5 Astable and bistablemultivibrators
45 5 Monostablemultivibrators
46 5 Schmitt trigger
47 5 Tutorial - Power amplifiers and switching circuits
48 6 Transistor-based voltage regulators
49 6 Transistor-based voltage regulators
50 6 Revision of MOSFET basics; Developing small signal model of
MOSFET
51 6 Biasing and DC analysis of single-stage MOSFET amplifier
52 6 Small-signal analysis of MOSFET amplifier
53 6 Small-signal analysis of MOSFET amplifier
54 6 Small-signal analysis of MOSFET amplifier

Department of EC, RSET 73


Semester III, Course Hand-Out

55 6 MOSFET Cascade amplifier


56 6 Tutorial - MOSFET amplifiers
57 1 Revision: Module -1
58 2 Revision: Module II & III
59 4 Revision: Module IV & V
60 6 Revision: Module VI

Department of EC, RSET 74


Semester III, Course Hand-Out

7.3 SAMPLE QUESTIONS

 Assigment mark is based on


1. Class Notes
2. Class Test(Module Wise( Two Tests)) + submit solution of QP
3. Solve problems of previous year QPs.
4. Micro Projects –

Class Test – Module I

Planned date: August 2nd week Duration: 20 minutes

1. Design a differentiating network to have a trigger pulse with a square wave input of
10 V amplitude, 50% duty cycle and 100 Hz repetition rate. Source and load
impedances may be taken to be equal to 50 Ω and 1000 Ω respectively. (Roll No: 1-9)
2. A 10 Hz symmetrical square wave whose peak to amplitude is 2V impressed upon a
high pass circuit whose lower 3-dB frequency is 5Hz. Calculate and sketch the
waveform. In particular what is the peak output amplitude?(Roll No: 10-18)
3. Derive in terms of time constant of the RC circuit:(Roll No: 19-27)
a. Lower cut-off frequency of a RC HPF
b. Rise time of a RC LPF with pulse input
c. Percentage tilt of output of high pass RC circuit
4. A 20-Hz symmetric square wave referenced to 0 volts and, with a peak-to-peak
amplitude of 10 V, is fed to an amplifier through the high pass RC network Calculate
and plot the output waveform when the lower 3-dB frequency is: (i) 0.6 Hz, (ii) 6 Hz
(Roll No: 28-36)
5. Determine the following for the fixed-bias configuration - (a) IBQ and ICQ. (b)
VCEQ. (c) VB and VC. (d) VBC. Also determine the saturation level for the network.
(Roll No: 37-45)

6. For the emitter bias network, determine: (a) IB. (b) IC. (c) VCE. (d) VC. (e) VE. (f)
VB. (g) VBC. Also determine the saturation level for the network (Roll No: 46-54)

7. Subject to the restriction that RL = 0 Ω, show that the input resistance of CC and CE
configurations are identical, using the hybrid-pi equivalent circuits.

Department of EC, RSET 75


Semester III, Course Hand-Out

(Roll No: 55 - 63)

Class Test - Module II

Planned date: Sep 4th week Duration: 20 minutes

1. The circuit parameters for the circuit in Fig. 1 are VCC = 3.3 V, VBB = 0.850 V, RB =
180 k, and RC = 15 k. The transistor parameters are β = 120 and VBE(on) = 0.7 V. (a)
Determine the Q-point values ICQ and VCEQ. (b) Find the small-signal hybrid-π
parameters gm and rπ . (c) Calculate the small-signal voltage gain. (d) Find iB, vBE,
and vCE for vs = 0.065 sinωt V. (Roll No: 1- 9)

Fig. 1

2. For fig. 1, assume transistor parameters of β = 150, VBE(on) = 0.7 V, and VA = 150
V. The circuit parameters are VCC = 5 V, VBB = 1.025 V, RB = 100 k , and RC =
6 k. (a) Determine the small-signal hybrid-π parameters gm, rπ , and ro. (b) Find the
small-signal voltage gain Av = Vo/Vs. (Roll No: 10- 18)
3. For the circuit in Figure 2, let β = 90, VA = 120 V, VCC = 5 V, VEB(on) = 0.7 V, RC
= 2.5 k, RB = 50 k, and VBB = 1.145 V. (a) Determine the small-signal hybrid-π
parameters rπ , gm, and ro. (b) Find the small-signal voltage gain, Av = vo/vs . (Roll
No: 19- 27)

Fig. 2

4. For the circuit in Figure 4, let RE = 0.6k, RC = 5.6k , β = 120, VBE(on) = 0.7 V, R1 =
250 k, and R2 = 75 k. (a) For VA =∞, determine the small-signal voltage gain Av. (b)
Determine the input resistance looking into the base of the transistor.
(Roll No: 28- 36)

Department of EC, RSET 76


Semester III, Course Hand-Out

Fig. 4
5. The parameters of the circuit shown in Figure 4 are changed to VCC = 5 V, RC = 4
k, RE = 0.25 k, RS = 0.25 k, R1 = 100 k, and R2 = 25 k. The transistor parameters are
β = 120, VBE(on) = 0.7 V, and VA =∞. Determine the small-signal voltage gain.
(Roll No: 37- 45)
6. For the circuit shown in Figure 4, let β = 100, VBE(on) = 0.7V, and VA =∞. Design a
bias-stable circuit such that ICQ = 0.5 mA, VCEQ = 2.5 V, and Av = −8. (Roll No:
46- 54)
7. For the circuit in Figure 4, the small-signal voltage gain is given approximately by
−RC/RE . For the case of RC = 2k, RE = 0.4k, and RS = 0, what must be the value of β
such that the approximate value is within 5 percent of the actual value? (Roll No: 55-
63)

Class Test - Module V& VI

Planned Date: Nov 4th week Duration: 20 minutes

1. A transformer coupled class A power amplifier supplies power to a iron load.


Determine the max power output for a zero signal Ic of 80 mA, if transformer turn
ratio is 10:1 (Roll No: 01- 09).

2. For a class B amplifier providing 20V peak signal to a 16Ω load and a power supply
of Vcc=30V, determine the input power, output power and circuit efficiency. (Roll No:
10 - 18)
3. Explain working of Class AB & Class C amplifier (Roll No: 19 - 27)
4. Explain DC analysis of single stage MOSFET amplifier. ID=4mA at VGS=10V,
Vt=4V. Calculate VGS, VDS (Roll No: 28 - 36)

5. In the following MOSFET amplifier circuit, find out small signal voltage gain.

Department of EC, RSET 77


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(Roll No: 37- 45)

6. In the following MOSFET amplifier circuit, two transistors are identical, Vt=2V,
K=2mA/V2 . find out small signal voltage gain. (Roll No: 46 - 54)

Explain cascade amplifier using MOSFET

MODULE 1

RC Circuits
8. A 10 Hz symmetrical square wave whose peak to amplitude is 2V impressed upon a
high pass circuit whose lower 3-dB frequency is 5Hz. Calculate and sketch the
waveform. In particular what is the peak output amplitude?
9. An ideal 1 sec. pulse is fed to an amplifier. Calculate and plot the output waveform
under the following conditions; the upper 3dB frequency is (i) 10 MHz (ii) 1 MHz,
(iii) 0.1 MHz.
10. Design a differentiating network to have a trigger pulse with a square wave input of
10 V amplitude, 50% duty cycle and 100 Hz repetition rate. Source and load
impedances may be taken to be equal to 50 Ω and 1000 Ω respectively.
11. A low pass filter with lower cut-off frequency 2 kHz uses a capacitor of 0.01 uF.
Draw the circuit and find the resistance value
12. Draw the RC integrating circuit and prove that the output is the time integral of the
input. Sketch its output waveforms for (a) sine input (b)square input and (c)triangular
input
13. Explain the response of a RC low pass filter for an input of (a) pulse (b) sine (c)
square wave. Show the waveform.
14. Derive in terms of time constant of the RC circuit:
a. Lower cut-off frequency of a RC HPF
b. Rise time of a RC LPF with pulse input
c. Percentage tilt of output of high pass RC circuit

Department of EC, RSET 78


Semester III, Course Hand-Out

15. A pulse is applied to a low pass RC circuit. Prove by direct integration that the area
under the pulse is same as the area under the output waveform across the capacitor.
Explain the result.
16. A pulse of 60 V amplitude and width 2 ms is applied to a high pass RC circuit. At
time t = 0 s, the uncharged capacitor in the circuit starts charging. At t = 2 ms, the
voltage across the capacitor is 5 volts. Draw the output waveform and calculate its
percentage tilt.

17. A 20-Hz symmetric square wave referenced to 0 V and, with peak-to-peak amplitude
of 10 V, is fed to an amplifier through the high pass RC network. Plot the output
waveform when the lower 3-dB frequency is: (i) 0.6 Hz (ii) 6 Hz
18. A pulse of 10 V amplitude and duration 1 ms is applied to a high-pass RC circuit with
R = 20kΩ and C = 0.5µF. Plot the output waveform and calculate the percent tilt in
the output.

19. A square wave of pulse width 2 ms and peak amplitude of 12 V as shown in fig. is
applied to a high-pass RC circuit with time constant 4 ms. Plot the first four cycles of
the output waveform. T/2 = 2 ms

20. Design an RC circuit to get output voltage signal 2sin(6000t - 600 )from an input
4sin(6000t).
21. Design an integrator circuit for a given input Vin=20 sin(6000t). Draw the input and
output waveforms.

22. A 10 Hz symmetrical square wave whose peak to amplitude is 2V impressed upon a


high pass circuit whose lower 3-dB frequency is 5Hz. Calculate and sketch the
waveform. In particular what is the peak output amplitude?

23. The input to a high-pass RC circuit is shown in Fig. Plot the output waveform. Given
that the time constant of the circuit is 0.1 ms.

24. A 10 Hz square wave is fed to an amplifier. Calculate and plot the output under the
following conditions; the lower 3 dB frequency is (i) 0.3 Hz (ii) 3.0 Hz (c) 30 Hz.
25. A square wave whose peak-to-peak value is 1V extends  0. 5V with respect to
ground. The duration of the positive section is 0.1 sec and of the negative section is

Department of EC, RSET 79


Semester III, Course Hand-Out

0.2 sec. If this waveform is impressed upon an RC differentiating circuit whose time
constant is 0.2 sec., what are the steady state maximum and minimum values of the
output waveform?
(a) Prove that the area under the positive section equals that under the negative
section of the output waveform. What is the physical significance of this result?
(b) Write the equations to determine the output voltage.

BJT Biasing Circuits


1. Determine the following for the fixed-bias configuration - (a) IBQ and ICQ. (b)
VCEQ. (c) VB and VC. (d) VBC. Also determine the saturation level for the network.

2. For the emitter bias network, determine: (a) IB. (b) IC. (c) VCE. (d) VC. (e) VE. (f)
VB. (g) VBC. Also determine the saturation level for the network

3. For the above two circuits, prepare a table and compare the bias voltage and currents
of the circuits for the given value of β = 50 and for a new value of β = 100. Compare
the changes in IC and VCE for the same increase in β.
4. Determine the dc bias voltage VCE and the current IC for the voltage-divider
configuration. Repeat the analysis if β is reduced to 70, and compare solutions for
ICQ and VCEQ.

5. Determine the quiescent levels of ICQ and VCEQ for the network. Repeat using a
beta of 135

Department of EC, RSET 80


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6. Determine the dc level of IB and VC for the network

7. For the network: (a) Determine ICQ and VCEQ. (b) Find VB, VC, VE, and VBC.

8. Determine VC and VB for the network

9. Determine VCEQ and IE for the network

10. Determine the voltage VCB and the current IB for the common-base configuration

Department of EC, RSET 81


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11. Determine VC and VB for the network

12. Given the device characteristics, determine VCC, RB, and RC for the fixed bias
configuration

13. Given that ICQ =2 mA and VCEQ =10 V, determine R1 and RC for the network

14. The emitter-bias configuration has the following specifications: ICQ = 0.5 ICsat,
ICsat = 8 mA, VC = 18 V, and β = 110. Determine RC, RE, and RB.

Table 1: Questions 15 – 17

Department of EC, RSET 82


Semester III, Course Hand-Out

15. Calculate the stability factor S(ICBO)and the change in IC from 25°C to 100°C for the
transistor defined by the Table 1 above for the following emitter-bias arrangements.
(a) RB/RE = 250
(b) RB/RE = 10
(c) RB/RE = 0.01
16. Determine the stability factor S(VBE) and the change in IC from 25°C to 100°C for
the transistor defined by Table1 for the following bias arrangements.
(a) Fixed-bias with RB = 240 k and β = 100.
(b) Emitter-bias with RB =240 k, RE =1 k, and β = 100.
(c) Emitter-bias with RB = 47 k, RE = 4.7 k, and β = 100.
17. Determine ICQ at a temperature of 100°C if ICQ = 2 mA at 25°C. Use the transistor
described by Table 1, where β1= 50 and β2= 80, and a resistance ratio RB/RE of 20

MODULE 2
Practice Problems
(Electronic Circuits: Donald A. Neaman)

Fig. 1
6. The circuit parameters for the circuit in Fig. 1 are VCC = 3.3 V, VBB = 0.850 V, RB =
180 k, and RC = 15 k. The transistor parameters are β = 120 and VBE(on) = 0.7 V. (a)
Determine the Q-point values ICQ and VCEQ. (b) Find the small-signal hybrid-π
parameters gm and rπ . (c) Calculate the small-signal voltage gain. (d) Find iB, vBE,
and vCE for vs = 0.065 sinωt V.
(Ans. (a) ICQ = 0.1 mA, VCEQ = 1.8 V; (b) gm = 3.846 mA/V, rπ = 31.2 k; (c) Av =
−8.52, iB = 0.833 + 0.308 sinωt μA, vBE = 0.7 + 0.00960 sinωt V, vCE = 1.8 − 0.554
sinωt V)
7. For fig. 1, assume transistor parameters of β = 150, VBE(on) = 0.7 V, and VA = 150
V. The circuit parameters are VCC = 5 V, VBB = 1.025 V, RB = 100 k , and RC =

Department of EC, RSET 83


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6k . (a) Determine the small-signal hybrid-π parameters gm, rπ , and ro. (b) Find
the small-signal voltage gain Av = Vo/Vs.
(Ans. (a) gm = 18.75 mA/V, rπ = 8 k, ro = 308 k ; (b) Av = −8.17)

Fig. 2
8. For the circuit in Figure 2, let β = 90, VA = 120 V, VCC = 5 V, VEB(on) = 0.7 V, RC
= 2.5 k, RB = 50 k, and VBB = 1.145 V. (a) Determine the small-signal hybrid-π
parameters rπ , gm, and ro. (b) Find the small-signal voltage gain, Av = vo/vs .
(Ans. (a) gm = 30.8 mA/V, rπ = 2.92 k , ro =150 k (b) Av = −4.18)

Fig. 4
9. For the circuit in Figure 4, let RE = 0.6k, RC = 5.6k , β = 120, VBE(on) = 0.7 V, R1 =
250 k, and R2 = 75 k. (a) For VA =∞, determine the small-signal voltage gain Av. (b)
Determine the input resistance looking into the base of the transistor.
(Ans. (a) Av = −8.27, (b) Rib = 80.1 k)
10. The parameters of the circuit shown in Figure 4 are changed to VCC = 5 V, RC = 4
k, RE = 0.25 k, RS = 0.25 k, R1 = 100 k, and R2 = 25 k. The transistor parameters are
β = 120, VBE(on) = 0.7 V, and VA =∞. Determine the small-signal voltage gain.
(Ans. Av = −13.6)
11. For the circuit shown in Figure 4, let β = 100, VBE(on) = 0.7V, and VA =∞. Design a
bias-stable circuit such that ICQ = 0.5 mA, VCEQ = 2.5 V, and Av = −8.
(Ans. To a good approximation: RC = 4.54 k, RE = 0.454 k, R1 = 24.1k, and R2 = 5.67 k)
12. For the circuit in Figure 4, the small-signal voltage gain is given approximately by
−RC/RE . For the case of RC = 2k, RE = 0.4k, and RS = 0, what must be the value of β
such that the approximate value is within 5 percent of the actual value?

Department of EC, RSET 84


Semester III, Course Hand-Out

(Ans. β = 76)

Fig. 5
13. The circuit shown in Fig. 5 has parameters RE = 0.3 k, RC = 4 k, R1 = 14.4 k, R2 =
110 k_ and RL = 10 k. The transistor parameters are β = 100, VEB(on) = 0.7 V, and
VA =∞. (a) Determine the quiescent values ICQ and VECQ. (b) Find the small-signal
parameters gm, rπ , and ro. (c) Determine the small-signal voltage gain.
(Ans. (a) ICQ = 1.6 mA, VECQ = 5.11 V; (b) gm = 61.54 mA/V, rπ = 1.625 k, ro =∞; (c) Av
= −8.95).

Fig. 6

14. The circuit in Fig. 6 has parameters V+ = 5 V, V− = −5 V, RE = 4 k , RC = 4 k, RB =


100 k, and RS = 0.5 k. The transistor parameters are β = 120, VBE(on) = 0.7 V, and
VA = 80 V. (a) Determine the input resistance seen by the signal source. (b) Find the
small-signal voltage gain.
(Ans. (a) Ri = 3.91 k , (b) Av = −114)

Fig. 6
15. For the circuit in Fig. 6 above, let β = 125, VBE(on) = 0.7 V, and VA = 200 V. (a)
Determine the small-signal voltage gain Av. (b) Determine the output resistance Ro.

Department of EC, RSET 85


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(Ans. (a) Av = −50.5 (b) Ro = 2.28 k)


16. For the circuit shown in Fig. 6, let VCC = 12 V, RE = 30Ω, R1 = 1.3 k, R2 = 4.2 k,
and RS = 0. The transistor parameters are β = 80, VBE(on) = 0.7 V, and VA = 75 V.
(a) Determine the quiescent values IEQ and VCEQ. (b) Find the small-signal voltage
gain Av = Vo/Vs. (c) Determine the input resistance looking into the base of the
transistor. (d) Calculate the input and output resistance of the emitter-follower circuit
(e) For the case of RS = 0, determine the output resistance looking into the output
terminals.
(Ans. (a) IEQ = 0.2 A, VCEQ = 6 V; (b) Av = 0.9954; (c) Rib = 2.27 k (d) Ri = 22.2 k, Ro =
0.0320, Ro = 0.129 Ω )

MODULE 3

1. The transistor in the circuit in Fig. has parameters β=125, VBE (on) =0.7V, VA=200V,
Cπ=24pF & Cµ=3pF. Determine its upper cut-off frequency.

2. Determine 3dB frequency of the short circuit current gain of a bipolar transistor, given
rπ = 2.6kΩ, Cπ = 2pF and Cµ = 0.1pF.
3. BJT operating at IC=2mA, has Cµ=1PF, Cπ=10PF, β=150. Find FT & Fβ
4. In BJT, unit current gain bandwidth is 1GHz, β=200. At what frequency the
magnitude of Ai becomes 10.
5. Derive the expression for unity gain bandwidth of BJT.
6. Explain how Miller effect can be used to simplify high frequency analysis of BJT.
7. High Frequency analysis of CE, CB & CC configurations.
8. What is wide band amplifier and explain frequency compensation techniques.
9. Draw the high frequency equivalent circuit of cascode amplifier.
10. Derive necessary expressions for cascade configurations.

MODULE IV
1. Derive input impedance output impedance & gain of series series feedback
configuration. Draw the discrete circuit representation of this configuration.
2. Derive input impedance output impedance & gain of shunt shunt feedback
configuration. Draw the discrete circuit representation of this configuration.
3. Derive input impedance output impedance & gain of shunt series feedback
configuration. Draw the discrete circuit representation of this configuration.

Department of EC, RSET 86


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4. Derive input impedance output impedance & gain of shunt series feedback
configuration. Draw the discrete circuit representation of this configuration.
5. Consider a general feedback system with parameters A=106 and Af =100. If the
magnitude of A decreases by 20%, What is the corresponding percent change in A f ?
6. Explain the condition for sustained oscillation.
7. Explain working of RC phase shift Oscillator. Derive required expressions.
8. Explain working of Wein Bridge Oscillator. Derive required expressions.
9. Explain working of Hartley shift Oscillator. Derive required expressions.
10. Explain working of Colpitts Oscillator. Derive required expressions.
11. Explain working of Crystal Oscillator. Derive required expressions.
12. Explain working of Tuned amplifier. Derive required expressions.

MODULE V
1. With a neat circuit diagram, explain working of a transformer coupled class A power
amplifier. Derive the expression for its maximum efficiency.
2. With a neat circuit diagram, explain working of a class A power amplifier. Derive the
expression for its maximum efficiency.
3. With a neat circuit diagram, explain working of a transformer coupled class B power
amplifier. Derive the expression for its maximum efficiency.
4. With neat diagram and necessary waveforms, explain class AB power amplifier.
5. Explain Harmonic distortion.
6. A transformer coupled class A power amplifier supplies power to a iron load.
Determine the max power output for a zero signal Ic of 80 mA, if transformer turn
ratio is 10:1.

7. For a class B amplifier providing 20V peak signal to a 16Ω load and a power supply
of Vcc=30V, determine the input power, output power and circuit efficiency.
8. With neat diagram and necessary waveforms, explain class C power amplifier.
9. With a neat circuit diagram and waveforms explain working of astable multivibrator.
Derive expression for Time period.
10. With a neat circuit diagram and waveforms explain working of monostable
multivibrator. Derive expression for pulse width
11. With a neat circuit diagram and waveforms explain working of bistable multivibrator.
12. With a neat circuit diagram and waveforms explain working of Schmitt trigger.
13. With a neat circuit diagram and waveforms explain working of boot strap circuit.

14. In what way the design features of power transistors different from small signal
transistors?

15. What is the basis for the classification of power amplifiers? Mention different types of
power amplifiers?

16. Draw the circuit for commonly used class A – amplifier. If the amplifier draws 10W
of dc power, what is the maximum ac power available to the load?

Department of EC, RSET 87


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17. Draw the circuit for a push-pull amplifier and discuss its working.

18. Derive an expression for the efficiency of class B – power amplifiers.

19. What is harmonic distortion? How does it arise in Class B-operation? And, how can it
be corrected in push-pull circuit?

20. What do you understand by cross-over distortion? How can it be eliminated in Class
B-operation?

21. What reasons will you assign for higher conversion efficiency of Class B-amplifier as
compared to Class A –amplifier?

22. Draw a circuit for Class C- amplifier and discuss its working?

23. Among all the power amplifiers, Class C-amplifier has the maximum efficiency but
its use is restricted. Give reasons.
24. Calculate maximum ac output power in the amplifier shown in fig. (Assume VBE = 0)

1.

MODULE VI
1. Draw the small signal equivalent circuit of CS amplifier. Derive expression for Av, Ai,
Ri & Ro
2. Explain with neat diagram MOSFET cascade amplifier & derive expression for Av, Ai,
Ri & Ro
3. Explain the working of MOSFET amplifier.
4. Explain DC analysis of single stage amplifier. In the E-MOSFET given below,
ID=4mA at VGS=10V, Vt=4V. Calculate VGS, VDS
5. Explain basic theory of voltage regulator
6. Explain with diagrams series voltage regulator & shunt Voltage regulator.
7. Design series voltage regulator
8. Design shunt voltage regulator
9. Explain zener regulator
10. Explain line & load regulation.
11. In the following MOSFET amplifier circuit, find out small signal voltage gain.

Department of EC, RSET 88


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12. In the following MOSFET amplifier circuit, two transistors are identical, Vt=2V,
K=2mA/V2 . find out small signal voltage gain.

Department of EC, RSET 89


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8
EC 207
LOGIC CIRCUIT DESIGN

Department of EC, RSET 90


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8.1 COURSE INFORMATION SHEET

PROGRAMME: UG PROGRAMME IN DEGREE: BTECH


ELECTRONICS & COMMUNICATION
ENGINEERING
COURSE: : LOGIC CIRCUIT DESIGN SEMESTER: 3 CREDITS: 3
COURSE CODE: EC207 COURSE TYPE: CORE
REGULATION: 2016
COURSE AREA/DOMAIN: Electronics CONTACT HOURS: 4 hours/Week.
CORRESPONDING LAB COURSE CODE LAB COURSE NAME: Nil
(IF ANY): NIL

SYLLABUS:
UNIT DETAILS HOURS
I Number systems- decimal, binary, octal, hexa decimal, base
conversion , 6 hours
1‟s and 2‟s complement, signed number representation Binary
arithmetic, binary subtraction using 2‟s complement ,Binary codes
(grey, BCD and Excess-3), Error detection and correcting codes :
Parity(odd, even), Hamming code (7,4), Alphanumeric codes : ASCII
II Logic expressions, Boolean laws, Duality, De Morgan's law, Logic
functions and gates , Canonical forms: SOP, POS, Realisation of 8 hours
logic expressions using K- map (2,3,4 variables),Design of
combinational circuits – adder, subtractor, 4 bit adder/subtractor,
BCD adder, MUX, DEMUX, Decoder, BCD to 7 segment decoder,
Encoder, Priority encoder, Comparator (2/3 bits)

III Introduction to HDL : Logic descriptions using HDL, basics of modeling


(only for assignments) ,NAND in TTL (totem pole, open collector and tri-
state), CMOS:NAND, NOR, and NOT in CMOS, Comparison of logic 7 hours
families (TTL,ECL,CMOS) in terms of fan-in, fan-out, supply voltage,
propagation delay, logic voltage and current levels, power dissipation and
noise margin ,Programmable Logic devices - ROM, PLA, PAL,
implementation of simple circuits using PLA

IV Sequential circuits - latch, flip flop ( SR, JK, T, D), master slave JK FF,
conversion of FFs, excitation table and characteristic equations 8 hours
,Asynchronous and synchronous counter design, mod N counters, random
sequence generator

V Shift Registers - SIPO, SISO, PISO, PIPO, Shift registers with parallel
LOAD/SHIFT Shift register counter - Ring Counter and Johnson Counter 6 hours
.Mealy and Moore models, state machine ,notations, state diagram, state
table, transition table, excitation table, state equations

Department of EC, RSET 91


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VI Construction of state diagram – up down counter, sequence detector,


Synchronous sequential circuit design - State equivalence ,State reduction 7 hours
– equivalence classes, implication chart

TOTAL HOURS 42

TEXT/REFERENCE BOOKS:
T/R BOOK TITLE/AUTHORS/PUBLICATION
1 Donald D Givone, Digital Principles and Design, Tata McGraw Hill, 2003.
2 John F Wakerly, Digital Design Principles and Practices, Pearson Prentice Hall, 2007
3 Ronald J Tocci, Digital Systems, Pearson Education, 11th edition 2010
4 Thomas L Floyd, Digital Fundamentals, Pearson Education, 8th edition, 2003.
5 Moris Mano, Digital Design, Prentice Hall of India, 3rd edition, 2002
6 John M Yarbrough, Digital Logic Applications and Design, Cenage learning, 2009

7 David Money Harris, Sarah L Harris, Digital Design and Computer Architecture,
Morgan Kaufmann – Elsevier, 2009

COURSE PRE-REQUISITES:
Sl No: COURSE NAME DESCRIPTION SEM
1. Basics of Electronics Basic knowledge of Electronics and 1&
Engineering Communication Systems 2

COURSE OBJECTIVES:

Sl. DESCRIPTION
No.
1 To work with a positional number systems and numeric representations

2 To introduce basic postulates of Boolean algebra and show the correlation between
Boolean expression
3 To outline the formal procedures for the analysis and design of combinational
circuits and sequential circuits

4
To study the fundamentals of HDL
5
To design and implement combinational circuits using basic programmable blocks

6
To design and implement synchronous sequential circuits

Department of EC, RSET 92


Semester III, Course Hand-Out

COURSE OUTCOMES:
Sl. DESCRIPTION
No.
1 Ability to understand basic principles of digital circuits and different
number systems
2 Ability to derive and analyze logic expressions and circuits using Boolean
laws and K-map
3 Ability to design and analyze combinational circuits like adders,
multiplexers, Encoders,PLA, ROM etc
4 Ability to analyse sequential circuits
5 Ability design various counter circuits
6 Ability to understand the difference between different shift registers like
Serial in serial out,parallel in parallel out etc
7 Abiltiy to understand and design Mealy and Moore State Machine

CO mapping with PO, PSO


PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO
CO1 3 2 2 1 2 2 2
CO2 2 1 3 2
CO3 3 2 3 2 2 2
CO4 3 2 3 2 2 2
CO5 2 2 2 1
CO6 2 2 2 1
CO7 3 3 2 2 2 2 2 2 2
EC
2.57 2 2.4 1.75 2 2 2 2 1.66
207

PO1 PO2 PO3 PO4 PO5 PO6 PO12 PSO1 PSO2 PSO3
CO Knowledg Knowledg Basic Basic Basic Fundam Funda
1 e in logic e in logic principles principle principl entals of mental
circuit circuit of digital s of es of logic s of
design design design digital digital circuits logic
helps to helps to help to design design helps circuit
find analyze develop help to is electroni s
solutions complex solutions do necessa cs serves
for engineering for analysis ry for engineer the
complex problems complex and the s to digital
engineerin Engineeri interpret researc design electro
g ng ation of h in and nics
problems problems data in Digital develop industr

Department of EC, RSET 93


Semester III, Course Hand-Out

digital electron electroni y and


domain ics c researc
domain systems h
CO Concepts Concepts Concepts Concept
2 of of Boolean of s of
Boolean Algebra Boolean Boolean
Algebra helps to Algebra Algebra
aids in analyze help to helps
finding complex develop electroni
solutions engineering solutions cs
for problems for engineer
complex complex s to
engineerin Engineeri design
g ng and
problems problems develop
efficient
electroni
c
systems
CO Knowledg Knowledge Knowle Fundam Conce
3 e in in Knowled dge in entals of pts of
combinati combinatio ge in combina combina combi
onal nal circuits combinat tional tional nation
circuits helps ional circuits circuits al
helps to digital circuits help to helps circuit
find electronics helps do electroni s
solutions engineers digital analysis cs serves
for to analyze electronic and engineer the
complex complex s interpret s to digital
engineerin engineering engineers ation of design electro
g problems to data in and nics
problems develop digital develop industr
in digital solutions domain electroni y and
electronics for c researc
complex systems h
Engineeri
ng
problems
CO Knowledg Knowledge Knowle Fundam Conce
4 e in in Knowled dge in entals of pts of
sequential sequential ge in sequenti sequenti sequen

Department of EC, RSET 94


Semester III, Course Hand-Out

circuits circuits sequentia al al tial


helps to helps l circuits circuits circuits circuit
find digital helps help to helps s
solutions electronics digital do electroni serves
for engineers electronic analysis cs the
complex to analyze s and engineer digital
engineerin complex engineers interpret s to electro
g engineering to ation of design nics
problems problems develop data in and industr
in digital solutions digital develop y and
electronics for domain electroni researc
complex c h
Engineeri systems
ng
problems
CO Knowledg Fundam Conce
5 e in Knowled entals of pts of
counter ge in counter counte
design counter circuits r
helps to design helps circuit
find helps electroni s
solutions digital cs serves
for electronic engineer the
complex s s to Embed
engineerin engineers design ded
g to and system
problems develop develop industr
in digital solutions electroni y
electronics for c
complex systems
Engineeri
ng
problems
CO Knowledg Fundam Conce
6 e in Shift Knowled entals of pts of
registers ge in Shift Shift
helps to Shift registers registe
find registers helps rs
solutions helps electroni serves
for digital cs the
complex electronic engineer Embed
engineerin s and s to ded

Department of EC, RSET 95


Semester III, Course Hand-Out

g communi design system


problems cation and industr
in digital engineers develop y
electronics to electroni
& develop c
communic solutions commun
ation areas for ication
complex systems
Engineeri
ng
problems
CO Knowledg Knowledg Basic Basic State Knowl Basic Fundam Funda
7 e in State e in State principles principle Machin edge principl entals of mental
Machines Machines of State s of e in es of State s of
helps to helps Machines State design State State Machine State
find Electronics help to Machine using Machi Machin s helps Machi
solutions engineers develop s help to Electro nes es is electroni nes
for to analyze solutions do nic helps necessa cs serves
complex complex for analysis Design Electr ry for engineer vast
engineerin engineering complex and Automa onics the s to areas
g problems Engineeri interpret tion engine researc design of the
problems in ng ation of tools ers to h in and digital
in Electronic problems data in helps to develo Digital develop electro
Electronic systems, in digital develop p electron electroni nics
systems, communica Electroni domain comple produc ics c industr
communic tion, c x ts and domain systems, y and
ation, automobile systems, circuits solutio embedd researc
automobil , embedded communi like ns to ed h
e, systems etc cation, Process meet systems,
embedded areas automobi ors, society Processo
systems le, Control needs rs etc
etc areas embedde lers etc
d systems
etc areas

GAPS IN THE SYLLABUS - TO MEET INDUSTRY/PROFESSION


REQUIREMENTS:
Sl. DESCRIPTION PROPOSED ACTIONS PO Mapping
No.
1 Practical Applications of Counter Assignment 1,3
Circuits
2 Self Correcting, Self Checking Lecture 1,3

Department of EC, RSET 96


Semester III, Course Hand-Out

counter design
3 Implementation of State Assignment 1,2,3
Machines
PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY
VISIT/GUEST LECTURER/NPTEL ETC

TOPICS BEYOND SYLLABUS/ADVANCED TOPICS:


Sl. DESCRIPTION PO Mapping
No.
1 Self Correcting and Self Checking Counter design 1,3
2 Different Logic Circuit implementation using Multiplexers 1,2,3

DESIGN AND ANALYSIS TOPICS:


Sl. DESCRIPTION PO Mapping
No.
1 Design of UP/DOWN Counters and Mode Counters 1,3
2 Design of logic circuits using Multiplexers 1,2,3
3 Design of Code Converters 1,3
4 Design of State Machines 1,2,3
5 State Reduction Techniques 1

WEB SOURCE REFERENCES:


Sl. DESCRIPTION
No.
1 http://nptel.iitm.ac.in/video.php?subjectId=117106086
2 http://nptel.iitm.ac.in/courses/117101001/
3 http://www.youtube.com/watch?v=CeD2L6KbtVM
4 http://zebu.uoregon.edu/~rayfrey/432/DigitalNotes.pdf
5 http://www.indianshout.com/digital-electronics-notes-material/3023
6 http://www.cl.cam.ac.uk/teaching/0708/DigElec/Digital_Electronics_pdf.pdf
7 http://www.university.youth4work.com/Study-
Material/Digital+Electronics+and+Communication+Systems-Lecture
8 http://www.educationobserver.com/forum/showthread.php?tid=10047

DELIVERY/INSTRUCTIONAL METHODOLOGIES:
 ☐ CHALK &  ☐ STUD.  ☐ WEB
TALK ASSIGNMEN RESOURCES
T
☐ LCD/SMART ☐ STUD. ☐ ADD-ON
BOARDS SEMINARS COURSES

Department of EC, RSET 97


Semester III, Course Hand-Out

ASSESSMENT METHODOLOGIES-DIRECT [Append details of assessment


methodologies actually employed (including design and analysis assessment) in spreadsheet
format after the completion of each semester]

 ☐ ☐ STUD.  ☐  ☐ UNIV.
ASSIGNMEN SEMINARS TESTS/MOD EXAMINATI
TS EL EXAMS ON
☐ STUD. LAB ☐ STUD. VIVA ☐ MINI/MAJOR ☐
PRACTICES PROJECTS CERTIFICATIONS
☐ ADD-ON ☐ OTHERS
COURSES

ASSESSMENT METHODOLOGIES-INDIRECT
 ☐ ASSESSMENT OF COURSE  ☐ STUDENT FEEDBACK ON
OUTCOMES (BY FEEDBACK, FACULTY (TWICE)
ONCE)
☐ ASSESSMENT OF MINI/MAJOR ☐ OTHERS
PROJECTS BY EXT. EXPERTS

Prepared by Approved by

Rony Antony & Preethi Bhaskaran HOD-ECE


(Course In-charge)

Department of EC, RSET 98


Semester III, Course Hand-Out

8.2 COURSE PLAN

SL
NO MODULE TOPICS

1 1 Number systems- decimal, binary, octal, hexa decimal, base conversion

2 1 Number systems- decimal, binary, octal, hexa decimal, base conversion

3 1 1‟s and 2‟s complement, signed number representation

4 1 Binary arithmetic, binary subtraction using 2‟s complement


Binary codes (grey, BCD and Excess-3), Error detection and correcting
5 1 codes : Parity(odd, even)

6 1 Hamming code (7,4), Alphanumeric codes : ASCII

7 2 Logic expressions, Boolean laws, Duality

8 2 De Morgan's law, Logic functions and gates

9 2 Canonical forms: SOP, POS

10 2 Realization of logic expressions using map (2,3,4 variables)

11 2 Design of combinational circuits

12 2 Adder, subtractor, 4 bit adder/subtractor, BCD adder

13 2 MUX, DEMUX, Decoder,BCD to 7 segment decoder

14 2 Encoder, Priority encoder, Comparator (2/3 bits)

15 3 Introduction to HDL : Logic descriptions using HDL

16 3 Basics of modeling

17 3 Logic families and its characteristics

18 3 Logic levels, propagation delay, fan in, fan out, noise immunity

19 3 Power dissipation, TTL subfamilies


NAND in TTL (totem pole, open collector and tri-state), CMOS:NAND,
20 3 NOR, and NOT in CMOS
Comparison of logic families (TTL,ECL,CMOS) in terms of fan-in, fan-
out, supply voltage, propagation delay, logic voltage and current levels,
21 3 power dissipation and noise margin

22 3 Programmable Logic devices - ROM, PLA, PAL

23 3 Implementation of simple circuits using PLA

24 4 Sequential circuits - latch, flip flop (SR, JK, T, D)

Department of EC, RSET 99


Semester III, Course Hand-Out

25 4 Master slave JK FF

26 4 Excitation table and characteristic equations

27 4 Asynchronous counter design

28 4 Asynchronous counter design

29 4 Asynchronous counter design

30 4 Synchronous counter design

31 4 Synchronous counter design

32 4 Synchronous counter design

33 4 Synchronous counter design

34 4 Mod N counters

35 4 Random sequence generator

36 5 Shift Registers - SIPO, SISO, PISO, PIPO

37 5 Shift registers with parallel LOAD/SHIFT

38 5 Shift register counter - Ring Counter and Johnson Counter

39 5 Shift register counter - Ring Counter and Johnson Counter

40 5 Mealy and Moore models

41 5 State machine ,notations, state diagram

42 5 State table, transition table

43 5 Excitation table, state equations

44 6 Construction of state diagram

45 6 State diagram - up down counter, sequence detector

46 6 Synchronous sequential circuit design

47 6 State equivalence

48 6 State reduction

49 6 State reduction – equivalence classes

50 6 Implication chart

51 6 Implication chart

52 6 Buffer Class

Department of EC, RSET 100


Semester III, Course Hand-Out

8.3 SAMPLE QUESTIONS


ASSIGNMENT 1

Roll numbers 1 to 30 : Roll no.x 25 is RN

Roll numbers 31 onwards : Roll no. x 2 is RN

1.Convert RN to binary,octal,hexadecimal

2.Express RN as a signed binary number in all the 3 forms

3.Convert (10111.0110)2 into decimal,octal and hexadecimal

4.Perform (-45)- (25) using 2‟s complement form

5. Find the application of signed number,1‟s complement and 2‟s complement form

ASSIGNMENT 2

1. Hardware implementation of an Digital Clock.

ASSIGNMENT 3

1. Design a traffic light System.

UNIT 1

1. Find the hexadecimal equivalent of the decimal number256


2. Find the octal equivalent of the decimal number64
3. What is meant by weighted and non-weightedcoding?
4. Convert A3BH and 2F3H into binary and octalrespectively
5. Find the decimal equivalent of(123)9
6. Find the octal equivalent of the hexadecimal numberAB.CD
7. Encode the ten decimal digits in the 2 out of 5code
8. Show that the Excess – 3 code is self–complementing
9. Find the hexadecimal equivalent of the octal number153.4
10. Find the decimal equivalent of(346)7
11. A hexadecimal counter capable of counting up to at least (10,000)10 is to
beconstructed.
12. What is the minimum number of hexadecimal digits that the counter musthave?
13. Convert the decimal number 214 tohexadecimal

Department of EC, RSET 101


Semester III, Course Hand-Out

14. Convert 231.3 4 to base7


15. Give an example of a switching function that contains only cyclic prime implicant
16. Give an example of a switching function that for which the MSP from is notunique

UNIT 2.

17. Express x+yz as the sum ofminterms


18. What is primeimplicant?
19. Find the value of X = A B C (A+D) if A=0; B=1; C=1 andD=1
20. What are „minterms‟ and„maxterms‟?
21. State and prove Demorgan‟stheorem
22. Find the complement of x+yz
23. Define the following : minterm andterm
24. What theorem is used when two terms in adjacent squares of K map arecombined?
25. How will you use a 4 input NAND gate as a 2 input NANDgate?
26. How will you use a 4 input NOR gate as a 2 input NORgate?
27. Show that the NAND connection is notassociative
28. What happens when all the gates is a two level AND-OR gate network are
replacedby
29. NORgates?
30. What is meant by multilevel gatesnetworks?
31. Show that the NAND gate is a universal buildingblock
32. Show that a positive logic NAND gate is the same as a negative logic NOTgate
33. Distinguish between positive logic and negativelogic
34. Implement AND gate and OR gate using NANDgate
35. What is the exact number of bytes in a system that contains (a) 32K byte, (b)
64Mbytes, and (c) 6.4Gbyte?
36. List the truth table of thefunction:
37. F = x y + x y‟ + y‟z
38. How will you build a full adder using 2 half adders and an ORgate?
39. Implement the switching function Y= BC‟ + A‟B +D
40. Draw 4 bit binary paralleladder
41. Write down the truth table of a fulladder
42. Write down the truth table of a full substractor
43. Write down the truth table of a half substractor
44. Define Combinationalcircuits
45. Define Half and Fulladder

11. Give the four elementary operations for addition andsubtraction


12. Design the combinational circuit with 3 inputs and 1 output. The output is 1
whenthe
13. binary value of the inputs is less than 3.The output is 0otherwise
14. Define half sub tractor and full subtractor
15. Whatisadecoderandobtaintherelationbetweenthenumberofinputs„n‟andoutputs
16. „m‟ of adecoder?
17. Distinguish between a decoder and ademultiplexer
18. Using a single IC 7485 ; draw the logic diagram of a 4 bitcomparator
19. what isdecoder
20. What do you mean byencoder?
21. Write the short notes on priorityencoder
22. What is multiplexer? Draw the logic diagram of8 to 1 linemultiplexer
23. What do you mean bycomparator?
45. How many parity bits are required to form Hamming code if massage bits are6?

Department of EC, RSET 102


Semester III, Course Hand-Out

46. How to find the location of parity bits in the Hammingcode?


47. Generate the even parity Hamming codes for the
following binarydata 1101,1001
48. A seven bit Hamming code is received as 11111101. What is the correctcode?
49. Compare static RAMs and dynamicRAMs
50. Define Priorityencoder
UNIT 3
24. DefineHDL
25. What do you mean by carry propagationdelay?
26. What is codeconverter?
27. Give short notes on Logic simulation and Logicsynthesis
28. What do you mean by functional and timingsimulation?
29. What do you mean by testbench?
30. Give short notes on simulation versussynthesis
31. WritetheHDLdescriptionofthecircuitspecifiedbythefollowingBooleanfunction
32. X=AB+ACD+BC‟
33. How does ROM retaininformation?
34. Distinguish between PAL andPLA
35. Give the classification ofmemory
36. What is refreshing? How it isdone?
37. What is Hammingcode?
38. Write a short notes on memorydecoding
39. List the basic types of programmable logicdevices
40. What is PAL? How it differ from PROM andPLA?
41. Write a short notes on –PROM,EPROM,EEPROM

UNIT 4

1. What are the advantages of using a microprocessor to implement a counter rather than
the conventional method (flip-flop and logic gates)?
2. Design a 5-bit Ring/Johnson counter.
3. Design a divide-by-6 counter using minimum number of flip-flops.

4. Design and setup a counter to count sequence 9,12,6,3,9 …


5. Design a full adder and realize using 2 input NOR gates.
6. Design a full subtractor and realize using 2 input NAND gates.
7. Realize the following function F = Σ (1, 2, 5) + Σd (0,3)
8. Design and setup a 3-bit mod controlled up/down ripple counter.
9. Design a 4 bit down counter.
10. Design a mod-9 counter.
11. Design a mod-12 counter.
12. Design a mod-5 counter.

UNIT 5

1. Design and set up a synchronous decade counter using T flip- flops.


2. Design and set up a 4- bit Johnson counter.
3. Design and set up an adder/ subtractor circuit using IC 7483.
4. Design and set up an asynchronous mod 6 counter.
5. Design and set up a mod 5 asynchronous counter.
6. Set up a 7- segment static display system to display numbers 0 to 9.

Department of EC, RSET 103


Semester III, Course Hand-Out

7. Design and set up a 4- bit by 2- bit multiplier with minimum hardware.


8. Compare ROM and PLA.
9. Compare Mealy and Moore state machine.
UNIT 6
25. Explain with example the steps involved in analysis of clocked synchronous
sequential networks.
26. Reduce the following state table using implication chart.
Present Next state/ Output
state 00 01 10 11
a a/0 a/0 b/1 c/0
b a/0 b/0 d/0 f/1
c c/0 b/0 b/1 a/0
d d/0 c/0 e/1 c/0
e a/0 e/0 b/1 c/0
f e/0 e/0 f/0 f/0
27. Construct the state diagram for a Mealy machine that will detect the following
input sequences: x = 01101 or 01111. If input sequence x = 01101 is met, cause

z1 = 1. If x = 01111, cause z2 = 1. Each input sequence may overlap with itself or

the other sequence.

28. Reduce the following state table using implication chart.


Present Next state/ Output
state 00 01 10 11
a a/0 a/0 b/0 c/1
b a/0 b/0 b/0 c/0
c a/1 b/1 d/0 e/0
d a/1 b/1 d/0 e/0
e e/0 e/0 f/0 f/1
f b/0 b/0 f/0 a/0
29. A sequential network has two inputs (X1, X2) and one output (Z). The output remains
a constant value unless one of the following input sequences occurs:
a. The input sequence X1X2= 01, 11 causes the output to become 0.
b. The input sequence X1X2= 10, 11 causes the output to become 1.
c. The input sequence X1X2= 10, 01 causes the output to change value.

Department of EC, RSET 104


Semester III, Course Hand-Out

30. Derive a Moore state diagram for the network.

Department of EC, RSET 105


Semester III, Course Hand-Out

10
EC 231
ELECTRONIC DEVICES & CIRCUITS LAB

Department of EC, RSET 106


Semester III, Course Hand-Out

10.1 COURSE INFORMATION SHEET

PROGRAMME:

ELECTRONICS & COMMUNICATION DEGREE: B. TECH.


ENGINEERING

COURSE: ELECTRONIC DEVICES &


SEMESTER: S3 CREDITS:
CIRCUITS LAB

COURSE CODE: EC231 COURSE TYPE: CORE /ELECTIVE /


REGULATION: 2015 BREADTH/ S&H

COURSE AREA/DOMAIN:
CONTACT HOURS: 3 hours/week.
BASIC ELECTRONIC CIRCUITS

CORRESPONDING LAB COURSE CODE (IF


LAB COURSE NAME: N. A.
ANY): N.A.

SYLLABUS:

UNIT DETAILS HOUR


S

List of experiments: (12 mandatory experiments)

1 VI characteristics of rectifier and Zener diodes 3

2 RC integrating and differentiating circuits (Transient analysis with different inputs and 3
frequency repsonse)
3 3
Clipping and clamping circuits (Transients and transfer charatcteristics)
4 Full-wave rectifiers - with and without filter - ripple factor and regulation 3

5 Simple Zener voltage regulator (load and line regulation) 3

6 Characteristics of BJT in CE configuration and evaluation of parameters 3

7 Characteristics of MOSFET in CS configuration and evaluation of parameters 3

8 RC Coupled CE amplifier - frequency response characteristics. 3

9 MOSFET amplifier (CS) - frequency response characteristics. 3

10 Cascade amplifier – gain and frequency response 3

Department of EC, RSET 107


Semester III, Course Hand-Out

11 Cascode amplifier – frequency response 3

12 Feedback amplifiers (current series, voltage series) - gain and frequency response 3

13 Low frequency oscillators – RC phase shift, Wien bridge 3

14 High frequency oscillators – Colpitt‟s and Hartley 3

15 Power amplifiers (transformer less), Class B and Class AB. 3

16 Transistor series voltage regulator (load and line regulation) 3

17 Tuned amplifier – frequency response 3

18 Bootstrap sweep circuit 3

19 Multivibrators – astable, monostable, bistable 3

20 Schmitt trigger 3

TOTAL HOURS (N.A.)

TEXT/REFERENCE BOOKS:

T/R BOOK TITLE/AUTHORS/PUBLICATION

R Microelectronic Circuits / Sedra and Smith /OUP

R Pulse, Digital and Switching Waveforms / Millman and Taub / McGraw Hill

R Electronic Circuits – Analysis and Design / Neamen D. / TMH

R Microelectronic Circuits – Analysis and Design / Rashid M. H. / Cengage Learning

R Introduction to Electronic Circuit Design / Spencer R.R. and M. S. Ghausi / Pearson

R Fundamentals of Microelectronics / Razavi B. / Wiley

R Electronics Lab Manual Vol. 1 / K. A. Navas /

COURSE PRE-REQUISITES:

C.CODE COURSE NAME DESCRIPTION SEM

BE101- Introduction to Electronics Engineering (Topics as per prescribed S1


04 syllabus)

Department of EC, RSET 108


Semester III, Course Hand-Out

EC205 Electronic Circuits I (Topics as per prescribed S3


syllabus)

COURSE OBJECTIVES:

1 To provide working knowledge of the working of analogue electronic circuits

To provide experience in design and implementation of analogue circuits using discrete


2
electronic components

COURSE OUTCOMES:
S. PO, PSO
N DESCRIPTION MAPPIN
O G

Student should be able to understand the working of analog circuits like PO-1,2,3
1
rectifiers, clippers, clampers etc. PSO-1

Student should be able to design and implement circuits like RC coupled PO-1,2,3
2
amplifier, tuned amplifier, schmitt trigger etc. PSO-1

Student should be able to design and demonstrate the functioning of regulators, PO-1,2,3
3
oscillators and power amplifiers. PSO-1

Students should be able to analyze and interpret the characteristics of diodes PO-1,2,3
4
and transistors. PSO-1

Students should be able to function effectively as an individual and in a team PO-9


5
to accomplish the given task. PSO-3

CO MAPPING WITH PO, PSO

PO PO PO PO PO PO PO P PO P P P PSO PSO PSO


1 2 3 4 5 6 7 O 9 O O O 1 2 3
8 10 11 12

CO1 3 3 3 3

CO2 3 3 3 3

CO3 3 3 3 3

Department of EC, RSET 109


Semester III, Course Hand-Out

CO4 3 3 3 3

CO5 3

EC01 3 3 3 3 3
0 801

JUSTIFICATION FOR THE CORRELATION LEVEL ASSIGNED IN EACH CELL


OF THE TABLE ABOVE.

P P P P
PO P PO PO PO PO PSO PS PS
PO1 PO3 O O O O
2 O5 9 10 11 12 1 O2 O3
4 6 7 8

Kno
wled
ge Desi
An
abou Desi gn
alys
t gn and
C is
wor of testi
O of
king the ng
1 the
of circ of
circ
anal uits circ
uits
og uits
circ
uits

Kno
wled
ge Desi
An
abou Desi gn
alys
t gn and
C is
wor of testi
O of
king the ng
2 the
of circ of
circ
anal uits circ
uits
og uits
circ
uits

C Kno An Desi Desi


O wled alys gn gn
3 ge is of and

Department of EC, RSET 110


Semester III, Course Hand-Out

abou of the testi


t the circ ng
wor circ uits of
king uits circ
of uits
anal
og
circ
uits

Kno
wled
ge Desi
An
abou Desi gn
alys
t gn and
C is
wor of testi
O of
king the ng
4 the
of circ of
circ
anal uits circ
uits
og uits
circ
uits

Dev
Wo elop
C rk prof
O in a essi
5 tea onal
m ethi
cs

GAPS IN THE SYLLABUS - TO MEET INDUSTRY/PROFESSION


REQUIREMENTS:
SNO DESCRIPTION PROPOSED ACTIONS

1 (Not identified) (N. A.)

PROPOSED ACTIONS: TOPICS BEYOND


SYLLABUS/ASSIGNMENT/INDUSTRY VISIT/GUEST LECTURER/NPTEL ETC
TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:
Description PO Mapping

Department of EC, RSET 111


Semester III, Course Hand-Out

1 2-stage RC-coupled and MOSFET amplifiers – 1,2,3,4,5,8,9,10


frequency response characteristics.

2 Zener voltage regulators with short-circuit and 1,2,3,4,5,8,9,10


fold back protection.

3 Rectifiers with L, LC, π filters – waveforms, 1,2,3,4,5,8,9,10


ripple factors.

WEB SOURCE REFERENCES:


1 www.nptel.iit.a.c.in

DELIVERY/INSTRUCTIONAL METHODOLOGIES:
☐ CHALK & TALK ☐ STUD. ☐ WEB
ASSIGNMENT RESOURCES

☐ LCD/SMART ☐ STUD. ☐ ADD-ON


BOARDS SEMINARS COURSES

ASSESSMENT METHODOLOGIES-DIRECT
☐ ASSIGNMENTS ☐ STUD. ☐ TESTS/MODEL ☐ UNIV.
SEMINARS EXAMS EXAMINATION

☐ STUD. LAB ☐ STUD. VIVA ☐ MINI/MAJOR ☐


PRACTICES PROJECTS CERTIFICATIONS

☐ ADD-ON ☐ OTHERS
COURSES

ASSESSMENT METHODOLOGIES-INDIRECT

☐ ASSESSMENT OF COURSE OUTCOMES ☐ STUDENT FEEDBACK ON


(BY FEEDBACK, ONCE) FACULTY (TWICE)

☐ ASSESSMENT OF MINI/MAJOR PROJECTS ☐ OTHERS


BY EXT. EXPERTS

Prepared by Approved by
Swapna Davies, Rithu James, Maleeha Abdul Azeez Dr. Jobin K Antony

Department of EC, RSET 112


Semester III, Course Hand-Out

10.2 COURSE PLAN


10.3
SL. No Experiment Day
1 Diode Characteristics Day 1
2 Diode Characteristics Day 1
3 RC LP and HP Circuits Day 2
4 RC LP and HP Circuits Day 2
5 Clipping and Clamping Circuits Day 3
6 Clipping and Clamping Circuits Day 3
7 Fullwave Rectifier Day 4
8 Fullwave Rectifier Day 4
9 Transistor CE Characteristics Day 5
10 Transistor CE Characteristics Day 5
11 DC Voltage Regulators Day 6
12 DC Voltage Regulators Day 6
13 RC Coupled Amplifier Day 7
14 RC Coupled Amplifier Day 7
15 Power Amplifiers Day 8
16 Power Amplifiers Day 8
RC Phase Shift and Wien Bridge Day 9
17
Oscillators
RC Phase Shift and Wien Bridge Day 9
18
Oscillators
19 MOSFET CS Characteristics Day 10
20 MOSFET CS Characteristics Day 10
21 Multivibrators Day 11
22 Multivibrators Day 11
23 Tuned Amplifier Day 12
24 Tuned Amplifier Day 12
25 Lab Exam Day 13
26 Lab Exam Day 13

Department of EC, RSET 113


Semester III, Course Hand-Out

10.3 SAMPLE QUESTIONS

1. Define Knee voltage of a diode?


2. What is the effect of Zener voltage when temperature is varying? Diagram.
3. Explain what does the arrow head represent in the schematic symbol of a p-n
junction?
4. Name the breakdown mechanism in a lightly doped and highly doped p-n junction
under reverse biased condition.
5. What are the other names for clipper & clamper circuits?
6. A resistance of 1 Kilo ohm is connected in parallel with a ideal diode, this whole
combination is connected in series with the another 1 kilo ohm resistor, this whole
circuit is connected with the 30 V supply. Calculate the:-
a. Current drawn by the whole circuit.
b. Current flow in the diode connected branch.
c. Current flow in the resistance which is parallel with the diode.
d. Output voltage i.e. voltage across the output resistance.

7. Obtain the following transfer characteristics from a sine wave input. Use 2.6V DC
source.

8. Design the circuit and draw the waveform.

Department of EC, RSET 114


Semester III, Course Hand-Out

9. Obtain the output waveform from the figure.

10. Draw a circuit to obtain two sinusoidal signals which are 180° out of phase with each
other.
11. Draw the output waveform of the following circuit with a sine wave input of ±8Vpp.

12. Design the following circuit with a sine wave input of ±8Vpp. Draw the output
waveform and transfer character for the circuit.

13. Draw the output waveform for the circuit.

Department of EC, RSET 115


Semester III, Course Hand-Out

14. Sketch i versus v to scale for each of the circuits shown below. Assume that the
diodes are ideal and allow v to range from -10 V to +10 V.

15. Draw the output waveform and transfer character of the circuit shown below
[Mark -2]

16. Sketch the output waveform for RC integrator for square wave input for the following
conditions:-
a. RC<<T
b. RC>>T

Department of EC, RSET 116


Semester III, Course Hand-Out

17. Obtain the circuit for the transfer characteristics without using voltage sources. Also
draw the waveform. Consider input of 20VP-P.

18. What is the ratio of IC to IB?


A. DC B. hFE

C. αDC D. either DC or hFE, but not αDC

19. Identify the frequency response curve for a low-pass filter.

20. In a _________ when the diode is ON, the output follows the input.
A) Series diode clipper B) Shunt diode clipper
C) Comparator D) Clamper

Department of EC, RSET 117


Semester III, Course Hand-Out

11

EC 223
ELECTRONIC DESIGN & AUTOMATION LAB

Department of EC, RSET 118


Semester III, Course Hand-Out

11.1 COURSE INFORMATION SHEET

PROGRAMME: Electronics & DEGREE: BTECH


Communication Engineering
COURSE: Electronic Design Automation SEMESTER: THREE CREDITS: 1
Lab
COURSE CODE: EC233REGULATION: COURSE TYPE: CORE
COURSE AREA/DOMAIN: CONTACT HOURS: 0 (Lecture) +0
(Tutorial) +3 (practical) hours/Week.
CORRESPONDING LAB COURSE CODE LAB COURSE NAME:
(IF ANY):

SYLLABUS:
UNIT DETAILS HOURS
I Introduction about lab, Introduction to Pspice, Potential divider network, 3 hrs.
RC integrating and differentiating circuits
II Clipping, Clamping circuits 3 hrs.
III Rectifiers,RCcoupled amplifier (Single stage) 3 hrs.
IV Diode, BJT characteristics 3 hrs.
V Truth table verification of basic and universal gates 3 hrs.
VI Introduction to MATLAB 3 hrs.
VII Solve the mathematical equations containing complex numbers, array, 3 hrs.
matrix multiplication and quadratic equations etc.
Obtain different types of plots (2D/3D, surface plot, polar plot).
VIII Generate and plot various signals like sine square, pulse in same window. 3 hrs.
Solve node, mesh and loop equations of simple electrical/network circuits.
IX Introduction to HDL, Xilinx ISE 3 hrs.
X Basic gates/universal gates. Combinational Circuits (Half adder/Half 3 hrs.
subtractor).
XI Full adder in 3 modelling styles 3 hrs.
XII Multiplexer/De-multiplexer. 3 hrs.
TOTAL HOURS 24 hrs

TEXT/REFERENCE BOOKS:
T/R BOOK TITLE/AUTHORS/PUBLICATION
1 Muhammad H. Rashid,”Introduction to Pspice Using OrCAD for Circuits and
Electronics” Pearson
2 RudraPratap, “Getting Started With Matlab Quick Introduction For Scientists And
Engineers”, OXFORD university press
3 J Bhasker, “Verilog Hdl Synthesis: A Practical Primer“ , BS publications

Department of EC, RSET 119


Semester III, Course Hand-Out

COURSE PRE-REQUISITES:

C.CODE COURSE NAME DESCRIPTION SEM


BE 101- Introduction to Electronics Krichoff‟s Voltage law and Current 1
04 Engineering law, Basic Circuits
EC205 Electronic Circuits RC Circuits, BJT biasing, 3

COURSE OBJECTIVES:
1 The primary objective of this course is to familiarize the students, how to simulate the
electronics/digital circuits, signals and systems using the soft-wares which are available
for the modern design methodologies for the rapid design and verification of complex
electronic systems.

COURSE OUTCOMES:
SNO DESCRIPTION PO
MAPPING
1 Ability to use EDA tools (PSPICE, MATLAB & Xilinx ISE) 1,2,4,5,
for solving engineering problems

2 Ability to design a hardware system using Xilinx ISE and 3,4,5,7


Verilog HDL.
3 Gain expertise in using EDA tools (PSPICE, MATLAB & 1,4,5,12
Xilinx ISE)
4 Ability to analyze circuit operation & characteristics from 1,2,5
simulation results.
5 Ability to generate different plots using MATLAB or 1,5
PSPICE

PO1 PO2 PO3 PO4 PO5 PO7 PO12 PSO1 PSO2 PSO3
CO1 3 2 2 3 1 3
CO2 3 2 2 1 2 3
CO3 1 2 3 1 2 3 1
CO4 2 2 2 1 2
CO5 1 3 1 1
EC233 1.75 2 3 2 2.6 1 1 1.4 2.4 1

PO1 PO2 PO3 PO4 PO5 PO7 P


Various Analyses,
Used for Rapid Modern Tools used for
anlyses design and
CO1 design Solving the Engineering
used for synthesis of
&Deveopments issues
Problem experiments

Department of EC, RSET 120


Semester III, Course Hand-Out

solving are used for


Investigation

HW can be
designed to
Tools are used
Hardware meets
for Rapid HW
designed for EMI/EMC
design and Modern Tools used for
inorder to aspects for
CO2 Developments, Solving the Engineering
solve the
which meets issues
complex Environment
the
problems and
requirements
sustainability
purpose

Various
Expertise
analyses Competency can be
gained can be
methods can improved on performing
CO3 used for
be used for more experiments using
solving
Investigation modern tools
problems
of issues

Problem
Simulatio
Simulation analysis
can be use
results can be can be
steppin
used as an done by
CO4 h
input for DC,AC
education/
solving and
these lea
Engg.Problems Transient
ut
Analysis

Various plots
Circuit
can be used as
behaviour/characteristics
CO5 an input for
can be plotted using
solving
modern tools.
Engg.Problems

GAPS IN THE SYLLABUS - TO MEET INDUSTRY/PROFESSION


REQUIREMENTS:

Department of EC, RSET 121


Semester III, Course Hand-Out

Sl. DESCRIPTION PROPOSEDACTIONS PO MAPPING


No.
1
2

PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY


VISIT/GUEST LECTURER/NPTEL ETC

TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:


Sl. DESCRIPTION PO MAPPING
No.
1 Implementation of boolean equations using multiplexer and 1,3,4,12
demultiplexer

DESIGN AND ANALYSIS TOPICS:


Sl. DESCRIPTION PO MAPPING
No.
1
2
3

1 NPTEL
2 http://www.orcad.com/resources/orcad-tutorials
3 http://www.ee.nmt.edu/~rison/ee321_fall02/Tutorial.html
4 https://in.mathworks.com/support/learn-with-matlab-tutorials.html
5 www.math.utah.edu/~eyre/computing/matlab-intro/
6 http://www.referencedesigner.com/tutorials/verilog/verilog_01.php
7 https://docs.numato.com/kb/learning-fpga-verilog-beginners-guide-part-1-
introduction/

WEB SOURCE REFERENCES

DELIVERY/INSTRUCTIONAL METHODOLOGIES:
☐CHALK & TALK ☐STUD. ☐WEB
ASSIGNMENT RESOURCES
☐LCD/SMART ☐ STUD. ☐ADD-ON
BOARDS SEMINARS COURSES

Department of EC, RSET 122


Semester III, Course Hand-Out

ASSESSMENT METHODOLOGIES-DIRECT
☐ASSIGNMENTS ☐STUD. ☐TESTS/MODEL ☐ EXAMINATION
SEMINARS EXAMS
☐STUD. LAB ☐STUD. VIVA ☐ MINI/MAJOR ☐
PRACTICES PROJECTS CERTIFICATIONS
☐ADD-ON ☐ OTHERS
COURSES

ASSESSMENT METHODOLOGIES-INDIRECT

☐ ASSESSMENT OF COURSE OUTCOMES ☐STUDENT FEEDBACK ON


(BY FEEDBACK, ONCE) FACULTY (TWICE)
☐ASSESSMENT OF MINI/MAJOR ☐ OTHERS
PROJECTS BY EXT. EXPERTS

Prepared by Approved
by
Mariya Vincent

(HOD)

Department of EC, RSET 123


Semester III, Course Hand-Out

11.2 COURSE PLAN

Electronics Design Automation Lab (EC233)

Course Plan

Day Experiments
Introduction about lab, Introduction to Pspice, Potential divider network,
1
RC integrating and differentiating circuits
2 Clipping circuits, Clamping circuits

3 Rectifiers, Diode, BJT characteristics

4 RC Coupled Amplifier, Truth table verification of basic and universal gates


Introduction to MATLAB
Generate and plot various signals like sine square, pulse in same window.
Solve node, mesh and loop equations of simple electrical/network
5 circuits.
Generate and plot various signals like sine squares, pulse in same window.
Solve node, mesh and loop equations of simple electrical/network
circuits.
6 Introduction to HDL, Xilinx ISE
Basic gates/universal gates. Combinational Circuits (Half adder/Half
7
subtractor).
Basic gates/universal gates. Combinational Circuits (Half adder/Half
8
subtractor).
9 Full adder in 3 modelling styles.

10 Multiplexer/De-multiplexer.

11 Examples in HDL

12 Lab written exam

Department of EC, RSET 124


Semester III, Course Hand-Out

11.3 SAMPLE QUESTIONS

1. List four basic blocks of an op-amp.

2. Define: i) CMRR ii) Input offset current.

3. List four characteristics of Op-amp with their Ideal values.

4. Define: i) Bandwidth ii) Pass band with respect to filters.

5. State the function of the following pins with respect to the IC 555.

a. Trigger ii) Discharge.

6. List four advantages of active filters over passive filters.

7. Draw neat diagram of Zero crossing detector.

8. What is slew rate? Explain with waveform.

9. Draw pin diagram of μA741c. Differentiate between open loop and closed loop

configuration of Op-amp with at least four points.

10. Draw ideal voltage transfer curve for Op-amp under open loop and closed loop

11. What is offset voltage? Explain the process of offset nulling.

12. Explain the concept of virtual grounding?

13. Draw the diagram for getting VO α V1 V2 and give the expression at the output of each

stage.

14. Draw and explain inverting zero crossing detector. Draw output waveform for

sinusoidal input.

15. Suggest the circuit to generate square wave signal from sine wave input .Draw the

diagram of the same and explain it with waveform.

16. Draw the diagram of basic integrator and derive the equation for its output voltage.

17. Draw frequence response of i) Low pass filter ii) High pass filter iii) Band pass filter

iv) Band reject filter

18. Draw the circuit of instrumentation amplifier using 3-opamp and derive the equation

Department of EC, RSET 125


Semester III, Course Hand-Out

for its output voltage.

19. Determine the output voltage for open loop Inverting amplifier if Vin = 20mV dc and

draw input and output waveforms.

20. Draw the designed circuit for getting output voltage Vo = - (Va+Vb+Vc)/3 and suggest

modification for converting into scaling amplifier.

21. Draw the neat ideal and practical frequency responses with correct labeling for i) First

order LP Butterworth filter, ii) Wide band reject filter.

22. Draw neat circuit of first order HP Butterworth filter. Derive the equation for gain of

the filter.

23. Design a notch filter for the frequency of 100Hz. Draw the designed ckt. With

frequency response.

24. Design first order LP Butterworth filter at a cutoff frequency of 1 KHz with pass band

gain of 2.

25. Draw the circuit of voltage to current converter and show how output current depends

on the input voltage. Give any two application of it.

26. Design a monostable MV for the output pulse width of 10ms.

27. Draw and explain astablemultivibrator using IC 555.

Calculate the duty cycle of it with Ra= 3.3K_, Rb= 10K_ and c= 0.047μF.

28. Draw the circuit of narrow band reject filter with labeled frequency response and

expression of notch frequency.

29. Design a second order high pass Butterworth filter with a cut off frequency 1.5 KHz.

Draw the designed circuit.

30. Draw the block diagram of PLL system and explain its working?

31. Draw and explain touch plate switch using IC 555 timer.

32. Design a simple circuit of water level detector using IC 555 timer.

Department of EC, RSET 126


Semester III, Course Hand-Out

33. Design a wide band pass filter with lower cut off frequency 200Hz and higher cut

off frequency 1 KHz and pass band gain = 4.

Department of EC, RSET 127


Semester III, Course Hand-Out

Department of EC, RSET 128