ECE 211 - Digital Electronics

Question Bank
Complements and Codes
1. Find the one’s complement of the following binary numbers
(i) 0100111001 (ii) 11011010
2. Represent the following numbers in one’s complement form
(i) + 7 (ii) – 8
3. Find the 2’s complement of the number 01001110.
4. In the signed-2’s-complement system, negate the number 710, represented with 8 bits.
5. Solve the following using the 8 bit 1’s complement arithmetic.
(i) Subtract 14 from 25
(ii) Add -25 to +14
6. Differentiate weighted and non-weighted binary codes. Convert the following BCD numbers
to its decimal equivalent.
(i) 10011
(ii) 0100001001111000
7. Explain the operation of binary to gray code conversion with an example.
8. Write your full name in
(i) ASCII code (ii) EBCDIC code
9. Represent the unsigned decimal numbers 8124 and 8127 in BCD, and then show the steps
necessary to form their sum.
10. Represent the decimal number 2231 in (i) BCD, (ii) excess-3 code, (c) 2421 code, and (d)
6311 code.
K-Maps and Magnitude Comparator
Simplify the following Boolean functions, using Karnaugh maps:
1. F (A, B, C, D) = ∑ (3, 7, 11, 13, 14, 15)
2. F (A, B, C, D) = ∑ (0, 6, 8, 13, 14) + d (2, 4, 10)
3. F (A, B, C, D) = Π (1, 3, 5, 7, 13, 15)
4. A'B'C'D' + AC'D' + B'CD' + A'BCD + BC'D
5. Using K-map, simplify the following expression to (a) sum-of-products and (b) products-
of-sums:
x'z' + y'z' + yz' + xy
Magnitude Comparator:
1. How to specify the outcome of a magnitude comparator?
2. Design the digital logic circuit for four-bit magnitude comparator.
Multiplexer
1. Implement 4:1 MUX using two 2:1 MUX
2. Implement a 16:1 MUX using 4:1 MUX
3. Implement the function F(A,B,C) = A’B’C+ABC+A’BC’+AB’C’ using two 2:1 MUX
4. Implement the following 2 input gates using 2:1 Mux
(i) AND (ii) OR (iii) NOR (iv) XOR
5. Implement a boolean function if minimal and don’t care terms are given using MUX.
f (A, B, C) = Σ (1, 2, 3, 5, 6 ) with don’t care (4) using 4 : 1 MUX. Using
(i) AB (ii) AC (iii) BC as select
Quine McCluskey (QM) Method
Consider the minimization of the following functions and find its essential prime Implicants
using Quine McCluskey (QM) or Tabular method:
1. F (A, B, C, D) = ∑ m (0, 1 ,6, 7, 8, 9, 13, 14, 15)

2. F (A, B, C, D) = ∑ m (1, 2, 3, 5, 6, 7, 8, 9, 12, 13, 15)

3. F (A, B, C, D) = ∑ m (6, 7, 8, 9) + ∑ d (10, 11, 12, 13, 14, 15)

4. F (A, B, C, D) = Π M (2, 3, 8, 12, 13). Π d (10, 14)

5. F (A, B, C, D, E) = ∑m (0, 4, 12, 16, 19, 24, 28, 29, 31)

where ∑ and Π represents Sum of Product (SOP) and Product of Sum (POS) respectively.

SOP and POS

1. Simplify the following Boolean Functions
(a) F(A,B,C,D)=∑(1,2,3,8,9,11,14)
(b) F(A,B,C,D)=П(1,3,5,7,9,13,14)
2. Simplify the following expressions to Sum of Products
(a) ABC′+AB'D+BCD
(b) AC'D'+C'D+AB'+ABCD
(c) AC'D'+C'D+AB'+ABCD
3. Simplify the following expressions to Product of Sums
(a) ABC′+AB'D+BCD
(b) AC'D'+C'D+AB'+ABCD
(c) AC'D'+C'D+AB'+ABCD
4. Simplify the following Boolean function F together with the don’t care conditions d and
then express the simplified function in sum of minterms form
(a) F(A,B,C)= )=∑(2,3,4,6,7) and d(A,B,C)= )=∑(0,1,5,6,7)
(b) F(A,B,C)= )=∑(0,3,5,7,11,14,15) and d(A,B,C)= )=∑(1,2,4,6,11,12,13)
5. Find all the prime implicants for the following Boolean functions and determine the
essential prime implicants
(a) F(A,B,C,D)=∑(0,1,3,7,8,9,10,13,15)
(b) F(A,B,C,D)=∑(0,1,2,3,4,5,6,7,14,15)

Encoder and Decoder

1. Design a Boolean circuit to calculate the approximate value of log2(n) for n = 1,…,31. (Hint:
Study the truth table of 4 line to 2 line priority encoder.)

2. Design a BCD to 7-segment display, which shows only odd digits. The display for even
digits can be ignored. Assume that the display segments are connected in common anode
mode.

3. Design a decimal to BCD priority encoder.

4. Implement the following multiple output combinational logic circuit using a 4-line to 16-
line decoder

F1 = ∑(2,3,9,11) and F2 = ∑(2,3,9,11,14)

5. Design a two bit multiplier using decoder.

CLA, BCD Adder

1. Explain Carry Look Ahead adder with neat diagram and relevant expressions.
2. Design and implement 4-bit look ahead carry adder.
3. Draw and explain the circuit of BCD adder.
4. What is CLA adder? Define the terms 'carry propagate' and 'carry generate'. The
propagation delay of EX-OR gate is 10ns and that of OR and AND gate is 5ns. Find
the propagation delay of a CLA Adder.
5. Design a 4-bit binary adder. The propagation delay of EX-OR gate is 10ns and that of
OR and AND gate is 5ns. Find the propagation delay of the Adder.