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LIBRARY ieee;

USE ieee.std_logic_1164.ALL;

-- Uncomment the following library declaration if using

-- arithmetic functions with Signed or Unsigned values

--USE ieee.numeric_std.ALL;

ENTITY simpt2 IS

END simpt2;

ARCHITECTURE behavior OF simpt2 IS

-- Component Declaration for the Unit Under Test (UUT)

COMPONENT pt2

PORT(

a : IN std_logic;

b : IN std_logic;

c : IN std_logic;

x1 : OUT std_logic;
x2 : OUT std_logic;

x3 : OUT std_logic

);

END COMPONENT;

--Inputs

signal a : std_logic := '0';

signal b : std_logic := '0';

signal c : std_logic := '0';

--Outputs

signal x1 : std_logic;

signal x2 : std_logic;

signal x3 : std_logic;

-- No clocks detected in port list. Replace <clock> below with

-- appropriate port name

BEGIN

-- Instantiate the Unit Under Test (UUT)

uut: pt2 PORT MAP (

a => a,

b => b,

c => c,

x1 => x1,

x2 => x2,

x3 => x3

);

-- Stimulus process

stim_proc: process

begin

-- hold reset state for 100 ns.

wait for 100 ns;

-- insert stimulus here


c <= '0'; b <= '0'; a <= '1';

wait for 100 ns;

c <= '0'; b <= '1'; a <= '0';

wait for 100 ns;

c <= '0'; b <= '1'; a <= '1';

wait for 100 ns;

c <= '1'; b <= '0'; a <= '0';

wait for 100 ns;

c <= '1'; b <= '0'; a <= '1';

wait for 100 ns;

c <= '1'; b <= '1'; a <= '0';

wait for 100 ns;

c <= '1'; b <= '1'; a <= '1';

wait for 100 ns;

wait;

end process;

END;

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;
-- Uncomment the following library declaration if using

-- arithmetic functions with Signed or Unsigned values

--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating

-- any Xilinx primitives in this code.

--library UNISIM;

--use UNISIM.VComponents.all;

entity pt2 is

Port ( a : in STD_LOGIC;

b : in STD_LOGIC;

c : in STD_LOGIC;

x1 : out STD_LOGIC;

x2 : out STD_LOGIC;

x3 : out STD_LOGIC);

end pt2;

architecture Behavioral of pt2 is

begin

x1 <= '0' when (c='0' and b='0' and a='0')else

'0' when (c='0' and b='0' and a='1')else

'1' when (c='0' and b='1' and a='0')else

'0' when (c='0' and b='1' and a='1')else

'0' when (c='1' and b='0' and a='0')else

'0' when (c='1' and b='0' and a='1')else

'1' when (c='1' and b='1' and a='0')else

'0';

x2 <= '1' when (c='0' and b='0' and a='0')else

'1' when (c='0' and b='0' and a='1')else

'0' when (c='0' and b='1' and a='0')else

'1' when (c='0' and b='1' and a='1')else

'1' when (c='1' and b='0' and a='0')else

'1' when (c='1' and b='0' and a='1')else


'1' when (c='1' and b='1' and a='0')else

'1';

x3 <= '0' when (c='0' and b='0' and a='0')else

'0' when (c='0' and b='0' and a='1')else

'0' when (c='0' and b='1' and a='0')else

'1' when (c='0' and b='1' and a='1')else

'1' when (c='1' and b='0' and a='0')else

'1' when (c='1' and b='0' and a='1')else

'0' when (c='1' and b='1' and a='0')else

'0';

end Behavioral;
CUARTO
PUNTO

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

entity pt4 is
Port ( A0 : in STD_LOGIC;

A1 : in STD_LOGIC;

A2 : in STD_LOGIC;

B0 : in STD_LOGIC;

B1 : in STD_LOGIC;

B2 : in STD_LOGIC;

X1 : out STD_LOGIC;

X2 : out STD_LOGIC;

X3 : out STD_LOGIC);

end pt4;

architecture Behavioral of pt4 is

begin

X1 <= '1' when (A2='0' and A1='0' and A0='0' and B2='0' and B1='0' and B0='0')else

'1' when (A2='0' and A1='0' and A0='1' and B2='0' and B1='0' and B0='1')else

'1' when (A2='0' and A1='1' and A0='0' and B2='0' and B1='1' and B0='0')else

'1' when (A2='0' and A1='1' and A0='1' and B2='0' and B1='1' and B0='1')else

'1' when (A2='1' and A1='0' and A0='0' and B2='1' and B1='0' and B0='0')else

'1' when (A2='1' and A1='0' and A0='1' and B2='1' and B1='0' and B0='1')else

'1' when (A2='1' and A1='1' and A0='0' and B2='1' and B1='1' and B0='0')else

'1' when (A2='1' and A1='1' and A0='1' and B2='1' and B1='1' and B0='1')else

'0';

X2 <= '1' when (A2='0' and A1='0' and A0='1' and B2='0' and B1='0' and B0='0')else

'1' when (A2='0' and A1='1' and A0='0' and B2='0' and B1='0' and B0='0')else

'1' when (A2='0' and A1='1' and A0='1' and B2='0' and B1='0' and B0='0')else

'1' when (A2='1' and A1='0' and A0='0' and B2='0' and B1='0' and B0='0')else

'1' when (A2='1' and A1='0' and A0='1' and B2='0' and B1='0' and B0='0')else

'1' when (A2='1' and A1='1' and A0='0' and B2='0' and B1='0' and B0='0')else

'1' when (A2='1' and A1='1' and A0='1' and B2='0' and B1='0' and B0='0')else

'1' when (A2='0' and A1='1' and A0='0' and B2='0' and B1='0' and B0='1')else

'1' when (A2='0' and A1='1' and A0='1' and B2='0' and B1='0' and B0='1')else

'1' when (A2='1' and A1='0' and A0='0' and B2='0' and B1='0' and B0='1')else

'1' when (A2='1' and A1='0' and A0='1' and B2='0' and B1='0' and B0='1')else

'1' when (A2='1' and A1='1' and A0='0' and B2='0' and B1='0' and B0='1')else

'1' when (A2='1' and A1='1' and A0='1' and B2='0' and B1='0' and B0='1')else
'1' when (A2='0' and A1='1' and A0='1' and B2='0' and B1='1' and B0='0')else

'1' when (A2='1' and A1='0' and A0='0' and B2='0' and B1='1' and B0='0')else

'1' when (A2='1' and A1='0' and A0='1' and B2='0' and B1='1' and B0='0')else

'1' when (A2='1' and A1='1' and A0='0' and B2='0' and B1='1' and B0='0')else

'1' when (A2='1' and A1='1' and A0='1' and B2='0' and B1='1' and B0='0')else

'1' when (A2='1' and A1='0' and A0='0' and B2='0' and B1='1' and B0='1')else

'1' when (A2='1' and A1='0' and A0='1' and B2='0' and B1='1' and B0='1')else

'1' when (A2='1' and A1='1' and A0='0' and B2='0' and B1='1' and B0='1')else

'1' when (A2='1' and A1='1' and A0='1' and B2='0' and B1='1' and B0='1')else

'1' when (A2='1' and A1='0' and A0='1' and B2='1' and B1='0' and B0='0')else

'1' when (A2='1' and A1='1' and A0='0' and B2='1' and B1='0' and B0='0')else

'1' when (A2='1' and A1='1' and A0='1' and B2='1' and B1='0' and B0='0')else

'1' when (A2='1' and A1='1' and A0='0' and B2='1' and B1='0' and B0='1')else

'1' when (A2='1' and A1='1' and A0='1' and B2='1' and B1='0' and B0='1')else

'1' when (A2='1' and A1='1' and A0='1' and B2='1' and B1='1' and B0='0')else

'0';

X3 <= '1' when (B2='0' and B1='0' and B0='1' and A2='0' and A1='0' and A0='0')else

'1' when (B2='0' and B1='1' and B0='0' and A2='0' and A1='0' and A0='0')else

'1' when (B2='0' and B1='1' and B0='1' and A2='0' and A1='0' and A0='0')else

'1' when (B2='1' and B1='0' and B0='0' and A2='0' and A1='0' and A0='0')else

'1' when (B2='1' and B1='0' and B0='1' and A2='0' and A1='0' and A0='0')else

'1' when (B2='1' and B1='1' and B0='0' and A2='0' and A1='0' and A0='0')else

'1' when (B2='1' and B1='1' and B0='1' and A2='0' and A1='0' and A0='0')else

'1' when (B2='0' and B1='1' and B0='0' and A2='0' and A1='0' and A0='1')else

'1' when (B2='0' and B1='1' and B0='1' and A2='0' and A1='0' and A0='1')else

'1' when (B2='1' and B1='0' and B0='0' and A2='0' and A1='0' and A0='1')else

'1' when (B2='1' and B1='0' and B0='1' and A2='0' and A1='0' and A0='1')else

'1' when (B2='1' and B1='1' and B0='0' and A2='0' and A1='0' and A0='1')else

'1' when (B2='1' and B1='1' and B0='1' and A2='0' and A1='0' and A0='1')else

'1' when (B2='0' and B1='1' and B0='1' and A2='0' and A1='1' and A0='0')else

'1' when (B2='1' and B1='0' and B0='0' and A2='0' and A1='1' and A0='0')else

'1' when (B2='1' and B1='0' and B0='1' and A2='0' and A1='1' and A0='0')else

'1' when (B2='1' and B1='1' and B0='0' and A2='0' and A1='1' and A0='0')else

'1' when (B2='1' and B1='1' and B0='1' and A2='0' and A1='1' and A0='0')else

'1' when (B2='1' and B1='0' and B0='0' and A2='0' and A1='1' and A0='1')else

'1' when (B2='1' and B1='0' and B0='1' and A2='0' and A1='1' and A0='1')else
'1' when (B2='1' and B1='1' and B0='0' and A2='0' and A1='1' and A0='1')else

'1' when (B2='1' and B1='1' and B0='1' and A2='0' and A1='1' and A0='1')else

'1' when (B2='1' and B1='0' and B0='1' and A2='1' and A1='0' and A0='0')else

'1' when (B2='1' and B1='1' and B0='0' and A2='1' and A1='0' and A0='0')else

'1' when (B2='1' and B1='1' and B0='1' and A2='1' and A1='0' and A0='0')else

'1' when (B2='1' and B1='1' and B0='0' and A2='1' and A1='0' and A0='1')else

'1' when (B2='1' and B1='1' and B0='1' and A2='1' and A1='0' and A0='1')else

'1' when (B2='1' and B1='1' and B0='1' and A2='1' and A1='1' and A0='0')else

'0';

end Behavioral;
LIBRARY ieee;

USE ieee.std_logic_1164.ALL;

ENTITY simpt4 IS

END simpt4;

ARCHITECTURE behavior OF simpt4 IS

-- Component Declaration for the Unit Under Test (UUT)

COMPONENT pt4

PORT(

A0 : IN std_logic;

A1 : IN std_logic;

A2 : IN std_logic;

B0 : IN std_logic;

B1 : IN std_logic;

B2 : IN std_logic;

X1 : OUT std_logic;

X2 : OUT std_logic;
X3 : OUT std_logic

);

END COMPONENT;

--Inputs

signal A0 : std_logic := '0';

signal A1 : std_logic := '0';

signal A2 : std_logic := '0';

signal B0 : std_logic := '0';

signal B1 : std_logic := '0';

signal B2 : std_logic := '0';

--Outputs

signal X1 : std_logic;

signal X2 : std_logic;

signal X3 : std_logic;

BEGIN

-- Instantiate the Unit Under Test (UUT)

uut: pt4 PORT MAP (

A0 => A0,

A1 => A1,

A2 => A2,

B0 => B0,

B1 => B1,

B2 => B2,

X1 => X1,

X2 => X2,

X3 => X3

);

-- Stimulus process

stim_proc: process

begin

-- hold reset state for 100 ns.

wait for 100 ns;

-- insert stimulus here


A2 <= '0'; A1 <= '0'; A1 <= '1'; B2 <= '0'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '0'; B2 <= '0'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '1'; B2 <= '0'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '0'; B2 <= '0'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '1'; B2 <= '0'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '0'; B2 <= '0'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '1'; B2 <= '0'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '0'; B2 <= '0'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '1'; B2 <= '0'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '0'; B2 <= '0'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '1'; B2 <= '0'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '0'; B2 <= '0'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '1'; B2 <= '0'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '0'; B2 <= '0'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '1'; B2 <= '0'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '0'; B2 <= '0'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '1'; B2 <= '0'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '0'; B2 <= '0'; B1 <= '1'; B0 <= '0';

wait for 100 ns;


A2 <= '0'; A1 <= '1'; A1 <= '1'; B2 <= '0'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '0'; B2 <= '0'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '1'; B2 <= '0'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '0'; B2 <= '0'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '1'; B2 <= '0'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '0'; B2 <= '0'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '1'; B2 <= '0'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '0'; B2 <= '0'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '1'; B2 <= '0'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '0'; B2 <= '0'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '1'; B2 <= '0'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '0'; B2 <= '0'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '1'; B2 <= '0'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '0'; B2 <= '1'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '1'; B2 <= '1'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '0'; B2 <= '1'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '1'; B2 <= '1'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '0'; B2 <= '1'; B1 <= '0'; B0 <= '0';

wait for 100 ns;


A2 <= '1'; A1 <= '0'; A1 <= '1'; B2 <= '1'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '0'; B2 <= '1'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '1'; B2 <= '1'; B1 <= '0'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '0'; B2 <= '1'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '1'; B2 <= '1'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '0'; B2 <= '1'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '1'; B2 <= '1'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '0'; B2 <= '1'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '1'; B2 <= '1'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '0'; B2 <= '1'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '1'; B2 <= '1'; B1 <= '0'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '0'; B2 <= '1'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '1'; B2 <= '1'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '0'; B2 <= '1'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '1'; B2 <= '1'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '0'; B2 <= '1'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '1'; B2 <= '1'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '0'; B2 <= '1'; B1 <= '1'; B0 <= '0';

wait for 100 ns;


A2 <= '1'; A1 <= '1'; A1 <= '1'; B2 <= '1'; B1 <= '1'; B0 <= '0';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '0'; B2 <= '1'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '0'; A1 <= '1'; B2 <= '1'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '0'; B2 <= '1'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '0'; A1 <= '1'; A1 <= '1'; B2 <= '1'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '0'; B2 <= '1'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '0'; A1 <= '1'; B2 <= '1'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '0'; B2 <= '1'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

A2 <= '1'; A1 <= '1'; A1 <= '1'; B2 <= '1'; B1 <= '1'; B0 <= '1';

wait for 100 ns;

wait;

end process;

END;