2.basic Electrical Engineering PDF

Sri Chandrasekharendra Saraswathi
Viswa Maha Vidyalaya
Enathur, Kanchipuram - 631561
Department of Electrical &Electronics Engineering
B.E I Year
Study Material - I Semester
2014-2015
Subject: Basic Electrical Engineering

Index
CONTENTS PAGE NO
UNIT -I : ELECTRICITY AND MAGNETISM 4-31
1.1 ELECTRIC CURRENT 4
1.2 AMPERE 5
1.3 ELECTRICAL POTENTIAL 5
1.4 ELECTRICAL POTENTIAL DIFFERENCE 6
1.5 RESISTANCE 6
1.6 POWER 7
1.7 ENERGY 7
1.8 OHM’S LAW 8
1.8.1 RELATIONSHIPS DERIVED FROM OHM’S LAW 8
1.9 EFFECT OF TEMPERATURE ON RESISTANCE 10
1.9.1 TEMPERATURE COEFFICIENT OF RESISTANCE 10
1.10 RESISTANCE IN SERIES 11
1.11 RESISTANCE IN PARALLEL 12

1.12 KIRCHOFF’S LAW 15
1.12.1 KIRCHOFF’S CURRENT LAW OR KCL 15
1.12.2 KIRCHOFF’S VOLTAGE LAW OR KVL 16
1.13 ELECTROMAGNETIC INDUCTION: 19
1.13.1 RELATION BETWEEN MAGNET AND ELECTRICITY 19
1.13.2 PRODUCTION OF INDUCED E.M.F AND CURRENT 19
1.14 FARADAY’S LAW OF ELECTROMAGNETIC INDUCTION 21
1.15 FLEMING’S RIGHT-HAND RULE 22
1.16 INDUCED E.M.F 22
1.16.1 DYNAMICALLY INDUCED EMF 22
1.16.2 STATICALLY INDUCED E.M.F 24
1.17 SELF INDUCTANCE 26
1.17.1 COEFFICIENT OF SELF-INDUCTANCE (L) 26
1.18 MUTUAL INDUCTANCE (M) 27
1.18.1 COEFFICIENT OF MUTUAL INDUCTANCE (M) 27
1.18.2 COEFFICIENT OF MAGNETIC COUPLING 28
1.19 INDUCTANCES IN SERIES 28
UNIT -II COMPLEX ALGEBRA AND A.C CIRCUITS 32-58
2.1 COMPLEX NUMBERS 32
2.2 SIGNIFICANCE OF OPERATOR J 32
2.3 COMPLEX NUMBERS USING THE RECTANGULAR FORM 33
2.4 ADDITION AND SUBTRACTION OF COMPLEX NUMBERS 35
2.5 MULTIPLICATION AND DIVISION OF COMPLEX NUMBERS 36
2.6 COMPLEX NUMBERS USING POLAR FORM 38
2.7 POLAR FORM REPRESENTATION OF A COMPLEX NUMBER 38
2.7.1 CONVERTING BETWEEN RECTANGULAR FORM AND POLAR FORM 39
2.8 POLAR FORM MULTIPLICATION AND DIVISION 40
2.9 COMPLEX NUMBERS USING EXPONENTIAL FORM 41
2.10 THE SERIES RLC CIRCUIT 43
2.10.1 THE IMPEDANCE OF A SERIES RLC CIRCUIT 46
2.11 THE PARALLEL RLC CIRCUIT 49
Page 2 of 152
UNIT – III: THREE PHASE VOLTAGE GENERATION 59-77
59
3.1 THREE-PHASE VOLTAGES FOR STAR CONNECTION
3.2 PHASE SEQUENCE 62
3.3 NUMBERING OF PHASES 62
3.4 INTER-CONNECTION OF THREE PHASES 62
3.5 STAR CONNECTION 62
3.6 DELTA CONNECTION 66
3.7 NEUTRAL CURRENT IN UNBALANCED STAR CONNECTION 68
3.8 BALANCED STAR/DELTA AND DELTA/STAR CONVERSIONS 68
3.9 COMPARISON : STAR AND DELTA CONNECTIONS 70
3.10 COMPARISON : SINGLE AND THREE PHASE SUPPLY SYSTEMS 70
3.11 POWER FACTOR IMPROVEMENT 70
3.12 POWER FACTOR CORRECTION EQUIPMENT 71
3.13 POWER MEASUREMENT IN THREE IN THREE PHASE CIRCUITS 71
3.13.1 THREE WATTMETER METHOD (FIG PM1,PM2) 73
3.13.2 TWO WATTMETER METHOD –BALANCED OR UNBALANCED 73
3.13.3 TWO WATTMETER METHOD –BALANCED LOAD
LOAD(PM3,PM4) 73
3.13.4 POWER FACTOR –BALANCED LOAD 75
3.13.5 REACTIVE POWER:(fig PM6) 76
3.13.6 ONE WATTMETER METHOD:(FIG PM7) 76
UNIT – IV DIGITAL ELECTRONICS 78-127
4.1 LOGIC GATES 78
4.2 BOOLEAN ALGEBRA 87
4.3 BINARY ADDITION 89
4.4 FILP FLOP 90
4.5 COUNTER 96
4.6 CHARACTERISTICS OF DAC 97
4.7 SILICON DIODE 102
4.8 BIPOLAR NPN TRANSISTOR CONFIGURATION 110
4.9 THE JUNCTION FIELD EFFECT TRANSISTER 116
4.10 MOSFET 122
UNIT – V: FUNDAMENTALS OF COMMUNICATION ENGINEERING 128-152
5.1 TYPES OF SIGNAL 128
5.1.1 AN ANALOGUE SIGNAL 128
5.1.2 A DIGITAL SIGNAL 128
5.2 MODULATION 129
5.3 TYPES OF MODULATION 130
5.4 RADIO COMMUNICATION SYSTEM 137
5.5 SATELLITE COMMUNICATION 139
5.6 EARTH STATION 141
5.7 OPTICAL COMMUNICATION 143
5.8 ADVANTAGES OF OPTICAL FIBER COMMUNICATION 145
5.9 DISADVANTAGE OF OPTICAL FIBER COMMUNICATION 145
5.10 TELEVISION 146
5.10.1 TV TRANSMITTER 147
5.10.2 TV RECEIVER 148
5.11 MICROWAVE COMMUNICATION 148
5.12 MERITS AND DEMERITS OF MICROWAVE COMMUNICATION 150
5.13 FAX 151
Page 3 of 152
UNIT -I
ELECTRICITY AND MAGNETISM
1.1 ELECTRIC CURRENT
In conducting materials like copper, aluminum etc., enormous amount of ‘free electrons’
are available and are distributed in a scattered fashion. They move from one atom to the
other atom of the same material at random. Fig 1.1 shows such random movements of
free electrons. The arrowhead shows the moving direction of the respective free
electrons. The conductor of Fig.1.1 is still ‘unexcited’, (that is ,it is not given any
electrical supply).
Fig.1.1. Movement of free electrons in conducting materials.
However, when an electrical potential is impressed across the terminals a-b of the
conducting material, it is readily observed that the randomly moving loosely packed free
electronics arrange themselves in a neatly aligned path. It is shown in Fig.1.2. Now, the
free electrons move from negative terminal of the source towards the positive terminal
in a very systematic manner. Such a continuous flow of electrons in an electric circuit is
called the ELECTRICAL CURRENT.
Fig.1.2 Movement of free electrons in a conductor after a potential of ‘V’ volt is given
The flow of direct current is from anode to cathode i.e. from the positive terminal to
negative terminal of the source. Such a current flow is known to be the conventional
current flow. Whether it is electrical current or conventional current, their magnitude
will be the same; only the direction changes.
Page 4 of 152
1.2 AMPERE
The electrical current is measured by the unit ‘AMPERE’. The magnitude or total
amount of electrical current at any part of the conducting material is directly
proportional to the rate of flow of electrons. As the electrons are charged particles, this
can also be said as proportional to rate of flow of charges.
Q as the charges, it can be expressed as
Current I = d (Q)
------- === rate of change of charge (1.1)
dt
Where t is in seconds.
The unit of current, Ampere can now be conveniently defined using the equation (1.1)
as “When a charge of one coulomb passes through any part of wire in one second the wire is
said to carry one ampere”.
1.3 ELECTRICAL POTENTIAL
When a body is charged, either electrons are supplied to it or they are removed from it;
but in both cases, work is done. Such ability of a charged body to do work is termed to
be the ‘Potential’.
Let two conducting bodies A and B be assumed to be available in space as shown as in
Fig.1.3, and let them charged.
Fig.1.3. Illustration for defining electrical potential.
The Potential of the body A with respect to the body B is defined as the work done in
moving a positive unit charge Q from B to A. Note that the body B is charged in such a
way to remove electrons from it and the body A is charged to receive these electrons. In
both the operation an amount of work is done by the bodies. This capacity of a charged
particle to do work is called the ELECTRICAL POTENTIAL.
If an electric charge of quality Q is passed through the circuit against a voltage of V,
then the work done is equal to VQ.
Work done = VQ (1.2)
Page 5 of 152
1.4 ELECTRICAL POTENTIAL DIFFERENCE
After the charge exchanging process is over the potentials of bodies A and B would
have changed to some other values. This difference in the electric potential of the two
charged bodies is called the ELECTRICAL POTENTIAL DIFFERENCE.
The unit of potential difference is ‘volt’
The volt is the unit for potential or potential difference or voltage or E.M.F (Electro
motive force).
It is defined as the potential difference between two conducting bodies is one volt if one
joule of work is done in transferring one coulomb of positive change from one
conducting body to another.
1.5 RESISTANCE
It is seen that when an electric potential difference of V volts is applied across the two
terminals of a conducting material, the free electrons of the material align in a row and
reach the positive terminal of the supply .However, the free electrons are met by other
atoms of the conductor and both these collide with each other. The collision between the
free electrons and the atoms is reflected as an opposition to the flow of free electrons.
This collision process ‘resists’ the flow of free electrons; hence it is referred to as the
RESISTANCE of the material. The collision between the free electrons and the atoms
contributes to power loss and is dissipated as heat by the conductor.
I t is obvious that if the resistance of the conductor is high, flow of free electrons will be
resisted much and hence the free electrons flow i.e. the current flow will be less. Thus
the resistance of a conductor and the current flow through it are of reverse proportion.
1
I α ------ (1.3)
R
Where R is the resistance of the conductor and a I is the current through it.
The resistance of a material has unit, ohm and is denoted by the symbol Ω. It can be
defined as a conductor is said to have a resistance of one ohm, if one ampere of current
passing through it produces a heat of 0.24 calories.
The resistance of a material having a length of l and an uniform cross-section area of ‘a’
is related as
l
R α ------- (1.4)
a
Introducing a proportionality constant ρ, the above expression becomes
ρl
R= ------- (1.5)
a
Page 6 of 152
This constant ρ is called the resistivity or specific resistance of the material. With ‘l’ in cm
and ‘a’ in m2 the unit of ρ will become Ω cm/m2
1.6 POWER
The basic definition of POWER is the rate of doing work. The work done by a circuit
which is supplied with a potential difference of V volts and carrying a charge of Q
coulombs is VQ. On this basis the power can be written as,
d(workdone)
P = ----
dt
d(VQ)
= -----
dt
V d(Q)
= ----
dt
From the equation (1.1) d (Q)/dt is the flow of current in the circuit. Therefore,
P = VI (1.6)
Its unit is watt. The power P can become 1 watt, when V and I are both 1. Watt is defined as
the power consumed in a circuit is one watt if a potential difference of one volt causes one
ampere of current to flow through the circuit.
1.7 ENERGY
Let the circuit of Fig.1.4. be consider which is supplied with a voltage of V. Let the
resistance of the conductor be R ohm, current of I amperes be available in the circuit.
Energy may be defined as the amount of work needed to maintain the current of I
amperes flowing through a resistance R ohm for a complete duration of time, t seconds.
Fig.1.4. Illustration circuit to define energy
Work done is VI, hence the energy will be the amount of work done for t seconds.
Therefore,
Page 7 of 152
Energy = (VI) t (1.7)
Its unit is joules or watt second.
1.8 OHM’S LAW
Whenever electric current flows through a conductor, the following three factors are
present:
1. The pressure or potential difference V across the conductor causing the current to
flow.
2. The opposition or resistance R of the conductor which must be overcome.
3. The current strength I which is maintained in the conductor as a result of pressure
overcoming the resistance.
There exists a definite relationship between the three quantities involved is known as Ohm’s
law. It may be stated as: the ratio of potential difference (V) between any two points of a
conductor to the current (I) flowing between them is constant, provided the temperature of
the conductor does not change.
In other words, V V
----- = constant or -------- = R
(1.8)
I I
Put in other way simply means that provided R is kept constant, current is directly
proportional to the potential difference across the ends of a conductor.
This law is applicable not only to dc circuit but to ac circuit also.
1.8.1RELATIONSHIPS DERIVED FROM OHM’S LAW
1. Power. P = VI
Other form of the above formula can be written as
P = V2/R -----eliminating I
= I2R -----eliminating V
2. Resistance
R = V/I = V2/W = W/I2
3. Current
I = V/R = W/I = √WR
Page 8 of 152
Problem 1
A current of 5.559 A passes through a resistance of 100 Ω for a duration of 5 seconds. How
much coulomb pass through any section of the resistor for the given duration.
Solution
I = dQ/dt
Or simply I=Q/t
Q= It
= (5.559) (5) = 27.795 C
Problem 2
Calculate the resistance of 100m length wire having a uniform cross-sectional area of
0.1mm2 if the wire is made up of a material having a resistivity of 50 × 10-8 Ωm.
Solution
Given data: l = 100m, a = 0.1 mm2 = 0.1 × 10-6 m2
ρ = 50 × 10-8Ωm
R = ρl/a
= 50 × 10-8 × 100
--------------------- = 500 W
0.1× 10-6
Problem 3
A potential difference of 10 volts is applied across a 2.5 Ω resistor. Calculate the current,
power dissipated, and the energy transformed into heat in 5 min.
Solution
By ohm’s law, current I = V/R = 10/2.5 =4A
P = I2R = 42×2.5 = 40 W
Or
P = V2/R 102/2.5 = 40 W
Energy = (I2R) t
= (40) × 5× 60 = 24000 W-sec or Joules.
Problem 4
A building is supplied at 200V. The load being as follows:
100 W lamps 50 Nos.
2kW radiators 10 Nos.
50 A motors 2 Nos.
Page 9 of 152
Find total current, cost of energy consumed in a week of 48 hours at Rs 4 per unit.
Solution
50 lamps connected each wattage of lamp is 100 W
Current in each lamp = P/V = 100/200 = 0.5 A.
Total current observed by 50 lamps 50 × 0.5 = 25 A
Current consumed by each radiator 2000/200 = 10 A

Total current consumed by 10 radiator 10 × 10 = 100A
Each motor consumes 50A

Total current consumed by two motors 50 × 2 = 100A
Total current consumed by building = 25 + 100+ 100 225A
Energy consumed = VIt = Wt
for lamps load = no. of lamp × wattage of each lamp × time

= 50 × 100 × 48 = 240kW-hr
Similarly, for radiator = 10 × 2000 × 48 = 960 kW-hr
For motors = 2 × (50×200) ×48 = 960kW-hr

Total energy consumed by all loads = 240+960+960 = 2160 kW-hr
Given cost per unit is Rs.4, for 2160 units cost will be = 2160 × 4 = 8640
1.9 EFFECT OF TEMPERATURE ON RESISTANCE
In case of pure metals, the resistance increases with increase in temperature. In the case
of alloys, the increase in resistance with increase in temperature is relatively small and
irregular. The resistance of electrolytes and insulators decreases, with increase in
temperature.
1.9.1 TEMPERATURE COEFFICIENT OF RESISTANCE
Let a metallic conductor having a resistance of R0 at 0o C be heated to t0 C and its

resistance at this temperature be Rt .
It is found that the increase in resistance ΔR = Rt – R0 depends
Directly on its initial resistance
Directly on the rise in temperature
On the nature of the material of the conductor
Or Rt – R0 ∞ R0 ×t or Rt – R0 = α R0 t (1.9)
Page 10 of 152
Where α is a constant is known as the temperature coefficient of resistance of that
conductor.
Rearranging equation (1.9) we get
Rt – R0 ΔR
α = ----------- = --------
R0 t R0 t
If R0 = 1Ω, t = 1 C then α = ΔR
o
Hence temperature coefficient at 00 C may defined as the change in resistance per ohm per
degree change in temperature from 00 C.
From the equation (1.9) we find that Rt = R0 (1+ α0t)
So this formula for both rise and fall in temperature it may be written as
Rt = R0 (1+ α0t) (1.10)
Problem 5
Find the resistance of aluminum winding at 400C when its resistance at 250C is 50Ω. Take
the temperature coefficient of aluminum at 00C as 0.045 per 0C
Solution
Given R25 = 50 Ω, α0 = 0.045 per 0C
Find R40
We known that Rt = R0 (1+ α0t)
R25= R0 (1+ α0t25)

R40= R0 (1+ α0t40)
R25 (1+ α0t40) (1+0.045×40)

R40 = -------------------- = 50 -------------------- = 65.88Ω
(1+ α0t25) (1+0.045×25)
1.10 RESISTANCE IN SERIES
In a series circuits Fig 1.5., current flowing through each resistance is the same,
while the voltage across each resistance is different. The total resistance of the circuit
can be derived as follows:
Fig.1.5 series circuit

Page 11 of 152
V = IR1 + IR2 +IR3
V = I(R1+R2+R3)
V
----- = R1+R2+R3
I
Rs = R1+R2+R3
Where Rs is total resistance of the circuit
1.11 RESISTANCE IN PARALLEL
In a parallel circuit Fig 1.6., the voltage across each resistance is the same, while
the currents flowing through them are different. Total resistance for a parallel circuit can
be obtained as follows:
Fig.1.6 parallel circuit
I = I1+I2+I3
V1 V2 V3
I = ---- + ---- + ----
R1 R2 R3
I 1 1 1 (V1 = V2= V3=V)

----- = ---- + ---- + ----
V R1 R2 R3
1 1 1 1
----- = ---- + ----- + ----- Rp is the total resistance in parallel
Rp R1 R2 R3
Note : In a parallel circuit Fig,1.6,if the circuit current I is known the branch current can be
calculated by the current division formula.
Page 12 of 152
I (R2 ║ R3)
I1 = ------------------
(R1+R2+R3)
I (R1 ║ R3)
I2 = ------------------
(R1+R2+R3)
I (R1 ║ R1)
I3 = ------------------
(R1+R2+R3)
Problem 6
Find the effective resistance of the circuit shown in Fig (1.7)
Fig.1.7
It is seen that resistor 3 and 6 are in parallel so net resistance
3×6
------- = 2Ω
3+6
Now circuit becomes
Page 13 of 152
It is seen that 2 and 18 are in series 2+18=20.this is in parallel with 5
20×5
------- = 4Ω
20+5
8 and 1Ω are in series 8+1=9Ω
Reduced circuit
4 and 9Ω are in series so effective resistance is Reff =13Ω
Problem 7
Obtain the total power supplied by the 60V source and the power absorbed in each
resistor shown in Fig.1.8
Fig.1.8
Power observed by each resistor = I2R
By knowing individual branch current then power absorbed can be

calculated.
So calculate total resistance, across ‘cd’ 7 and 5Ω are in series 7+5=12Ω
12 and 4Ω are in parallel

12×4
------- = 3Ω
12+4
Page 14 of 152
Total resistance of the circuit is 7+3=10Ω
Total current I=60/10 6A, power = 60 ×6=360
Total current flow thro 7Ω , power absorbed by it (62)(7) = 252W

Apply current division method,
I (R1 ) 6×4
I2 = ------------------ = --------- = 1.5A
(R1+R2) 4+12
Current flow through 7 and 5Ω same,
Power absorbed by 7Ω in ‘cd’ = (1.52)(7)=15.75W
Power absorbed by 5Ω in ‘cd’ = (1.52)(5)=11.25W
1.12 KIRCHOFF’S LAW
At sometimes, it is not possible to find the current in the different branches of an

electrical circuit using ohm’s law alone. Under such circumstances kirchoff’s law can be
used to find the branch currents.
The two kirchoff’s law are 1.kirchoff’s current law 2.kirchoff’s voltage law
1.12.1 KIRCHOFF’S CURRENT LAW OR KCL
Kirchoff’s current law (KCL) states that the algebraic sum of all the currents
meeting at a junction is zero.
∑I = 0 at a junction (1.11)
To analysis this law, let the circuit of Fig.1.9 be consider. It is assumed that the
current entering any junction or node is positive and the current leaving any junction or
node is negative. The current in each element is marked arbitrarily.
Fig.1.9 Illustrative example for kirchoff’s current law
Let the kirchoff’s current law be applied to the junction 1, the currents meeting this
junction 1 are i1,i2,i3. The current i1 will be positive as it is entering junction1, whereas the
current i2 and i3 will be negative as they are leaving the junction 1.
Hence the KCL at junction 1 is:
Page 15 of 152
i1+(-i2)+(-i3) = 0
i.e., i1-i2-i3=0
(1.12)
similarly at junction 2, the KCL equation is:
i3+i4+i5 +(-i6)=0
i.e., i3+i4+i5-i6=0
(1.13)
And at junction 3, the KCL equation is:
i2+(-i4)+(-i5)=0
i.e., i2-i4-i5=0
(1.14)
the KCL can also be stated as the sum of the entering current at node will be equal
to sum of the current leaving the same node.
1.12.2 KIRCHOFF’S VOLTAGE LAW OR KVL
This law states that in any closed circuit the algebraic sum of voltage drops of all the
elements in that circuit plus the algebraic sum of all the source EMF’s in that closed circuit
is zero.
No. of element all source

i.e. ∑ IkRk + ∑ Vk = 0
(1.15)
k=1 k=1
in a closed circuit.
In appling KVL, the selection of signs for the voltage sources and for the voltage
drops of element plays a vital role.initially, in the concerned closed circuit, current
directions will be chosen arbitrary; the following conversion are then applied.
a) Sign conversion for voltage sources
If we travel from positive terminal of the emf source to the negative terminal,
then there is fall in potential. Hence, negative sign is assigned to the emf. On the
other hand, if we travel from negative terminal to positive terminal of the emf
source, then there is a raise in potential. So, positive sign is assigned to the emf.
Page 16 of 152
b) Sign conversion for voltage drop(IR)
If the loop current and the branch current are in the same direction, there is a fall
in the potential as we travel through the resistor. Hence, negative sign is
assigned to the IR product.
On the other hand, if the branch current direction is opposite to that of the loop
current, then there is a raise in potential as we travel through the resistor. Hence,
positive sign is assigned to the IR product.
Both the above conventions are clearly explained with the example given below
.Consider the closed path ABCDA in Fig.1.12 Different voltage drops will have
the followings sign:
Fig.1.12 Illustrative example for kirchoff’s law
I1R1 is –ve (fall in potential)

I3R3 is +ve (rise in potential)
E2 is –ve (fall in potential)
E1 is +ve (rise in potential)
Using KVL, we get

-I1R1-I2R2+I3R3-I4R4-E1+E2 = 0
Or
I1R1+I2R1-I3R3+I4R4 = E1 – E2
Problem 8
A battery of emf 40V and internal resistance 2Ω is connected in parallel with a

second battery of 44V and internal resistance 4Ω. A load resistance of 6Ω is
connected across the ends of the parallel circuits (Fig.1.13 ).calculate the current
in each battery and in the load.
Page 17 of 152
Fig.1.13
Solution
Apply KVL in loop ABCDA

-4I1 + 44 – 40 + I2 = 0
2I1-4I2 = 0 ------------------ (1.16)
Apply KVL in loop AEFDA

6(I1+I2) – 40 + 2I1 = 0
8I1 + 6I2 =40 ------------------(1.17)
Multiply equation(1.16) by 4 we get
8I1-16I2 = 40 ------------------(1.18)
From eua (1.17) and (1.18)
8I1+ 6I2 = 40
8I1- 16I2 = -16
- + +
---------------------
22I2 = 56
I2 = 2.55 A
Substitute I2 in equ(1.16),
2I1-4 × 2.55 = -4
I1 = 3.1 A
Thus load current IL = I1 + I2 = 5.65 A
Problem 9
Calculate the current through the galvanometer in the following bridge
Fig.1.14 Fig 1.14(a) current flow in bridge circuit
Solution
The current flowing through the bridge are shown in Fig.1.14(a)
Apply KVL in loop ABDA
I1 + 4I3 – 2I2 = 0 -----------------(1.19)
Page 18 of 152
Apply KVL in loop BCDB
2(I1 – I3) – 3 (I2 + I3) – 4I3 = 0
2I1 – 3I2 -9I3 = 0 ---------------(1.20)
In ADCA
2I2 + 3(I2+I3) -2 = 0
5I2 + 3I3 -2 = 0 --------------(1.21)
Solving above equations, we get

I3 = 0.023 A, I2 = 0.386 A, I1 = 0.68 A
So current through galvanometer I3 = 0.023 A
1.13 ELECTROMAGNETIC INDUCTION:
1.13.1 RELATION BETWEEN MAGNET AND ELECTRICITY
In the beginning of 1800’s Oersted and Ampere postulated “an electric current could deflect
a magnetic compass needle; hence all magnetic phenomena are fully due to the electrical
charges in motion”.
After that, few decades later, Faraday experienced in his workshop that, a moving magnet
generates an electric current. This indeed states that “all electrical phenomena are
influenced proportionally by the magnetic field”.
As a summary, statement 1 says that magnetic phenomena are due to electricity; statement 2
says that, electrical phenomena are due to magnetism; with this conclusion, Maxwell
released a final theory, in which he strongly stated that electricity and magnetism are
proportional, interwined, one and only, inseperable and they are known as
electromagnetism. An electro-magnetic induction as the name itself implies, describe about
the electrical-magnetic dependence. Here we say induction because a live magnetic field
will induce some electrical quantity in the electric circuit or the electric current will induce
a magnetic field around the circuit through which it passes.
1.13.2 PRODUCTION OF INDUCED E.M.F AND CURRENT
In the Fig.1.15 is shown an insulated coil whose terminals are connected to a sensitive
galvanometer G. it is placed close to stationary magnet initially at position AB.
Fig.1.15
Page 19 of 152
Some lines of flux from the north pole of magnet are linked with through coil but there is no
deflection in galvanometer. When the magnet is suddenly brought closer to coil in position
CD. It is found that there is a sudden deflection in galvanometer. The deflection is reduced
to zero when the magnet becomes stationary at new position CD.
Fig1.16
When the magnet is moved away from the coil as shown in Fig.1.16 it is found that again
there is a deflection is in a opposite direction. The deflection of the galvanometer indicates
the production of e.m.f in the coil. This e.m.f exists so long as the change in flux exists.
The production of this e.m.f is further illustrated by considering a conductor AB placed

between magnetic field as shown in Fig.1.17.Whenever the conductor moved up or down,
deflection is produced in galvanometer. It means that e.m.f produced in AB conductor.
Fig1.17
From this we conclude that whenever a conductor cuts the magnetic lines of flux, an e.m.f is
induced in it. It is also found that if the conductor is moved parallel to the direction of the
lines of flux, then no e.m.f is induced.
Page 20 of 152
1.14 FARADAY’S LAW OF ELECTROMAGNETIC INDUCTION
Faraday summed up the above facts into two laws known as Faraday’s law of
electromagnetic induction.First law :’ When the magnetic flux linked with a circuit
changes, an e.m.f. is always induced in it’ or ‘Whenever a conductor cuts across magnetic
lines of flux, an e.m.f. is induced in that conductor’.Second law : ‘The magnitude of
induced e.m.f. is equal to the rate of change of flux linkages’
Suppose a coil has N turns and flux through it changes from an initial value of ɸ1 Wb to the
final value of ɸ2 Wb in time t seconds. Initial flux linkages = N ɸ1; final flux linkages = N
ɸ2
N ɸ2 - N ɸ1
Therefore, induced emf e =------------------- volt
T
Putting above equation in differential form , we get
d(N ɸ) dɸ
e = ------------- or e =N ------- volt -----------------(1.22)
dt dt
It is usual practice to place a ‘-‘ sign in the equation (1.22) . For the fact that, this induced
emf will always be such a direction as to oppose the very first cause producing it. This is the
Lenz’s law. The very first cause of course, is the flux change in the coil, without which no
emf would have been induced. Hence it will be oppose.
dɸ
e = - N ------- volt --------------------(1.23)
dt
problem 10
A coil of 500 turns is linked by a flux of 0.4m Wb. If flux is reversed in 0.01 sec, find the
emf induced in the coil.
Given data
N = 500; ɸ = 0.4 m Wb ; dt = 0.01sec
Solution
dɸ
e = N ------- volt
dt
d ɸ = 0.4-(-0.4) = 0.8m Wb = 8 ×10-4 Wb
8 ×10-4
e = 500 ×----------- = 40 volts
0.01
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Problem 11
A coil of resistance 100Ω is placed in a magnetic field of 1 mWb. The coil has 100 turns
and a galvanometer of 400Ω resistance is connected in series with it. Find the average emf
and the current if the coil is moved in 1/10 second from the given field to field strength of
0.2 mWb.
Given data
N=100; dt = 1/10 = 0.1 sec;
Solution
d ɸ = 1 – 0.2 = 0.8mWb
dɸ
e = N ------- volt
dt
0.8 ×10-3
e = 100 ×----------- = 0.8 volts
Total circuit resistance = 100+400 =500 Ω
Induced current = 0.8/500 = 1.6×10-3 A
1.15 FLEMING’S RIGHT-HAND RULE
The fleming’s right hand rule gives the direction of emf induced in the coil. It states that, if
thumb, forefinger and middle finger of the right hand are kept at right angle to each other
as shown in Fig.1.18
Fig.1.18
If the forefinger represents the direction of the lines of flux, the thumb points in the
direction of motion, then second finger points the direction of induced current.
1.16 INDUCED E.M.F

Induced emf can be obtained in two ways (i) Dynamically induced emf (ii)
Statically induced emf. In first case either conductor or flux are in motion. In second case
both conductor and flux are in stationary.
1.16.1DYNAMICALLY INDUCED EMF

It is brought out in Fig.1.19 , that the movement of conductors in a stationary
magnetic field(flux) system i.e electric circuit is in motion and the DC excited magnetic
field is in stationary(eg.DC Generator), thus producing continuously changing flux linkage
of NФ as long as in the electric circuit is in motion.An emf wil be induced in moving
conductor.Such induced emf is called Dynamically induced emf.
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Fig.1.19 Electric conductors in motion Fig.1.20 magnetic field in motion
It is also obtained in another way as shown in Fig.1.20., a moving magnetic field

system an emf will be induced in stationary electric conductor(eg.AC Generator)
Whenever there is a relative motion between a magnetic field and an electric
circuit an emf is induced in the conductors of the electric circuit.
Let ‘l’ is the length of the conductor moving within a magnetic field of flux density
B Wb/m2 , velocity v in m2 and area of cross section A in m2. If the conductor is move a
distance dx in time dt.
Then area covered by conductor A = l dx hence flux cut by conductor Ф = B l dx.
According to faraday’s law , the dynamically induced emf = rate of change of flux linkages.
d Ф Bldx
e = ------- = ---------- = Blv volt ---------------------
(1.24)
dt dt
where v = dx/dt
Fig.1.21 moving conductor in a magnetic field
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If the conductor A moves at an angle ‘Ө ‘ with the direction of lines of flux as shown in
Fig.1.21.
Then the induced emf is e = Blv sin Ө volt. The direction of the induced emf is given by
fleming’s right hand rule.
Problem 12
A conductor 50 cm long is moved at right angles to a uniform magnetic field strength of

0.12Wb/m2 at a speed of the 20 cm/sec. find the value of the emf induced.
Solution
given data
l = 50cm = 50 × 10-2 m; B = 0.12 Wb/m2; velocity = 20 × 10-2m/sec; Ө = 90o(at right angle)
e = Blv sin Ө = 0.12 × 50 × 10-2 ×20 × 10-2× sin 90
= 0.12 volts
Problem 13
A conductor 10cm long and carrying a current of 50 A lies perpendicular to a field of

strength 1000 AT/m, calculate i) the force acting on the conductor ii) emf induced in the
conductor with a speed of 1 m/s.
Solution
Given data
l=10cm = 10×10-2 = 0.1m; I = 50 A; H = 1000 AT/m; v= 1 m/s
i) F = BIl newton
B = µ0 H = 4 Π × 10-7 × 1000 = 4 Π × 10-4 Wb/m2
F = 4 Π × 10-4× 0.1 × 50 = 6.28 × 10-3 N
ii) E = Blv = 4 Π × 10-4 × 0.1 × 1 = 4 Π × 10-5 V
1.16.2 STATICALLY INDUCED E.M.F
When both conductors and flux are in stationary an emf is induced in conductors known as
statically induce emf. The transfoemer works entirely on this type of induced emf.
It can be further sub-divided into two types:
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i) Self induced emf
ii) Mutual induce emf
a) Self induced emf
Let a current ‘A ‘carrying coil thus producing a flux of ‘Ф ‘,N being conductors as shown in
Fig.1.22. If this current is changed, the flux produced by it also change, proportionally.
Fig.1.22 self induced emf
The stationary conductors is experiencing a change in the flux linkage in it thus an emf is
produced due to its own flux linkage is known as the self induced emf.
b) Mutual induced emf
Let us now consider two coils A and B placed close to each other as shown in Fig.1.23.
Fig.1.23
Coil A is connected to a battery, a switch and a variable resistance R whereas coil B is

connected to a sensitive voltmeter V. when the switch closed, current will be flow through
coil A a flux is set up which partly linked with coil B. the current flow through A is
changed, the flux linked with B is also changed. Hence due to this change in flux linkage an
emf is produced , it is indicated by voltmeter.
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If now battery is connected to coil B and voltmeter is connected to coil A as shown in
Fig.1.24. then situation reversed and now change of current in coil B will produced
mutually induce emf in coil A.
Fig.1.24
There is no movement of any conductor, the flux variations being brought about by
variations in current strength only. Such an emf induced in one coil by the influence of the
other coil is called mutually induced emf.
1.17 SELF INDUCTANCE
Self inductance is the property of a system, by which an emf is induced in a coil, when the
current through that coil is changed in a time duration of dt, seconds. It is given by symbol
L. thus the induced emf is proportional to the rate of change of current.
di
eα ------- volt --------------------(1.25)
dt
introducing a proportionality constant , known as the self inductance of coil.
di
e = L ------- volt --------------------(1.26)
dt
accounting for Lenz’s law
di
e =- L ------- volt --------------------(1.27)
dt
1.17.1 COEFFICIENT OF SELF-INDUCTANCE (L)
The coefficient of self-inductance of a coil is defined as the weber-turns per ampere in the
coil. By weber-turns is the product of flux and number of turns with which the flux is
linked.
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Fig.1.25
Consider a solenoid having N turns and carrying a current of I amperes.(Fig.1.25). if the

flux produced is ɸ webers, weber turns are Nɸ
Nɸ
By the definition, L = -------- henry --------------------(1.28)
I
Self-inductance is measured by the unit Henry.
We can also write in terms of reluctance S
N2
L = ------------ (i.e. ɸ = NI/S) -------------------(1.29)
S
1.18 MUTUAL INDUCTANCE (M)
Mutual inductance is defined as the ability of one coil to produce an emf in a near by coil by
induction when the current in the first coil changes. This action being reciprocal, the second
coil can also induce an emf in the first when current in the second coil changes. This
reciprocal induction is measured in terms of the coefficient of mutual inductance M.
1.18.1 COEFFICIENT OF MUTUAL INDUCTANCE (M)
Let there be two magnetically-coupled coils having N1 and N2 turns respectively as shown
in Fig.1.26.
Fig.1.26
Coefficient of mutual inductance between the two coils is defined as the webers-turns in one
coil due to one ampere current in the other.let a current of I1 amperes when flowing in the
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first coil produce a flux of ɸ1 weber in it. Then, flux linkage i.e. weber-turns in the second
coil for unit current in the first coil are N2ɸ2/I2.Hence by definition.
N2ɸ1
M = ---------- ----------------(1.30)
I1
or
N1ɸ2
M = ---------- -----------------(1.31)
I2
N1N2 -----------------(1.32) (i.e. ɸ = NI/S)

M = ---------
S
1.18.2 COEFFICIENT OF MAGNETIC COUPLING
Two coils are said to be magnetically coupled if full or part of the flux produced by
one links with the other. Let L1 and L2 be the self inductances of the two coils and M their
mutual inductance, then
K = M/√L1L2
When all the flux produced by one coil links with the other, then mutual inductance
between the two is maximum and is given by
M = √L1L2
In that case K=1
When there is no common flux between the two coils, they are said to be magnetically
isolated. Since, in that case, M=0, K=0 also.
Hence, coefficient of coupling may be defined as the ratio of actual mutual inductance
present between the two coils to the maximum possible value.
1.19 INDUCTANCES IN SERIES
a) When the coils are so joined in series such that their fluxes are additive i.e. in the
same direction(Fig.1.27)
Fig.1.27
Let M = coefficient of mutual inductance

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L1 = coefficient of self-inductance of 1st coil
L2 = coefficient of self- inductance of 2nd coil
Then, self induced emf in A is = e1 = -L1 {dI/dt}
Mutual induced emf in A due to change of current in B = e’1 = -M {dI/dt} ----------------

(1.33)
Self induced emf in B is = e2 = -L2{dI/dt} ---------------(1.34)
Mutually induced emf in B due to change of current in A is e2= -M {dI/dt}---------------

(1.35)
(all have –ve sign because both self and mutually induced emf are in opposition to the
applied emf)
Total induced emf in the combination = dI (L1 + L2 + 2M) -----------------

(1.36)
- -----
dt
If L is the equivalent inductance, then total induced emf in that coil would have been
= -L {dI/dt} -----------------(1.37)
Equating equ (1.36) and (1.37) we have
L = L1 + L2 + 2M ------------------(1.38)
b) When the coils are so joined that their fluxes are in opposite directions (Fig.1.28)
Fig.1.28
As before e1 = -L1 {dI/dt} ; e’1 = +M {dI/dt}
e2 = -L2{dI/dt} ; e2= +M {dI/dt}
dI (L1 + L2 + 2M)
total induced emf = - -----
dt
equivalent inductance L = L1 + L2 -2M -------------------(1.39)
In general, we have√
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L = L1 + L2 +2M if mmf are additive
L = L1 + L2 -2M if mmf are subtracting
Problem 14
The inductance of a coil is 0.15H. the coil has 100 turns .Find the following.(i)total
magnetic flux through the coil whe the current is 4A.(ii)energy stored in the magnetic
field.(iii)Voltage induced in the coil when the current is reduced to zero in 0.01 second..
Solution (i) L = Nɸ/I;0.15 = 100ɸ/4,ɸ = 6mH
(ii).e = 1/2X(6X10-3)X42= 0.048J;
(iii) el = L.dI/dt = 0.15 x 4/0.01 = 60V
Problem ;-15
Two coupled coils have a coefficient of coupling 0.85,N1=100 and N2=800, with coil 1 open
and a current of 5A in coil 2, the flux ɸ 2 is 0.35 mWb .Find L1 and L2 and M.
Solution :-
L2 = N2ɸ2 /I2 = 800 X 0.35 X 10-3/56 mH.
Flux linked with coil No,1, ɸ1 = 35 X 0.85 = 0.2975 m Wb
M =N1ɸ1 / l2 = (100 x 0.2975 x 10-3) / 5 = 5.95mH
K = M/√L1L2 or 0.85 = (5.95 × 10-3) / √L1 x 56 x 10-3
L1 = 0.875 mH
Problem 16
Two identical coils A and B each having 1000 turns lie in parallel planes such that 65% of
the flux produced by one coil links with the other coil and vice versa. A current of 10 A in
coil A produces in it a flux of 10-4 Wb. If the current in coil A changes from +12 A to -12A
in 0.02 second, what would be the magnitude of the emf induced in coil B? Calculate also
self inductance of each coil and mutual inductance.
Solution
Flux linked with coil B = 0.65 x 10-4 Wb
N2 ɸ2 1000 x 0.65 x 10-4
M= -------------- = ------------------------------ = 6.5 mH

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I2 10
dI1 = 12-(-12) = 24A, dt = 0.02 second
em = (6.5 x 10-3 x 24)/0.02 = 7.8 V
L = N1ɸ1/I1 = 1000 x10-4/10 = 10 mH
Problem 17
The combined inductance of two coils when connected in series are 0.42 H and 0.096 H for
series-aiding and series-opposing connections respectively. If one of the coils when isolated
has an inductance 0.1 H, calculate self inductance of other coil, mutual inductance between
the coils, the coupling coefficient.
Solution
For series aiding
L = L1 + L2 + 2M
0.42 = L1 + L2 + 2M
For series opposing
L = L1 + L2 - 2M
0.096 = L1 + L2- 2M
Solving above equation, we get M = 0.081H
Let L1 = 0.1 H substitute this value we get L2 = 0.482H
Coupling coefficient K = M/√L1L2
0.081 / √(0.1 x 0.482) = 0.4 H
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UNIT -II
COMPLEX ALGEBRA AND A.C CIRCUITS:
2.1 COMPLEX NUMBERS
The mathematics used in Electrical Engineering to add together resistances, currents or DC

voltages uses what are called “real numbers”. But real numbers are not the only kind of
numbers we need to use especially when dealing with frequency dependent sinusoidal
sources and vectors. As well as using normal or real numbers, Complex Numbers were
introduced to allow complex equations to be solved with numbers that are the square roots
of negative numbers, √-1.
In electrical engineering this type of number is called an “imaginary number” and to

distinguish an imaginary number from a real number the letter “j” known commonly in
electrical engineering as the j-operator, is used. The letter j is placed in front of a real
number to signify its imaginary number operation. Examples of imaginary numbers are: j3,
j12, j100 etc. Then a complex number consists of two distinct but very much related parts, a
“Real Number” plus an “Imaginary Number”.
Complex Numbers represent points in a two dimensional complex or s-plane that are
referenced to two distinct axes. The horizontal axis is called the “real axis” while the
vertical axis is called the “imaginary axis”. The real and imaginary parts of a complex
number, Z are abbreviated as Re (z) and Im (z), respectively.
Complex numbers that are made up of real (the active component) and imaginary (the
reactive component) numbers can be added, subtracted and used in exactly the same way as
elementary algebra is used to analyses DC Circuits.
The rules and laws used in mathematics for the addition or subtraction of imaginary
numbers are the same as for real numbers, j2 + j4 = j6 etc. The only difference is in
multiplication because two imaginary numbers multiplied together becomes a positive real
number, as two negatives make a positive. Real numbers can also be thought of as a
complex number but with a zero imaginary part labeled j0.
2.2 SIGNIFICANCE OF OPERATOR J
The j-operator has a value exactly equal to √-1, so successive multiplication of “j “, ( j x j )

will result in j having the following values of, -1, -j and +1. As the j-operator is commonly
used to indicate the anticlockwise rotation of a vector, each successive multiplication or
power of “j “, j2, j3 etc, will force the vector to rotate through an angle of 90o anticlockwise
as shown below. Likewise, if the multiplication of the vector results in a -j operator then the
phase shift will be -90o, i.e. a clockwise rotation.
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Vector Rotation of the j-operator
So by multiplying an imaginary number by j2 will rotate the vector by 180o anticlockwise,

multiplying by j3 rotates it 270o and by j4 rotates it 360o or back to its original position.
Multiplication by j10 or by j30 will cause the vector to rotate anticlockwise by the
appropriate amount. In each successive rotation, the magnitude of the vector always remains
the same.
In Electrical Engineering there are different ways to represent a complex number either
graphically or mathematically. One such way that uses the cosine and sine rule is called the
Cartesian or Rectangular Form.
2.3 Complex Numbers using the Rectangular Form
In the last tutorial about Phasors, we saw that a complex number is represented by a real
part and an imaginary part that takes the generalized form of:
Where:
Z - is the Complex Number representing the Vector
x - is the Real part or the Active component
y - is the Imaginary part or the Reactive component
j - is defined by √-1
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In the rectangular form, a complex number can be represented as a point on a two-
dimensional plane called the complex or s-plane. So for example, Z = 6 + j4 represents a
single point whose coordinates represent 6 on the horizontal real axis and 4 on the vertical
imaginary axis as shown.
Complex Numbers using the Complex or s-plane
But as both the real and imaginary parts of a complex number in the rectangular form can
be either a positive number or a negative number, then both the real and imaginary axis
must also extend in both the positive and negative directions. This then produces a complex
plane with four quadrants called an Argand Diagram as shown below.
Four Quadrant Argand Diagram
On the Argand diagram, the horizontal axis represents all positive real numbers to the right
of the vertical imaginary axis and all negative real numbers to the left of the vertical
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imaginary axis. All positive imaginary numbers are represented above the horizontal axis
while all the negative imaginary numbers are below the horizontal real axis. This then
produces a two dimensional complex plane with four distinct quadrants labeled, QI, QII,
QIII, and QIV.
The Argand diagram above can also be used to represent a rotating phasor as a point in the
complex plane whose radius is given by the magnitude of the phasor will draw a full circle
around it for every 2π/ω seconds.
Complex Numbers can also have “zero” real or imaginary parts such as:
Z = 6 + j0 or Z = 0 + j4. In this case the points are plotted directly onto the real or imaginary
axis. Also, the angle of a complex number can be calculated using simple trigonometry to
calculate the angles of right-angled triangles, or measured anti-clockwise around the Argand
diagram starting from the positive real axis.
Then angles between 0 and 90o will be in the first quadrant (I), angles (θ) between 90 and
180o in the second quadrant (II). The third quadrant (III) includes angles between 180 and
270o while the fourth and final quadrant (IV) which completes the full circle, includes the
angles between 270 and 360o and so on. In all the four quadrants the relevant angles can be
found from:
tan-1 (imaginary component ÷ real component)
2.4 Addition and Subtraction of Complex Numbers
The addition or subtraction of complex numbers can be done either mathematically or

graphically in rectangular form. For addition, the real parts are firstly added together to
form the real part of the sum, and then the imaginary parts to form the imaginary part of the
sum and this process is as follows using two complex numbers A and B as examples.
Complex Addition and Subtraction
Complex Numbers
Example No1
Two vectors are defined as, A = 4 + j1 and B = 2 + j3 respectively. Determine the sum and
difference of the two vectors in both rectangular ( a + jb ) form and graphically as an
Argand Diagram.
Mathematical Addition and Subtraction
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Addition
Subtraction
Graphical Addition and Subtraction
2.5 Multiplication and Division of Complex Numbers
The multiplication of complex numbers in the rectangular form follows more or less the
same rules as for normal algebra along with some additional rules for the successive
multiplication of the j-operator where: j2 = -1. So for example, multiplying together our two
vectors from above of A = 4 + j1 and B = 2 + j3 will give us the following result.
Multiplication
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Mathematically, the division of complex numbers in rectangular form is a little more
difficult to perform as it requires the use of the denominators conjugate function to convert
the denominator of the equation into a real number. This is called “rationalizing”. Then the
division of complex numbers is best carried out using “Polar Form”, which we will look at
later. However, as an example in rectangular form let’s find the value of vector A divided
by vector B.
Division
The Complex Conjugate
The Complex Conjugate, or simply Conjugate of a complex number is found by reversing

the algebraic sign of the complex numbers imaginary number only while keeping the
algebraic sign of the real number the same and to identify the complex conjugate of z the
symbol z is used. For example, the conjugate of z = 6 + j4 is z = 6 – j4, likewise the
conjugate of z = 6 – j4 is z = 6 + j4.
The points on the Argand diagram for a complex conjugate have the same horizontal
position on the real axis as the original complex number, but opposite vertical positions.
Thus, complex conjugates can be thought of as a reflection of a complex number. The
following example shows a complex number, 6 + j4 and its conjugate in the complex plane.
Conjugate Complex Numbers
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The sum of a complex number and its complex conjugate will always be a real number as
we have seen above. Then the addition of a complex number and its conjugate gives the
result as a real number or active component only, while their subtraction gives an imaginary
number or reactive component only. The conjugate of a complex number is an important
element used in Electrical Engineering to determine the apparent power of an AC circuit
using rectangular form.
2.6 Complex Numbers using Polar Form
Unlike rectangular form which plots points in the complex plane, the Polar Form of a
complex number is written in terms of its magnitude and angle. Thus, a polar form vector is
presented as: Z = A ∠±θ, where: Z is the complex number in polar form, A is the
magnitude or modulo of the vector and θ is its angle or argument of A which can be either
positive or negative. The magnitude and angle of the point still remains the same as for the
rectangular form above, this time in polar form the location of the point is represented in a
“triangular form” as shown below.
2.7 Polar Form Representation of a Complex Number
As the polar representation of a point is based around the triangular form, we can use
simple geometry of the triangle and especially trigonometry and Pythagoras’s Theorem on
triangles to find both the magnitude and the angle of the complex number. As we remember
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from school, trigonometry deals with the relationship between the sides and the angles of
triangles so we can describe the relationships between the sides as:
Using trigonometry again, the angle θ of A is given as follows.
Then in Polar form the length of A and its angle represents the complex number instead of
a point. Also in polar form, the conjugate of the complex number has the same magnitude or
modulus it is the sign of the angle that changes, so for example the conjugate of 6 ∠30o
would be 6 ∠– 30o.
2.7.1 Converting between Rectangular Form and Polar Form
In the rectangular form we can express a vector in terms of its rectangular coordinates, with
the horizontal axis being its real axis and the vertical axis being its imaginary axis or j-
component. In polar form these real and imaginary axes are simply represented by “A ∠θ“.
Then using our example above, the relationship between rectangular form and polar form
can be defined as.
Converting Polar Form into Rectangular Form, ( P→R )
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We can also convert back from rectangular form to polar form as follows.
Converting Rectangular Form into Polar Form, ( R→P )
2.8 Polar Form Multiplication and Division
Rectangular form is best for adding and subtracting complex numbers as we saw above, but
polar form is often better for multiplying and dividing. To multiply together two vectors in
polar form, we must first multiply together the two modulus or magnitudes and then add
together their angles.
Multiplication in Polar Form
Multiplying together 6 ∠30o and 8 ∠– 45o in polar form gives us.
Division in Polar Form
Likewise, to divide together two vectors in polar form, we must divide the two modulus and
then subtract their angles as shown.
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Fortunately today’s modern scientific calculators have built in mathematical functions
(check your book) that allows for the easy conversion of rectangular to polar form, ( R →
P ) and back from polar to rectangular form, ( R → P ).
2.9 Complex Numbers using Exponential Form
So far we have considered complex numbers in the Rectangular Form, ( a + jb ) and the
Polar Form, ( A ∠±θ ). But there is also a third method for representing a complex number
which is similar to the polar form that corresponds to the length (magnitude) and phase
angle of the sinusoid but uses the base of the natural logarithm, e = 2.718 281.. to find the
value of the complex number. This third method is called the Exponential Form.
The Exponential Form uses the trigonometric functions of both the sine ( sin ) and the
cosine ( cos ) values of a right angled triangle to define the complex exponential as a
rotating point in the complex plane. The exponential form for finding the position of the
point is based around Euler’s Identity, named after Swiss mathematician, Leonhard Euler
and is given as:
Then Eulers identity can be represented by the following rotating phasor diagram in the
complex plane.
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We can see that Euler’s identity is very similar to the polar form above and that it shows us
that a number such as Ae jθ which has a magnitude of 1 is also a complex number. Not only
can we convert complex numbers that are in exponential form easily into polar form such
as: 2e j30 = 2∠30, 10e j120 = 10∠120 or -6e j90 = -6∠90, but Euler’s identity also gives us
a way of converting a complex number from its exponential form into its rectangular form.
Then the relationship between, Exponential, Polar and Rectangular form in defining a
complex number is given as.
Complex Number Forms
Phasor Notation
So far we have look at different ways to represent either a rotating vector or a stationary
vector using complex numbers to define a point on the complex plane. Phasor notation is
the process of constructing a single complex number that has the amplitude and the phase
angle of the given sinusoidal waveform. Then phasor notation or phasor transform as it is
sometimes called, transfers the sinusoidal function of: A(t) = Am sin(ωt ± Φ) from the time
domain into the complex number domain which is also called the frequency domain. For
example:
Please note that the √2 converts the maximum amplitude into an effective or RMS value
with the phase angle given in radians, (ω).
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2.10 THE SERIES RLC CIRCUIT
Thus far we have seen that the three basic passive components, R, L and C have very
different phase relationships to each other when connected to a sinusoidal AC supply. In a
pure ohmic resistor the voltage waveforms are “in-phase” with the current. In a pure
inductance the voltage waveform “leads” the current by 90o, giving us the expression of
ELI. In a pure capacitance the voltage waveform “lags” the current by 90 o, giving us the
expression of ICE.
This Phase Difference, Φ depends upon the reactive value of the components being used
and hopefully by now we know that reactance, ( X ) is zero if the element is resistive,
positive if the element is inductive and negative if the element is capacitive giving the
resulting impedance values as:
Element Impedance
Circuit Element Resistance, (R) Reactance, (X) Impedance, (Z)
Resistor R 0
Inductor 0 ωL
Capacitor 0
Instead of analysing each passive element separately, we can combine all three together into
a series RLC circuit. The analysis of a series RLC circuit is the same as that for the dual
series RL and RC circuits we looked at previously, except this time we need to take into
account the magnitudes of both XL and XC to find the overall circuit reactance. Series RLC
circuits are classed as second-order circuits because they contain two energy storage
elements, an inductance L and a capacitance C. Consider the RLC circuit below.
Series RLC Circuit
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The series RLC circuit above has a single loop with the instantaneous current flowing
through the loop being the same for each circuit element. Since the inductive and capacitive
reactance’s are a function of frequency, the sinusoidal response of a series RLC circuit will
vary with the applied frequency, ( ƒ ). Therefore the individual voltage drops across each
circuit element of R, L and C element will be “out-of-phase” with each other as defined by:
 i(t) = Imax sin(ωt)

 The instantaneous voltage across a pure resistor, VR is “in-phase” with the
current.
 The instantaneous voltage across a pure inductor, VL “leads” the current by 90o
 The instantaneous voltage across a pure capacitor, VC “lags” the current by 90o
 Therefore, VL and VC are 180o “out-of-phase” and in opposition to each other.
Then the amplitude of the source voltage across all three components in a series RLC circuit
is made up of the three individual component voltages, VR, VL and VC with the current
common to all three components. The vector diagrams will therefore have the current vector
as their reference with the three voltage vectors being plotted with respect to this reference
as shown below.
Individual Voltage Vectors
This means then that we can not simply add together VR, VL and VC to find the supply
voltage, VS across all three components as all three voltage vectors point in different
directions with regards to the current vector. Therefore we will have to find the supply
voltage, VS as the Phasor Sum of the three component voltages combined together vector
ally.
Kirchhoff’s voltage law ( KVL ) for both loop and nodal circuits states that around any
closed loop the sum of voltage drops around the loop equals the sum of the EMF’s. Then
applying this law to the these three voltages will give us the amplitude of the source
voltage, VS as.
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Instantaneous Voltages for a Series RLC Circuit
The phasor diagram for a series RLC circuit is produced by combining together the three
individual phasors above and adding these voltages vector ally. Since the current flowing
through the circuit is common to all three circuit elements we can use this as the reference
vector with the three voltage vectors drawn relative to this at their corresponding angles.
The resulting vector VS is obtained by adding together two of the vectors, VL and VC and
then adding this sum to the remaining vector VR. The resulting angle obtained between VS
and i will be the circuits phase angle as shown below.
Phasor Diagram for a Series RLC Circuit
We can see from the phasor diagram on the right hand side above that the voltage vectors
produce a rectangular triangle, comprising of hypotenuse VS, horizontal axis VR and vertical
axis VL – VC Hopefully you will notice then, that this forms our old favourite the Voltage
Triangle and we can therefore use Pythagoras’s theorem on this voltage triangle to
mathematically obtain the value of VS as shown.
Voltage Triangle for a Series RLC Circuit
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Please note that when using the above equation, the final reactive voltage must always be
positive in value, that is the smallest voltage must always be taken away from the largest
voltage we can not have a negative voltage added to VR so it is correct to have VL –
VC or VC – VL. The smallest value from the largest otherwise the calculation of VS will be
incorrect.
We know from above that the current has the same amplitude and phase in all the
components of a series RLC circuit. Then the voltage across each component can also be
described mathematically according to the current flowing through and the voltage across
each element as.
By substituting these values into Pythagoras’s equation above for the voltage triangle will
give us:
So we can see that the amplitude of the source voltage is proportional to the amplitude of
the current flowing through the circuit. This proportionality constant is called the
Impedance of the circuit which ultimately depends upon the resistance and the inductive
and capacitive reactances.
Then in the series RLC circuit above, it can be seen that the opposition to current flow is
made up of three components, XL, XC and R with the reactance, XT of any series RLC
circuit being defined as: XT = XL – XC or XT = XC – XL with the total impedance of the
circuit being thought of as the voltage source required to drive a current through it.
2.10.1The Impedance of a Series RLC Circuit
As the three vector voltages are out-of-phase with each other, XL, XC and R must also be
“out-of-phase” with each other with the relationship between R, XL and XC being the vector
sum of these three components thereby giving us the circuits overall impedance, Z. This
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circuit impedance’s can be drawn and represented by an Impedance Triangle as shown
below.
The Impedance Triangle for a Series RLC Circuit
The impedance Z of a series RLC circuit depends upon the angular frequency, ω as do XL
and XC If the capacitive reactance is greater than the inductive reactance, XC > XL then the
overall circuit reactance is capacitive giving a leading phase angle. Likewise, if the
inductive reactance is greater than the capacitive reactance, XL > XC then the overall circuit
reactance is inductive giving the series circuit a lagging phase angle. If the two reactance’s
are the same and XL = XC then the angular frequency at which this occurs is called the
resonant frequency and produces the effect of resonance which we will look at in more
detail in another tutorial.
Then the magnitude of the current depends upon the frequency applied to the series RLC
circuit. When impedance, Z is at its maximum, the current is a minimum and likewise,
when Z is at its minimum, the current is at maximum. So the above equation for impedance
can be re-written as:
The phase angle, θ between the source voltage, VS and the current, i is the same as for the
angle between Z and R in the impedance triangle. This phase angle may be positive or
negative in value depending on whether the source voltage leads or lags the circuit current
and can be calculated mathematically from the ohmic values of the impedance triangle as:
Series RLC Circuit Example No1

A series RLC circuit containing a resistance of 12Ω, an inductance of 0.15H and a capacitor
of 100uF are connected in series across a 100V, 50Hz supply. Calculate the total circuit
impedance, the circuits current, power factor and draw the voltage phasor diagram.
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Inductive Reactance, XL.
Capacitive Reactance, XC.
Circuit Impedance, Z.
Circuits Current, I.
Voltages across the Series RLC Circuit, VR, VL, VC.
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Circuits Power factor and Phase Angle, θ.
Phasor Diagram.
Since the phase angle θ is calculated as a positive value of 51.8o the overall reactance of the
circuit must be inductive. As we have taken the current vector as our reference vector in a
series RLC circuit, then the current “lags” the source voltage by 51.8o so we can say that the
phase angle is lagging as confirmed by our mnemonic expression “ELI”.
2.11 THE PARALLEL RLC CIRCUIT

The Parallel RLC Circuit is the exact opposite to the series circuit we looked at in the
previous tutorial although some of the previous concepts and equations still apply.
However, the analysis of parallel RLC circuits can be a little more mathematically difficult
than for series RLC circuits so in this tutorial about parallel RLC circuits only pure
components are assumed in this tutorial to keep things simple.
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This time instead of the current being common to the circuit components, the applied
voltage is now common to all so we need to find the individual branch currents through
each element. The total impedance, Z of a parallel RLC circuit is calculated using the
current of the circuit similar to that for a DC parallel circuit, the difference this time is that
admittance is used instead of impedance. Consider the parallel RLC circuit below.
Parallel RLC Circuit
In the above parallel RLC circuit, we can see that the supply voltage, VS is common to all
three components whilst the supply current IS consists of three parts. The current flowing
through the resistor, IR, the current flowing through the inductor, IL and the current through
the capacitor, IC.
But the current flowing through each branch and therefore each component will be different
to each other and to the supply current, IS. The total current drawn from the supply will not
be the mathematical sum of the three individual branch currents but their vector sum.
Like the series RLC circuit, we can solve this circuit using the phasor or vector method but
this time the vector diagram will have the voltage as its reference with the three current
vectors plotted with respect to the voltage. The phasor diagram for a parallel RLC circuit is
produced by combining together the three individual phasors for each component and
adding the currents vector ally.
Since the voltage across the circuit is common to all three circuit elements we can use this
as the reference vector with the three current vectors drawn relative to this at their
corresponding angles. The resulting vector IS is obtained by adding together two of the
vectors, IL and IC and then adding this sum to the remaining vector IR. The resulting angle
obtained between V and IS will be the circuits phase angle as shown below.
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Phasor Diagram for a Parallel RLC Circuit
We can see from the phasor diagram on the right hand side above that the current vectors
produce a rectangular triangle, comprising of hypotenuse IS, horizontal axis IR and vertical
axis IL – IC Hopefully you will notice then, that this forms a Current Triangle and we can
therefore use Pythagoras’s theorem on this current triangle to mathematically obtain the
magnitude of the branch currents along the x-axis and y-axis and then determine the total
current IS of these components as shown.
Current Triangle for a Parallel RLC Circuit
Since the voltage across the circuit is common to all three circuit elements, the current
through each branch can be found using Kirchhoff’s Current Law, (KCL). Kirchhoff’s
current law or junction law states that “the total current entering a junction or node is
exactly equal to the current leaving that node”, so the currents entering and leaving node
“A” above are given as:
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Taking the derivative, dividing through the above equation by C and rearranging gives us
the following Second-order equation for the circuit current. It becomes a second-order
equation because there are two reactive elements in the circuit, the inductor and the
capacitor.
The opposition to current flow in this type of AC circuit is made up of three components:
XL XC and R and the combination of these three gives the circuit impedance, Z. We know
from above that the voltage has the same amplitude and phase in all the components of a
parallel RLC circuit. Then the impedance across each component can also be described
mathematically according to the current flowing through and the voltage across each
element as.
Impedance of a Parallel RLC Circuit
You will notice that the final equation for a parallel RLC circuit produces complex
impedance’s for each parallel branch as each element becomes the reciprocal of impedance,
( 1/Z ) with the reciprocal of impedance being called Admittance.
In parallel AC circuits it is more convenient to use admittance, symbol (Y) to solve
complex branch impedance’s especially when two or more parallel branch impedance’s are
involved (helps with the maths). The total admittance of the circuit can simply be found by
the addition of the parallel admittances. Then the total impedance, ZT of the circuit will
therefore be 1/YT Siemens as shown.
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Admittance of a Parallel RLC Circuit
The new unit for admittance is the Siemens, abbreviated as S, ( old unit mho’s ℧, ohm’s in
reverse ). Admittances are added together in parallel branches, whereas impedance’s are
added together in series branches. But if we can have a reciprocal of impedance, we can
also have a reciprocal of resistance and reactance as impedance consists of two components,
R and X. Then the reciprocal of resistance is called Conductance and the reciprocal of
reactance is called Susceptance.
Conductance, Admittance and Susceptance

The units used for conductance, admittance and susceptance are all the same namely
Siemens ( S ), which can also be thought of as the reciprocal of Ohms or ohm-1, but the
symbol used for each element is different and in a pure component this is given as:
Admittance (Y):
Admittance is the reciprocal of impedance, Z and is given
the symbol Y. In AC circuits admittance is defined as the
ease at which a circuit composed of resistances and
reactances allows current to flow when a voltage is applied
taking into account the phase difference between the
voltage and the current.
The admittance of a parallel circuit is the ratio of phasor
current to phasor voltage with the angle of the admittance
being the negative to that of impedance.
Conductance (G) :
Conductance is the reciprocal of resistance, R and is given
the symbol G. Conductance is defined as the ease at which
a resistor (or a set of resistors) allows current to flow when
a voltage, either AC or DC is applied.
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Susceptance (B):
Susceptance is the reciprocal of reactance, X and is given
the symbol B. In AC circuit’s susceptance is defined as the
ease at which a reactance (or a set of reactances) allows
current to flow when a voltage is applied.
Susceptance has the opposite sign to reactance so
capacitive susceptance BC is positive, +ve in value and
inductive susceptance BL is negative, -ve in value.
In AC series circuits the opposition to current flow is impedance, Z which has two
components, resistance R and reactance, X and from these two components we can
construct an impedance triangle. Similarly, in a parallel RLC circuit, admittance, Y also has
two components, conductance, G and susceptance, B. This makes it possible to construct an
admittance triangle that has a horizontal conductance axis, G and a vertical susceptance
axis, jB as shown.
Admittance Triangle for a Parallel RLC Circuit
Now that we have an admittance triangle, we can use Pythagoras to calculate the
magnitudes of all three sides as well as the phase angle as shown.
from Pythagoras,
Then we can define both the admittance of the circuit and the impedance with respect to
admittance as:
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Giving us a power factor angle of:
As the admittance, Y of a parallel RLC circuit is a complex quantity, the admittance

corresponding to the general form of impedance Z = R + jX for series circuits will be
written as Y = G - jB for parallel circuits where the real part G is the conductance and the
imaginary part jB is the susceptance. In polar form this will be given as:
Parallel RLC Circuit Example No1

A 1kΩ resistor, a 142mH coil and a 160uF capacitor are all connected in parallel across a
240V, 60Hz supply. Calculate the impedance of the parallel RLC circuit and the current
drawn from the supply.
Impedance of a Parallel RLC Circuit
In an AC circuit, the resistor is unaffected by frequency therefore R = 1kΩ’s

Inductive Reactance, (XL):
Capacitive Reactance, (XC):
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Impedance, ( Z ):
Supply Current, (Is):
Parallel RLC Circuit Example No2

A 50Ω resistor, a 20mH coil and a 5uF capacitor are all connected in parallel across a 50V,
100Hz supply. Calculate the total current drawn from the supply, the current for each
branch, the total impedance of the circuit and the phase angle. Also construct the current
and admittance triangles representing the circuit.
Parallel RLC Circuit
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1). Inductive Reactance, ( XL ):
2). Capacitive Reactance, ( XC ):
3). Impedance, (Z):
4). Current through resistance, R ( IR ):
5). Current through inductor, L ( IL ):
6). Current through capacitor, C ( IC ):
7). Total supply current, ( IS ):
8). Conductance, ( G ):
9). Inductive Susceptance, ( BL ):
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10). Capacitive Susceptance, ( BC ):
11). Admittance, ( Y ):
12). Phase Angle, ( φ ) between the resultant current and the supply voltage:
Current and Admittance Triangles
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UNIT -III
THREE PHASE VOLTAGE GENERATION
R
120º
Y' N 120º
B'
B Y
S
R'
120º
Fig. 18.1 (a) Schematic diagram of three windings of stator for the
generation of three phased balanced voltage (2-pole rotor).
3.1 Three-phase Voltages for Star Connection
The connection diagram of a star (Y)-connected three-phase system is shown in Fig.
18.2a, along with phasor representation of the voltages (Fig. 18.2b). These are in conti-
nuation of the figures 18.1a-b. Three windings for three phases are R (+) & R’(−),Y (+)
& Y’(−), and B (+) & Y’(−). Taking the winding of one phase, say phase R as an
example, then R with sign (+) is taken as start, and R’ with sign (−) is taken as finish.
Same is the case with two other phases. For making star (Y)-connection, R’, Y’ & B’ are
connected together, and the point is taken as neutral, N. Three phase voltages are:
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= E m sin θ ; = Em sin (θ − 120°) ;
eR eY
N N
eB = Em sin (θ − 240°) = Em sin (θ + 120°)
N
It may be noted that, if the voltage in phase R ( e RN ) is taken as reference as stated
earlier,
then the voltage in phase Y( eYN ) lags by 120° , and the voltage in phase B( e
BN ) lags
e RN
eY by 120° , or leads by 120° . The phasors are given as:

N e RN
FFig. 18.2 (a) Three-phase balanced voltages, with
the source star-connected (the phase
sequence, R-Y-B)
(b) Phasor diagram of the line and phase

voltages
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E RN ∠0° = E (1.0 + j0.0) :
E BN ∠ +120° = E (−0.5 + j0.866) .EYN ∠ −120° = E (−0.5 − j0.866) ;
The phase voltages are all equal in magnitude, but only differ in phase. This
is also
shown in Fig. 18.2b. The relationship between E and m E is E = E m 2 . The phase
/
sequence is R-Y-B. It can be observed from Fig. 18.1b that the voltage in phase Y attains
the maximum value, after θ = ω ⋅ t = 120°
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3.2 Phase sequence:
Phase sequence is meant the order in which the three phase attain their peak or
maximum value .in the development of three phase emf in the clockwise rotation of field
system was assumed. This assumptions made the emf phase b lag behind that of a by 120
degree and in similar way, made that of c lag behind that of b by 120 degree. Hence the order
in which the emf of phases, a,b,c attain their maximum values is abc.it is called the phase order
or phase sequence abc. If now the rotation of field structure is reversed (anti-clockwise), the
phase sequence become acb.
In general, the phase sequence of the voltage applied to the load is determined by the
order in which the three phase lines are connected. The phase sequence is changed by
interchanging any pairs of lines
3.3 Numbering of phases:
The three phases may be numbered 1,2,3 or a,b,c or as is customary , they may be given
three colours. the colurs used commercially are red, yellow and blue. in that case the sequence
is RYB(positive).another possible sequence is RBY(negative)
3.4 Inter-connection of three phases:
If the three armature coils of three phase alternator are not interconnected but are kept
separated, then each phase would need two conductors. Then total conductors of three phase
need six conductors. If the system designed like that it becomes complicated and expensive.
Hence three phase system are generally interconnected with either star or delta connections.
3.5 Star connection:
In star connection the similar ends of three phase windings are joined together. At appoint N
shown in figure.
1. Line voltage and phase voltage:
Line voltage VRY between line1 and line 2 is vector difference of ER and EY
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Line voltage VRY between line2 and line32 is vector difference of EY and EB
Line voltage VRY between line1 and line 2 is vector difference of EY EB
VRY=VYB=VBR=VL
VL=√3 Vph
2. Line current and phase current:
Current in the line 1 is I1 = IR
Current in the line 2 is I2 = IY
Current in the line 3 is I3 = IB
IR = IY == IB = IPH
IL = IPH
in star connection
1. line voltage are 120ᵒ apart

2. line voltage are 30ᵒ behind the respective phase voltages.
3. the angle between line current and line voltage is(30°+Φ) with current lagging
Power:
Power per phase = Eph IPH cos Φ
totalPower = 3 Eph IPH cos Φ
VL/√3 =Eph IL = IPH P = √ 3VLIL cosΦ
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3.6 Delta connection:
In delta connection the dissimilar ends of three phase windings are joined together. In other
words the three windings are joined in series to form a closed mesh as shown in figure.
1. Line voltage and phase voltage:
in delta connection ,the voltage between any pairs of line is equal to the phase
voltage of phase winding connected between the two lines considered
VRY=VYB=VBR=VL
VL=Vph
2. Line current and phase current:
Current in the line 1 is I1 = IR –IB
Current in the line 2 is I2 = IY –IR
Current in the line 3 is I3 = IB –IY
Current in the line 1 is I1 = 2 IPH COS (60ᵒ/2) = 2 IPH √3/2=√3 IPH
Current in the line 2 is I2 = √3 IPH
Current in the line 3 is I3 = √3 IPH
since all line currents are equal in magnitude
I1 = I2 = I3 = IL
IL = √3 IPH
in delta connection
4. line currents are 120ᵒ apart

5. line currents are 30ᵒ behind the respective phase current apart
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6. the angle between line current and line voltage is(30°+Φ)
Power:
Power per phase = Vph IPH cos Φ totalPower = 3 Vph IPH cos Φ
VL=Vph IL = √3 IPH
P = √ 3VLIL cosΦ
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3.7 Neutral current in unbalanced star connection:
In a balanced star connection the vectors for three equal phase currents drawn Ir ,Iy
and Ib drawn at a mutual difference of 120 degree. The vector combination of Ir and Iy is I
ry.this vector equal in magnitude to Ib but in phase opposition to it. Hence their vector sum is
zero which means In is zero.
But in unbalanced star connection three currents are are unequal in magnitude but are
at 120 degree to each other. Hence in unbalanced star connection the neutral current is not zero.
3.8 Balanced star/delta and delta/star conversions:
Any balanced star connected system may be completely replaced by an equivalent delt
connected system.for a example star connected system having the voltage of VL and the line
current IL maybe replaced by delta connected system in which the phase voltage is VL and
phase current IL/√ 3 .
For a balanced Y –connected load let
VL= LINE VOLTAGE IL=LINE CURRENT
ZY =IMPEDANCE/PHASE VPH =VL/√ 3
IPH= IL ZY = VL/√ 3 IL
now in the equivalent ∆ connected system
VPH =VL IPH= IL/√ 3
Z∆ = VL / IL/√ 3 =√ 3 VL / IL= 3 ZY
Z∆=3 ZY OR Z Y=Z∆/3
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3.9 COMPARISON : STAR AND DELTA CONNECTIONS
PARTICULARS STAR DELTA

Phase voltage Not Equal To Line Voltage Equal To Line Voltage
Number of turns required Few More
Neutral point Present Not Present
For rotary converters Not Suitable Suitable
Obtaining supply 1phase And Three Phase Three Phase Only
Suitability for the three phase High Voltage Low Voltage
motors
3.10 COMPARISON : SINGLE AND THREE PHASE SUPPLY SYSTEMS
PARTICULARS SINGLE THREE

Power Factor lower Higher for the same output
and speed
Output lower Higher than single phase
machine
Rotating Magnetic Field Not possible possible
Self Starting Not possible possible
Starting Ancillary needed No need
Suitable distribution transmission
Copper Requirement For high Low
Transmitting Power
3.11 Power factor improvement:
The heating and lighting load supplied from three phase supply have power factors
ranging from 0.95 to unity. But motor loads have usually low lagging power factors ranging
from 0.5 to 0.9.single phase motors may have as low power factor as0.4 and electric welding
units have even lower power factor 0.2to0.3.
The chief disadvantage of a low p.f is that the current required for a given power is
very high. this facts leads to the following undesirable results
All electrical machines are limited by current carrying capacity by the permissible
temperature rise which is proportional to square of current. Hence they may be fully loaded
without delivering their full power. when a load having allow power factor is switched on,there
is a large voltage in the supply voltage because of increased voltage drop.this drop adversely
affect the starting torque of motors and necessities expansive voltage equipments.hence
allsupply undertakings try to encourage consumers to have a high power factor.
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3.12 Power factor correction equipment:
The following equipment is generally used for improving p.f
1. Synchronous motor:
The machine draws leading kavr when they are over excited under idle conditions. they are
employed for correcting the p.f in bulk and have the special advantage of corrections can be
varied by changing their excitations
2. Static capacitors:
they are installed to improve the p.f of a group of a.c motors and practically loss free.
3. Phase advancers:
They are fitted with individual machines.
However the economic degree of correction to be applied in each case depends upon the tariff
agreement between the consumers and supply authorities
3.13 POWER MEASUREMENT IN THREE IN THREE PHASE CIRCUITS:
1. THREE WATTMETER METHOD:
In this method three wattmeter’s are inserted in each phase and the algebraic sum of the
reading gives the total power consumed by three phase load
2. TWO WATTMETER METHOD
This method gives true power in three phase circuit without regard to balance or
waveform provided in the case of star connected load, the neutral of the source power or if
there is neutral connection, the neutral should not carry any current.3. ONE WATTMETER
METHOD:
In this method, a single wattmeter is used to obtain the two readings which are obtained
by two wattmeter in two watt meter method.
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3.13.1 THREE WATTMETER METHOD (FIG PM1,PM2)
A wattmeter consists of low resistance of current coil which is inserted in series with
the line carrying current and high resistance pressure coil which is connected across the
potential difference is to be measured.
A wattmeter shows reading which is proportional the product of the current through its
currents coil ,the p.d across its potential coil and a cosine of the angle between voltage and
current.
Three wattcmeters inserted in each of three phases of the load whether star or delta
connected. The current coil of each wattmeter carries the current of one phase only and the
pressure coils measures the phase voltage of that phase. Hence each wattmeter meter measures
the power in single phase. The algebraic sum of the readings of the three wattcmeters must give
the total power in the load.
The difficulty with this method is that under ordinary conditions, it is not generally
feasible to break into the phases of delta connected nor is it always possible in case of star
connected to get the neutral point
3.13.2 Two wattmeter method –balanced or unbalanced load(PM3,PM4)
As shown in figure the current coils of the two wattmeter are inserted in any two lines
and their potential coils joined to the third line. it can be proven that the sum of instantaneous
power indicated by W1and W2gives instantaneous power absorbed by three loads
L1,L2,L3.THE star connected load is considered in the following discussions, although it can
be equally applied to delta connected load because delta connected load can always be replaced
by equivalent star connected load.
3.13.3 Two wattmeter method –balanced load:
If the load is balanced, then power factor can also found from the two wattmeter
readings. The star connected load will be assumed inductive.
Let VR,VY,VB be the r.m.s values of the three phase voltages and IR,IY,IB be the
r.m.s values of currents. Since the voltages and current are assumed sinusoidal, they can be
represented by vectors, the current lagging behind their phase voltages by Φ.
Current through the wattmeter W1= IR, P.D across voltage coil of W1 is VRB=VR-VB
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IR = (30°-Φ)
W1= VRB IR COS(30°-Φ)
W2= IY W2= VYB = VY-VB
W2= VYB IY COS(30°+Φ)
VRB= VYB =LINE VOLTAGE , IR= IY= LINE CURRENT
W1= VLIL COS (30°-Φ)
W2= VLIL COS (30°+Φ)
W1+W2= VLIL COS (30°-Φ) + VLIL COS (30°+Φ)
= VLIL [cos 30° cos Φ+ sin 30° sinΦ+ cos 30° cos Φ- sin 30° sinΦ]
= VLIL ( 2cos 30° cos Φ) = √ 3VLIL cosΦ =total powerin threephase load
Hence the sum of the two wattmeter readings gives the total power consumption in the
three phase load.
VARIATIONS IN WATTMETER READING:
it has been shown above that for the lagging p.f
From this it is clear that individual readings of the wattmeters not only depends on the load
but upon its power factor also.consider the following cases
1. When Φ=0 (p.f unity)
W1=W2= VLIL COS 30° .both wattmeters equal and positive
2. . When Φ=60° (p.f 0.5 lag)
W2= VLIL (COS 30° +60°)=0 hence the power is measured by W1 alone.
3. When 90° > 60°(0.5>P.F>0)then W1 is positive but reading of W2 IS REVERSED

4. when Φ=90°(p.f=0 as for pure inductive or capacitive load)then
W1= VLIL (COS 30° -90°)= VLIL sin30°
W2= VLIL (COS 30° +90°)= - VLIL sin30°

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Then two readings are equqal but of opposite sign
W1+W2=0
Summarizing the above ,we have for a lagging power factor
Φ 0° 60° 60°
COS Φ 1 0.5 0
W1 +ve +ve +ve
W2 +ve W1=W2 0 -ve W1=W2
LEADING POWERFACTOR:
In the above discussions lagging angles are taken +ve.now we will see how wattmeter
readings are changed if the power factor becomes leading. For Φ=+60° ( lag),W2 is zero. But
for Φ=-60°(lead),W1 is zero. So we find that for angles of lead,the readings of two watt meters
are interchanged.
Hence for a leading power factor
3.13.4 POWER FACTOR –BALANCED LOAD:
In case the load is balanced and for a lagging power factor
W1+W2= VLIL COS (30°-Φ) + VLIL COS (30°+Φ)
==√ 3VLIL cosΦ -----1
Similarly
W1-W2= VLIL COS (30°-Φ) - VLIL COS (30°+Φ)
=VLIL sinΦ ------------2
Divide 2by 1
Tan Φ=√ 3 (W1-W2/W1+W2)
Knowing Tan Φ and hence Φ,the value of p.f cosΦ can be found by consulting the
trigonometrically tables. it should howevever,be kept in mind that if w2 reading taken after the
reversing pressure coil(w2 is negative)
Tan Φ=√ 3 W1-(-W2)/W1+(-W2)
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Tan Φ=√ 3 W1-W2/W1+W2
We may express power factor in terms of the ratio of two wattmeter readings
Smaller reading/larger reading=W2/W1=r
Tan Φ=√ 3 [1-(W2/W1)]/1+(w2/w1)
=√ 3(1-r)/1+r
CosΦ =(1+r)/2 √ 1-r+r.r
3.13.5 REACTIVE POWER:(fig PM6)
We have seen that tan Φ =√ 3 (W1-W2/W1+W2
Since the tangent of the angle lag between phase currents and phase voltage of the
circuit is always equal to the ratio of the reactive power to the true power, it is clear that √ 3
(W1-W2) represents the reactive power. Hence for balanced load the reactive power’s given by
√ 3 times the difference of the two wattmeter used to measure the power for a three phase
circuit by the two wattmeter method. It may also proved mathematically as follows
√ 3 (W1-W2)= √ 3[ VLIL COS (30°-Φ) - VLIL COS (30°+Φ)]
=√ 3 VLIL (cos 30° cos Φ+ sin 30° sinΦ- cos 30° cos Φ+ sin 30° sinΦ)
=√ VLIL sinΦ
3.13.6 ONE WATTMETER METHOD:(FIG PM7)
In this case it is possible to apply two wattmeter methods by means of one wattmeter
without breaking circuit. The current coil in any one line and the pressure coils connected to
alternately between this and other two lines. The two reading so obtained, for balanced load,
corresponds to those obtained by normal two wattmeter method. It should be kept on mind that
this method is not of as much universal applications as the two wattmeter methods because it is
restricted to fairly balanced load only. However it may be conveniently applied for instance
when it is desired to find the power input to the factory motor in order to check the load upon
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the motor.
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UNIT - IV
Digital Electronics
DIGITAL ELECTRONICS:
Binary number system –Logic gates –Boolean algebra –Half and Full adders –Flip –Flops –
Registers and counters –A/D and D/A conversion (single concepts).
4.1 Logic gates
Logic gates are the basic building blocks of digital electronics and are used to build
telecommunication devices, computers, etc.
Types of Logic gates
NOT Logic
AND Logic
OR Logic
NOT Logic
This is the simplest form of logic gate and has only 1 input and 1 output which is to invert the
input signal
so if a Logic 0 is at the input, the output will be at Logic 1 and vice versa. The symbol for a
NOT gate is as follows.
A Q
Where A is Input and Q is Output
Truth Tables and is shown below.
 A truth table is a means for describing how a logic circuit’s output depends on the logic
levels present at the circuit’s inputs.
Input Output
A Q
0 1
1 0
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The Boolean expression for a NOT gate is
QA
The ‘bar’ over the A indicates that the output Q is the opposite of A.
The AND gate.
We will start with a 2 input AND gate. The symbol for a 2 input AND gate is as follows.
A
Q
B
The truth table for the 2 input AND gate is shown below.
Inputs Output
B A Q
0 0 0
0 1 0
1 0 0
1 1 1
We can see that the output is only at a Logic 1 when Input A AND Input B are at a Logic 1.
The Boolean expression for a 2 input AND gate is
Q  A.B
The ‘.’ between the A and B means AND in Boolean Algebra.
Now we will consider a 3 input AND gate.
The symbol is:
A
B Q
C
The truth table for the 3 input AND gate is shown below.
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Inputs Output
C B A Q
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
We can see that the output is only at a Logic 1 when Input A AND Input B AND Input C are at
a Logic 1.
The Boolean expression for a 3 input AND gate is
Q  A.B.C
3.The OR gate.
We will start with a 2 input OR gate. The symbol for a 2 input OR gate is as follows.
A
Q
B
The truth table for the 2 input OR gate is shown below.
Inputs Output
B A Q
0 0 0
0 1 1
1 0 1
1 1 1
We can see that the output is at a Logic 1 when Input A OR Input B OR both are at a Logic 1.
The Boolean expression for a 2 input OR gate is
Q  A B
The ‘+’ between the A and B means OR in Boolean Algebra.
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Now we will consider a 3 input OR gate.
The symbol is:
A
Q
B
C
The truth table for the 3 input OR gate is shown
below.
Inputs Output
C B A Q
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
We can see that the output is at a Logic 1 when either Input A OR Input B OR Input C OR
any combination are at a Logic 1.
The Boolean expression for a 3 input OR gate is
Q  A B C
4. The NAND gate.
We will start with a 2 input NAND gate. The symbol for a 2 input NAND gate is as follows.
A
Q
B
The truth table for the 2 input NAND gate is shown below.
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Inputs Output
B A Q
0 0 1
0 1 1
1 0 1
1 1 0
If you compare this truth table with that for the AND gate, you will find that the output Q is the
exact opposite to the AND.
The Boolean expression for a 2 input NAND gate is
Q  A.B
As before the ‘.’ between the A and B means AND, and the ‘bar’ means invert the output in
Boolean Algebra.
Now we will consider a 3 input NAND gate.
The symbol is:

A
B Q
C
The truth table for the 3 input NAND gate is shown below.
Inputs Output
C B A Q
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
The Boolean expression for a 3 input NAND gate is
Q  A.B.C Page 82 of 152

5. The NOR gate.
We will start with a 2 input NOR gate. The symbol for a 2 input NOR gate is as follows.
A
Q
B
The truth table for the 2 input NOR gate is shown below.
Inputs Output
B A Q
0 0 1
0 1 0
1 0 0
1 1 0
If you compare this truth table with that for the OR gate, you will find that the output Q is the
exact opposite of the OR.
The Boolean expression for a 2 input NOR gate is
Q  A B
As before the ‘+’ between the A and B means OR and the ‘bar’ means invert the result in
Boolean Algebra.
• NAND (and NOR) have unique properties different from the other boolean operations
– This allows us to use one or more NAND gates (or one or more NOR gates) and
create gates that can compute AND, OR and NOT
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6. The EXOR gate.
The EXOR gate has 2 inputs and is a specialised version of the OR gate. The symbol for a 2
input EXOR gate is as follows.
A
Q
B
The truth table for the 2 input EXOR gate is shown below.
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Inputs Output
B A Q
0 0 0
0 1 1
1 0 1
1 1 0
Comparison with the 2 input OR gate will reveal that Q is a Logic 1 when either A or B is a
Logic 1, but not when A and B are Logic 1.
The Boolean expression for a 2 input EXOR gate is
Q  A B
alternatively Q  A.B  A.B
The ‘  ’ between the A and B means Exclusive OR, however the alternative form will prove
to be more useful later on in the course when simplifying Boolean expressions.
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7. The XNOR gate.
The XNOR gate has 2 inputs and is the inverted form of the EXOR gate. The symbol for a 2
input XNOR gate is as follows.
A
Q
B
The truth table for the 2 input XNOR gate is shown below.
Inputs Output
B A Q
0 0 1
0 1 0
1 0 0
1 1 1
If you compare this truth table with that for the EXOR gate, you will find that the output Q is
the exact opposite to the EXOR.
The Boolean expression for a 2 input XNOR gate is
Q  A B
alternativ ely Q  A.B  A.B

The ‘  ’ between the A and B means Exclusive OR, and the ‘bar’ means that the result is
inverted. Once again however the alternative form will prove to be more useful later on in the
course when simplifying Boolean expressions.
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4.2 Boolean algebra
Boolean algebra is the algebra of binary values or 2 values
 Commutative Law
x•y=y•x x+y=y+x
 Identity Element
x•1=x x+0=x
 Complement
x • x’ = 0 x + x’ = 1
 Duality
● The dual of a Boolean algebraic expression is obtained by interchanging the

AND and the OR operators and replacing the 1’s by 0’s and the 0’s by 1’s.
● x•(y+z)=(x•y)+(x•z)
● x+(y•z)=(x+y)•(x+z)
 Theorem 1
● x•x=x x+x=x
 Theorem 2
● x•0=0 x+1=1
 Theorem 3: Involution
● ( x’ )’ = x (x)=x
 Theorem 4: Associative & Distributive
● (x•y)•z=x•(y•z) (x+y)+z=x+(y+z)
● x•(y+z)=(x•y)+(x•z)
x+(y•z)=(x+y)•(x+z)
 Theorem 5: DeMorgan
● ( x • y )’ = x’ + y’ ( x + y )’ = x’ • y’
● (x•y) =x +y (x+y) = x•y
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 AND Gate
● F=x•y F = (x • y) F=x+y
 OR Gate
● F=x+y F = (x + y) F=x•y
 Theorem 6: Absorption
● x•(x+y)=x x+(x•y)=x
 Literal:
A single variable within a term that may be complemented or not.
 Use Boolean Algebra to simplify Boolean functions to produce simpler circuits
Example: Simplify to a minimum number of literals
F = x + x’ y ( 3 Literals)
= x + ( x’ y )
= ( x + x’ ) ( x + y )
=(1)(x+y)=x+y ( 2 Literals)
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4.3 Binary Addition
• In the first case, we have a sum of 0 and a carry of 0
• In the second and third cases, we have a sum of 1 and a carry of 0
• In the last case, we have a sum of 0 and a carry of 1
• These patterns are demonstrated in the truth table above to the right
Truth Table
0 0 1 1
+0 +1 +0 +1
0 1 1 10
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4.4 Filp Flop
A flip-flop or latch is a circuit that has two stable states and can be used to store state
information
SR Latch
SR Flip-flop - (Set / Reset)
This type of flip-flop has two inputs: Set and Reset. Two outputs: Q and Q' (Q' being the
inverse of Q). The SR flip-flop can also have a clock input for a level driven circuit as opposed
to a pulse driven circuit.
The operation of an SR flip-flop is as follows: The Set input will make Q goto 1 i.e. will 'set'
the output. The Reset input will make the output Q goto 0 i.e. reset the output.
The scenerio of having both Set and Reset at logic 1 is not allowed as this is not a logical pair
of inputs.
Knowing the above, we can layout the operating characteristics and the state change table:
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A clock pulse [CP] is given to the inputs of the AND Gate. When the value of the clock pulse
is ’0′, the outputs of both the AND Gates remain ’0′.
As soon as a pulse is given the value of CP turns ’1′. This makes the values at S and R to pass
through the NOR Gate flip flop. But when the values of both S and R values turn ’1′, the HIGH
value of CP causes both of them to turn to ’0′ for a short moment.
As soon as the pulse is removed, the flip flop state becomes intermediate. Thus either of the
two states may be caused, and it depends on whether the set or reset input of the flip-flop
remains a ’1′ longer than the transition to ’0′ at the end of the pulse. Thus the invalid states can
be eliminated.
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D flip-flop (Delay)
The D type flip-flop has one data input 'D' and a clock input. The circuit edge triggers on.the
clock input. The flip-flop also has two outputs Q and Q' (where ' is the reverse of Q).
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• The operation of the D type flip-flop is as follows: Any input appearing (present state)
at the input D, will be produced at the output Q in time T+1 (next state). e.g. if in the
present state we have D = 0 and Q = 1, the next state will be D = anything and Q = 0.
• The operation of the D type delays any input by exactly one clock cycle (given an
instantanious response time i.e. a perfect flip-flop). Cascading several D type flip-flops
together can produce delaying circuits, possible applications could be for matching time
delays in digital television systems.
JK flip-flop
• The JK type flip-flop consists of two data inputs: J and K, and one clock input. There
are again two outputs Q and Q' (where Q' is the reverse of Q).
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A. When J=K=0, the current output will carry through to the next state. e.g. Current state
Q = Next state Q
B. When J=0 and K=1, the next state output will be put to 0. This happens regardless of
the present state output.
C. When J=1 and K=0, the next state output will be asserted (put to 1). This happens
regardless of the present state output.
D. When J=K=1, the next state output will be the inverse of the current state output. e.g.
Current state Q' = Next state Q.
i. Two conditions exist so that the next state is 0 while the present state is also 0. From the
operating characteristics diagram, we can see that condition A and B would both satisfy
this scenerio. The common term to make this scenerio true is J=0. We dont care about
K, as K=1 or K=0 while J=0 will work. Hence the 'don't care' term is K,
ii. Operating characteristics C and D both satisfy this scenerio. The common term is again
J, as the situation is solved by J=1 and either K=0 or K=1, therefore the 'don't care' term
is K as shown on the state change table.
iii. When the output goes from 1 to 0, there are two characteristics that will allow this to
happen; B and D. K=1 and J can be equal to 1 or 0. Therefore in this case, J is the 'don't
care' term.
iv. When the JK flip-flop remains at logic, it means that either A or C of the four operating
characteristics have been applied. K must equal 0 in either case, but J could have been
equal to 1 (A) or 0 (C). Because of this, J is the 'don't care' term.
The JK flip-flop can actually be reconfigured so that it can perform the operation of some of
the other flip-flops that are discussed above. For example, if the two inputs J and K are tied
together, then the output characteristics are fixed to A and D. This precisely matches the
characteristics of a T type flip flop. Also to note, because the way a JK is made, you may
replace an SR flip-flop with a JK flip-flop without a change in operation. However you cannot
replace a JK flip-flop with an SR flip-flop as a S=1 R=1 condition is not allowed, but a J=1
K=1 condition is permitted.
T flip-flop (Triggered / Toggle)
The T type flip-flop is a single input device: T (trigger). Two outputs: Q and Q' where Q' is
inverse of Q
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The operation of the T type flip-flop is as follows: A '0' input to 'T' will make the next state the
same as the present state (i.e. T = 0 present state = 0 therefore next state = 0). However a '1'
input to 'T' will change the next state to the inverse of the present state (i.e. T = 1 present state
= 0 therefore next state = 1).
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4.5 counter
• The clock will control when certain actions should take place
• The clock simply generates a sequence of electrical current “pulses”
• In the figure below, when the line is high, it means current is flowing, when low it
means current is not flowing
– Thus, if we want to control when to shift, we connect the S input to an AND

gate that includes the clock as another input
To the right is a 4-bit register Triggered by the system clock And connected to an input bus and
An output bus
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• The shift circuit we saw earlier is difficult to trace through although efficient in terms of
hardware
– we can also build a special kind of register called a shift register or a rotate
register by connecting SR flip flops
– this register will store a bit in each FF as any register, but the Q and ~Q outputs
are connected to the SR inputs of a neighboring FF
• below is a 4-bit right rotate (it rotates the rightmost bit to the leftmost
FF, so 1001 becomes 1100 and 0001 becomes 1000)
Upon a clock pulse, each Q output is connected to the FF to the
right’s S input and each ~Q output is connected to the FF to the
right’s R input, so an output of Q = 1 causes the next FF to set
(become 1) and an output of ~Q = 1 causes the next FF to reset (0)
4.6 Characteristics of DAC
Resolution
The number of bits making up the input data word that will ultimately determine the output
step voltage as a percentage of full-scale output voltage.
Example: Calculate the resolution of an 8-bit DAC.
Solution: Resolution = 8 bits
Percentage resolution = 1 1
8
100%  100%  0.391%
2 256
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Output Voltage Range
This is the difference between the maximum and minimum output voltages expressed in volts.
Example:
Calculate the output voltage range of a 4-bit DAC if the output voltage is +3.5V for an
input of 0000 and +7.5V for an input of 1111.
Solution:
Output voltage range = 7.5 – 3.5 = 4.0V
Accuracy
The accuracy is usually expressed by the error in output voltage compared with the expected
output voltage. The higher the accuracy, the lower will be the error. Due to the incremental
nature of the digital input word, an error can be tolerated but it should not exceed ±½LSB or
½resolution.
Example. The error at full-scale for an 8-bit DAC with 10V maximum output is 50mV.
Calculate the error and compare it with the resolution.
Solution: Error =
Resolution = ; ½ Resolution = 0.195%
Settling time
The time taken for the applied digital input to be converted to an analog output. Typical period
can be as low as 100ns, making DA conversion a very fast process compared with those of AD
conversion.
Analog-to-digital converter
An analog-to-digital converter (ADC, A/D, or A to D) is a device that converts a continuous

physical quantity (usually voltage) to a digital number that represents the quantity's amplitude.
A Flash ADC (also known as a Direct conversion ADC) is a type of analog-to-digital

converter that uses a linear voltage ladder with a comparator at each "rung" of the ladder to
Page 98 of 152
compare the input voltage to successive reference voltages.
Successive Approximation A/D Converter

A successive approximation (SA) A/D converter uses an intelligent scheme to
determinethe input voltage
It first tries a voltage half way between VRH and VRL
It determines if the signal is in the lower half or the upper half of the voltage range
If the input is in the upper half of the range, it sets the most significant bit of the
output
If the input is in the lower half of the range, it clears the most significant bit of the output
The first clock cycle eliminates half of the possible values
On the next clock cycle, the SA A/D tries a voltage in the middle of the remaining
possible values
The second clock cycle allows the SA A/D to determine the second most significant bitof
the result
Each successive clock cycle reduces the range another factor of two
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For a B-bit SA A/D converter, it takes B clock cycles to determine the value of the
input voltage
In an electronic circuit, a combination of high voltage (+5V) and low voltage (0V) is usually
used to represent a binary number.
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By using switches on the input resistors, a summing op amp can produce an output which is a
binary number (representing which switches are closed) times a reference voltage
The R-2R Ladder

This represents a rather minor point, although it is an interesting idea. The \R-2R ladder" isof
practical interest because it uses only two resistor values. Since it is diff_cult to
accuratelyfabricate resistors of arbitrary resistance, this is bene_cial. The two resistances of the
R-2R
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4.7 Silicon Diode
The silicon diode is probably the simplest of all the diode family. It is a two lead device, which
has the following appearance and circuit symbol.
Anode Cathode
Conventional current flows in this direction.
You should notice that the symbol looks a little bit like an arrow and this is helpful in
understanding what role the diode has in an electrical circuit. A careful examination of the two
circuits below should help you to understand the behaviour of the diode.
In the circuit on the left, the lamp lights, because conventional current can flow in the direction
of the arrow on the diode symbol. This is called forward bias when the anode is more positive
than the cathode.
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In the circuit on the right, the lamp does not light, because conventional current is flowing in
the opposite direction to the arrow on the diode symbol which acts as a barrier to current. This
is called reverse bias when the cathode is more positive than the anode.
The diode therefore acts as a one-way door to electric current.
We can see this more clearly if we add some voltmeters to the previous circuit as shown below.
0.7V 6.0V
5.3V 0.0V
In the left hand circuit we can see that the voltage of the battery is split between the diode
(0.7V) and the lamp (5.3V).
In the right hand circuit we can see that all of the voltage is across the diode, leaving nothing
across the lamp, so no current can be driven through the lamp.
The diode has a very unusual I-V characteristic curve, which can be investigated using the
following circuit.
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The following table shows a typical set of results from this arrangement.
1N4001 Diode
V (V) I (mA)
0.7 16.4
0.67 7.9
0.64 3.7
0.62 2.5
0.61 1.7
0.59 1.1
0.57 0.6
0.55 0.48
0.54 0.3
0.53 0.2
0.51 0.1
0.49 0.08
When plotted as a graph this gives the following characteristic.
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1N4001 Diode
20
Current (mA)
15
10
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Voltage (V)
We can see from the characteristic that below 0.5V, no current flows through the diode. As the
voltage increases from 0.5V the current flowing starts to increase, slowly at first and as the
voltage reaches 0.7V the increase in current becomes much more significant. Indeed the current
can increase much more, but the voltage across the diode does not increase much past 0.7V.
The diode is therefore a very non-linear component and as such does not obey ohms law,
because its resistance changes as the voltage across it changes.
In the reverse direction only a very, very small leakage current (~1-2μA) flows and this is
considered to be negligible for all practical circuits, so no current flows in the reverse bias
condition. The diode acts as a barrier to electrical current. A full characteristic curve would
therefore look like this.
Silicon Diode Characteristic
18
16
14
12
10
Current (mA)
0
-5 -4 -3 -2 -1 0 1
-2
Voltage Applied (V)
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The Zener Diode.
The zener diode is a very useful device which is designed to be used in reverse bias (i.e. the
cathode is more positive than the anode). As we have seen in a normal silicon diode, diodes do
not conduct in the reverse direction at all, but with some careful processing at the
manufacturing stage it is possible to alter the behaviour of the diode to that it does conduct in
the reverse direction, but only at one specific voltage called the zener voltage VZ. The zener
diode is given a different circuit symbol to ensure that it can be easily identified which is
shown below.
Anode Cathode
Conventional current flows easily in this direction
only when the cathode is above the zener voltage, VZ.
The physical appearance of a Zener diode is much the same as a

normal silicon diode, however the case is usually made of glass
rather plastic, although this should not be taken as the only way to
identify a zener diode.
The electrical characteristic of the Zener diode is an easily identifiable characteristic as shown
below.
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Note : the forward characteristic is exactly the
same as for a silicon diode.
The breakdown voltage, VZ, can be controlled by

the manufacturing process and a whole range
of values are available. e.g. 3.3V, 3.9V, 4.7V,
5.1V, 6.8V etc.
A transistor is an electronic component used in a circuit to control a large amount

of current or voltage with a small amount of voltage or current.
It does so by sandwiching one semiconductor between two other semiconductors. Because the
current is transferred across a material that normally has high resistance (i.e. a resistor), it was
a "transfer-resistor" or transistor.
A Bipolar Junction Transistor is a three layer (npn or pnp) semiconductor device.
•  There are two pn junctions in the transistor.
•  The three layers are called the emitter, base and collector.
The base is lightly doped and sandwiched between the collector and the emitter. The collector
is moderately doped and the emitter is heavily doped.
•  The base region is much thinner than the either the collector or emitter regions. Typical base
widths are about 10-6 m.
•  The collector region is usually thicker than the emitter as the largest amount of heat is
dissipated in the collector
The transistor operates in three modes depending on how the pn junctions in the device are
biased.
  Cutoff - both junctions reverse biased.
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  Saturation - both junctions forward biased.
  Active - base-emitter junction is forward biased and collector-base is reversed biased.
As the Bipolar Transistor is a three terminal device, there are basically three possible ways to
connect it within an electronic circuit with one terminal being common to both the input and
output. Each method of connection responding differently to its input signal within a circuit as
the static characteristics of the transistor vary with each circuit arrangement.
1. Common Base Configuration - has Voltage Gain but no Current Gain.
2. Common Emitter Configuration - has both Current and Voltage Gain.
3. Common Collector Configuration - has Current Gain but no Voltage Gain.
The Common Base (CB) Configuration

As its name suggests, in the Common Base or grounded base configuration, the BASE
connection is common to both the input signal AND the output signal with the input signal
being applied between the base and the emitter terminals. The corresponding output signal is
taken from between the base and the collector terminals as shown with the base terminal
grounded or connected to a fixed reference voltage point. The input current flowing into the
emitter is quite large as its the sum of both the base current and collector current respectively
therefore, the collector current output is less than the emitter current input resulting in a current
gain for this type of circuit of "1" (unity) or less, in other words the common base
configuration "attenuates" the input signal.
The Common Base Transistor Circuit

This type of amplifier configuration is a non-inverting voltage amplifier circuit, in that the
signal voltages Vin and Vout are in-phase. This type of transistor arrangement is not very
common due to its unusually high voltage gain characteristics. Its output characteristics
represent that of a forward biased diode while the input characteristics represent that of an
illuminated photo-diode. Also this type of bipolar transistor configuration has a high ratio of
output to input resistance or more importantly "load" resistance (RL) to "input" resistance (Rin)
giving it a value of "Resistance Gain". Then the voltage gain (Av for a common base
configuration is therefore given as:
Common Base Voltage Gain
The common base circuit is generally only used in single stage amplifier circuits such as
microphone pre-amplifier or radio frequency (Rf) amplifiers due to its very good high
frequency response.
The Common Emitter (CE) Configuration
In the Common Emitter or grounded emitter configuration, the input signal is applied between
the base, while the output is taken from between the collector and the emitter as shown. This
type of configuration is the most commonly used circuit for transistor based amplifiers and
which represents the "normal" method of bipolar transistor connection. The common emitter
amplifier configuration produces the highest current and power gain of all the three bipolar
transistor configurations. This is mainly because the input impedance is LOW as it is connected
to a forward-biased PN-junction, while the output impedance is HIGH as it is taken from a
reverse-biased PN-junction.
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The Common Emitter Amplifier Circuit
In this type of configuration, the current flowing out of the transistor must be equal to the
currents flowing into the transistor as the emitter current is given as Ie = Ic + Ib. Also, as the
load resistance (RL) is connected in series with the collector, the current gain of the common
emitter transistor configuration is quite large as it is the ratio of Ic/Ib and is given the Greek
symbol of Beta, (β). As the emitter current for a common emitter configuration is defined as Ie
= Ic + Ib, the ratio of Ic/Ie is called Alpha, given the Greek symbol of α. Note: that the value of
Alpha will always be less than unity.
Since the electrical relationship between these three currents, Ib, Ic and Ie is determined by the
physical construction of the transistor itself, any small change in the base current (Ib), will
result in a much larger change in the collector current (Ic). Then, small changes in current
flowing in the base will thus control the current in the emitter-collector circuit. Typically, Beta
has a value between 20 and 200 for most general purpose transistors.
By combining the expressions for both Alpha, α and Beta, β the mathematical relationship
between these parameters and therefore the current gain of the transistor can be given as:
Where: "Ic" is the current flowing into the collector terminal, "Ib" is the current flowing into
the base terminal and "Ie" is the current flowing out of the emitter terminal.
Then to summarise, this type of bipolar transistor configuration has a greater input impedance,
current and power gain than that of the common base configuration but its voltage gain is much
lower. The common emitter configuration is an inverting amplifier circuit resulting in the
output signal being 180o out-of-phase with the input voltage signal.
The Common Collector (CC) Configuration
In the Common Collector or grounded collector configuration, the collector is now common
through the supply. The input signal is connected directly to the base, while the output is taken
from the emitter load as shown. This type of configuration is commonly known as a Voltage
Follower or Emitter Follower circuit. The emitter follower configuration is very useful for
impedance matching applications because of the very high input impedance, in the region of
hundreds of thousands of Ohms while having a relatively low output impedance.
The Common Collector Transistor Circuit
The common emitter configuration has a current gain approximately equal to the β value of the
transistor itself. In the common collector configuration the load resistance is situated in series
with the emitter so its current is equal to that of the emitter current. As the emitter current is the
combination of the collector AND the base current combined, the load resistance in this type of
transistor configuration also has both the collector current and the input current of the base
flowing through it. Then the current gain of the circuit is given as:
The Common Collector Current Gain
This type of bipolar transistor configuration is a non-inverting circuit in that the signal voltages
of Vin and Vout are in-phase. It has a voltage gain that is always less than "1" (unity). The load
resistance of the common collector transistor receives both the base and collector currents
giving a large current gain (as with the common emitter configuration) therefore, providing
good current amplification with very little voltage gain.
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Bipolar Transistor Summary
Then to summarise, the behaviour of the bipolar transistor in each one of the above circuit
configurations is very different and produces different circuit characteristics with regards to
input impedance, output impedance and gain whether this is voltage gain, current gain or
power gain and this is summarised in the table below.
Bipolar Transistor Characteristics
The static characteristics for a Bipolar Transistor can be divided into the following three main
groups.
Input Characteristics:- Common Base - ΔVEB / ΔIE
Common Emitter - ΔVBE / ΔIB
Output Common Base - ΔVC / ΔIC
Characteristics:-
Common Emitter - ΔVC / ΔIC
Transfer Common Base - ΔIC / ΔIE
Characteristics:-
Common Emitter - ΔIC / ΔIB
4.8 A Bipolar NPN Transistor Configuration
(Note: Arrow defines the emitter and conventional current flow, “out” for a Bipolar NPN
Transistor.)
Operation of Transistor
When the base emitter junction is forward biased, a small current will flow into the base.
Therefore holes are injected into the P type material.
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These holes attract electrons across the forward biased base/emitter junction to combine with
the holes. However, because the emitter region is very heavily doped, many more electrons
cross into the base region than are able to combine with holes.
This means there is a large concentration of electrons in the base region and most of these
electrons are swept straight through the very thin base, and into the base/collector depletion
layer.
Once here, they come under the influence of the strong electric field across the
base/collector junction.
This field is so strong due to the potential gradient in the collector material mentioned
earlier, that the electrons are swept across the depletion layer and into the collector material,
and so towards the collector terminal.
Varying the current flowing into the base, affects the number of electrons attracted from the
emitter.
In this way very small changes in base current cause very large changes in the current
flowing from emitter to collector, so current amplification is taking place.
Modes of operation
The two junctions of BJT can be either forward or reverse-biased.
The BJT can operate in different modes depending on the junction bias.
The BJT operates in active mode for amplifier circuits.
Switching applications utilize both the cutoff and saturation modes.
The construction and terminal voltages for a Bipolar NPN Transistor are shown above. The
voltage between the Base and Emitter ( VBE ), is positive at the Base and negative at the
Emitter because for an NPN transistor, the Base terminal is always positive with respect to the
Emitter. Also the Collector supply voltage is positive with respect to the Emitter ( VCE ). So for
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a bipolar NPN transistor to conduct the Collector is always more positive with respect to both
the Base and the Emitter.
NPN Transistor Connection

Then the voltage sources are connected to an NPN transistor as shown. The Collector is
connected to the supply voltage VCC via the load resistor, RL which also acts to limit the
maximum current flowing through the device. The Base supply voltage VB is connected to the
Base resistor RB, which again is used to limit the maximum Base current.
We know that the transistor is a “current” operated device (Beta model) and that a large
current ( Ic ) flows freely through the device between the collector and the emitter terminals
when the transistor is switched “fully-ON”. However, this only happens when a small biasing
current ( Ib ) is flowing into the base terminal of the transistor at the same time thus allowing
the Base to act as a sort of current control input.
The transistor current in a bipolar NPN transistor is the ratio of these two currents ( Ic/Ib ),
called the DC Current Gain of the device and is given the symbol of hfe or nowadays Beta,
( β ). The value of βcan be large up to 200 for standard transistors, and it is this large ratio
between Ic and Ib that makes the bipolar NPN transistor a useful amplifying device when used
in its active region as Ib provides the input and Ic provides the output. Note that Beta has no
units as it is a ratio.
Also, the current gain of the transistor from the Collector terminal to the Emitter
terminal, Ic/Ie, is called Alpha, ( α ), and is a function of the transistor itself (electrons
diffusing across the junction). As the emitter current Ie is the sum of a very small base current
plus a very large collector current, the value of alpha α, is very close to unity, and for a typical
low-power signal transistor this value ranges from about 0.950 to 0.999
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α and β Relationship in a NPN Transistor
By combining the two parameters α and β we can produce two mathematical expressions that
gives the relationship between the different currents flowing in the transistor.
The values of Beta vary from about 20 for high current power transistors to well over 1000 for
high frequency low power type bipolar transistors. The value of Beta for most standard NPN
transistors can be found in the manufactures data sheets but generally range between 50 – 200.
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NPN Transistor Example No1
A bipolar NPN transistor has a DC current gain, (Beta) value of 200. Calculate the base
current Ibrequired to switch a resistive load of 4mA.
Therefore, β = 200, Ic = 4mA and Ib = 20µA.
One other point to remember about Bipolar NPN Transistors. The collector voltage, ( Vc )
must be greater and positive with respect to the emitter voltage, ( Ve ) to allow current to flow
through the transistor between the collector-emitter junctions. Also, there is a voltage drop
between the Base and the Emitter terminal of about 0.7v (one diode volt drop) for silicon
devices as the input characteristics of an NPN Transistor are of a forward biased diode.
Then the base voltage, ( Vbe ) of a NPN transistor must be greater than this 0.7V otherwise the
transistor will not conduct with the base current given as.
Where: Ib is the base current, Vb is the base bias voltage, Vbe is the base-emitter volt drop
(0.7v) andRb is the base input resistor. Increasing Ib, Vbe slowly increases to 0.7V but Ic rises
exponentially.
Transfer Characteristic.
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The graph of ICE / IBE shown (right) is called the TRANSFER CHARACTERISTIC and the
slope of the graph shows the hfe for that transistor.
Characteristic curves (graphs) can be drawn to show other parameters of a transistor, and are
used both to detail the performance of a particular device and as an aid to the design of
amplifiers.
Input Characteristic.
The INPUT CHARACTERISTIC (right), a graph of base emitter current IBE against base
emitter voltage VBE (IBE/VBE) shows the input CONDUCTANCE of the transistor. As
conductance I / V is the reciprocal of RESISTANCE (V / I) this curve can be used to
determine the input resistance of the transistor. The steepness of this particular curve when
the VBE is above 1 volt shows that the input conductance is very high, and there is a large
increase in current (in practice, usually enough to destroy the transistor!) for a very small
increase in VBE. Therefore the input RESISTANCE must be low. Around 0.6 to 0.7 volts the
graph curves shows that the input resistance of a transistor varies, according to the amount of
base current flowing, and below about 0.5 volts base current ceases.
Output Characteristic.
Fig. 6.3 (right) shows the OUTPUT CHARACTERISTIC whose slope gives the value of
output conductance (and by implication output resistance). The near horizontal parts of the
graph lines show that a change in collector emitter voltage VCE has almost no effect on
collector current in this region, just the effect to be expected if the transistor output had a
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large value resistor in series with it. Therefore the graph shows that the output resistance of
the transistor is high.
The above characteristic graphs show that, for a silicon transistor with an input applied
between base and emitter, and output taken between collector and emitter (a method of
connection called common emitter mode) one would expect;
 • Low input resistance (from the input characteristic).
 • Fairly high gain (from the transfer characteristic).
 • High output resistance (from the output characteristic).
4.9 The Junction Field Effect Transistor
We saw previously that a bipolar junction transistor is constructed using two PN-junctions in
the main current carrying path between the Emitter and the Collector terminals. The Junction
Field Effect Transistor (JUGFET or JFET) has no PN-junctions but instead has a narrow
piece of high resistivity semiconductor material forming a “Channel” of either N-type or P-type
silicon for the majority carriers to flow through with two ohmic electrical connections at either
end commonly called the Drain and the Source respectively.
There are two basic configurations of junction field effect transistor, the N-channel JFET and
the P-channel JFET. The N-channel JFET’s channel is doped with donor impurities meaning
that the flow of current through the channel is negative (hence the term N-channel) in the form
of electrons.
Likewise, the P-channel JFET’s channel is doped with acceptor impurities meaning that the
flow of current through the channel is positive (hence the term P-channel) in the form of holes.
N-channel JFET’s have a greater channel conductivity (lower resistance) than their equivalent
P-channel types, since electrons have a higher mobility through a conductor compared to holes.
This makes the N-channel JFET’s a more efficient conductor compared to their P-channel
counterparts.
We have said previously that there are two ohmic electrical connections at either end of the
channel called the Drain and the Source. But within this channel there is a third electrical
connection which is called the Gate terminal and this can also be a P-type or N-type material
forming a PN-junction with the main channel. The relationship between the connections of a
junction field effect transistor and a bipolar junction transistor are compared below.
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Comparison of Connections between a JFET and a BJT
Bipolar Transistor Field Effect Transistor
Emitter – (E) >> Source – (S)
Base – (B) >> Gate – (G)
Collector – (C) >> Drain – (D)
The symbols and basic construction for both configurations of JFETs are shown below.
The semiconductor “channel” of the Junction Field Effect Transistor is a resistive path
through which a voltage VDS causes a current ID to flow and as such the junction field effect
transistor can conduct current equally well in either direction. As the channel is resistive in
nature, a voltage gradient is thus formed down the length of the channel with this voltage
becoming less positive as we go from the Drain terminal to the Source terminal.
The result is that the PN-junction therefore has a high reverse bias at the Drain terminal and a
lower reverse bias at the Source terminal. This bias causes a “depletion layer” to be formed
within the channel and whose width increases with the bias.
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The magnitude of the current flowing through the channel between the Drain and the Source
terminals is controlled by a voltage applied to the Gate terminal, which is a reverse-biased. In
an N-channel JFET this Gate voltage is negative while for a P-channel JFET the Gate voltage
is positive. The main difference between the JFET and a BJT device is that when the JFET
junction is reverse-biased the Gate current is practically zero, whereas the Base current of the
BJT is always some value greater than zero.
Biasing of an N-channel JFET
The cross sectional diagram above shows an N-type semiconductor channel with a P-type
region called the Gate diffused into the N-type channel forming a reverse biased PN-junction
and it is this junction which forms the depletion region around the Gate area when no external
voltages are applied. JFETs are therefore known as depletion mode devices.
This depletion region produces a potential gradient which is of varying thickness around the
PN-junction and restrict the current flow through the channel by reducing its effective width
and thus increasing the overall resistance of the channel itself.
Then we can see that the most-depleted portion of the depletion region is in between the Gate
and the Drain, while the least-depleted area is between the Gate and the Source. Then the
JFET’s channel conducts with zero bias voltage applied (ie, the depletion region has near zero
width).
With no external Gate voltage ( VG = 0 ), and a small voltage ( VDS ) applied between the Drain
and the Source, maximum saturation current ( IDSS ) will flow through the channel from the
Drain to the Source restricted only by the small depletion region around the junctions.
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If a small negative voltage ( -VGS ) is now applied to the Gate the size of the depletion region
begins to increase reducing the overall effective area of the channel and thus reducing the
current flowing through it, a sort of “squeezing” effect takes place. So by applying a reverse
bias voltage increases the width of the depletion region which in turn reduces the conduction of
the channel.
Since the PN-junction is reverse biased, little current will flow into the gate connection. As the
Gate voltage ( -VGS ) is made more negative, the width of the channel decreases until no more
current flows between the Drain and the Source and the FET is said to be “pinched-off”
(similar to the cut-off region for a BJT). The voltage at which the channel closes is called the
“pinch-off voltage”, ( VP ).
JFET Channel Pinched-off
In this pinch-off region the Gate voltage, VGS controls the channel current and VDS has little or
no effect.
JFET Model
The result is that the FET acts more like a voltage controlled resistor which has zero resistance
when VGS = 0 and maximum “ON” resistance ( RDS ) when the Gate voltage is very negative.
Under normal operating conditions, the JFET gate is always negatively biased relative to the
source.
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It is essential that the Gate voltage is never positive since if it is all the channel current will
flow to the Gate and not to the Source, the result is damage to the JFET. Then to close the
channel:
 No Gate voltage ( VGS ) and VDS is increased from zero.

 No VDS and Gate control is decreased negatively from zero.
 VDS and VGS varying.
The P-channel Junction Field Effect Transistor operates the same as the N-channel above,
with the following exceptions: 1). Channel current is positive due to holes, 2). The polarity of
the biasing voltage needs to be reversed.
The output characteristics of an N-channel JFET with the gate short-circuited to the source is
given as
Output characteristic V-I curves of a typical junction FET.
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The voltage VGS applied to the Gate controls the current flowing between the Drain and the
Source terminals. VGS refers to the voltage applied between the Gate and the Source
while VDS refers to the voltage applied between the Drain and the Source.
Because a Junction Field Effect Transistor is a voltage controlled device, “NO current flows
into the gate!” then the Source current ( IS ) flowing out of the device equals the Drain current
flowing into it and therefore ( ID = IS ).
The characteristics curves example shown above, shows the four different regions of operation
for a JFET and these are given as:
 • Ohmic Region – When VGS = 0 the depletion layer of the channel is very small and
the JFET acts like a voltage controlled resistor.
 • Cut-off Region – This is also known as the pinch-off region were the Gate voltage,
VGS is sufficient to cause the JFET to act as an open circuit as the channel resistance is
at maximum.
 • Saturation or Active Region – The JFET becomes a good conductor and is controlled
by the Gate-Source voltage, ( VGS ) while the Drain-Source voltage, ( VDS ) has little or
no effect.
 • Breakdown Region – The voltage between the Drain and the Source, ( VDS ) is high
enough to causes the JFET’s resistive channel to break down and pass uncontrolled
maximum current.
The characteristics curves for a P-channel junction field effect transistor are the same as those
above, except that the Drain current ID decreases with an increasing positive Gate-Source
voltage, VGS.
The Drain current is zero when VGS = VP. For normal operation, VGS is biased to be somewhere
between VP and 0. Then we can calculate the Drain current, ID for any given bias point in the
saturation or active region as follows:
Drain current in the active region.
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Note that the value of the Drain current will be between zero (pinch-off) and IDSS (maximum
current). By knowing the Drain current ID and the Drain-Source voltage VDS the resistance of
the channel ( ID ) is given as:
Drain-Source channel resistance.
Where: gm is the “transconductance gain” since the JFET is a voltage controlled device and
which represents the rate of change of the Drain current with respect to the change in Gate-
Source voltage.
4.10 MosFET
whose Gate input is electrically insulated from the main current carrying channel and is
therefore called an Insulated Gate Field Effect Transistor or IGFET. The most common
type of insulated gate FET which is used in many different types of electronic circuits is
called the Metal Oxide Semiconductor Field Effect Transistor or MOSFETfor short.
The IGFET or MOSFET is a voltage controlled field effect transistor that differs from a JFET
in that it has a “Metal Oxide” Gate electrode which is electrically insulated from the main
semiconductor N-channel or P-channel by a very thin layer of insulating material usually
silicon dioxide, commonly known as glass.
This ultra thin insulated metal gate electrode can be thought of as one plate of a capacitor. The
isolation of the controlling Gate makes the input resistance of the MOSFET extremely high
way up in the Mega-ohms ( MΩ ) region thereby making it almost infinite.
As the Gate terminal is isolated from the main current carrying channel “NO current flows into
the gate” and just like the JFET, the MOSFET also acts like a voltage controlled resistor were
the current flowing through the main channel between the Drain and Source is proportional to
the input voltage. Also like the JFET, this very high input resistance can easily accumulate
large amounts of static charge resulting in the MOSFET becoming easily damaged unless
carefully handled or protected.
Like the previous JFET tutorial, MOSFETs are three terminal devices with
a Gate, Drain and Source and both P-channel (PMOS) and N-channel (NMOS) MOSFETs are
available. The main difference this time is that MOSFETs are available in two basic forms:
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 1. Depletion Type – the transistor requires the Gate-Source voltage, ( VGS ) to switch
the device “OFF”. The depletion mode MOSFET is equivalent to a “Normally Closed”
switch.
 2. Enhancement Type – the transistor requires a Gate-Source voltage, ( VGS ) to
switch the device “ON”. The enhancement mode MOSFET is equivalent to a
“Normally Open” switch.
The symbols and basic construction for both configurations of MOSFETs are shown below.
The four MOSFET symbols above show an additional terminal called the Substrate and is not
normally used as either an input or an output connection but instead it is used for grounding the
substrate. It connects to the main semiconductive channel through a diode junction to the body
or metal tab of the MOSFET. Usually in discrete type MOSFETs, this substrate lead is
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connected internally to the source terminal. When this is the case, as in enhancement types it is
omitted from the symbol for clarification.
The line between the drain and source connections represents the semiconductive channel. If
this is a solid unbroken line then this represents a “Depletion” (normally closed) type MOSFET
and if the channel line is shown dotted or broken it is an “Enhancement” (normally open) type
MOSFET. The direction of the arrow indicates either a P-channel or an N-channel device.
Basic MOSFET Structure and Symbol
The construction of the Metal Oxide Semiconductor FET is very different to that of the
Junction FET. Both the Depletion and Enhancement type MOSFETs use an electrical field
produced by a gate voltage to alter the flow of charge carriers, electrons for N-channel or holes
for P-channel, through the semiconductive drain-source channel. The gate electrode is placed
on top of a very thin insulating layer and there are a pair of small N-type regions just under the
drain and source electrodes.
We saw in the previous tutorial, that the gate of a junction field effect transistor, JFET must be
biased in such a way as to reverse-bias the PN-junction. With a insulated gate MOSFET device
no such limitations apply so it is possible to bias the gate of a MOSFET in either polarity,
positive (+ve) or negative (-ve).
This makes the MOSFET device especially valuable as electronic switches or to make logic
gates because with no bias they are normally non-conducting and this high gate input resistance
means that very little or no control current is needed as MOSFETs are voltage controlled
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devices. Both the P-channel and the N-channel MOSFETs are available in two basic forms,
the Enhancement type and the Depletion type.
Depletion-mode MOSFET
The Depletion-mode MOSFET, which is less common than the enhancement types is
normally switched “ON” without the application of a gate bias voltage making it a “normally-
closed” device. However, a gate to source voltage ( VGS ) will switch the device “OFF”.
Similar to the JFET types. For an N-channel MOSFET, a “positive” gate voltage widens the
channel, increasing the flow of the drain current and decreasing the drain current as the gate
voltage goes more negative.
In other words, for an N-channel depletion mode MOSFET: +VGS means more electrons and
more current. While a -VGS means less electrons and less current. The opposite is also true for
the P-channel types. Then the depletion mode MOSFET is equivalent to a “normally-closed”
switch.
Depletion-mode N-Channel MOSFET and circuit Symbols
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The depletion-mode MOSFET is constructed in a similar way to their JFET transistor
counterparts were the drain-source channel is inherently conductive with the electrons and
holes already present within the N-type or P-type channel. This doping of the channel produces
a conducting path of low resistance between the Drain and Source with zero Gate bias.
Enhancement-mode MOSFET
The more common Enhancement-mode MOSFET is the reverse of the depletion-mode type.
Here the conducting channel is lightly doped or even undoped making it non-conductive. This
results in the device being normally “OFF” when the gate bias voltage is equal to zero.
A drain current will only flow when a gate voltage ( VGS ) is applied to the gate terminal
greater than the threshold voltage ( VTH ) level in which conductance takes place making it a
transconductance device. This positive +ve gate voltage pushes away the holes within the
channel attracting electrons towards the oxide layer and thereby increasing the thickness of the
channel allowing current to flow. This is why this kind of transistor is called an enhancement
mode device as the gate voltage enhances the channel.
Increasing this positive gate voltage will cause the channel resistance to decrease further
causing an increase in the drain current, ID through the channel. In other words, for an N-
channel enhancement mode MOSFET: +VGS turns the transistor “ON”, while a zero or -
VGS turns the transistor “OFF”. Then, the enhancement-mode MOSFET is equivalent to a
“normally-open” switch.
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Enhancement-mode N-Channel MOSFET and circuit Symbols
Enhancement-mode MOSFETs make excellent electronics switches due to their low “ON”
resistance and extremely high “OFF” resistance as well as their infinitely high gate resistance.
Enhancement-mode MOSFETs are used in integrated circuits to produce CMOS type Logic
Gates and power switching circuits in the form of as PMOS (P-channel) and NMOS (N-
channel) gates. CMOS actually stands for Complementary MOS meaning that the logic device
has both PMOS and NMOS within its design.
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UNIT - V
FUNDAMENTALS OF COMMUNICATION ENGINEERING
Signal:
A signal is a physical quantity that varies with time, space or any other independent variable,
by which information can be conveyed
5.1 Types of Signal:
5.1.1 An analogue signal:
This is a signal that can have any value between the minimum and maximum of the power
supply. Changes between values can occur slowly or rapidly depending on the system
involved. Graphically this is represented by a graph similar to that shown below.
Voltage (V)
Max
Min time (s)
5.1.2 A digital signal:

This is a signal that can only have two finite values, usually at the minimum and maximum of
the power supply. Changes between these two values occur instantaneously. Graphically this is
represented by a graph similar to that shown below.
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Voltage (V)
Max
Min time (s)
When an input or output signal is at the minimum power supply voltage (usually 0V) this is
referred to as a LOW signal or LOGIC 0 signal.
When an input or output signal is at the maximum power supply voltage this is referred to as a
HIGH signal or LOGIC 1 signal.
5.2 Modulation:
Modulation is a process of mixing a message signal with a carrier signal of high frequency to
produce a new signal which is ideal for transmitting it into space. This new signal, conceivably,
will have certain benefits than an un-modulated signal, especially during transmission
Modulation is the process of varying one or more properties of a periodic waveform, called the
carrier signal (high frequency signal), with a modulating signal that typically contains
information to be transmitted.
In telecommunications, modulation is the process of conveying a message signal, for example a
digital bit stream or an analog audio signal, inside another signal that can be physically
transmitted. Modulation of a sine waveform transforms a baseband message signal into a pass
band signal.
Need for Modulation

• Practical antenna length:
• According to theory to transmit a wave effectively, height of antenna ≈
wavelength of the wave
• Wavelength=(velocity)/(frequency)
• For instance, to radiate audio signal of 20kHz into space, we need 15,000 m
length of antenna which is quite impossible.
• So, if a carrier wave of 1000kHz is modulated with the audio signal of 20 kHz,
the length of antenna would be only 300 m.
• Operating range:
• Frequency is directly proportional to distance of radiation.
• So, its necessarily to be modulated with high frequency carrier signal so that it
can b transmitted to larger distance.
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• Wire communication:
• Without wires, radiation of audio frequencies cannot be radiated into space
because of its poor efficiency. So, modulation is always done in communication
systems.
• Multiplexing:
• If more than one signal is to be transmitted using a single channel, each signal is
modulated with different carrier frequency so that receiver selects the desired
channel while its not possible to transmit more than one data at a time using
wires.
• To overcome equipment limitations:
• Sometimes the frequency of apparatus and signal frequency doesn’t match. So,
modulation helps in frequency translation.
• To reduce noise and interferences:
• Effect of noise and interferences is completely eliminated by modulation which
require transmission bandwidth to be larger than message signal.
Demodulation:
Demodulation is the act of extracting the original information-bearing signal from a

modulated carrier wave. A demodulator is an electronic circuit (or computer program in a
software-defined radio) that is used to recover the information content from the modulated
carrier wave. The demodulator takes the digital data and, using the staircase maker and the
delay unit, creates the analog signal. The created analog signal, however, needs to pass through
a low-pass filter for smoothing
A modulator is a device that performs modulation. A demodulator (sometimes detector or

demod) is a device that performs demodulation, the inverse of modulation. A modem (from
modulator–demodulator) can perform both operations.
5.3 Types Of Modulation:
 Amplitude modulation
It is a type of modulation where the amplitude of the carrier signal is
modulated (changed) in proportion to the message signal while the frequency and phase
are kept constant.
The signal can be considered as having two parts;
1. the information signal – this is the message we need to send and could be speech,
text, or pictures.
2. the carrier – this will be the method of passing the information signal from the
transmitter to receiver, usually a radio wave, microwave, light wave or electrical
current.
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In Amplitude Modulation (AM) as its name suggests, it is the amplitude of the carrier wave
which becomes altered by the instantaneous value of the information signal. The following
diagram illustrates this effect.
Diagram ‘a’ shows the information signal.
Diagram ‘b’ shows the unmodulated carrier signal.
Diagram ‘c’ shows the modulated carrier signal.
The exact way in which the amplitude modulated carrier is produced is quite complex and
involves some advanced mathematics. The solution is provided here for those who are
enthusiastic about such things.
The general mathematical formula for a sinusoidal wave is :
V  Vmax sin 2ft
Where V = instantaneous value of voltage, Vmax = maximum amplitude of the wave, f =

frequency of wave and t = time.
For a carrier wave having a frequency fc and amplitude Ac, the instantaneous value Vc can be
obtained using the following equation.
Vc  Ac sin 2f ct
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The simplest information signal that can be applied will be a pure sine wave. Assume that this
has a frequency fi and amplitude Ai, the instantaneous value Vi can be obtained using the
following equation.
Vi  Ai sin 2f i t
When the carrier is amplitude modulated, the resulting wave is governed by the equation:
VAM  ( Ac  Ai sin 2f i t ) sin 2f ct
This formula shows that the amplitude of the modulated carrier sine function increases above
and decreases below the carrier amplitude Ac by the instantaneous value of the information
signal.
Using standard mathematical rules this equation can be expanded to become:
Ai cos( 2f c  2f i )t  cos( 2f c  2f i )t 

1
VAM  Ac sin 2f c t 
2
The first term represents the carrier frequency, the second is the lower side frequency and the
third is the upper side frequency.
When the AM carrier wave is analysed, we find that it has three different components.
 The original carrier frequency fc and original Amplitude Ac;

 A wave of frequency fc-fi, called the lower side frequency;
 A wave of frequency fc+fi, called the upper side frequency;
Other observations that can be made are as follows:
 The original signal frequency fi has disappeared;

 The maximum amplitude of the AM carrier is Ac+Ai;
 The minimum amplitude of the AM carrier is Ac-Ai;
 The carrier frequency fc must be greater than the information frequency fi;
 The carrier amplitude Ac must be greater than the information amplitude Ai.
 When the two signals, i.e. carrier and information are combined using Amplitude
Modulation, from page 4, the resulting signal contains three components, (i) the
original carrier frequency fc and original amplitude Ac (ii) a wave of frequency
fc-fi, called the lower side frequency and (iii) a wave of frequency fc+fi, called the
upper side frequency. The resulting spectrum is:
amplitude
Page 132 of 152
f c- f i fc f c+ f i frequency
The bandwidth required for an AM waveform is twice the maximum frequency in the
information signal.
It should also be observed that:
 The spectrum is composed of the carrier and the upper and lower sidebands;
 The carrier component is unchanged by the modulation process.
 The information is in the sidebands and not in the carrier.
 The information is duplicated in the two sidebands.
The Advantages of AM
1. The modulators and demodulators are very simple and straightforward to build. This
makes the cost of receivers very low and therefore available to the majority of people.
2. AM requires only a very small bandwidth to transmit the same information compared to
FM where the bandwidth requirement is significantly higher.
The Disadvantages of AM
1. All communication signals pick up interference and noise, and these usually affect the
amplitude of the carrier. In an AM system (where the information is contained in the
amplitude) the noise adds to the information and thus pollutes it. It is virtually
impossible to remove this additional component unless the original signal is available
for comparison and this is hardly ever the case.
2. In AM transmissions a significant amount of the transmitted power is contained within
the carrier, which is eventually discarded at the receiver. Only a limited amount (¼) of
the original power is located in the sideband where the information signal is located.
This makes AM an inefficient system.
 Frequency Modulation
It is a type of modulation where the frequency of the carrier signal is modulated
(changed) in proportion to the message signal while the amplitude and phase are kept
constant. In Frequency Modulation (FM) the instantaneous value of the information
signal controls the frequency of the carrier wave. This is illustrated in the following
diagrams.
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Notice that as the information signal increases, the frequency of the carrier increases, and as the
information signal decreases, the frequency of the carrier decreases. The frequency fi of the
information signal controls the rate at which the carrier frequency increases and decreases. As
with AM, fi must be less than fc. The amplitude of the carrier remains constant throughout this
process.
When the information voltage reaches its maximum value then the change in frequency of the
carrier will have also reached its maximum deviation above the nominal value. Similarly when
the information reaches a minimum the carrier will be at its lowest frequency below the
nominal carrier frequency value. When the information signal is zero, then no deviation of the
carrier will occur.
The maximum change that can occur to the carrier from its base value fc is called the
frequency deviation, and is given the symbol fc. This sets the dynamic range (i.e. voltage
range) of the transmission.The dynamic range is the ratio of the largest and smallest analogue
information signals that can be transmitted.
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Modulation Index
All FM transmissions are governed by a modulation index,  , which controls the dynamic
range of the information being carried in the transmission. The modulation index,  , is the
ratio of the frequency deviation, fc, to the maximum information frequency, fi , as shown
below:
f c

fi
The exact way in which the frequency modulated carrier is produced is very complex and
involves very advanced mathematics. A summary of the solution is provided here for those
who are enthusiastic about such things. The general mathematical formula for a sinusoidal
wave is :
V  Vmax sin 2ft
Where V = instantaneous value of voltage, Vmax = maximum amplitude of the wave, f =

frequency of wave and t = time.For a carrier wave having a frequency fc and amplitude Ac, the
instantaneous value Vc can be obtained using the following equation.
Vc  Ac sin 2f ct
The simplest information signal that can be applied will be another pure sine wave. Assume
that this has a frequency fi and amplitude Ai, the instantaneous value Vi can be obtained using
the following equation.
Vi  Ai sin 2f i t
When the carrier is frequency modulated, the resulting wave is governed by the equation:
VFM  Ac sin( 2fct   sin 2fit )
f c
Where  is known as the modulation index, and defined by the equation:  
fi
FM Spectra
When the amplitude of the frequency components of this simple FM waveform are plotted as a
function of frequency, the resulting spectrum is much more complicated than that of the simple
AM waveform (i.e. one carrier and two sidebands) discussed in the previous unit. This is
Page 135 of 152

because there are now multiple frequencies present in the FM signal, even for the transfer of a
simple sinusoidal information signal.
The detailed analysis of an FM waveform is very complicated and well beyond the scope of
this introductory course, however we will try to simplify things a little so that you get a flavour
of what the key differences are.
Theoretically, an FM spectrum has an infinite number of sidebands, spaced at multiples of fi

above and below the carrier frequency fc . However the size and significance of these sidebands
is very dependent on the modulation index,  . (As a general rule, any sidebands below 1% of
the carrier can be ignored.)
If   1 , then the spectrum looks like this:
From the spectrum above it can be seen that there are only two significant sidebands,
and thus the spectrum looks very similar to that for an AM carrier.
If   1 , then the spectrum looks like this:
From the spectrum above we can see that the number of significant sidebands has
increased to four.
If   3 , then the spectrum looks like this:
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From the spectrum above we can see that the number of significant sidebands has
increased to eight.It can be deduced that the number of significant sidebands in an FM
transmission is given by 2(   1) . The implication for the bandwidth of an FM signal
should now be coming clear. The practical bandwidth is going to be given by the
number of significant sidebands multiplied by the width of each sideband (i.e. fi).
BandwidthFM  2  1 f i
 f 
 2 c  1 f i
 fi 
 2f c  f i 
The bandwidth of an FM waveform is therefore twice the sum of the frequency deviation
and the maximum frequency in the information.
The Advantages of FM
1. In an FM system, the amplitude of the carrier remains constant; the information is

contained in the frequency deviation of the carrier. During transmission it will pick up
noise just like any other signal, however, as there is no information contained in the
amplitude of the carrier, it is relatively straightforward to remove any noise picked up
during transmission at the receiver. FM transmissions therefore have greater immunity
to the effect of noise.
2. In a wideband FM signal, the amplitude of the carrier component is relatively small:
most of the transmitted power goes into the sidebands, where the information is carried.
Therefore FM is a much more efficient process than AM.
3. Using FM, it is possible to transmit the same quality of information using a lower
power transmitter.
The Disadvantages of FM
1. The circuitry involved in modulating and demodulating FM signals is much more

complex that of AM receivers. This makes FM transmitting and receiving equipment
more expensive, and less attractive to purchase.
2. The transmission range of FM signals is lower than that of AM signals, meaning that
more repeater stations will be required to cover a large area.
3. At high frequency, the carrier signal travels in straight lines, sometimes referred to as
‘line-of-sight’ communication, meaning that in hilly areas more repeaters will be
required.
5.4 Radio Communication System

The block diagram of a radio communication system is shown in Figure 12.1. The
transmission section consists of a baseband processor, which does the necessary
filtering of the input signal by limiting the input signal bandwidth to the required value
and digitizes the signal using analog-to-digital conversion. If the input signal is voice,
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the filter limits the bandwidth to 4kHz. If the input signal is video, the bandwidth will
be limited to 5MHz. If the radio communication system is a digital system, necessary
source coding is also done by the baseband processor. This signal is modulated using
analog or digital modulation techniques.
Figure 12.1: Simplified block diagram of a radio communication system.

Suppose the radio communication system operates in the VHF band with a carrier frequency of
140MHz. The baseband signal is converted into the radio frequency in two stages. In the first
stage, called the intermediate frequency (IF) stage, the signal is translated to an intermediate
frequency. The most widely used standard IFs are 455kHz, 10.7MHz, and 70MHz. In the
second stage, the signal is translated to the required radio frequency using an up-converter as
shown in Figure 12.1(a). The up-converted signal is given to a power amplifier that pumps out
the modulated radio waves with the desired power level through the antenna. The antenna can
be an omnidirectional antenna, a sectoral antenna, or a directional antenna. An omnidirectional
antenna radiates equally in all directions. A sectoral antenna radiates at a fixed area, such as a
60 o arc, a 120 o arc, and so on. A directional antenna transmits in a specific direction.
Omnidirectional and sectoral antennas are used at base stations, and directional antennas are
used at remote stations .
At the receiving end, the signal is received by the antenna, down-converted to the IF frequency,
demodulated, and filtered, and the original signal is obtained. The baseband processor in the
receiving section carries out the necessary decoding.
In a radio system, the baseband signal is first up-converted into an intermediate frequency (IF)
and then to the desired radio frequency. Sometimes the up-conversion is done in two or more
stages.
Page 138 of 152

5.5 SATELLITE COMMUNICATION
Introduction to satellite:
• A satellite is simply any body that moves around another (usually much larger) one in a
mathematically predictable path called an orbit
• A communication satellite is a microwave repeater station in space that is used for
telecommunication , radio and television signals
• The first man made satellite with radio transmitter was in 1957
• There are about 750 satellite in the space, most of them are used for communication
• It is a repeater which receives signal from Earth at one frequency, amplify it & transmit
it back to Earth at other frequency.
Why Satellite Communication?
• The Earth is a sphere & The microwave frequencies travel in straight line but to connect
two regions very far away on the two side of the sphere, the link requires lot of
repeaters because of Earth’s curvature.
A single satellite can do the magic linking the continents with one repeater.
Page 139 of 152

Introduction to Satellite Communication
Satellite is powerful long distance and point-to multi point communication system. A
communication satellite is an R.F (Radio Frequency) repeater. To overcome disadvantage of
Line of sight communication which is only 45 - 55 km, the transmitting antenna is placed on
the satellite and the satellite is placed in the orbit high above the earth. The function of satellite
is to communicate between different earth stations around the earth, thus with the help of
satellite, it is easy to communicate over thousands of km, a com-satellite is a combination of
ROCKET to put the satellite in the orbit, micro wave electronic devices for the communication,
solar cells are used to convert the solar energy into a power supply (ELECTRICAL ENERGY)
for the electronic equipment.
The satellite placed in GEO- STATIONARY and placed at an altitude of 22300 miles or 35900
km above the ground level.The satellite travels at the same speed at which the earth rotates
around the sun. The rotation of satellite is synchronized with earth rotation as a result satellite
appears to be stationary in the sky w.r.t the earth station is constant. There are 3 satellites are
placed at angle 120° in GEO-STATIONARY orbit, they provide 100% coverage from one
earth station to any where on the earth, this concept is shown below
Block Diagram of Satellite Communication System
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The uplink frequencies (5.9---6.4 GHZ) are used for T/N from the earth station to the satellite
and down link frequencies (3.7—4.2GHZ).The above frequencies are used for T/N from the
satellite to the earth station , the uplink frequencies are converted to lower frequencies by the
mixer and local Oscillator, the communication satellite acts as a repeater station it receives the
signal, amplifiers it and then transmitted over a next frequencies to avoid interference between
the uplink signal and down link , the two way communication is established with the help of
transponder , a communication satellite has multi transponder per satellite has increased over
the year ,a satellite with 2 transponder can support a signal T.V channel or 240 telephone lines
, a satellite with 48 transponder can accommodate 4000T.P CKTS and 2 T.V channels now-a-
days in satellite using a digital tech , due to which 0ne satellite can handle 120,000 T.P4
channels and more than 500 T.V channels.
5.6 EARTH STATION
• There are two earth station in a simple Satellite communication link. One transmits the
signal to satellite called transmitting Earth station.
• The other receives the signal from satellite called receiving Earth Station.
How do Satellites Work?
• Two Stations on Earth want to communicate through radio broadcast but are too far
away to use conventional means.
• The two stations can use a satellite as a relay station for their communication
• One Earth Station sends a transmission to the satellite. This is called a Uplink.
• The satellite Transponder converts the signal and sends it down to the second earth
station. This is called a Downlink.
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UPLINK & DOWN LINK
• The communication link from Transmitting earth station to satellite is called Up-link.
• The communication link from satellite To receiving earth station is called Down-link.
Advantages of Satellite communication over terrestrial communication:
 The coverage area of a satellite greatly exceeds that of a terrestrial system.

 Transmission cost of a satellite is independent of the distance from the center of
the coverage area.
 Satellite to Satellite communication is very precise.
 Higher Bandwidths are available for use.
Disadvantages of Satellite communication
 Launching satellites into orbit is costly.

 Satellite bandwidth is gradually becoming used up.
 There is a larger propagation delay in satellite communication than in terrestrial
communication.
Applications
General applications
• Weather forecasting
• Radio and TV broadcast broadcasting
• Military
• Satellites for navigation and localization (e.g. GPS)
In context of mobile communication
• Global telephone backbones (get rid of large cables)
• Connections for communication in remote places or developing areas (for researchers in
Antarctica)
Global mobile communication (satellites with lower orbits are needed like LEO’s)
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5.7 OPTICAL COMMUNICATION
• The communications medium in most electronic communications systems is either a

wire conductor cable or free space
• Now a medium is growing , the fibre optic cable
• A fibre optic cable is essentialy a light pipe that is used to carry a light beam from one
place to another.
• Light is an electromagnetic signal like a radio wave.it can be modulated by information
signal and sent over fibre optic cable
• The frequency of light is extremely high, it can accommodate very wide bandwidths of
information and extremely high data rates can be achieved with excellent reliability.
OPTICAL FIBER
 An optical fiber is a flexible, transparent fiber made of glass (silica) or plastic,

slightly thicker than a human hair. It functions as a waveguide, or “light pipe”,
to transmit light between the two ends of the fiber.
 An optical fiber is essentially a waveguide for light
 It consists of a core and cladding that surrounds the core
 The index of refraction of the cladding is less than that of the core, causing
rays of light leaving the core to be refracted back into the core
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• A light-emitting diode (LED) or laser diode (LD) can be used for the source
• Optical fiber is made from thin strands of either glass or plastic
• It has little mechanical strength, so it must be enclosed in a protective cover
• Often, two or more fibers are enclosed in the same cable for increased bandwidth and
redundancy in case one of the fibers breaks
• It is also easier to build a full-duplex system using two fibers, one for transmission in
each direction
Fiber optic cable communication system
The information signals to be transmitted may be voice ,video or a computer data. The input
signal is given to coder or converter that converts the input signal within appropriate code that
is compatible with the communication medium. Analog signals are converted into series of
digital pulses by A/D converter
The output from the converter is given to the light source. The light source might be an LED
or ILD. To couple along with the fiber, we requires a source to fiber interface, we use source to
Page 144 of 152
fiber coupler. It is a mechanical interface to couple the light emitted through the source into
optical fiber. Then the light is transmitted by the optical fiber. We use repeaters in among the
fibers to compensate the signal losses while it passes by the fiber.
In the receiver section there is fiber to light interface is required to couple along with the fiber.
Then the light is given to the light detector. We use PIN diode or APD (Avalanche Photo
Diode) to convert the light energy to current. After that the electrical source is amplified to
compensate the losses and then fed to D/A converter to recover the original signal at the
destination.
5.8 Advantages of optical fiber communication
• Can carry much more information as compared to other physical media.

• Much longer distances than co-axial cables.
• Immune to electromagnetic noise.
• Light in weight.
• Unaffected by atmospheric agents.
• Greater bandwidth than copper
• Lower loss
• Immunity to crosstalk
• No electrical hazard
5.9 Disadvantage of optical fiber communication
• High cost.
• Feeble in nature.
• Splices is the major draw back.
Applications
• In computer industry, optical fibers are used to transmit signals from one source to
another.
• Optical fibers are widely used in communication.
• Automobile industry uses optical fibres.
• Fiber optics has wide applications in military for security purpose.
Page 145 of 152

5.10 TELEVISION
 Television is made up of two words i.e, ‘Tele’ and ‘vision’

 Tele means ‘long distance’ and vision means ‘to see’
 The basic technique involved in TV is to convert ‘sound’ and ‘picture’ to electric
signal, transmit it to a receiver and reproduce the picture and sound.
 This requires the main elements like video camera, TV Transmitter ,TV receiver
Sound transmission
 The sound has one dimension i.e. time

 The sound can be converted into an electric signal with help of microphone
 This gives an electric signal of amplitude variations w,r,t time
 This sound signal is amplified, filtered and modulated on some carrier for long distance
transmission.
 This modulated sound signal is combined with modulated video signal and transmitted
through common antenna over some channel.
Picture transmission
 The picture can be sensed as infinite points of different intensities.

 Such large number of points make a combined picture. these points are called picture
elements or pixels.
 number of picture elements determines clarity or resolution of the picture.
 As the picture elements are increased the picture becomes clear or its resolution is
better.
 Conversion of these picture elements into an electric signal and transmitting them
together is not simple.
 Large number of optical/electric sensors are required to convert the brightness of these
picture element simultaneously to an electric signal.
 Large number of communication channels are required to transmit these electric signal
to the TV receiver.
 These practical difficulties are removed by transmitting the optical information element
by element.
o the picture elements are scanned sequentially and their optical information is
transmitted over a single pair of wires or channel.
 The picture is converted into only one electric signal with the help of scanning.
 Each picture element is transmitted in a particular time slot in a complete scanning
cycle.
 In each scanning cycle every picture element is scanned at least once.
 In one scanning cycle the picture is scanned sequentially from top to bottom.
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5.10.1 TV Transmitter
Sound reception
 At the receiver this signal is received by receiving antenna and given to RF amplifier.
 The combined sound and picture signals are then passed through mixer, IF amplifier
and video detector.
 After video detector sound signal is separated from video signal.
 Then this sound signal is demodulated, amplified and applied to loudspeaker
Picture reception
 The TV receiver is tuned to transmitted RF carrier and receives the signal being
transmitted.
 The RF amplifier amplifies the received signal.
 Then the signal is passed to oscillators ,mixer, IF amplifier and demodulator.
 The video amplifier amplifies the received video signal and gives it to picture tube.
Page 147 of 152

5.10.2 TV Receiver
5.11 Microwave Communication
Microwaves
 microwaves - electromagnetic waves with a frequency between 1GHz (wavelength

30cm) and 3GHz (wavelength 1mm)
 microwaves frequency are further categorized into frequency bands: L (1-2 GHz), S (2-
4 GHz), C (4-8 GHz), X (8-12 GHz)
 receivers need an unobstructed view of the sender to successfully receive microwaves
 microwaves are ideal when large areas need to be covered and there are no obstacles in
the path
Page 148 of 152

Microwave communication system
Microwave signal are used for communication over long distance continental or
intercontinental. Microwave is the communication link which make the communication
possible. The basic block diagram of microwave communication system is shown in
figure.
Construction:
Antenna:- Mostly a parabolic refractor types of antenna are used which is used to transmit and
receive the signal.
Circulator: A circulator is used to isolate transmitter with the receiver input and to couple
transmitter to antenna and antenna to receiver input.
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Protection Circuitry: It provides safety to the mixer from overloads.
Mixer (Receiver): It has two outputs. One is the incoming signal and other is the signal from
lower band pass filter (BPF).The mixer gives an IF signal of 70Mhz.
Band pass filter (BPF): It provides the necessary selectivity to the receiver and it prevents the
interference.
IF amplifier and AGC:- It amplifies the signal up to a intermediate frequency of 70Mhz. and
its gain is controlled through AGC (automatic gain control)
Amplitude limiter: As the signal is frequency modulated one so as amplitude limiter is used to
avoid unwanted amplitude variations.
Mixer (Transmitter): It is used to convert IF frequency to transmitting microwave frequency

band to pass through it and hence prevent interference.
POWER AMPLIFIER:-This amplifier amplifies the transmitted power from a repeater

section in the range of 0.2W to 10W.
MICROWAVE SOURCE:- Klystron & Gunn Oscillators were used as microwave source.
Now, V H F transistor crystal oscillators are used for microwave source.
POWER SPLITTER:- It divides the output power from a microwave source and feeds a large
portion to the transmitter mixer, which converts it into transmitting microwave frequency.
SHIFT OSCILATOR:- It provides one of the inputs to the balanced mixer so that it produces
70MHz IF at the output of receiver mixer. This microwave link communicates with 600 to
2700 channels per carrier. Thus the number of carriers in each direction can be four to twelve.
5.12 MERITS AND DEMERITS OF MICROWAVE COMMUNICATION
The merits and demerits of microwave communication system are listed below:
MERITS
1. Capital cost is generally lower.

2. Installation is quicker and easier.
3. Additional service may be provided quickly and cheaply.
4. Irregular ground difficulties are overcome.
5. Equalization need only be applied for the equipment as the frequency characteristics of
the transmission path are essentially constant over the transmission bandwidths.
6. Repeater spacing may be increased by increasing tower heights.
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DEMERITS
1. Restriction to line-of-sight operation on conventional links.

2. The problem of suitable access to repeater stations from main highways and provision
of accommodation for maintenance, 'c. The provision of power supplies for the
repeaters.
3. It is difficult to provide short distance branch circuits to intermediate exchanges or
subscribers.
4. Adverse weather conditions can cause severe fading and beam bending.
5. The high level of linearity required in the repeaters poses a severe design problem
5.13 Fax
Fax (short for facsimile), sometimes called telecopying or telefax, is the telephonic
transmission of scanned printed material (both text and images), normally to a telephone
number connected to a printer or other output device. The original document is scanned with
a fax machine (or a telecopier), which processes the contents (text or images) as a single fixed
graphic image, converting it into a bitmap, and then transmitting it through the telephone
system. The receiving fax machine reconverts the coded image, printing a paper copy. For
many decades before digital technology became widespread, the scanned data was transmitted
as analogue.
The fax machine can make remote copies of documents anywhere in the world at speeds almost
as fast as making copies on a photocopier and at a cost that’s usually less than the postage.
When speaking into a telephone, words spoken are converted by the telephone’s microphone
into electrical signals that travel over the telephone line to the listener’s telephone where the
signals are changed back to sound by its earphone. For fax, it is similar: electrical signals that
represent the page being sent within the same frequency range as voice signals. The receiving
end will change the signals back into an image and be printed by the other half of the receiving
fax machine. A telephone line can connect two fax machines anywhere in the world.
How Fax Works
The way that a fax machine works is very simple. You dial a number, place the page you want
to send in the machine, press “start”, and off they go, at about less than a minute a page.
However, if you want to know more, the following will provide you more details.
A fax machine scans an image by reading a very small area of the image at a time. It is like
human eyes scanning across a page when reading, but only done electronically and much faster
than most people do. It does not recognize the printed letters but reads the small black dots that
form each character.
The machine decides whether the area it is reading is light or dark and assigns the area a
number such as “0” for white and “1” for dark. It then transmits the number to a remote
Page 151 of 152

facsimile receiver via telephone lines. The receiver makes a mark on paper corresponding to
the area on the original image. This process continues as the transmitting machine scans a
series of small areas horizontally across the image, and transmits that information to the remote
receiver. The transmitting fax then scans the next lower line and so on until the entire image
has been scanned, digitized, and transmitted. One full line of text usually takes 10 to 20
additional scanning lines. A whole page usually comprises 2200 scanning lines at fine
resolution.
The technique to bring this process about uses an electronic eye to convert the image on the
page into electrical signals. Tones are produced by a modem to send the information over a
telephone line. The modem then takes a group of 16 successive digital numbers and sends only
one symbol to the fax receiver to achieve faster transmission. The symbols follow each other
2400 times a second as a signal. If you listen to a telephone while the fax is transmitting an
image, you would hear a hissing sound that is similar to the noise produced by an AM radio
tuned between stations. At the fax receiver, the transmitter processes are reversed and each
digital number is transformed into a string of dots.
After the dots reach across the entire page, a line is printed. There are five different ways to
print the received fax depending on the type of machine you are using. They are: Thermal
paper – used since 1980, coated with chemicals that react to heat by turning black; Thermal
film – contains ink that melts onto paper when heated; Inkjet – same technique as an inkjet
printer; Laser printer – same mechanism as a laser printer; Computer printer – after data
received by a fax modem, it’s stored on the computer’s hard disk as a graphics file then printer
out via computer’s usual printer.
Page 152 of 152

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Sri Chandrasekharendra Saraswathi

Viswa Maha Vidyalaya

Enathur, Kanchipuram - 631561

Department of Electrical &Electronics Engineering

Study Material - I Semester

Subject: Basic Electrical Engineering

1.11 RESISTANCE IN PARALLEL 12

1.1 ELECTRIC CURRENT

Fig.1.1. Movement of free electrons in conducting materials.

1.3 ELECTRICAL POTENTIAL

Fig.1.3. Illustration for defining electrical potential.

Work done = VQ (1.2)

Fig.1.4. Illustration circuit to define energy

1.8 OHM’S LAW

1.8.1RELATIONSHIPS DERIVED FROM OHM’S LAW

Current consumed by each radiator 2000/200 = 10 A

Each motor consumes 50A

Total current consumed by building = 25 + 100+ 100 225A

Energy consumed = VIt = Wt

for lamps load = no. of lamp × wattage of each lamp × time

For motors = 2 × (50×200) ×48 = 960kW-hr

1.9 EFFECT OF TEMPERATURE ON RESISTANCE

1.9.1 TEMPERATURE COEFFICIENT OF RESISTANCE

Let a metallic conductor having a resistance of R0 at 0o C be heated to t0 C and its

R25= R0 (1+ α0t25)

R25 (1+ α0t40) (1+0.045×40)

1.10 RESISTANCE IN SERIES

Fig.1.5 series circuit

Where Rs is total resistance of the circuit

1.11 RESISTANCE IN PARALLEL

Fig.1.6 parallel circuit

I 1 1 1 (V1 = V2= V3=V)

Find the effective resistance of the circuit shown in Fig (1.7)

It is seen that resistor 3 and 6 are in parallel so net resistance

Now circuit becomes

8 and 1Ω are in series 8+1=9Ω

4 and 9Ω are in series so effective resistance is Reff =13Ω

Power observed by each resistor = I2R

By knowing individual branch current then power absorbed can be

So calculate total resistance, across ‘cd’ 7 and 5Ω are in series 7+5=12Ω

12 and 4Ω are in parallel

Total current flow thro 7Ω , power absorbed by it (62)(7) = 252W

Current flow through 7 and 5Ω same,

Power absorbed by 7Ω in ‘cd’ = (1.52)(7)=15.75W

Power absorbed by 5Ω in ‘cd’ = (1.52)(5)=11.25W

1.12 KIRCHOFF’S LAW

At sometimes, it is not possible to find the current in the different branches of an

1.12.1 KIRCHOFF’S CURRENT LAW OR KCL

Fig.1.9 Illustrative example for kirchoff’s current law

Hence the KCL at junction 1 is:

similarly at junction 2, the KCL equation is:

And at junction 3, the KCL equation is:

1.12.2 KIRCHOFF’S VOLTAGE LAW OR KVL

No. of element all source

a) Sign conversion for voltage sources

Fig.1.12 Illustrative example for kirchoff’s law

I1R1 is –ve (fall in potential)

Using KVL, we get

A battery of emf 40V and internal resistance 2Ω is connected in parallel with a

Apply KVL in loop ABCDA

Apply KVL in loop AEFDA

Fig.1.14 Fig 1.14(a) current flow in bridge circuit

Solving above equations, we get