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Outline
Reading Assignment:
Howe and Sodini, Chapter 3, Sections 3.8-3.9
Application of bias:
• Built-in potential across MOS structure increases
from φB to φB + VGB
• Oxide forbids current flow ⇒
– J=0 everywhere in semiconductor
– Need drift = -diffusion in SCR
• Must maintain boundary condition at Si/SiO2
interface
– Eox / Es ≈ 3
n(x) = ni e qφ (x) kT
− qφ(x) kT
p(x) = ni e
and
2
np = ni at every x
For example:
⎡ ⎤
εs ⎢ 2C 2
( B GB ) ⎥
φ + V
xd (VGB ) = ⎢ 1+ ox
− 1⎥
Cox ⎢ εs qNa
⎣ ⎦⎥
Potential drop across semiconductor SCR:
qN a x d2
V B (VGB ) =
2ε s
Surface potential
φ(0) = φ p + VB (VGB )
qN a x d t ox
Vox (VGB ) =
ε ox
Flatband Voltage:
VGB = VFB = −φ B = −(φN + − φ p )
6.012 Spring 2007 Lecture 7 6
4. Accumulation regime
If VGB < VFB accumulation of holes at Si/SiO2 interface
n(0) = ni e qφ(o) kT
Solve for φ(0) at VGB = VT:
kT n (0) kT Na
φ(0 ) V =V T = q • ln n = • ln = − φp
GB
i VGB = VT q n i
VB (VT ) = −2φ p
Hence:
1
VT + φB = VB (VT ) + Vox (VT ) = −2φ P + 2ε s qNa (−2φ p )
Cox
n(0) ∝ e qφ(0) kT
qN a x d ∝ φ (0)
Several consequences:
2ε s (−2φ p )
xd (inv.) ≈ x d (VT ) = = xd,max
qNa
Q = CV
⇒
Qn = −Cox (VGB − VT ) for VGB > VT
Coul/cm2
In inversion:
Qn = Cox (VGB − VT ) for VGB > VT
6.012 Spring 2007 Lecture 7 16