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Code: 15A02501 R15

B.Tech III Year I Semester (R15) Supplementary Examinations June/July 2019


ELECTRICAL MEASUREMENTS
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Write classification of measuring instruments.
(b) How to measure frequency using an oscilloscope?
(c) How to measure high resistances?
(d) Draw circuit for Schering bridge.
(e) What are the different PF meters?
(f) Why we need LPF and UPF watt meters?
(g) What is standardization?
(h) What are the applications of current transformers?
(i) Write equation of motion for magnetic devices.
(j) Define B-H loop.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 Discuss working of Cathode Ray tube and applications of CRO.
OR
3 Discuss measurement of phase, current and voltages using CRO elucidate lissajous patterns.
UNIT – II
4 Explain sensitivity of Wheatstone bridge. Discuss loss of charge methods.
OR
5 Discuss working of Deasuty bridge and Weins bridge.
UNIT – III
6 Explain working of double element and three element dynamometer wattmeter.
OR
7 Explain working of three phase energy meter.
UNIT – IV
8 Explain principle and operation of DC Crompton potentiometer.
OR
9 Discuss working of AC potentiometer and its applications.
UNIT – V
10 Discuss working of ballistic galvanometer and flux meter.
OR
11 Explain methods of phase reversals and six point method.

*****
Code: 15A02501 R15
B.Tech III Year I Semester (R15) Regular & Supplementary Examinations November/December 2018
ELECTRICAL MEASUREMENTS
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) What is range extension?
(b) How to measure phase using an oscilloscope?
(c) How to measure low resistances?
(d) Draw circuit for Wien’s bridge.
(e) What is braking toque?
(f) Define control torque.
(g) How to measure unknown resistance?
(h) What are the applications of potential transformers?
(i) Draw block diagram of flux meter.
(j) Elucidate iron loss of bar samples.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 Discuss time base generator and horizontal, vertical amplifiers in CRO.
OR
3 Discuss working of PMMC and dynamometer instruments.
UNIT – II
4 Explain working of Kelvin’s double bridge for measuring low resistances.
OR
5 Discuss working of Maxwell’s bridge and Anderson’s bridge.
UNIT – III
6 Explain working of single phase wattmeter.
OR
7 Explain working of single phase induction type energy meter.
UNIT – IV
8 Explain principle and operation of DC Crompton potentiometer.
OR
9 Discuss working of polar type potentiometers and its applications.
UNIT – V
10 Discuss construction details of flux meter.
OR
11 Explain determination of B-H loop.

*****
Code: 15A02501 R15
B.Tech III Year I Semester (R15) Supplementary Examinations June 2018
ELECTRICAL MEASUREMENTS
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) What is the use of ammeter shunt?
(b) Define current sensitivity.
(c) What are the limitations of Wheatstone bridge?
(d) What are the disadvantages of measurement of inductance using Maxwell’s bridge method?
(e) List the errors in electrodynamometer wattmeter.
(f) What are the causes of creeping in energy meter?
(g) What is the use of a potentiometer?
(h) Mention any two sources of errors in coordinate type A.C potentiometer.
(i) Mention the drawbacks of flux meter over ballistic galvanometer.
(j) What is the function of ballistic galvanometer?

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) Explain the construction and working of permanent magnet moving coil instruments.
(b) A moving coil instrument gives a full-scale deflection of 10mA when the potential across its terminals is
100mV. Calculate shunt resistance for a full-scale deflection corresponding to 100 A.
OR
3 (a) With neat diagram, explain the construction and operation of attraction type moving iron instrument.
(b) The inductance of a moving iron instrument is given as L = (10+5Θ-Θ2)μH, where Θ is the deflection in
radians from zero position. The spring constant is 12 x 10-6 Nm/rad. Estimate deflection for a current
of 5 A.
UNIT – II
4 Draw the Kelvin’s double bridge circuit and explain the measurement of low resistance using this bridge.
OR
5 (a) What are the difficulties in the measurement of high resistance?
(b) Describe in brief about the loss of charge method of measurement of high resistance.
UNIT – III
6 Explain the construction and theory of operation of dynamometer wattmeter.
OR
7 Explain the construction and operation of single phase induction type energy meter.
UNIT – IV
8 Describe the construction and working of a polar type ac potentiometer.
OR
9 Draw the diagram and explain the operation of DC Crompton’s potentiometer.
UNIT – V
10 Explain in brief about the construction and operation of flux meter.
OR
11 Explain the determination of B-H loop using method of reversals.

*****
Code: 15A02501 R15
B.Tech III Year I Semester (R15) Regular Examinations November/December 2017
ELECTRICAL MEASUREMENTS
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) State the advantages of PMMC.
(b) What is a lissajous pattern?
(c) Write different methods of measurement of medium resistance.
(d) Define dissipation factor.
(e) What are the advantages of two wattmeter method?
(f) What is meant by meter constant of an energy system?
(g) What is the usual current rating of CT secondary?
(h) Distinguish between D.C & A.C potentiometers.
(i) Why are ballistic tests conducted?
(j) Name any two methods available for the determination of B-H curve of a specimen.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) Derive the torque equation for moving iron instruments.
(b) A 2 mA meter with an internal resistance of 100 Ω is to be converted to 0-150 mA ammeter. Calculate
the value of the shunt resistance required.
OR
3 Draw the block diagram of CRO & explain briefly the major parts of it.
UNIT – II
4 Draw circuit diagram of Wheatstone bridge and derive its balance condition.
OR
5 (a) The impedance of the basic a.c bridge are Z1 = 50 Ω ∟180⁰, Z2 = 250 Ω ∟0⁰, Z3 = 200 Ω ∟30⁰.
Calculate the constants of unknown impedance.
(b) Draw the circuit diagram of Schering bridge and also derive equations under balances.
UNIT – III
6 Explain the construction and theory of operation of single phase electro dynamo meter type Wattmeter.
OR
7 Derive torque equation of single phase induction type energy meter.
UNIT – IV
8 (a) A 250:5, current transformer is used along with an ammeter. If ammeter reading is 2.7A. Estimate the
line current.
(b) List out differences between C.T & P.T.
OR
9 (a) What are the applications of A.C potentiometers?
(b) Draw the circuit diagram of D.C Crompton’s potentiometer and explain its working.

UNIT – V
10 Explain construction and working principle of flux meter with neat sketch.
OR
11 How B-H curve is determined using method of reversals?

*****
Code: 15A04509 R15
B.Tech III Year I Semester (R15) Supplementary Examinations June/July 2019
LINEAR & DIGITAL IC APPLICATIONS
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) List the characteristics of ideal op-amp.
(b) Design an inverting amplifier with a gain of -5 and an input resistance of 10 k Ω.
(c) Draw the block diagram of PLL.
(d) What is meant by PLL? Mention any two applications of it.
(e) Define pass band and stop band of a filter.
(f) State the Barkhausen criteria for sustained oscillations.
(g) Sketch the logic levels for typical CMOS logic circuits.
(h) Define noise margin in IC logic family.
(i) Sketch the waveform of each inverter output.

(j) List the applications of shift registers.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 With the help of a block diagram, explain the various stages present in an operational amplifier.
OR
3 (a) Draw and explain the operation of op-amp based sample and hold circuit and also draw the input
and output wave forms.
(b) Define the following terms: (i) Slew rate. (ii) Thermal drift.
UNIT – II
4 (a) Draw the internal schematic of IC 555. Configure if for astable operation and explain the working.
(b) The basic step of a 9-bit DAC is 1.03mV. If 000000000 represents 0 V, what output is produced if
the input is 101101111?
OR
5 (a) List the applications of Schmitt trigger. Explain any one of them
(b) Explain R-2R ladder DAC.
UNIT – III
6 (a) A second-order high-pass filter using a 741 op-amp has R1 = 56 kΩ and C 1 = 600pF. Calculate the
circuit cutoff frequency and obtain its transfer function.
(b) Draw the block diagram of VCO and explain its operation. Obtain the expression for its frequency of
oscillations.
OR
7 (a) Explain the terms: (i) Roll of factor. (ii) Damping coefficient.
(b) Explain how to obtain triangular wave using a square wave generator.
Contd. in page 2

Page 1 of 2
Code: 15A04509 R15

UNIT – IV
8 Draw the circuit diagram for two-input TTL NAND gate and explain its operation with the help of
functional table.
OR
9 (a) Draw the circuit of Totem-pole TTL NAND gate. What is the purpose of using a diode at the output?
(b) Design a TTL three state NAND gate and explain the operation.
UNIT – V
10 Explain the different types of shift registers.
OR
11 (a) Draw and explain the operation of (IC 74LS138) 3 X 8 decoder.
(b) Design a 4-bit parallel adder/subtractor circuit.

*****

Page 2 of 2
Code: 15A04509 R15
B.Tech III Year I Semester (R15) Regular & Supplementary Examinations November/December 2018
LINEAR & DIGITAL IC APPLICATIONS
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) How does negative feedback compensate for a decrease in open loop gain?
(b) Enlist the features of an instrumentation amplifier.
(c) For an astable multivibrator in figure below, RA = 6.8 kΩ, RB = 3.3 kΩ and C = 0.1 µF, calculate:
(i) 𝑡ℎ𝑖𝑔ℎ . (ii) 𝑡𝑙𝑜𝑤 . (iii) Duty cycle D.

+𝑉∞

𝑅𝐴 8
4
7 J
JK-FF Output
𝑅𝐵 555 3 CK Q
6
5 K
C
0.01 µF
2 1

(d) What is meant by PLL? Mention any two applications of it.


(e) What are the different types of oscillators?
(f) Design a first-order active LPF to have a cut off frequency of 5 kHz.
(g) Sketch the logic levels for typical CMOS logic circuits.
(h) Define noise margin in IC logic family.
(i) Draw the CMOS inverter circuit.
(j) Construct a 4-bit parallel adder/subtractor using full adders and XOR gates.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 Discuss about the DC and AC characteristics of an op-amp.
OR
3 Derive an expression for the output voltage and gain of a: (i) Inverting. (ii) Non-inverting op-amp.
UNIT – II
4 (a) Draw the internal schematic of IC 555. Configure it for astable operation and explain the working.
(b) Calculate the values of the LSB, MSB and full scale output for an 8-bit DAC for the 0 to 10V.
OR
5 (a) List the applications of PLL and explain them.
(b) Explain inverted R-2R ladder.
UNIT – III
6 (a) Derive an expression for the transfer function of a second order low pass Butterworth filter.
(b) Explain VCO? Mention applications of it.
OR
7 (a) Using a 741 op-amp with a supply of ±12 V, design a RC phase shift oscillator to have an output
frequency of 3.5 kHz.
(b) Design a BPF with lower cut-off frequency of 2 kHz and upper cutoff frequency of 5 kHz using IC 741.
Contd. in page 2

Page 1 of 2
Code: 15A04509 R15
UNIT – IV
8 (a) Differentiate different logic families and mention their advantages and disadvantages.
(b) Describe TTL driving CMOS and CMOS driving TTL, interfacing techniques.
OR
9 (a) Give the construction of transmission gate and explain its working.
(b) Discuss about TTL and CMOS interfacing methods.
UNIT – V
10 (a) Design a 4-bit decimal adder using 4-bit binary adders.
(b) Implement the following Boolean functions using multiplexers:
F(A, B, C, D) = ∑m (0, 1, 3, 4, 8, 9, 15).
OR
11 Design a 3-bit synchronous counter using JK flip-flops.

*****

Page 2 of 2
Code: 15A04509 R15
B.Tech III Year I Semester (R15) Supplementary Examinations June 2018
LINEAR & DIGITAL IC APPLICATIONS
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) When is an Op-Amp said to be an ideal?
(b) Draw sample and hold circuit.
(c) Draw the functional diagram of successive approximation ADC.
(d) A 12 bit DAC has a resolution of 20m V/LSB. Find the full scale output voltage.
(e) Find the order of a low pass Butterworth filter that is to provide 40dB attenuation at 𝜔𝜔/𝜔𝜔ℎ = 2.
(f) Design a phase shift oscillator to oscillate at 100Hz.
(g) Mention the advantages of integrated circuits over discrete components.
(h) What happens when excess gate voltage is given to CMOS devices?
(i) Design a full adder circuit using decoder.
(j) Design an 1-bit magnitude comparator.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) Elaborate on an Op-Amp circuit which can generate single output pulse with adjustable time duration in
response to a trigger signal.
(b) Design an amplifier with a gain of -10 and input resistance equal to 10 kΩ.
OR
3 State the need for frequency compensation technique. With neat gain VS frequency curves elaborate and
derive the necessary equations used for different compensating techniques.
UNIT – II
4 What output voltage will be produced by a D/A converter whose output range is 0 to 10 V and whose
input binary number is:
(i) 10 (for 2-bit DAC)
(ii) 0110 (for 4-bit DAC)
(iii) 10111100 (for 8-bit DAC).
OR
5 Derive lock-in range and capture range of PLL with its neat block diagram and its explanation.
UNIT – III
6 (a) What are delay equalizers and why is it called so? With circuit diagram, derive the necessary equations
to justify it.
(b) Design a triangular wave generator using Op-Amp.
OR
7 Derive the output frequency of VCO.
UNIT – IV
8 Differentiate between MOS and CMOS. Elaborate on open drain and tristate CMOS outputs.
OR
9 Design a two input NAND gate using TTL open collector output and tristate output.
UNIT – V
10 Design a synchronous decade counter using D flip-flop.
OR
11 (a) Design a full subtractor circuit using 4x1 multiplexers.
(b) Design a 2-bit magnitude comparator.
*****
Code: 15A04509 R15
B.Tech III Year I Semester (R15) Regular Examinations November/December 2017
LINEAR & DIGITAL IC APPLICATIONS
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Draw basic symbol for Op-amp.
(b) Find feedback resistance of Op-amp with gain of -12 and input resistance 10 kOhm.
(c) Draw the schematic of DAC.
(d) Define resolution of a converter.
(e) Draw frequency response of LPF.
(f) Draw request response of Band pass filter.
(g) Explain about tristate gate.
(h) Write truth table for NAND gate.
(i) What is 2’s complement for -7?
(j) What is decoder?

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 In the figure given below, R1 = 10 k ohm, Rf = 100 k ohm, Vi = 1 V. A load of 25 k ohm is connected to
the output terminal. Calculate i1, vo, iL and total current io into the output pin.

OR
3 Find voltage gain for circuit shown in figure below.

Contd. in page 2

Page 1 of 2
Code: 15A04509 R15
UNIT – II
4 Explain working weighted resistor DAC and draw transfer characteristics of 3 bit DAC.
OR
5 Explain working of R- 2R ladder DAC.
UNIT – III
6 Explain working of fist order low pass filter with relevant mathematical expressions.
OR
7 Explain working of band reject filter with relevant mathematical expressions.
UNIT – IV
8 Explain CMOS TTL interface in detail.
OR
9 Elucidate working of 3 TTL NAND gate operation.

UNIT – V
10 Explain operation of decade counter with circuit along with truth table and its state diagram.
OR
11 Explain working of 4 bit serial into parallel out shift register.

*****

Page 2 of 2
Code: 15A02502 R15
B.Tech III Year I Semester (R15) Supplementary Examinations June/July 2019
ELECTRICAL POWER TRANSMISSION SYSTEMS
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Define GMD.
(b) What is the effect of earth on the capacitance of the line?
(c) What do you mean by surge impedance loading of transmission line?
(d) What is Ferranti effect?
(e) What is the significance of stringing chart?
(f) List out the limitations of pin-type insulators.
(g) Write the equations for reflection and refraction coefficients.
(h) What is the importance of Bewley’s Lattice diagrams?
(i) What is meant by grading in underground cables?
(j) Write the expression for most economical conductor size in cables.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) Derive an expression for line to neutral capacitance for a 3-phase line when conductors are
symmetrically placed.
(b) What is transposition? Explain the method of transposition of 3-phase line over one complete cycle.
OR
3 (a) Develop an expression for the inductance of a single phase transmission line taking into account the
internal flux linkages. Assume the conductors are solid.
(b) A 3-phase 50 km long single circuit 66 kV transposed overhead line has horizontal spacing with
3 meter between adjacent conductors and 6 meter between outer conductors. The conductor
diameter is 2 cm. Find the inductance per phase.
UNIT – II
4 (a) Draw the phasor diagram of a medium transmission lines represented by a pi (𝜋) model and derive
the expression for voltage regulation.
(b) Determine the efficiency and regulation of a 3-phase, 50 Hz transmission line having resistance,
inductance and capacitance of 10 ohms, 0.1H and 0.9 micro Farads respectively. The line delivers a
load of 35 MW at 132 kV and 0.8 p.f. lag. Use nominal pi (𝜋) method.
OR
5 A 15 km long 3-phase overhead transmission line delivers 5 MW at 11 kV at a power factor of
0.8 lagging. Line loss is 12% of the power delivered. Line inductance is 1.1mH per km per phase.
Calculate: (i) Sending end voltage and regulation. (ii) Power factor of load to make regulation zero.
(iii) The value of capacitor to be connected at receiving end to reduce regulation to zero.
Contd. in page 2

Page 1 of 2
Code: 15A02502 R15

UNIT – III
6 Explain the various methods for equalizing the potential across the various units in an insulator string
and discuss the methods for improving the string efficiency in a string of insulators.
OR
7 (a) Explain why the voltage across the insulator string is not equal and describe practical methods to
improve them.
(b) In a 33 kV overhead line there are three units in the string of insulators. The capacitance between
each insulator pin and earth is 13% of self-capacitance of each insulator. Find: (i) The distribution of
voltage over three insulators. (ii) String efficiency.
UNIT – IV
8 When the transmission line is terminated by the capacitive load, how do you find out the expressions
of reflected voltage and current wave?
OR
9 (a) Show that a travelling wave moves along an overhead line with a velocity of light and its speed is
proportional to 1/√𝜀𝑟 in case of a cable with dielectric material of relative permittivity 𝜀𝑟 .
(b) Two stations are connected together by an underground cable having a surge impedance of
60 ohms joined to an overhead line with a surge impedance of 400 ohms. If a surge having a
maximum valve of 100 kV travels along the cable towards the junction with the overhead line,
determine the value of the reflected and transmitted wave of voltage and current at the junction.
UNIT – V
10 (a) What is meant by grading of cables? Explain why and how the grading of cables is done?
(b) A single core cable has inner diameter of 5 cms and a core diameter of 1.5 cm. Its paper dielectric
has a working maximum dielectric stress of 60 kV/cm. Calculate the maximum permissible line
voltage when such cables are used on a 3-phase power system.
OR
11 (a) Derive the formula for dielectric stress in an UG cable.
(b) Single-core, lead covered cables is to be designed for 66 kV to earth. Its conductor radius is 10 mm
and its three insulating materials A, B and C have relative permittivities of 5, 4 and 3 respectively
and corresponding maximum permissible stresses of 3.8, 2.6 and 2.0 kV/mm (rms) respectively.
Find the minimum diameter of the lead sheath.

*****

Page 2 of 2
Code: 15A02502 R15
B.Tech III Year I Semester (R15) Regular & Supplementary Examinations November/December 2018
ELECTRICAL POWER TRANSMISSION SYSTEMS
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Discuss the advantages of bundled conductors, when used for overhead lines.
(b) Define GMR.
(c) Give the condition for Zero voltage regulation in transmission lines.
(d) Give the ABCD parameters for short transmission line.
(e) Write list of factors that affects corona loss.
(f) Define critical visual disruptive voltage.
(g) What are the reflection and refraction coefficients for line terminated with open circuit?
(h) Why Bewley Lattice diagrams are drawn?
(i) List different methods of cable grading.
(j) Write the expression for insulation resistance of a cable.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) Derive an expression for the inductance per phase for a 3-phase overhead transmission line when
conductors are unsymmetrically placed but lines are completely transposed.
(b) Calculate the inductance per phase of a 400 kV, 3-phase single circuit line that utilizes a bundled
conductor arrangement as shown in figure below. The space between the two phases is 15 m in a
horizontal formation. The sub-conductors of a phase are at the corners of a square of sides 0 .5 m, each
sub-conductor having a diameter of 3 cm.

OR
3 What is method of images? Derive an expression for the capacitance per unit length of a 3-phase
transposed line. What is the effect of earth on the capacitance of the line?
Contd. in page 2

Page 1 of 2
Code: 15A02502 R15

UNIT – II
4 (a) Derive the ABCD parameters of a nominal T represented medium length transmission line with neat
phasor diagram.
(b) Find the ABCD parameters of a 3-phase, 100 km, 50 Hz transmission line with series impedance of
(0.10+j 0.3) ohms per km and a shunt admittance of j4 x10-4 mho per km.
OR
5 (a) Explain the effect of power factor on regulation and efficiency.
(b) A 50 km long 3-phase transmission line consists of three hard drawn copper conductors in a 1.2 m delta.
Load conditions at receiving end are: 10 MVA at 0.8 power factor lagging, 3.3 kV, 50 Hz. Line is
designed so that transmission loss is approximately 10%. Find the sending end voltage, power factor,
regulation and efficiency.
UNIT – III
6 (a) Explain why suspension type of insulators are preferred for high voltage overhead lines. Sketch a
sectional view of one unit of the suspension type insulator and describe the construction.
(b) An insulator string containing five units has equal voltage across each unit by using disc of different
capacitances. If the top unit has a capacitance of C and pin to tower capacitance of all units is 20 percent
of the mutual capacitance of top unit. Calculate mutual capacitance of each disc in a string.
OR
7 (a) Give brief description of corona phenomenon.
(b) Derive the expression for potential gradient at the surface of a conductor of 1-phase transmission line.
UNIT – IV
8 (a) Deduce expressions for surge impedance and velocity of propagation.
(b) A 200 kV surge travels on line of 400 ohm surge impedance and reaches a junction where two branch
lines of serge impedances of 500 ohm and 300 ohm are connected with the transition line. Find the surge
voltage and current transmitted into each branch line. Also find the reflected voltage and current.
OR
9 (a) Derive reflection and refraction coefficient of transmission line when receiving end is open circuited.
(b) An overhead line with inductance and capacitance per km length of 1.24mH and 0.087 μF respectively is
connected in series with an ungrounded cable having inductance and capacitance of 0.185 mH / km and
0.285 μF / km respectively. Calculate the values of reflected and refracted waves of voltage and current
at the junction due to a voltage surge of 110 kV traveling to the junction. (i) Along the line towards the
cable. (ii) Along the cable towards the line.
UNIT – V
10 (a) Derive an expression for the capacitance of a single core cable.
(b) The insulation resistance of a single core cable is 495 M Ohm/km. If the core diameter is 2.5 cm and
resistivity of insulation is 4.5 x 1014 ohm-cm. Find the insulation thickness.
OR
11 (a) Derive an expression for insulation resistance of a single-core cable.
(b) A 3-phase, 66 kV single-core lead sheathed cable has a conductor of 2 cm diameter and two layers of
different materials each 1 cm thick. The relative permittivity are 5 (inner) and 3 (outer). Calculate the
maximum stress in the two dielectrics.

*****

Page 2 of 2
Code: 15A02502 R15
B.Tech III Year I Semester (R15) Supplementary Examinations June 2018
ELECTRICAL POWER TRANSMISSION SYSTEMS
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Expand the terms GMD and GMR.
(b) Define skin effect.
(c) Define regulation of a line.
(d) What is surge impedance loading? Give an expression for power transmitted under these conditions.
(e) Write the names of different types of insulators.
(f) Write the expression for power loss due to corona.
(g) What is Bewley’s lattice diagram?
(h) Write an expression for surge impedance of the line.
(i) Give the expression for electrostatic stress in single core cables.
(j) Derive an expression for the capacitance of a single core cable.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) Derive an expression for the inductance of a single phase two wire line.
(b) A single phase line of 230 V has conductor spacing of 135 cm. The radius of conductor is 0.8 cm.
Calculate the loop inductance in mH of the line per km.
OR
3 (a) Explain the effect of earth on the capacitance of single phase transmission line.
(b) Three conductors of a three phase overhead line are arranged in horizontal plane, six meters apart. The
diameter of each conductor is 1.24 cm. Find the capacitance per 100 km of the line in microfarads.
UNIT – II
4 (a) Write the ABCD constants for a short line.
(b) A single phase transmission line delivers 2 MW of power at the receiving end at a voltage of 33 kV and
0.9 pf lagging. The total resistance of the line is 10Ω and the total inductive reactance is 18Ω. Determine:
(i) Percentage voltage regulation. (ii) Sending end power factor.
OR
5 (a) Write the expressions for ABCD constants of nominal-T line.
(b) A three phase, 50 Hz overhead transmission line, 100 km long with 132 kV has line voltage at the
receiving end. The line has following constants:
(i) Resistance = 0.7 Ω /km/phase.
(ii) Inductance = 1.1 mH/km/phase.
(iii) Capacitance = 0.0082 𝜇𝜇𝜇𝜇/km/phase
Build nominal tree model.
Contd. in page 2

Page 1 of 2
Code: 15A02502 R15

UNIT – III
6 (a) Name the methods of increasing string efficiency.
(b) Each line of a three phase system is suspended by a string of 3 similar insulators. If the voltage across
the line unit is 17.5 kV, calculate the line to neutral voltage. Assume that the shunt capacitance between
each insulator and earth is 1/8th of the capacitance of the insulator itself.
OR
7 (a) Explain any four factors affecting corona loss.
(b) A single phase overhead line consists of two conductors of diameter 2 cm with a spacing of 1.5 m
between centers. Determine line voltage for commencing of corona. Dielectric strength of air = 21 kV/cm.
UNIT – IV
8 Discuss in detail the reflection of travelling wave at a short circuit and at an open circuit.
OR
9 Show that the current and voltage waves get attenuated exponentially as they travel over the line.
UNIT – V
10 What are the main requirements of the insulating materials used for cables? Elaborate on the type of
materials used for insulation.
OR
11 (a) Explain the intersheath grading of the cables.
(b) Determine the economic overall diameter of a single core cable metal sheathed for a working voltage of
85 kV if the dielectric strength of the insulating material is 65 kV/cm.

*****

Page 2 of 2
Code: 15A02502 R15
B.Tech III Year I Semester (R15) Regular Examinations November/December 2017
ELECTRICAL POWER TRANSMISSION SYSTEMS
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) What is skin effect?
(b) What is the significance of transposition in transmission lines?
(c) What is the importance of surge impedance loading in transmission lines?
(d) Classify transmission lines based on voltages.
(e) What is a string chart? What are its uses?
(f) What is a corona? What are its effects?
(g) Define attenuation and distortion.
(h) Give the values of reflection and refraction coefficients when line is open circuited and short circuited.
(i) What is the function of sheath and bedding in a cable?
(j) What is meant by intersheath grading?

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) Derive the expression for the capacitance of a transposed unsymmetrical 3 phase system.
(b) Calculate the capacitance of a conductor per phase of a three-phase 400 km long line, with the
conductors spaced at the corners of an equilateral triangle of side 4 m and the diameter of each
conductor being 2.5 cm.
OR
3 (a) Derive the expression for the capacitance of a conductor in a double circuit hexagonal spaced three
phase system.
(b) A 3-phase, 50 Hz, 66 kV overhead transmission line has its conductors arranged at the corners of an
equilateral triangle of 3 m sides and the diameter of each conductor is 1.5 cm. Determine the inductance
and capacitance per phase, if the length of line is 100 km.
UNIT – II
4 (a) Draw phasor diagram of a short transmission line and derive an expression for voltage regulation.
(b) A 3- line delivers 3500 kW at 0.8 power factor (lag) to a load. The impedance of the line is (2+j5) Ω.
If the sending end voltage is 33 kV, determine the receiving end voltage, line current and efficiency of the
line.
OR
5 (a) What is a nominal-circuit representation? Find ABCD constants for nominal-T circuit of a transmission
line.
(b) Find ABCD parameters of a 3-phase, 80 km, 50 Hz transmission line with series impedance of
(0.15 + j 0.28) Ω per km and a shunt admittance of j5 x 10−4 mho per km for both π and T networks.
Contd. in page 2

Page 1 of 2
Code: 15A02502 R15

UNIT – III
6 (a) Explain about the effect of radio interference due to corona on the transmission lines.
(b) A string of four suspension insulators is to be graded to obtain uniform distribution of voltage across the
string. If the capacitance to ground of each unit is 10% of the capacitance of the top unit, determine the
capacitance of the remaining three units.
OR
7 (a) Show that the maximum critical disruptive voltage occurs when the radius of conductor is d/e where d is
the distance between conductors.
(b) Determine sag of an overhead line for the following data:
Span length = 160 meter
Conductor diameter = 0.95 cm
Weight per unit length of the conductor = 0.65 kg/meter
Ultimate stress = 4250 kg/cm2
Wind pressure = 40 kg/cm2 of projected area and factor of safety = 5.
UNIT – IV
8 (a) Discuss the behavior of a travelling wave when it reaches: (i) Short circuited. (ii) Open circuited
transmission lines.
(b) An overhead transmission line with surge impedance 400 Ω is 300 km long. One end of this line is short
circuited and at the other end a source of 11 kV is suddenly switched in. Calculate the current at source
end after 0.005 sec from voltage is applied.
OR
9 (a) When the transmission line is terminated by the capacitive load, how do you find out the expressions of
reflected voltage and current wave?
(b) A rectangular wave travels along a 500 km line terminated with a resistance of 1000 Ω. The line has a
resistance of 0.32 Ω/km and surge impedance of 400 Ω. If the voltage at the termination point after two
successive reflections is 200 kV, find the amplitude of the incoming surge.

UNIT – V
10 (a) Draw cross section of a 3-core belted high voltage cable and describe its various parts.
(b) A single core cable has a conductor diameter of 2.5 cm and a sheath of inside diameter 6 cm. Calculate
the maximum stress. It is desired to reduce the maximum stress by using two intersheaths. Determine
their best position, the maximum stress and the voltage on each. Consider the system voltage as
3-phase, 66 kV.
OR
11 (a) Deduce an expression for insulation resistance of a single core cable in terms of specific resistance of
dielectric, its core and sheath diameter.
(b) A single core cable for 66 kV, three phase system has a conductor diameter of 2 cm and sheath of inside
diameter 5.3 cm. It is required to have two intersheaths so that stress varies between the same
maximum and minimum values in the three layers of dielectric. Find the positions of intersheaths,
maximum and minimum stress and voltage on the intersheaths. Also find the maximum and minimum
stress if the intersheaths are not used.

*****

Page 2 of 2
Code: 15A02503 R15
B.Tech III Year I Semester (R15) Supplementary Examinations June/July 2019
POWER ELECTRONICS
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Define the ideal characteristics of a semiconductor device.
(b) What is the need of understanding specification & ratings of device?
(c) Explain why the controlled converters are called as phase controlled converters.
(d) Explain the main effect of source inductance in converter system.
(e) Define chopper and mention the various types of choppers.
(f) What is the need of duty cycle control? Which method is better?
(g) What is the main drawback of Half bridge inverter?
(h) Mention any two methods used for harmonic reduction in inverters.
(i) What is an AC voltage controller? Mention the two applications of it.
(j) What is Cyclo converter?

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 Explain dynamic switching characteristics of a SCR during turn ON and turn OFF with relevant
waveforms.
OR
3 Draw and explain the switching characteristics of an IGBT.
UNIT – II
4 With relevant circuit and waveforms, explain the operation of 3-phase Half controlled converter.
OR
5 A single phase rectifier for 10 kW rating is required. Thyristors are of current rating 50 A are to be
used. Find the rated voltage of thyristor using a safety factor of 2, if the rectifier is: (i) Full wave using
centre tapped transformer. (ii) Full wave bridge rectifier. Assume R-L load.
UNIT – III
6 With relevant circuit and waveforms, explain the operation of Buck-Boost converter and hence derive
the expression for its output voltage.
OR
7 A chopper is feeding an RL load having R = 4Ω, L = 6mH, V = 200v, α = 0.5 and f = 1000 Hz. Find:
(i) Minimum and maximum instantaneous values of load current.
(ii) Maximum peak to peak load ripple current.
(iii) Average load current.
(iv) RMS load current.
(v) Average input current.

Contd. in page 2

Page 1 of 2
Code: 15A02503 R15

UNIT – IV
8 With relevant circuit and waveforms, explain the operation basic series inverter with relevant
equations.
OR
9 A 3-phase bridge inverter is fed from a 400 V battery. The load is star connected and has a
resistance of 10Ω per phase. Find the RMS load current, power output, peak current of thyristors,
average and rms current of thyristor. Assume 120o mode of operation.
UNIT – V
10 With relevant circuit and waveforms, explain the operation of single phase midpoint Cyclo converter
with R-load.
OR
11 A single phase full wave ac voltage controller has an input voltage of 230 V, 50 Hz. It feeds a load
having R = 4Ω and L = 22 mH. The frequency is 50 Hz. The firing angles are 60o for both thyristors.
Find: (i) Conduction angle of thyristor. (ii) RMS output voltage.

*****

Page 2 of 2
Code: 15A02503 R15
B.Tech III Year I Semester (R15) Regular & Supplementary Examinations November/December 2018
POWER ELECTRONICS
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) When the thyristor is ON, what happens to voltage and current magnitudes?
(b) What is Snubber circuit and why it is used?
(c) Mention the advantages of freewheeling diode in phase controlled converter.
(d) What are the two models of dual converter control?
(e) Mention the two characteristics of voltage regulator.
(f) Why the diodes are called as feedback diodes in inverters and how are they connected in the
circuit?
(g) Why harmonics are required to be reduced? Mention any one methods used for the reduction of it.
(h) What is the difference between time ratio control and current limit control strategies?
(i) Where triac is used and in what way it is different than two back to back thyristor connections.
(j) Mention any two applications of cycloanverters.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)

UNIT – I
2 With relevant circuit and equations, explain the two transistor analogy of a thyristor. Also comment
on their switching characteristics.
OR
3 Mention and explain the various methods of turn of an SCR in brief.
UNIT – II
4 With relevant circuit and waveforms, explain the operation single phase fully controlled converter
with an RLE load.
OR
5 A 3-phase full converter is fed by 400 V, 3-phase, 50 Hz supply. The average and load current is
100 A and the load is highly inductive. The firing angle α = 60o. Find (i) Output power. (ii) Average
4 rms currents. (iii) Peak current through thyristor. (iv) Peak inverse voltage.
UNIT – III
6 What is buck converter? With relevant circuit and waveforms, explain the operation of buck
converter with relevant equations.
OR
7 A DC chopper has an input voltage of 200 V and a load of 8 ohm resistance. The voltage drops
across thryristor is 2 V and the chopper frequency is 800 Hz. The duty cycle is 0.4. Find: (i) Average
output voltage. (ii) RMS output voltage. (iii) Chopper efficiency. (iv) Input resistance.

Contd. in page 2

Page 1 of 2
Code: 15A02503 R15
UNIT – IV
8 With relevant circuit and waveforms, explain the operation of 3-phase bridge inverter with 180o
mode.
OR
A single phase half bridge inverter has a resistive load of 3 Ω. The DC input voltage is 30 V. Find:
9 (i) RMS value of fundamental component of output voltage. (ii) Output power. (iii) Peak current in
each thyristor. (iv) Average current of each thyristor. (v) Peak reverse blocking voltage.
UNIT – V
10 With relevant circuit and waveforms, explain the operation midpoint cycle converter with RL load.
OR
11 A single phase half wave ac voltage controller has an input voltage of 150V and a load resistance of
8Ω. The firing angle of thyristor is 60o in each positive half cycle. Find: (i) Average output voltage.
(ii) RMS output voltage. (iii) Power output. (iv) Input power factor. (v) Average input current over one
cycle.

*****

Page 2 of 2
Code: 15A02503 R15
B.Tech III Year I Semester (R15) Supplementary Examinations June 2018
POWER ELECTRONICS
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Define latching current and holding current.
(b) Write any four advantages of GTO over SCR.
(c) What is the function of freewheeling diodes in controlled rectifier?
(d) Define input power factor in controlled rectifier and write its expression.
(e) Explain about time ratio control in choppers.
(f) What is meant by DC chopper and write its applications.
(g) What does ac voltage controller mean and write its advantages.
(h) Write the difference between On-Off control and phase control.
(i) Write the application of inverter.
(j) Write the advantages of CSI.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 Discuss different modes of operation of thyristors with the help of static VI characteristics.
OR
3 Explain the operation of TRIAC with the help of its VI characteristics.
UNIT – II
4 Describe the working of three phase semi converter and derive the expressions for average output
voltage and r.m.s output voltage.
OR
5 A single-phase full converter has a RL load having L = 6.5 mH, R = 0.5Ω and E = 10 V. The input voltage
is Vs = 120 V at (r.m.s) 60 Hz. Determine: (i) The average thyristor current Ia. (ii) r.m.s thyristror current
IR. (iii) The average output current Idc.
UNIT – III
6 Discuss the principle of operation of DC-DC step down chopper with suitable waveforms.
OR
7 (a) Explain the operation of Step-up chopper with relevant waveforms
(b) A step-up chopper has an input voltage of 150 V. The voltage output needed is 450 V. Given that
thyristror has a conducting time of 150 𝜇𝜇 seconds. Calculate the chopping frequency.
UNIT – IV
8 Describe the working of a single phase half bridge inverter. What is its main drawback? Explain how this
drawback is overcome.
OR
9 What are the different PWM techniques employed for inverter? Explain sinusoidal PWM technique with
neat wave forms.
UNIT – V
10 (a) Describe the operation of single phase full wave AC voltage controller feeding RL load with relevant
waveforms.
(b) A single phase AC voltage controller has a resistive load of R = 10 ohms and the input voltage is
Vs = 120 V, 60 Hz. The delay angle of thyristor is 90 degrees. Determine: (i) The r.m.s value of output
voltage V0. (ii) The input power factor. (iii) The average input current.
OR
11 Explain the operation of single phase bridge configuration of cyclo-converter with continuous load
current.
*****
Code: 15A02503 R15
B.Tech III Year I Semester (R15) Regular Examinations November/December 2017
POWER ELECTRONICS
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Distinguish between SCR and TRIAC.
(b) List the various turnoff methods of SCR.
(c) A single phase full converter is connected to RLE load. The source voltage is 230 V, 50 Hz supply. The
average load current of 10 A is continuous over the working range. Determine the firing angle α, when
the load resistance is 0.4 Ω, load inductance is 2mH and E = -120 V.
(d) What are the drawbacks of circulating current mode of operation of Dual converter?
(e) For a DC-DC buck converter, dc source voltage is 230 V, load resistance is 10 Ω. For a duty cycle of 0.4,
calculate the average output voltage.
(f) How do you operate the Buck-Boost regulators in buck mode and boost mode?
(g) Why series inverters are called so?
(h) Mention the advantages of using PWM techniques.
(i) Write down the expression for rms load voltage and power factor of single phase AC voltage controller.
(j) What is a cycloconverter?

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 With the help of a two transistor model of SCR, explain its regenerative action. Also derive the
expression for anode current of SCR in terms of current gains of transistor.
OR
3 Explain in detail the series operation of SCR. Also discuss the necessity of using static and dynamic
equalizing circuits.
UNIT – II
4 Discuss in detail the effect of source inductance in single phase full converter.
OR
5 With a neat power circuit diagram and waveform, explain the working of single phase fully controlled
rectifier under continuous conduction mode. Also derive the expression for its average and RMS output
voltage. From the average output voltage expression, draw its control characteristics.
UNIT – III
6 With a neat power circuit diagram, explain the working of Boost regulator. Draw the necessary
waveforms to explain its operation. Derive the expression for its output voltage.
OR
7 For a step down chopper circuit, source voltage Vs = 220 V, chopping period T = 2000µs, on period
Ton = 600µs, load circuit parameters: R = 1 Ω, L = 5mH and E = 24 V.
(i) Find whether load current is continuous or not.
(ii) Calculate the value of average output current.
(iii) Calculate the maximum and minimum values of steady state output current.
(iv) Calculate the average value of supply current.
Contd. in page 2

Page 1 of 2
Code: 15A02503 R15

UNIT – IV
8 With a neat power circuit diagram, explain the working of full bridge voltage source inverter. Draw its
output voltage waveform.
OR
9 Draw neatly the power circuit diagram of three phase inverter with star connected load. Explain the circuit
operation in the 180° mode with necessary equivalent circuits. Mark the ON duration of various switches
and draw all the three phase output voltages.

UNIT – V
10 With neat circuit diagram and waveforms, explain the working of single phase to single phase step down
cycloconverter.
OR
11 With neat circuit diagram and waveforms, explain the working of single phase AC voltage controller.

*****

Page 2 of 2
Code: 15A02504 R15
B.Tech III Year I Semester (R15) Supplementary Examinations June/July 2019
ELECTRICAL MACHINES – III
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) What is an armature reaction? Explain its effect on the terminal voltage of an alternator at unity
power factor load?
(b) Define pitch factor and distribution factor of a synchronous machine.
(c) Why does synchronous impedance method give a poor voltage regulation?
(d) Two reaction theory is applied only to salient pole machines. State the reasons.
(e) What is synchronous reactance?
(f) Discuss about synchronizing power.
(g) How are ‘V’ and ‘Λ’ curves of synchronous motor are defined?
(h) List different methods for starting of synchronous motors.
(i) Name the applications of shaded pole induction motor.
(j) Mention the advantages of stepper motor.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) Explain the principle of operation of a synchronous machine.
(b) A 4-pole, 50 Hz star connected alternator has 6 slots per pole per phase and a two layer winding
with 4 conductors per slot. If the coil span is 1500, find the no-load terminal emf if the flux per pole is
300 mWb.
OR
3 (a) List and explain the salient features of cylindrical – rotor type synchronous machine.
(b) What are the advantages and disadvantages of short pitched and distributed winding in alternator?
UNIT – II
4 (a) In a 1500 KVA, 3300 V, 50 Hz, 3-phase, star connected synchronous generator, a filed current of
50 A produces a short-circuit current of 250 A and open-circuit voltage of 1100 V line to line.
Determine the voltage regulation at full load and at 0.8 power factor lagging. Consider the armature
resistance to be 0.3 ohms.
(b) With the help of neat sketch, explain the two reaction theory of an synchronous machine.
OR
5 (a) Explain the ASA method of finding the voltage regulation of an alternator.
(b) A synchronous generator has Xd = 0.75 pu and Xq = 0.5 pu. It is supplying full-load at rated voltage
at 0.8 lagging power factor. Draw the phasor diagram and compute the excitation emf.
Contd. in page 2

Page 1 of 2
Code: 15A02504 R15

UNIT – III
6 (a) Derive the expression for synchronizing torque when two alternators are connected in parallel.
(b) A 100 HP, 500 V, three phase star connected synchronous motor has a resistance and synchronous
reactance of 0.03 Ω and 0.3 Ω respectively. Calculate for full load and 0.8 pf leading, EMF per phase
and total mechanical power developed assuming efficiency of 93%.
OR
7 (a) What is an infinite bus? State the characteristics of an infinite bus. What are the operating
characteristics of an alternator connected to an infinite bus?
(b) Discuss in detail about sub-transient, transient and steady state reactances.
UNIT – IV
8 (a) Explain hunting of synchronous machines and methods of its prevention.
(b) Why at any load, the power factor decreases and the armature current increases if the field current
is varied above and below the normal excitation. Explain.
OR
9 A 2500 V, three phase star-connected synchronous motor has a resistance of 0.35_ per phase and
synchronous reactance of 2.2_ per phase. The motor is operating at 0.75 power factor leading with
a line current of 250 A. Determine the excitation voltage per phase.
UNIT – V
10 What are the types of single phase induction motor? Explain any two in detail.
OR
11 Write short notes on:
(a) Universal motor.
(b) Hysteresis motor.

*****

Page 2 of 2
Code: 15A02504 R15

B.Tech III Year I Semester (R15) Regular & Supplementary Examinations November/December 2018
ELECTRICAL MACHINES – III
(Electrical and Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Define synchronous speed. How is it related to the frequency of generated EMF?
(b) What are the various functions of damper winding provided in alternator?
(c) Explain briefly about ZPF method.
(d) Write short notes on SCR.
(e) Explain about synchronizing alternators with infinite bus bars.
(f) Explain briefly about power flow equations in alternator.
(g) Define hunting and mention various methods to eliminate hunting.
(h) Write any two starting methods of synchronous motor.
(i) Write short notes on shaped pole motor.
(j) Write short note on hysteresis motor.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 Explain principle and construction features of salient pole and round machines.
OR
3 Explain in detail about synchronous reactance and impedance with phasor diagram.
UNIT – II
4 Determine Xd and Xq with the help of a phasor diagram of a synchronous generator..
OR
5 Discuss in detail about two reaction theory of a synchronous generator.
UNIT – III
6 Discuss in detail about how to determine sub-transient, transient and steady state reactions.
OR
7 Discuss in detail about parallel operation load sharing of a synchronous generator..
UNIT – IV
8 Explain theory of operation of a synchronous motor with phasor diagram.
OR
9 With neat sketch, explain V and inverted V curves.
UNIT – V
10 Explain double revolving field theory with suitable example.
OR
11 Write short notes on principle operation of :
(a) Reluctance motor.
(b) Stepper motor.

*****
Code: 15A02504 R15
B.Tech III Year I Semester (R15) Supplementary Examinations June 2018
ELECTRICAL MACHINES - III
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Write the EMF equation of an alternator.
(b) What is meant by armature reaction and mention its effect?
(c) Write short notes on two reaction theory.
(d) Difference between EMF method and MMF method.
(e) Write short notes on parallel operation of synchronous generator.
(f) Write the power flow equation in synchronous motors.
(g) Why a 3-phase synchronous motor will always run at synchronous speed?
(h) Describe the performance of AC series motor.
(i) Explain about hysteresis motor.
(j) Explain about synchronizing power and torque.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 Derive EMF equation for synchronous generator.
OR
3 Explain space and slot harmonics of a synchronous generator.
UNIT – II
4 With neat diagram, explain short circuit ratio method.
OR
5 Give a short note on:
(a) ZPF method.
(b) ASA method.
UNIT – III
6 Explain power flow equation in alternator with its torque equation.
OR
7 Describe synchronizing alternators with infinite bus bars.
UNIT – IV
8 Explain construction and principle operation of brushless DC motor.
OR
9 Discuss in detail about variation of current and power factor with excitation in synchronous motor.
UNIT – V
10 Explain principle and performance of AC series motor.
OR
11 Give a short note on:
(a) Single phase synchronous motors.
(b) Hysteresis motor.

*****
Code: 15A02504 R15
B.Tech III Year I Semester (R15) Regular Examinations November/December 2017
ELECTRICAL MACHINES – III
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Write the types of rotors used in synchronous generators. Where are they used?
(b) What is the purpose of skewing?
(c) Write an expression for % voltage regulation. Name the methods for finding voltage regulation an
alternator.
(d) Name the tests to be conducted for zero power factor method.
(e) Give the expressions for calculation of synchronizing power and synchronizing torque.
(f) When two alternators are operating in parallel, what are the effects of instantaneous reduction in the
angular velocity of one machine?
(g) What is hunting of synchronous motors?
(h) Draw the vector diagram of synchronous motor for no-load condition with losses.
(i) Name the basic types of single phase induction motors which start on the split phase principle.
(j) What are universal motors?

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) Derive the emf equation of an alternator.
(b) A , 10 pole alternator has 2 slots per pole per phase on its stator with 10 conductors per slot. The
air gap flux is sinusoidelly distributed and equals to 0.05 Wb. The stator has double layer winding with a
coil span of 150 electrical. If the alternator is running at 600 rpm, calculate the emf generated per phase
at no load.
OR
3 Explain in detail the reasons for variation in terminal voltage of an alternator on load.
UNIT – II
4 (a) Why synchronous impedance method is called pessimistic method?
(b) A , star connected alternator is rated at 1500 kVA, 12000 V. The armature effective resistance and
synchronous reactance are 2 and 35 respectively per phase. Calculate the % regulation for a load of
1200 kW at (i) 0.8 lagging pf (ii) 0.8 leading pf.
OR
5 (a) Define Xd and Xq.
(b) A 2200 V, 50 Hz, , star connected alternator has an effective resistance of 0.5 per phase. A field
current of 30 A produced the full-load current of 200 A on short circuit and a line-to-line emf of 1100 V on
open circuit. Determine the power angle of the alternator when it delivers full load at 0.8 lagging per
factor.
Contd. in page 2

Page 1 of 2
Code: 15A02504 R15

UNIT – III
6 A 2-pole, 50 Hz, , turbo alternator is excited to generate the bus-bar voltage of 11 kV on no-load.
The machine is star connected and the short circuit current for this excitation is 1000 A. Calculate the
synchronizing power per degree of mechanical displacement of the rotor and the corresponding
synchronizing torque.
OR
7 Two alternators working in parallel supply a lighting load of 3000 kW and a motor load aggregating to
5000 kW at a p.f 0.72. One machine is loaded up to 5000 kW at 0.8 p.f lagging. What is the load and
power factor of the other machine?
UNIT – IV
8 (a) What are synchronous condensers? Explain.
(b) A 440 V, 50 Hz, circuit takes 18 A at a lagging power factor of 0.8 A synchronous motor is used to
raise the power factor to unity. Calculate the kVA input to the motor and its power factor when driving a
mechanical load of 6 kW. The motor has an efficiency of 88%.
OR
9 What is the necessity of a starting method of synchronous motor? Explain different methods of starting of
synchronous motors.
UNIT – V
10 Describe the construction and working of single phase induction motor. Give their applications and
disadvantages.
OR
11 Explain the construction and principle of operation of shaded – pole induction motor with neat diagrams.

*****

Page 2 of 2
Code: 15A04510 R15
B.Tech III Year I Semester (R15) Supplementary Examinations June/July 2019
DIGITAL CIRCUITS & SYSTEMS
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Perform subtraction using 2’s compliment for 11010-1101.
(b) Define unit-distance code. State where they are used.
(c) Define K-Map & list any two advantages of the same.
(d) Locate the min-terms in three variable map for f = ∑m(0, 1, 5, 7).
(e) Distinguish between synchronous and asynchronous latch.
(f) Why gated D latch is called a transparent latch?
(g) List any two differences between PROM and EEPROM.
(h) Define PAL.
(i) Define synchronous sequential circuits.
(j) Differentiate between combination & sequential circuit (any two).

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) Simplify to a sum of 3 terms

(b) Given , show that .


OR
3 (a) Find (3250-72532)10 using 10’s compliment.
(b) Explain universal gates in detail.
UNIT – II
4 Simplify the following Boolean expressions using K-Map & implement them, using NOR gates:
(a) .
(b) .
OR
5 Implement the following Boolean function using 8:1 multplexer:

UNIT – III
6 (a) Explain universal shift register in detail.
(b) Give the transition table for following flip flops:
(i) D flip flop. (ii) SR flip flop.
OR
7 (a) Explain operation of SR flip flop using asynchronous inputs with truth table.
(b) Explain ring counter in detail.
Contd. in page 2

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Code: 15A04510
R15

UNIT – IV
8 (a) Explain memory decoding in detail.
(b) Explain Bipolar RAM cell in detail.
OR
9 Explain programmable logic arrays in detail with an illustration.
UNIT – V
10 Explain Melay and Moore model in detail.
OR
11 A sequential circuit has one input and one output. The state diagram is shown below. Design the
sequential circuit with (i) D Flip flop. (ii) T Flip flop

0/0
00
1/0 0/1

0/0
01 11 1/1

1/0
10
0/1

*****

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Code: 15A04510 R15
B.Tech III Year I Semester (R15) Regular & Supplementary Examinations November/December 2018
DIGITAL CIRCUITS & SYSTEMS
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) What is the decimal equivalent of 10010?
(b) A binary number has 9 bits. What is the binary weight of the most significant bit?
(c) Explain quads and octets in Karnaugh map.
(d) Explain product of sums.
(e) Draw the Master-Slave flip-flop and its truth table.
(f) Draw the ring counter.
(g) What is a cache RAM?
(h) What would be the structure of the binary address for a memory system having a capacity of 1024
bits?
(i) What is a primitive flow table?
(j) What is the advantage and disadvantage of asynchronous over synchronous sequential circuits?

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 Explain about universal logic gates. Briefly explain with logic diagram, IEEE symbol, and 14-pin DIP
schematic diagram of each gate.
OR
3 (a) Explain the expandable AND-OR-INVERT gates.
(b) Briefly describe the positive logic and negative logic.
UNIT – II
4 Show Karnaugh map for equation 𝑌 = 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = Σ𝑚 = (1, 2, 3, 6, 8, 9, 10, 12, 13, 14).
OR
5 Draw a NOR-NOR circuit for this Boolean expression:
𝑌 = (𝐴̅ + 𝐵� + 𝐶̅ )(𝐴̅ + 𝐵 + 𝐶̅ )(𝐴 + 𝐵 + 𝐶̅ )
UNIT – III
6 Design the decade counter.
OR
7 Design parallel in serial out shift register. Draw the tailed ring counter.
UNIT – IV
8 What is the organization of 7489, 64-bit RAM?
OR
9 Explain the diode ROM with neat diagram.
UNIT – V
10 State the conditions for stability in asynchronous sequential logic.
OR
11 Give verilog HDL description of the Moore model shown in figure below.
00 1 𝑏/0
𝑎/0 0
0
0 𝑐/0
𝑑/0

*****
Code: 15A04510 R15
B.Tech III Year I Semester (R15) Supplementary Examinations June 2018
DIGITAL CIRCUITS & SYSTEMS
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) What is the decimal value of binary 1011.117?
(b) A computer has a 2 Mb memory. What is the decimal equivalent of 2 Mb?
(c) Explain sum of products method.
(d) Draw the three variable Karnaugh map.
(e) Explain SR flip-flop.
(f) Mention the disadvantages with master slave flip-flop.
(g) What is an EPROM?
(h) What are the differences between SRAM to DRAM?
(i) What is state diagram?
(j) What is DRAM?

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) What is an ASCII code? With an ASCII keyboard, each keystroke produces the ASCII equivalent of the
designated character. Suppose that you type PRINT X. What is the output of an ASCII keyboard?
(b) Convert the following:
3CH and DDH into binary code.
OR
3 (a) What is the gray code for decimal 8? Convert gray number 1110 to its BCD equivalent.
(b) Design the binary to gray code and gray code to binary converter.
UNIT – II
4 Explain how to convert the complementary NAND-NAND circuit into its dual NOR-NOR circuit.
OR
5 Design a circuit of 5 input variable that generate output 1 if and only if the number of 1’s in the input is
prime (i.e., 2, 3 or 5).
UNIT – III
6 Design the modulo 6 counter.
OR
7 Name the types of shift registers. Explain any one of them in detail.
UNIT – IV
8 How can binary information be recorded on magnetic film? Explain with neat diagrams.
OR
9 Explain in detail about matrix addressing and addressing decoding.
UNIT – V
10 How is a combinational generated in FPGA?
OR
11 The T flip-flop has a single input T and single output Q. T = 0, output does not change. For T = 1, output
complements and remain at that value as long as T = 1. Draw its: (i) State diagram. (ii) Primitive flow
table.

*****
Code: 15A04510 R15
B.Tech III Year I Semester (R15) Regular Examinations November/December 2017
DIGITAL CIRCUITS & SYSTEMS
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Convert (2468)10 to ( )16.
(b) Define prime implicant and essential prime implicants of a Boolean expression.
(c) List the applications of multiplexers.
(d) Design 2x4 decoder using NAND gates.
(e) Write the difference between counter and register.
(f) Draw and explain active low S-R latch.
(g) What is a PLD? What is the principal advantage of a PLD?
(h) Write the demerits of PROM.
(i) Define sequential circuits and active clock edge.
(j) Explain the use of algorithmic state machine.

PART – B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT – I
2 (a) What is the difference between canonical form and standard form? Explain.
(b) Perform the subtraction using 1’s complement and 2’s complement methods.
(i) 11010 – 10000. (ii) 11010 – 1101.
OR
3 Find the complement of the following Boolean functions and reduce them to minimum number of literals.
(i) .
(ii) .

UNIT – II
4 (a) Reduce the following function using k-map technique.
.
(b) Minimize the expression using k-map.

OR
5 Simply the following using tabulation method.

UNIT – III
6 (a) Design a type-D counter that goes through states 0, 2, 4, 6, 0………. The undesired states must always
go to a 0 on the next clock pulse.
(b) Draw the schematic circuit of an edge-triggered JK flip flop using NAND gates and deduce its truth table.
OR
7 (a) Design and draw a full adder which will use two half adders.
(b) What are the different types of registers? Explain the serial input parallel output shift register.
Contd. in page 2

Page 1 of 2
Code: 15A04510 R15

UNIT – IV
8 (a) Design a PAL for the following logical functions.

(b) Discuss how PROM, EPROM and EEPROM technologies differ from each other.
OR
9 (a) Implement the following multiple output functions using PROM.

(b) Implement using PLA and explain its procedure.


UNIT – V
10 Explain in detail the mealy state diagram with one example.
OR
11 (a) Draw a state diagram of a sequence detector which can detect 110.
(b) Explain the state machine capabilities and limitations in detail.

*****

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