Lenovo Yoga 3

A B C D E
1 1
Compal Confidential
2 YOGA 730 13.3" 2
UMA M/B Schematics Document

Intel KabyLake R Processor with DDR4 Memory Down
Only UMA Design
Vinafix.com 2017-12-05
3
LA-F571P 3
REV:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

2017/10/16 2020/5/17 Title
Issued Date Deciphered Date Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-F571P
Date: Tuesday, December 05, 2017 Sheet 1 of 45
A B C D E
5 4 3 2 1
Compal Confidential
Pluto 3A (13")
Kabylake-R
D D
Panel FHD/UHD eDP x1 DDR4 2400MHz DDR4-on board RAM

IPS 4 Lanes (8 DRAM Devices per channel) 16G
JTYPEC2
USB2.0 x1
USB2.0 x1
Type-C SBU Mux FingerPrint
Conn TS3D10224
DDI1
USB2.0 x1
Camera 1.0M HD
Port B
Type-C PD Intel DDI2 Intel KBL-R 15W
C TI TPS65988 Alpine Ridge 1356pin BGA USB3.0 x1 C
JTYPEC1 AR-DP PCIE x4 USB 3.0 conn x1
Type-C USB2.0 x1 USB Charger
Conn SBU Mux TPS2546
TS3D10224
USB2.0 x1
I2C
Port A Touch Panel
PCIE x1
NGFF (TYPE E)
2230 Conn. USB2.0 x1
WLAN/BT4.0 +3VS
Combo Jack
HDA Audio Codec
NGFF (TYPE M) Int. Speaker
PCIE x 4 Realtek ALC3240 +5VS
Vinafix.com M.2 PCIE SSD(Gen3) +3VS
+3VS
B
Int. Array Mic *2 B
SPI ROM SPI

W25Q64FVSSIQ
8MB +3V_PCH
I2C
Sensor Board
ALS
AL3010
I2C G Sensor x1
Power, Novo Button Touch Pad CONN.
LPC BUS BMA250E
MIC Board
Power Circuit G Sensor x1
Hall Sensor x1 BMA250E
ENE TCS20DLR
MIC FPC Int. KBD KB9022
A
Panel side MIC x2 , Hall sensor x1, ALS x1 +3VLP
Hall Sensor x1 A
+3VALW
TCS20DLR

Issued Date 2017/10/16 Deciphered Date 2020/5/17 Title
BLOCK DIAGRAM
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LA-F571P
Wednesday, November 29, 2017
Sheet 2 of 45
5 4 3 2 1
1 2 3 4 5
ZZZ1 @ ZZZ3 @
BOM Structure Table
Voltage Rails Item BOM Structure
EMI part EMI@ BARCODE_8X8 BARCODE_12X4
EMI unpop @EMI@

+5VS ESD part ESD@ ZZZ2 @ ZZZ4 @
+3VS ESD unpop @ESD@
power
plane +1.0VS_VCCOPC RF part RF@
A A
+VCCCORE RF unpop @RF@
+5VALW BARCODE_20X4 BARCODE_10X10
+1.2V +VCCGT Connector ME@
+2.5V
B+ +3VALW +1.0V_VCCST Test Point TP@
+1.0VS_VCCIO Thunderbolt TBT@
+1.8VALW
+1.8VS Non Keyboard backlight NOKBL@
State +1.0VALW +0.6VS Keyboard backlight KBL@ DDR4 Onboard RAM
For Intel DCI debug DCI@
For thermal sensor EX_THM@ ZZZ @ ZZZ @
For 4G, 8G DARM SDP@
For 16G DARM DDP@
For 12G DARM DDP_SDP@ 4G DDR4-Samsung 4G DDR4-Micron 4G
For DARM X76 X76RAM@ X7676238L10 X7676238L11
S0 O O O O For SSD DET SSD_DET@
ZZZ @ ZZZ @ ZZZ @
S3
O O O X 8G DDR4-Samsung 8G DDR4-Hynix 8G DDR4-Micron 8G
S5 S4/AC X7676238L01 X7676238L02 X7676238L03
O O X X
B B
S5 S4/ Battery only
O X X X
S5 S4/AC & Battery
X X X X
12G
don't exist
ZZZ @ ZZZ @ ZZZ @
16G DDR4-Samsung 16G DDR4-Hynix 16G DDR4-Micron 16G

X7676238L04 X7676238L05 X7676238L06
EC SM Bus1 address EC SM Bus2 address
Device Address Device Address
Smart Battery 0001 011x 16h GPU 1001 111x 9Eh
ZZZ ZZZ @
PCH SM Bus address Vinafix.com DA8001D1010 X4EA9Z38L01

PCB 279 LA-F571P REV0 M/B
Device Address
Touch Pad
C C
USB 2.0 Port Table USB 3.0 Port Table PCIE Port Table
SMBUS Control Table Port Port Port Lane
1 1 1 1
SOURCE PD BATT CHARGER TP PCH 2 USB2/3 (Charger) 2 USB2/3 2 2
Thunderbolt
3 USB2 (Type-C) (JTYPEC1) 3 USB3 (Type-C) (JTYPEC1) 3 3
EC_SMB_CK1
EC_SMB_DA1
NPCE388 V V V X X 4 USB2 (Type-C) (JTYPEC2) 4 USB3 (Type-C) (JTYPEC1) 4 4
+3VALW +3VALW +3VALW +19V_VIN
5 Camera 5 5 1
EC_SMB_CK2
EC_SMB_DA2
NPCE388 X X X X V
+3VS
6 Finger print 6 6 1 NGFF WLAN+BT
+3VS 7 7 1
NGFF WLAN+BT
PCH_SMB_CLK
PCH_SMB_DATA
PCH X X X +3VS
V X 8 8 2
+3VS
9 3
10 2
SSD
11 1
12 0
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
D Full ON HIGH HIGH HIGH HIGH ON ON ON ON D
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF

S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF Issued Date 2017/10/16 Deciphered Date 2020/5/17 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Notes List
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
Date:
LA-F571P
Wednesday, November 29, 2017 Sheet 3 of 45
1 2 3 4 5
5 4 3 2 1
CIZY3 -PowerMap_KBL-U42_DDR4_Volume_NON CS]
B+
D D
C C
B
Vinafix.com B
A A

Power MAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
Date : Wednesday, November 29, 2017 Sheet 4 of 45
5 4 3 2 1
5 4 3 2 1
[CIZY3-PWR Sequence_KBL-U42_DDR4_Volume_NON CS]
G3->S0 S0->S3/DS3 S0/ DS3 ->S0 S0->S5

+3VL_RTC +3VL_RTC
tPCH01_Min : 9 ms
SOC_RTCRST# SOC_RTCRST#
B+ B+
D D
+3VLP/+5VLP +3VLP/+5VLP
EC_ON EC_ON
tPCH04_Min : 9 ms
+5VALW/+3VALW/+3VALW_DSW +5VALW/+3VALW/+3VALW_DSW
Pull-up to DSW well if not implemented.
PM_BATLOW# PM_BATLOW#
PCH_PWR_EN (SLP_SUS#) PCH_PWR_EN (SLP_SUS#)
+3V_PRIM +3V_PRIM
+1.8V_PRIM +1.8V_PRIM
EXT_PWR_GATE# If EXT_PWR_GATE# Toffmin is too small, Pwr EXT_PWR_GATE#

gate may choose to completely ignore it
+1.0V_MPHYPLL +1.0V_MPHYPLL
+1.0V_PRIM_CORE +1.0V_PRIM_CORE
tPCH34_Max : 20 ms
+1.0V_PRIM tPCH06_Min : 200 us +1.0V_PRIM
SUSACK# SUSACK#
tPCH02_Min : 10 ms
PCH_DPWROK PCH_DPWROK
tPCH03_Min : 10 ms
EC_RSMRST# EC_RSMRST#
tPLT02_Min : 0 ms Max : 90 ms
C C
AC_PRESENT AC_PRESENT
ON/OFF ON/OFF
tPCH43_Min : 95 ms
PBTN_OUT# PBTN_OUT#
Minimum duration of PWRBTN# assertion = 16mS. PWRBTN# can assert before or after RSMRST#
PM_SLP_S5# PM_SLP_S5#
tPCH18_Min : 90 us
ESPI_RST# ESPI_RST#
SYSON SYSON
+1.0V_VCCST/+1.0V_VCCSFR +1.0V_VCCST/+1.0V_VCCSFR
+1.2V_VDDQ/+1.2V_VCCSFR_OC +1.2V_VDDQ/+1.2V_VCCSFR_OC
SUSP# SUSP#
Vinafix.com tCPU04 Min : 100 ns

+1.0VS_VCCSTG +1.0VS_VCCSTG
tCPU10 Min : 1 ms
B
+1.0VS_VCCIO +1.0VS_VCCIO B
T <=10msec
+5VS/+3VS/+1.5VS/+1.05VS
+5VS/+3VS/+1.5VS/+1.05VS
T = 10msec
EC_VCCST_PG EC_VCCST_PG
VR_ON VR_ON
tCPU19 Max : 100 ns
DDR_VTT_PG_CTRL DDR_VTT_PG_CTRL
tCPU18 Max : 35 us
+0.6VS +0.6VS
tCPU09 Min : 1 ms
+VCC_SA +VCC_SA
+VCC_CORE +VCC_CORE
+VCC_GT +VCC_GT
VR_PWRGD VR_PWRGD
tCPU16 Min : 0 ns
PCH_PWROK PCH_PWROK
H_CPUPWRGD H_CPUPWRGD
SYS_PWROK SYS_PWROK
A A
SUS_STAT# SUS_STAT#
SOC_PLTRST#
SOC_PLTRST#

2017/10/16 2020/5/17 Title
Issued Date Deciphered Date
Power Sequence
Date: Wednesday, November 29, 2017 Sheet 5 of 45
5 4 3 2 1
A B C D E
1 1
UC1A @ SKL-U
Rev_1.0
E55 C47
[21] CPU_DP1_N0 DDI1_TXN[0] EDP_TXN[0] EDP_TXN0 [26]
F55 C46
[21] CPU_DP1_P0 DDI1_TXP[0] EDP_TXP[0] EDP_TXP0 [26]
E58 D46
F58 C45
F53 A45
G53 B45
[21] CPU_DP1_P2
F56 DDI1_TXP[2] EDP_TXP[2] A47 EDP_TXP2 [26] eDP
G56 B47
AR-DP C50 E45 EDP_AUXN [26]
[21] CPU_DP2_N0 DDI2_TXN[0] DDI EDP_AUXN
D50 EDP F45
[21] CPU_DP2_P0 DDI2_TXP[0] EDP_AUXP EDP_AUXP [26]
C52
[21] CPU_DP2_N1 DDI2_TXN[1]
D52 B52
[21] CPU_DP2_P1 DDI2_TXP[1] EDP_DISP_UTIL
A50
[21] CPU_DP2_N2 DDI2_TXN[2]
B50 G50 DDI1_AUX_DN [21]
[21] CPU_DP2_P2 DDI2_TXP[2] DDI1_AUXN
D51 F50
[21] CPU_DP2_N3 DDI2_TXN[3] DDI1_AUXP DDI1_AUX_DP [21]
C51 E48
[21] CPU_DP2_P3 DDI2_TXP[3] DDI2_AUXN F48
DDI2_AUX_DN [21] AR-DP
DDI2_AUXP DDI2_AUX_DP [21]
G46
DISPLAY SIDEBANDS RSVD F46
L13 RSVD
CPU_DDPB_CTRL_DATA L12 GPP_E18/DDPB_CTRLCLK L9
GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 CPU_DP1_HPD [21]
L7 CPU_DP2_HPD [21] From AR-DP
N7 GPP_E14/DDPC_HPD1 L6
CPU_DDPC_CTRL_DATA N8 GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 N9
GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 EC_SCI# [10,33]
L10
N11 GPP_E17/EDP_HPD EDP_HPD [26] From eDP
N12 GPP_E22 R12
2 [26] TS_I2C_RST# GPP_E23 EDP_BKLTEN ENBKL [26,33] 2
R11
EDP_COMP EDP_BKLTCTL INVPWM [26]
E52 1 OF 20 U13
EDP_RCOMP EDP_VDDEN PCH_ENVDD [26]
SKL-U_BGA1356
+3VS
+1.0VS_VCCIO
RT93602 TBT@ 1 2.2K_0201_5% CPU_DDPB_CTRL_DATA
< PU/PD for CMC Debug >
1
RT93612 TBT@ 1 2.2K_0201_5% CPU_DDPC_CTRL_DATA +1.0VS_VCCIO

If routed MS, PECI requires 18 mils spacing to other signals
RC4 UC1D @ SKL-U
1K_0402_5% Rev_1.0
CATERR# D63 SOC_XDP_TMS RC11 1 @ 2 51_0402_5%
H_PECI A54 CATERR#
[33] H_PECI PECI
2
1 2 H_PROCHOT#_R C65 SOC_XDP_TDI RC12 1 @ 2 51_0402_5%

[33] H_PROCHOT# H_THERMTRIP# PROCHOT# JTAG
RC6 499_0402_1% C63
T33 TP@ A65 THERMTRIP# SOC_XDP_TDO RC13 1 DCI@ 2 51_0402_5%
SKTOCC# B61 CPU_XDP_TCK0
CPU MISC PROC_TCK
C55 D60 SOC_XDP_TDI
BPM#[0] PROC_TDI SOC_XDP_TDO
< Compensation PU For eDP > D55
B54 BPM#[1] PROC_TDO
A61
C60 SOC_XDP_TMS CPU_XDP_TCK0 RC14 1 DCI@ 2 51_0402_5%
C56 BPM#[2] PROC_TMS B59 SOC_XDP_TRST#
+1.0VS_VCCIO BPM#[3] PROC_TRST#
Vinafix.com A6 B56
A7 GPP_E3/CPU_GP0 PCH_JTAG_TCK D59 SOC_XDP_TDI
RC3 1 2 EDP_COMP BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDI A56 SOC_XDP_TDO
24.9_0402_1% AY5 GPP_B3/CPU_GP2 PCH_JTAG_TDO C59 SOC_XDP_TMS
[21] TBT_FORCE_PWR GPP_B4/CPU_GP3 PCH_JTAG_TMS SOC_XDP_TRST#
C61
3 RC7 2 1 49.9_0402_1% CPU_POPIRCOMP AT16 PCH_TRST# A59 CPU_XDP_TCK0 3
Trace width=20 mils, Spacing=25mil, Max length=600mils PROC_POPIRCOMP JTAGX
RC8 2 1 49.9_0402_1% PCH_OPIRCOMP AU16
RC9 2 @ 1 49.9_0402_1% EDRAM_OPIO_RCOMP H66 PCH_OPIRCOMP
RC10 2 @ 1 49.9_0402_1% EOPIO_RCOMP H65 OPCE_RCOMP
OPC_RCOMP
+1.0V_VCCST 4 OF 20
SKL-U_BGA1356
1 2 H_THERMTRIP#
RC5 1K_0402_5%
@
2 1 CATERR#
RC19 49.9_0402_1%
UC1
SA0000AWB50
Intel i5-8250U
i5@
UC1
SA0000AWC50
Intel i7-8550U
i7@
4 4

SKL-U(1/12)DDI,EDP,MISC,CMC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
LA-F571P
A B C D E
5 4 3 2 1
Non- Interleaved Memory
D D
SKL-U
UC1B SKL-U UC1C
Rev_1.0 Rev_1.0
[18] DDR_A_D[0..15] DDR_A_D0 DDR_A_CLK#0
AL71 AU53 DDR_A_CLK#0 [18]
DDR_A_D1 DDR0_DQ[0] DDR0_CKN[0] DDR_A_CLK0 [18] DDR_A_D[16..31] DDR_A_D16 Interleave / Non-Interleaved DDR_B_CLK#0
AL68 AT53 DDR_A_CLK0 [18] AF65 AN45 DDR_B_CLK#0 [19]
DDR_A_D2 AN68 DDR0_DQ[1] DDR0_CKP[0] AU55 DDR_A_CLK#1 DDR_A_D17 AF64 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] AN46 DDR_B_CLK#1
DDR_A_D3 DDR0_DQ[2] DDR0_CKN[1] DDR_A_CLK1 TP@ T186 DDR_A_D18 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] DDR_B_CLK0 TP@ T26
AN69 AT55 TP@ T189 AK65 AP45 DDR_B_CLK0 [19]
DDR_A_D4 AL70 DDR0_DQ[3] DDR0_CKP[1] DDR_A_D19 AK64 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] AP46 DDR_B_CLK1
DDR_A_D5 DDR0_DQ[4] DDR_A_CKE0 DDR_A_D20 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] TP@ T24
AL69 BA56 DDR_A_CKE0 [18]
AF66
DDR_A_D6 AN70 DDR0_DQ[5] DDR0_CKE[0] BB56 DDR_A_CKE1 DDR_A_D21 AF67 DDR1_DQ[4]/DDR0_DQ[20] AN56 DDR_B_CKE0
DDR_A_D7 DDR0_DQ[6] DDR0_CKE[1] TP@ T190 DDR_A_D22 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] DDR_B_CKE1 DDR_B_CKE0 [19]
AN71 AW56 AK67 AP55 TP@ T27
DDR_A_D8 AR70 DDR0_DQ[7] DDR0_CKE[2] AY56 DDR_A_D23 AK66 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] AN55
DDR_A_D9 AR68 DDR0_DQ[8] DDR0_CKE[3] DDR_A_D24 AF70 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] AP53
DDR_A_D10 AU71 DDR0_DQ[9] AU45 DDR_A_CS#0 DDR_A_D25 AF68 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3]
DDR_A_D11 DDR0_DQ[10] DDR0_CS#[0] DDR_A_CS#1 DDR_A_CS#0 [18] DDR_A_D26 DDR1_DQ[9]/DDR0_DQ[25] DDR_B_CS#0
AU68 AU43 TP@ T187 AH71 BB42 DDR_B_CS#0 [19]
DDR_A_D12 AR71 DDR0_DQ[11] DDR0_CS#[1] AT45 DDR_A_ODT0 DDR_A_D27 AH68 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] AY42 DDR_B_CS#1
DDR_A_D13 DDR0_DQ[12] DDR0_ODT[0] DDR_A_ODT1 DDR_A_ODT0 [18] DDR_A_D28 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] DDR_B_ODT0 TP@ T28
AR69 AT43 TP@ T188 AF71 BA42 DDR_B_ODT0 [19]
DDR_A_D14 AU70 DDR0_DQ[13] DDR0_ODT[1] DDR_A_D29 AF69 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] AW42 DDR_B_ODT1
DDR_A_D15 DDR0_DQ[14] DDR_A_D30 DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1] TP@ T29
AU69 AH70
DDR0_DQ[15] DDR3L / LPDDR3 / DDR4
BA51 DDR_A_MA5 DDR_A_D31 AH69 DDR1_DQ[14]/DDR0_DQ[30]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR_A_MA9 DDR_A_MA5 [18] [18] DDR_A_D[48..63] DDR_A_D48 DDR1_DQ[15]/DDR0_DQ[31] DDR3L / LPDDR3 / DDR4 DDR_B_MA5
BB54 DDR_A_MA9 [18]
AT66 AY48 DDR_B_MA5 [19]
[18] DDR_A_D[32..47] DDR_A_D32 Interleave / Non-Interleaved DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR_A_MA6 DDR_A_D49 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR_B_MA9
BB65 BA52 DDR_A_MA6 [18] AU66 AP50 DDR_B_MA9 [19]
DDR_A_D33 AW65 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AY52 DDR_A_MA8 DDR_A_D50 AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BA48 DDR_B_MA6
DDR_A_D34 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR_A_MA7 DDR_A_MA8 [18] DDR_A_D51 DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR_B_MA8 DDR_B_MA6 [19]
AW63 AW52 DDR_A_MA7 [18]
AN65 BB48 DDR_B_MA8 [19]
DDR_A_D35 AY63 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AY55 DDR_A_BG0 DDR_A_D52 AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AP48 DDR_B_MA7
DDR_A_D36 DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR_A_MA12 DDR_A_BG0 [18] DDR_A_D53 DDR1_DQ[20]/DDR0_DQ[52] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR_B_BG0 DDR_B_MA7 [19]
BA65 AW54 DDR_A_MA12 [18]
AP66 AP52 DDR_B_BG0 [19]
DDR_A_D37 AY65 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] BA54 DDR_A_MA11 DDR_A_D54 AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] AN50 DDR_B_MA12
DDR_A_D38 DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] M_A_ACT# DDR_A_MA11 [18] DDR_A_D55 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR_B_MA11 DDR_B_MA12 [19]
BA63 BA55 M_A_ACT# [18] AU65 AN48 DDR_B_MA11 [19]
DDR_A_D39 BB63 DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# AY54 DDR_A_BG1 DDR_A_D56 AT61 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AN53 M_B_ACT#
DDR_A_D40 DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR_A_MA13 DDR_A_BG1 [18] DDR_A_D57 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR_B_BG1 M_B_ACT# [19]
BA61 AU46 DDR_A_MA13 [18] AU61 AN52 DDR_B_BG1 [19]
C DDR_A_D41 AW61 DDR0_DQ[24]/DDR0_DQ[40] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU48 DDR_A_MA15 DDR_A_D58 AP60 DDR1_DQ[25]/DDR0_DQ[57] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] BA43 DDR_B_MA13 C
DDR_A_D42 DDR0_DQ[25]/DDR0_DQ[41] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR_A_MA14 DDR_A_MA15 [18] DDR_A_D59 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR_B_MA15 DDR_B_MA13 [19]
BB59 AT46 DDR_A_MA14 [18] AN60 AY43 DDR_B_MA15 [19]
DDR_A_D43 AW59 DDR0_DQ[26]/DDR0_DQ[42] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AU50 DDR_A_MA16 DDR_A_D60 AN61 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] AY44 DDR_B_MA14
DDR_A_D44 DDR0_DQ[27]/DDR0_DQ[43] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR_A_BA0 DDR_A_MA16 [18] DDR_A_D61 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR_B_MA16 DDR_B_MA14 [19]
BB61 AU52 DDR_A_BA0 [18]
AP61 AW44 DDR_B_MA16 [19]
DDR_A_D45 AY61 DDR0_DQ[28]/DDR0_DQ[44] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] AY51 DDR_A_MA2 DDR_A_D62 AT60 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] BB44 DDR_B_BA0
DDR_A_D46 DDR0_DQ[29]/DDR0_DQ[45] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR_A_BA1 DDR_A_MA2 [18] DDR_A_D63 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR_B_MA2 DDR_B_BA0 [19]
BA59 AT48 DDR_A_BA1 [18]
AU60 AY47 DDR_B_MA2 [19]
DDR_A_D47 DDR0_DQ[30]/DDR0_DQ[46] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR_A_MA10 [19] DDR_B_D[16..31] DDR_B_D16 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR_B_BA1
AY59 AT50 DDR_A_MA10 [18] AU40 BA44 DDR_B_BA1 [19]
[19] DDR_B_D[0..15] DDR_B_D0 DDR0_DQ[31]/DDR0_DQ[47] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR_A_MA1 DDR_B_D17 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR_B_MA10
AY39 BB50 DDR_A_MA1 [18] AT40 AW46 DDR_B_MA10 [19]
DDR_B_D1 AW39 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] AY50 DDR_A_MA0 DDR_B_D18 AT37 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AY46 DDR_B_MA1
DDR_B_D2 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR_A_MA0 [18] DDR_B_D19 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR_B_MA0 DDR_B_MA1 [19]
AY37 AU37 BA46 DDR_B_MA0 [19]
DDR_B_D3 AW37 DDR0_DQ[34]/DDR1_DQ[2] BA50 DDR_A_MA3 DDR_B_D20 AR40 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR_B_D4 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] DDR_A_MA4 DDR_A_MA3 [18] DDR_B_D21 DDR1_DQ[36]/DDR1_DQ[20] DDR_B_MA3
BB39 BB52 DDR_A_MA4 [18] AP40 BB46 DDR_B_MA3 [19]
DDR_B_D5 BA39 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] AM70 DDR_A_DQS#0 DDR_B_D22 AP37 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[3] BA47 DDR_B_MA4
DDR_B_D6 DDR0_DQ[37]/DDR1_DQ[5] DDR0_DQSN[0] DDR_A_DQS0 DDR_A_DQS#0 [18] DDR_B_D23 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[4] DDR_B_MA4 [19]
BA37 AM69 DDR_A_DQS0 [18]
AR37
DDR_B_D7 BB37 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSP[0] AT69 DDR_A_DQS#1 DDR_B_D24 AT33 DDR1_DQ[39]/DDR1_DQ[23]
DDR_B_D8 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSN[1] DDR_A_DQS1 DDR_A_DQS#1 [18] DDR_B_D25 DDR1_DQ[40]/DDR1_DQ[24] Interleave / Non-Interleaved DDR_A_DQS#2
AY35 AT70 DDR_A_DQS1 [18]
AU33 AH66 DDR_A_DQS#2 [18]
DDR_B_D9 AW35 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSP[1] DDR_B_D26 AU30 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[0]/DDR0_DQSN[2] AH65 DDR_A_DQS2
DDR_B_D10 DDR0_DQ[41]/DDR1_DQ[9] DDR_B_D27 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[0]/DDR0_DQSP[2] DDR_A_DQS#3 DDR_A_DQS2 [18]
AY33 AT30 AG69 DDR_A_DQS#3 [18]
DDR_B_D11 DDR0_DQ[42]/DDR1_DQ[10] Interleave / Non-Interleaved DDR_A_DQS#4 DDR_B_D28 DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[1]/DDR0_DQSN[3] DDR_A_DQS3
AW33 BA64 DDR_A_DQS#4 [18]
AR33 AG70 DDR_A_DQS3 [18]
DDR_B_D12 BB35 DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSN[2]/DDR0_DQSN[4] AY64 DDR_A_DQS4 DDR_B_D29 AP33 DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[1]/DDR0_DQSP[3] AR66 DDR_A_DQS#6
DDR_B_D13 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSP[2]/DDR0_DQSP[4] DDR_A_DQS#5 DDR_A_DQS4 [18] DDR_B_D30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[2]/DDR0_DQSN[6] DDR_A_DQS6 DDR_A_DQS#6 [18]
BA35 AY60 DDR_A_DQS#5 [18]
AR30 AR65 DDR_A_DQS6 [18]
DDR_B_D14 BA33 DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSN[3]/DDR0_DQSN[5] BA60 DDR_A_DQS5 DDR_B_D31 AP30 DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[2]/DDR0_DQSP[6] AR61 DDR_A_DQS#7
DDR_B_D15 DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQSP[3]/DDR0_DQSP[5] DDR_B_DQS#0 DDR_A_DQS5 [18] DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[3]/DDR0_DQSN[7] DDR_A_DQS7 DDR_A_DQS#7 [18]
BB33 BA38 DDR_B_DQS#0 [19] AR60 DDR_A_DQS7 [18]
[19] DDR_B_D[32..47] DDR_B_D32 DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSN[4]/DDR1_DQSN[0] DDR_B_DQS0 [19] DDR_B_D[48..63] DDR_B_D48 DDR1_DQSP[3]/DDR0_DQSP[7] DDR_B_DQS#2
AY31 AY38 DDR_B_DQS0 [19]
AU27 AT38 DDR_B_DQS#2 [19]
DDR_B_D33 AW31 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSP[4]/DDR1_DQSP[0] AY34 DDR_B_DQS#1 DDR_B_D49 AT27 DDR1_DQ[48] DDR1_DQSN[4]/DDR1_DQSN[2] AR38 DDR_B_DQS2
DDR_B_D34 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSN[5]/DDR1_DQSN[1] DDR_B_DQS1 DDR_B_DQS#1 [19] DDR_B_D50 DDR1_DQ[49] DDR1_DQSP[4]/DDR1_DQSP[2] DDR_B_DQS#3 DDR_B_DQS2 [19]
AY29 BA34 AT25 AT32
DDR_B_D35 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSP[5]/DDR1_DQSP[1] DDR_B_DQS#4 DDR_B_DQS1 [19] DDR_B_D51 DDR1_DQ[50] DDR1_DQSN[5]/DDR1_DQSN[3] DDR_B_DQS3 DDR_B_DQS#3 [19]
AW29 BA30 DDR_B_DQS#4 [19] AU25 AR32 DDR_B_DQS3 [19]
DDR_B_D36 BB31 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSN[6]/DDR1_DQSN[4] AY30 DDR_B_DQS4 DDR_B_D52 AP27 DDR1_DQ[51] DDR1_DQSP[5]/DDR1_DQSP[3]
DDR_B_D37 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSP[6]/DDR1_DQSP[4] DDR_B_DQS#5 DDR_B_DQS4 [19] DDR_B_D53 DDR1_DQ[52] DDR_B_DQS#6
BA31 AY26 AN27 AR25
DDR_B_D38 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[7]/DDR1_DQSN[5] DDR_B_DQS5 DDR_B_DQS#5 [19] DDR_B_D54 DDR1_DQ[53] DDR1_DQSN[6] DDR_B_DQS6 DDR_B_DQS#6 [19]
BA29 BA26 DDR_B_DQS5 [19] AN25 AR27 DDR_B_DQS6 [19]
DDR_B_D39 BB29 DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSP[7]/DDR1_DQSP[5] DDR_B_D55 AP25 DDR1_DQ[54] DDR1_DQSP[6] AR22 DDR_B_DQS#7
DDR_B_D40 DDR0_DQ[55]/DDR1_DQ[39] DDR_A_ALERT# DDR_B_D56 DDR1_DQ[55] DDR1_DQSN[7] DDR_B_DQS7 DDR_B_DQS#7 [19]
AY27 AW50 AT22 AR21 DDR_B_DQS7 [19]
DDR_B_D41 DDR0_DQ[56]/DDR1_DQ[40] DDR0_ALERT# DDR_A_PARITY DDR_A_ALERT# [18] DDR_B_D57 DDR1_DQ[56] DDR1_DQSP[7] DDR_B_ALERT#
AW27 AT52 DDR_A_PARITY [18] AU22 AN43
DDR_B_D42 DDR0_DQ[57]/DDR1_DQ[41] DDR0_PAR DDR_B_D58 DDR1_DQ[57] DDR1_ALERT# DDR_B_PARITY DDR_B_ALERT# [19]
AY25 AU21 AP43
DDR_B_D43 DDR0_DQ[58]/DDR1_DQ[42] +0.6V_A_VREFDQ DDR_B_D59 DDR1_DQ[58] DDR1_PAR DDR_B_PARITY [19]
AW25 DDR CH - A AY67 +0.6V_A_VREFDQ [18] AT21 AT13 MEMRST# MEMRST# [18,19]
DDR_B_D44 BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR_VREF_CA AY68 DDR_B_D60 AN22 DDR1_DQ[59] DRAM_RESET# AR18
B
DDR_B_D45 DDR0_DQ[60]/DDR1_DQ[44] DDR0_VREF_DQ +0.6V_B_VREFDQ
Trace width/Spacing >= 20mils DDR_B_D61 DDR1_DQ[60]
DDR CH - B
DDR_RCOMP[0]
B
BA27 BA67 +0.6V_B_VREFDQ [19] AP22 AT18
DDR_B_D46 BA25 DDR0_DQ[61]/DDR1_DQ[45] DDR1_VREF_DQ DDR_B_D62 AP21 DDR1_DQ[61] DDR_RCOMP[1] AU18 SM_RCOMP0 RC16 1 SDP@ 2 200_0402_1%
DDR_B_D47 BB25 DDR0_DQ[62]/DDR1_DQ[46] 2 OF 20 AW67 DDR_PG_CTRL DDR_B_D63 AN21 DDR1_DQ[62] 3 OF 20 DDR_RCOMP[2] SM_RCOMP1 RC17 1 2 80.6_0402_1%
DDR0_DQ[63]/DDR1_DQ[47] DDR_VTT_CNTL DDR1_DQ[63] SM_RCOMP2 RC18 1 2 100_0402_1%
SKL-U_BGA1356 SKL-U_BGA1356
#543016 PDG1.5 P.168
@ @ W=12-15 Space= 20/25 L=500mil
+1.2V +3VS
< For ODT & VTT Power Control > +1.2V
Vinafix.com
DDR_VTT_CNTL to DDR
VTT supplied ramped
follow CRB DDP@ DDP_SDP@
1
<35uS RC16 RC16
1
1
100K_0402_5%
RC132
(tCPU18) CC1 SD034121090 SD034121090

RC20
0.1U_0201_10V6K 121_0402_1% 121_0402_1%
470_0402_5%
@
UC2 2
2
1 5
2
NC VCC
DDR_PG_CTRL 2
3
A
Y
4
DDR_VTT_PG_CTRL [38]
MEMRST#
Recommend by Intel Max
GND
74AUP1G07GW_TSSOP5
SA00007WE00
A A

SKL-U(2/12)DDR4
Custom
LA-F571P 1.0

5 4 3 2 1
5 4 3 2 1
SML0ALERT# (Internal Pull Down):
eSPI or LPC
0 = LPC is selected for EC ==> Default
1 = eSPI is selected for EC

D UC1E @ SKL-U D
Rev_1.0
SPI - FLASH
SMBUS, SMLINK
SOC_SPI_CLK AV2 R7 PCH_SMB_CLK
SOC_SPI_SO AW3 SPI0_CLK GPP_C0/SMBCLK R8 PCH_SMB_DATA
SOC_SPI_SI AV3 SPI0_MISO GPP_C1/SMBDATA R10
SOC_SPI_IO2 AW2 SPI0_MOSI GPP_C2/SMBALERT#
SPI ROM SOC_SPI_IO3 AU4 SPI0_IO2 R9 SOC_SML0CLK
SOC_SPI_CS#0 AU3 SPI0_IO3 GPP_C3/SML0CLK W2 SOC_SML0DATA
AU2 SPI0_CS0# GPP_C4/SML0DATA W1
AU1 SPI0_CS1# GPP_C5/SML0ALERT#
SPI0_CS2# W3 EC_SMB_CK2
GPP_C6/SML1CLK V3 EC_SMB_DA2 EC_SMB_CK2 [29,33] SML1
GPP_C7/SML1DATA EC_SMB_DA2 [29,33]
SPI - TOUCH AM7 SOC_SML1ALERT# (Link to EC,Thermal IC)
M2 GPP_B23/SML1ALERT#/PCHHOT#
M3 GPP_D1/SPI1_CLK
J4 GPP_D2/SPI1_MISO
V1 GPP_D3/SPI1_MOSI
RC56 V2 GPP_D21/SPI1_IO2 AY13 LPC_AD0
GPP_D22/SPI1_IO3 GPP_A1/LAD0/ESPI_IO0 LPC_AD0 [33]
[21] TBT_CIO_PLUG_EVENT# 1 2 TBT_CIO_PLUG_EVENT#_R1 M1 LPC BA13 LPC_AD1
GPP_D0/SPI1_CS# GPP_A2/LAD1/ESPI_IO1 LPC_AD2 LPC_AD1 [33]
BB13
GPP_A3/LAD2/ESPI_IO2 LPC_AD3 LPC_AD2 [33]
0_0402_5% AY12
C LINK GPP_A4/LAD3/ESPI_IO3 LPC_FRAME# LPC_AD3 [33]
+3VS BA12
GPP_A5/LFRAME#/ESPI_CS# LPC_FRAME# [33]
G3 BA11
G2 CL_CLK GPP_A14/SUS_STAT#/ESPI_RESET#
RC25 1 2 8.2K_0402_5% SERIRQ G1 CL_DATA
CL_RST# AW9 LPC_CLK0 RC26 1 EMI@ 2 22_0402_5%
GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_LPC_EC [33]
AY9
KB_RST# AW13 GPP_A10/CLKOUT_LPC1 AW11 PM_CLKRUN#
C GPP_A0/RCIN# GPP_A8/CLKRUN# PM_CLKRUN# [33] C
1
+3VS
CC125
33P_0402_50V8K
SERIRQ AY11
[33] SERIRQ GPP_A6/SERIRQ 5 OF 20 @RF@
SKL-U_BGA1356 2
RC112 1 2 10K_0402_5% KB_RST#
+3VS
RPC1, RPC3 and RC30 are close to UC3

RPC1
SOC_SPI_SO 1 8 SOC_SPI_SO_0_R EC_SMB_CK2 RC28 1 2 1K_0402_5%
SOC_SPI_CLK 2 7 SOC_SPI_CLK_0_R
SOC_SPI_SI 3 6 SOC_SPI_SI_0_R EC_SMB_DA2 RC29 1 2 1K_0402_5%
SOC_SPI_IO3 4 5 SOC_SPI_IO3_0_R
From SOC 33_0804_8P4R_5% SOC_SML1ALERT# 1 @ 2
EMI@ RC113 150K_0402_5%
SOC_SPI_IO2 1 2 SOC_SPI_IO2_0_R RPC2
RC30 EMI@ 33_0402_5% PCH_SMB_CLK 1 8
PCH_SMB_DATA 2 7
From EC
Vinafix.com
[33] EC_SPI_CLK
[33] EC_SPI_MOSI
[33] EC_SPI_CS0#
[33] EC_SPI_MISO
EC_SPI_CLK
EC_SPI_MOSI
EC_SPI_CS0#
EC_SPI_MISO
1
2
3
4
RPC3
8
7
6
5
SOC_SPI_CLK_0_R
SOC_SPI_SI_0_R
SOC_SPI_CS#0
SOC_SPI_SO_0_R
33_0804_8P4R_5%
EMI@
SOC_SML0CLK
SOC_SML0DATA
PM_CLKRUN#
Follow
RC31
3
4
1
6
5
1K_0804_8P4R_5%
543016_SKL_U_Y_PDG_2_0
8.2K_0402_5%
+3VS
B
< SPI ROM - 8M >

+3VALW
@
UC3 CC2 1 2 0.1U_0201_10V K X5R
SOC_SPI_CS#0 1 8
SOC_SPI_SO_0_R 2 /CS VCC 7 SOC_SPI_IO3_0_R
SOC_SPI_IO2_0_R 3 DO(IO1) /HOLD(IO3) 6 SOC_SPI_CLK_0_R
4 /WP(IO2) CLK 5 SOC_SPI_SI_0_R
GND DI(IO0)
1
W 25Q64JVSSIQ
SA000039A40 CC3
10P_0402_50V8J
2 @EMI@
A A
Security Classification
2017/10/16
Compal Secret Data
2020/5/17 Title
Compal Electronics, Inc.
SKL-U(3/12)SPI,SMB,LPC,ESPI
Custom
LA-F571P 1.0
Date: W ednesday, November 29, 2017 Sheet 8 of 45

5 4 3 2 1
5 4 3 2 1
D D
< HD AUDIO > CC127 @RF@
2 1 33P_0402_50V8K
RPC4
1 8 HDA_BIT_CLK
[27] HDA_BITCLK_AUDIO HDA_SYNC SKL-U
[27] HDA_SYNC_AUDIO 2 7 UC1G @
3 6 HDA_SDOUT Rev_1.0
[27] HDA_SDOUT_AUDIO
4 5 AUDIO
33_0804_8P4R_5% HDA_SYNC BA22

EMI@ HDA_BIT_CLK AY22 HDA_SYNC/I2S0_SFRM
HDA_SDOUT BB22 HDA_BLK/I2S0_SCLK
SDIO / SDXC
BA21 HDA_SDO/I2S0_TXD
[27] HDA_SDIN0 HDA_SDI0/I2S0_RXD
AY21 AB11
AW22 HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD AB13
J5 HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0 AB12
AY20 GPP_D23/I2S_MCLK GPP_G2/SD_DATA1 W12
AW20 I2S1_SFRM GPP_G3/SD_DATA2 W11
I2S1_TXD GPP_G4/SD_DATA3 W10
< To Enable ME Override > AK7 GPP_G5/SD_CD# W8
AK6 GPP_F1/I2S2_SFRM GPP_G6/SD_CLK W7
AK9 GPP_F0/I2S2_SCLK GPP_G7/SD_WP
AK10 GPP_F2/I2S2_TXD BA9
GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 BB9
GPP_A16/SD_1P8_SEL
H5 AB7
RC116 2 1 0_0402_5% HDA_SDOUT D7 GPP_D19/DMIC_CLK0 SD_RCOMP
[33] ME_EN GPP_D20/DMIC_DATA0
D8 AF13
C C8 GPP_D17/DMIC_CLK1 GPP_F23 C
GPP_D18/DMIC_DATA1
HDA_SPKR AW5
[27] HDA_SPKR GPP_B14/SPKR
7 OF 20
SKL-U_BGA1356
UC1I @ SKL-U
Rev_1.0
+3VS CSI-2
A36 C37
RC33 1 @ 2 2.2K_0402_5% HDA_SPKR B36 CSI2_DN0 CSI2_CLKN0 D37
C38 CSI2_DP0 CSI2_CLKP0 C32
D38 CSI2_DN1 CSI2_CLKN1 D32
C36 CSI2_DP1 CSI2_CLKP1 C29
D36 CSI2_DN2 CSI2_CLKN2 D29
A38 CSI2_DP2 CSI2_CLKP2 B26
B
Vinafix.com SPKR (Internal Pull Down):
TOP Swap Override
0 = Disable TOP Swap mode. ==> Default

B38
C31
D31
C33
D33
A31
B31
A33
B33
A29
B29
C28
CSI2_DN3
CSI2_DP3
CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7
CSI2_DN8
CSI2_DP8
EMMC
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
A26
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
B
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1

1 = Enable TOP Swap Mode. A27 CSI2_DP9 GPP_F20/EMMC_DATA7
B27 CSI2_DN10 AM2
C27 CSI2_DP10 GPP_F21/EMMC_RCLK AM3
D27 CSI2_DN11 GPP_F22/EMMC_CLK AP4
CSI2_DP11 GPP_F12/EMMC_CMD
9 OF 20 AT1
EMMC_RCOMP
SKL-U_BGA1356
A A
2017/10/16
Compal Secret Data
2020/5/17 Title
SKL-U(4/12)HDA,EMMC,SDIO,CSI2
Custom
LA-F571P 1.0

5 4 3 2 1
5 4 3 2 1
+3VS
UC1J @ SKL-U
Rev_1.0
CLOCK SIGNALS
D42
RPC6 [21] CLK_PCIE_TBT# CLKOUT_PCIE_N0
AR-DP C42
[21] CLK_PCIE_TBT TBTCLK_REQ# CLKOUT_PCIE_P0
8 1 EC_SCI# [6,33] [21] TBTCLK_REQ#
AR10
7 2 TBTCLK_REQ# GPP_B5/SRCCLKREQ0#
6 3 WLANCLK_REQ# B42
5 4 SSDCLK_REQ# A42 CLKOUT_PCIE_N1 F43
D CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N D
AT7 E43
10K_0804_8P4R_5% GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P
D41 BA17 SUSCLK
[28] CLK_PCIE_WLAN# CLKOUT_PCIE_N2 GPD8/SUSCLK SUSCLK [28]
NGFF WL+BT(KEY E) C41
[28] CLK_PCIE_WLAN WLANCLK_REQ# CLKOUT_PCIE_P2
[28] WLANCLK_REQ#
AT8 E37
GPP_B7/SRCCLKREQ2# XTAL24_IN E35
D40 XTAL24_OUT
C40 CLKOUT_PCIE_N3 E42 XCLK_BIASREF
AT10 CLKOUT_PCIE_P3 XCLK_BIASREF
GPP_B8/SRCCLKREQ3# AM18 SOC_RTCX1
B40 RTCX1 AM20 SOC_RTCX2
[28] CLK_PCIE_SSD# CLKOUT_PCIE_N4 RTCX2
SSD A40
[28] CLK_PCIE_SSD SSDCLK_REQ# CLKOUT_PCIE_P4 SOC_SRTCRST#
AU8 AN18
[28] SSDCLK_REQ# GPP_B9/SRCCLKREQ4# SRTCRST# EC_CLEAR_CMOS#
AM16
E40 RTCRST#
E38 CLKOUT_PCIE_N5
+3VL_RTC AU7 CLKOUT_PCIE_P5
GPP_B10/SRCCLKREQ5#
RC36 1 2 20K_0402_5% SOC_SRTCRST# 10 OF 20
CC6 1 2 1U_0402_6.3V6K SKL-U_BGA1356
+1.0V_CLK5_F24NS
XCLK_BIASREF 1 2
RC37 1 2 20K_0402_5% EC_CLEAR_CMOS# [33] RC35 2.7K_0402_1%
1 @ 2
CC7 1 2 1U_0402_6.3V6K RC110 60.4_0402_1%
CLRP2 1 2 SHORT PADS CLR CMOS < PCH PLTRST Buf f er >
@
RC55 1 2 0_0402_5%
SM_INTRUDER#
RC39 1 2 1M_0402_5% Follow 546765_2014WW48_Skylake_MOW_Rev_1_0
C +3VS C
Stuff 2.7k ohm(RC35) PU for SkyLake-U
Stuff 60.4 ohm(RC110) PD for CannonLake-U
5
+3VALW UC4
SOC_PLTRST# 1 @
P
B 4
Y PCI_RST# [21,28,33]
2
A
1
TC7SH08FUF_SSOP5 SOC_RTCX2
1
RC44
100K_0402_5%
CC8
100P_0402_50V8J
2
ESD@ SOC_RTCX1
RPC7
2
8 1 PCH_PWROK 1 2
7 2 EC_RSMRST# RC41 10M_0402_5%
6 3 SYS_RESET#
5 4
10K_0804_8P4R_5% YC2
1 2
32.768KHZ 9PF 20PPM 9H03280012
UC1K @ SKL-U
ESD@ 1 2 SYS_RESET# Rev_1.0
CC97 100P_0402_50V8J SYSTEM POWER MANAGEMENT
EC_RSMRST# 1 1
ESD@ 1 2 AT11
CC94 100P_0402_50V8J GPP_B12/SLP_S0# AP15 PM_SLP_S3# CC9 CC10
SYS_PWROK SOC_PLTRST# GPD4/SLP_S3# PM_SLP_S4# PM_SLP_S3# [33] 6.8P_0402_50V8C 6.8P_0402_50V8C
ESD@ 1 2
Vinafix.com AN10 BA16
SYS_RESET# GPP_B13/PLTRST# GPD5/SLP_S4# PM_SLP_S5# PM_SLP_S4# [33,36,38] 2 2
CC95 100P_0402_50V8J B5 AY16 TP@T131
EC_RSMRST# AY17 SYS_RESET# GPD10/SLP_S5#
[33] EC_RSMRST# RSMRST# AN15
T31 TP@ A68 SLP_SUS# AW15
B EC_VCCST_PG B65 PROCPWRGD SLP_LAN# BB17 B
VCCST_PWRGD GPD9/SLP_WLAN# AN16
SYS_PWROK B6 GPD6/SLP_A#
+3VALW [33] SYS_PWROK PCH_PWROK SYS_PWROK PBTN_OUT#
BA20 BA15
[33] PCH_PWROK EC_RSMRST# PCH_PWROK GPD3/PWRBTN# AC_PRESENT_R RC103 PBTN_OUT# [33]
BB20 AY15 1 2 0_0402_5% AC_PRESENT [33]
DSW_PWROK GPD1/ACPRESENT AU13 PM_BATLOW#
RC54 GPD0/BATLOW# PM_BATLOW# [21]
AR13
1 2 WAKE# AP11 GPP_A13/SUSWARN#/SUSPWRDNACK +3VALW
GPP_A15/SUSACK# AU11
WAKE# BB15 GPP_A11/PME# AP16 SM_INTRUDER#
1K_0402_5% AM15 WAKE# INTRUDER# PM_BATLOW# 1 2
AW17 GPD2/LAN_WAKE# AM10 RC46 8.2K_0402_5%
AT15 GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# AM11 SOC_VRALERT# AC_PRESENT_R 1 @ 2
GPD7/RSVD 11 OF 20 GPP_B2/VRALERT# RC48 10K_0402_5%
SOC_VRALERT# 1 @ 2
+1.0V_VCCST SKL-U_BGA1356 RC50 10K_0402_5%
From EC (Open-Drain)
1
RC52
1K_0402_5%
2
RC53 1 2 60.4_0402_1% EC_VCCST_PG

[33] VCCST_PWRGD
100P_0402_50V8J
CC126 ESD@
A A
Vinafix.com
SKL-U(5/12)CLK,PM,GPIO
Custom
LA-F571P 1.0

5 4 3 2 1
5 4 3 2 1
GSPI0_MOSI (Internal Pull Down):
No Reboot
GGP_B16 GGP_B19 GGP_B20 GGP_B21
0 = Disable No Reboot mode. ==> Default Capacity RAM vendor
OBRAM_ID3 OBRAM_ID0 OBRAM_ID1 OBRAM_ID2
+3VS +3VS +3VS +3VS
1 = Enable No Reboot Mode. (PCH will disable the TCO Samsung K4A8G165WC-BCTD 0 0 0 0
Timer system reboot feature). This funct i oni s us ef ul 4GB Micron MT40A512M16LY-075:E 0 0 0 1
when running ITP/XDP.
1
N/A 0 0 1 0 RC139 RC135 RC133 RC137
D Samsung K4A8G165WC-BCTD 0 0 1 1 10K_0402_5%
X76RAM@
10K_0402_5%
X76RAM@
10K_0402_5%
X76RAM@
10K_0402_5%
X76RAM@
D
8GB Micron MT40A512M16LY-075:E 0 1 0 0
2
OBRAM_ID3 OBRAM_ID0 OBRAM_ID1 OBRAM_ID2
GSPI1_MOSI (Internal Pull Down):
Hynix H5AN8G6NAFR-UHC 0 1 0 1
1
RC140 RC136 RC134 RC138
Boot BIOS Strap Bit Samsung K4AAG165WB-MCTD 0 1 1 0
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
16GB Micron MT40A1G16WBU-083E:B 0 1 1 1 X76RAM@ X76RAM@ X76RAM@ X76RAM@
0 = SPI Mode ==> Default
2
Hynix H5ANAG6NAMR-UHC 1 0 0 0
1 = LPC Mode Samsung K4A8G165WC-BCRC 1 0 0 1
8GB
2400 MHz Micron MT40A512M16JY-083E:B 1 0 1 0
+3VS
16GB
RC59 1 @ 2 4.7K_0402_5% GSPI0_MOSI 2400 MHz Samsung K4AAG165WB-MCRC 1 0 1 1
RC60 1 @ 2 150K_0402_5% GSPI1_MOSI

N/A 1 1 0 0
1 1
N/A 0 1
+3VS
C
RC439 1 2 10K_0402_5% WLBT_OFF# C
RC83 1 2 49.9K_0402_1% UART0_RX

RC84 1 2 49.9K_0402_1% UART0_TX
UC1F @ SKL-U
Rev_1.0
LPSS ISH
RC27 1 2 499_0402_1% I2C1_SDA_TS AN8 P2

OBRAM_ID3 AP7 GPP_B15/GSPI0_CS# GPP_D9 P3
RC32 1 2 499_0402_1% I2C1_SCL_TS SENSOR_EC_INT AP8 GPP_B16/GSPI0_CLK GPP_D10 P4
[33] SENSOR_EC_INT GSPI0_MOSI GPP_B17/GSPI0_MISO GPP_D11
AR7 P1
RC42 1 2 2.2K_0402_5% I2C0_SDA_TP GPP_B18/GSPI0_MOSI GPP_D12
OBRAM_ID0 AM5 M4
RC43 1 2 2.2K_0402_5% I2C0_SCL_TP OBRAM_ID1 AN7 GPP_B19/GSPI1_CS# GPP_D5/ISH_I2C0_SDA N3
OBRAM_ID2 AP5 GPP_B20/GSPI1_CLK GPP_D6/ISH_I2C0_SCL
GSPI1_MOSI AN5 GPP_B21/GSPI1_MISO N1
GPP_B22/GSPI1_MOSI GPP_D7/ISH_I2C1_SDA N2
AB1 GPP_D8/ISH_I2C1_SCL
[30] TP_INT# GPP_C8/UART0_RXD
AB2 AD11
W4 GPP_C9/UART0_TXD GPP_F10/I2C5_SDA/ISH_I2C2_SDA AD12
WLBT_OFF# AB3 GPP_C10/UART0_RTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
[28] WLBT_OFF# GPP_C11/UART0_CTS#
B
Vinafix.com Touch Pad
Touch Panel
Sensor
[28] UART0_RX
[28] UART0_TX
[30]
[30]
[26]
[26]
[33]
[33]
I2C0_SDA_TP
I2C0_SCL_TP
I2C1_SDA_TS
I2C1_SCL_TS
I2C2_SDA_SEN
I2C2_SCL_SEN
AD1
AD2
AD3
AD4
U7
U6
U8
U9
AH9
AH10
AH11
AH12
GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS#
GPP_C23/UART2_CTS#
GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL
GPP_F4/I2C2_SDA
GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
TS_INT# [26]
TS_INT# 2
RC64
1
4.7K_0402_5%
+3VS
B
GPP_F7/I2C3_SCL Sx_EXIT_HOLDOFF# / GPP_A12 / BM_BUSY# / ISH_GP6

AF11
AF12 GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL 6 OF 20
SKL-U_BGA1356
A A

SKL-U(6/12)GPIO,I2C,GSPI
Custom
LA-F571P 1.0

5 4 3 2 1
5 4 3 2 1
UC1H @ SKL-U
Rev_1.0
SSIC / USB3
PCIE / USB3 / SATA
D H8 D
USB3_1_RXN G8
H13 USB3_1_RXP C13
[21] PCIE_PRX_DTX_N1 PCIE1_RXN/USB3_5_RXN USB3_1_TXN
[21] PCIE_PRX_DTX_P1 G13 D13
CC136 1 2 0.22U_0201_6.3V6M PCIE_PTX_DRX_N1 B17 PCIE1_RXP/USB3_5_RXP USB3_1_TXP
[21] PCIE_PTX_C_DRX_N1 PCIE_PTX_DRX_P1 PCIE1_TXN/USB3_5_TXN
CC137 1 2 0.22U_0201_6.3V6M A17 J6 USB3_RX2_N [31]
[21] PCIE_PTX_C_DRX_P1 PCIE1_TXP/USB3_5_TXP USB3_2_RXN / SSIC_RXN H6 USB3_RX2_P [31]
G11 USB3_2_RXP / SSIC_RXP B13
[21] PCIE_PRX_DTX_N2
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN / SSIC_TXN A13
USB3_TX2_N [31] USB3.0
[21] PCIE_PRX_DTX_P2 PCIE_PTX_DRX_N2 PCIE2_RXP/USB3_6_RXP USB3_2_TXP / SSIC_TXP USB3_TX2_P [31]
CC138 1 2 0.22U_0201_6.3V6M D16
[21] PCIE_PTX_C_DRX_N2 CC139 1 2 0.22U_0201_6.3V6M PCIE_PTX_DRX_P2 C16 PCIE2_TXN/USB3_6_TXN J10
[21] PCIE_PTX_C_DRX_P2 PCIE2_TXP/USB3_6_TXP USB3_3_RXN H10
AR-DP H16 USB3_3_RXP B15
[21] PCIE_PRX_DTX_N3 PCIE3_RXN USB3_3_TXN
[21] PCIE_PRX_DTX_P3 G16 A15
CC114 1 2 0.22U_0201_6.3V6M PCIE_PTX_DRX_N3 D17 PCIE3_RXP USB3_3_TXP
[21] PCIE_PTX_C_DRX_N3 PCIE_PTX_DRX_P3 PCIE3_TXN
CC115 1 2 0.22U_0201_6.3V6M C17 E10
[21] PCIE_PTX_C_DRX_P3 PCIE3_TXP USB3_4_RXN F10
G15 USB3_4_RXP C15
[21] PCIE_PRX_DTX_N4 PCIE4_RXN USB3_4_TXN
F15 D15
[21] PCIE_PRX_DTX_P4 PCIE_PTX_DRX_N4 PCIE4_RXP USB3_4_TXP
CC116 1 2 0.22U_0201_6.3V6M B19
[21] PCIE_PTX_C_DRX_N4 CC117 1 2 0.22U_0201_6.3V6M PCIE_PTX_DRX_P4 A19 PCIE4_TXN AB9
[21] PCIE_PTX_C_DRX_P4 PCIE4_TXP USB2N_1 AB10
F16 USB2P_1
E16 PCIE5_RXN AD6 USB20_N2
PCIE5_RXP USB2N_2 USB20_P2 USB20_N2 [31]
C19 AD7 USB3.0(Charger)
PCIE5_TXN USB2P_2 USB20_P2 [31]
D19
PCIE5_TXP AH3 USB20_N3
USB2N_3 USB20_P3 USB20_N3 [24]
[28] PCIE_PRX_DTX_N6 G18 AJ3 Type C port A
PCIE6_RXN USB2P_3 USB20_P3 [24]
[28] PCIE_PRX_DTX_P6 F18
1 2 0.1U_0201_10V K X5R PCIE_PTX_DRX_N6 D20 PCIE6_RXP AD9 USB20_N4
C
NGFF WLAN+BT [28] PCIE_PTX_C_DRX_N6
CC134
CC135 1 2 0.1U_0201_10V K X5R PCIE_PTX_DRX_P6 C20 PCIE6_TXN USB2N_4 AD10 USB20_P4 USB20_N4 [25]
C
[28] PCIE_PTX_C_DRX_P6 PCIE6_TXP USB2P_4 USB20_P4 [25] Type C port B

F20 AJ1 USB20_N5
PCIE7_RXN/SATA0_RXN USB2N_5 USB20_P5 USB20_N5 [26]
E20 AJ2 Camera
PCIE7_RXP/SATA0_RXP USB2P_5 USB20_P5 [26]
B21 USB2
A21 PCIE7_TXN/SATA0_TXN AF6 USB20_N6
PCIE7_TXP/SATA0_TXP USB2N_6 USB20_P6 USB20_N6 [30]
AF7 FP
USB2P_6 USB20_P6 [30]
G21
F21 PCIE8_RXN/SATA1A_RXN AH1 USB20_N7
PCIE8_RXP/SATA1A_RXP USB2N_7 USB20_P7 USB20_N7 [28]
D21 AH2 NGFF WLAN+BT
PCIE8_TXN/SATA1A_TXN USB2P_7 USB20_P7 [28]
C21
PCIE8_TXP/SATA1A_TXP AF8
E22 USB2N_8 AF9
[28] PCIE_PRX_DTX_N9 PCIE9_RXN USB2P_8
[28] PCIE_PRX_DTX_P9 E23
B23 PCIE9_RXP AG1
[28] PCIE_PTX_DRX_N9 PCIE9_TXN USB2N_9
A23 AG2
[28] PCIE_PTX_DRX_P9 PCIE9_TXP USB2P_9
[28] PCIE_PRX_DTX_N10 F25 AH7
E25 PCIE10_RXN USB2N_10 AH8
[28] PCIE_PRX_DTX_P10 PCIE10_RXP USB2P_10
D23
[28] PCIE_PTX_DRX_N10 PCIE10_TXN USB2_COMP
C23 AB6 RC70 1 2 113_0402_1%
[28] PCIE_PTX_DRX_P10 PCIE10_TXP USB2_COMP USB2_ID
AG3 RC104 1 2 1K_0402_5%
RC71 1 2 100_0402_1% PCIE_RCOMPN F5 USB2_ID AG4 USB2_SENSE RC105 1 2 1K_0402_5%
PCIE_RCOMPP E5 PCIE_RCOMPN USB2_VBUSSENSE
B
SSD
Vinafix.com
[28]
[28]
[28]
[28]
[28]
[28]
[28]
[28]
PCIE_PRX_DTX_N11
PCIE_PRX_DTX_P11
PCIE_PTX_DRX_N11
PCIE_PTX_DRX_P11
SATA_PRX_C_DTX_N12
SATA_PRX_C_DTX_P12
SATA_PTX_DRX_N12
SATA_PTX_DRX_P12
D56
D61
BB11
E28
E27
D24
C24
E30
F30
A25
B25
PCIE_RCOMPP
PROC_PRDY#
PROC_PREQ#
GPP_A7/PIRQA#
PCIE11_RXN/SATA1B_RXN
PCIE11_RXP/SATA1B_RXP
PCIE11_TXN/SATA1B_TXN
PCIE11_TXP/SATA1B_TXP
PCIE12_RXN/SATA2_RXN
PCIE12_RXP/SATA2_RXP
PCIE12_TXN/SATA2_TXN
PCIE12_TXP/SATA2_TXP
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0
A9
C9
D9
B9
J1
J2
J3
H2
H3
G4
H1
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
W L_OFF#
DEVSLP2
NGFF_SSD_PEDET
W L_OFF# [28]
DEVSLP2 [28]
NGFF_SSD_PEDET [28]
B
8 OF 20 GPP_E8/SATALED# +3VALW
SKL-U_BGA1356
RPC9
USB_OC2# 8 1
When PCIE8/SATA1A is used as SATA Port 1 (ODD), then USB_OC0# 7 2
PCIE11/SATA1B (M.2 SSD) cannot be used as SATA Port 1. USB_OC3# 6 3
USB_OC1# 5 4
10K_0804_8P4R_5%
+3VS
SSD_DET@
NGFF_SSD_PEDET RC130 1 2 10K_0402_5%
@
W L_OFF# RC131 1 2 10K_0402_5%
A A
2017/10/16
Compal Secret Data
2020/5/17 Title
SKL-U(7/12)PCIE,USB,SATA
Custom
LA-F571P 1.0

5 4 3 2 1
5 4 3 2 1
+1.0VALW
+1.0VALW TO +1.0V_VCCST +1.2V +1.0VS_VCCIO
UC1N @ SKL-U
Rev_1.0
1U_0402_6.3V6K
CPU POWER 3 OF 4
1
CC22
UC7 AU23 AK28
1 +1.0V_VCCST AU28 VDDQ_AU23 VCCIO AK30
2 VIN1 AU35 VDDQ_AU28 VCCIO AL30
+VL 2 VIN2 RC440 AU42 VDDQ_AU35 VCCIO AL42
7 6 +1.0V_VCCST_R 1 2 BB23 VDDQ_AU42 VCCIO AM28
VIN thermal VOUT BB32 VDDQ_BB23 VCCIO AM30
D D
VDDQ_BB32 VCCIO +VCCSA
0.1U_0201_10V K X5R
3 0_0402_5% 1 BB41 AM42
VBIAS +1.0VS_VCCIO VDDQ_BB41 VCCIO
0.1U_0201_10V K X5R
CC23
1 RC114 BB47
SYSON_R VDDQ_BB47
CC21
1 2 4 5 BB51 AK23
[33,38] SYSON ON GND VDDQ_BB51 VCCSA AK25
2 VCCSA
0.1U_0201_10V K X5R
@ 100K_0402_5% 1 G23
2 +1.0V_VCCST VCCSA
CC25
TPS22961DNYR_W SON8 AM40 G25
VDDQC VCCSA G27
A18 VCCSA G28
2 VCCST VCCSA J22
A22 VCCSA J23
VCCSTG_A22 VCCSA J27
AL23 VCCSA K23
VCCPLL_OC VCCSA K25
K20 VCCSA K27
+1.8VALW +1.8VALW TO +1.8VS K21 VCCPLL_K20
VCCPLL_K21
VCCSA
VCCSA
K28
K30
VCCSA
1U_0402_6.3V6K
1 AM23
VCCIO_SENSE
CC26
UC8 AM22
1 VSSIO_SENSE
@ 2 VIN1 +1.8VS H21 VSSSA_SENSE
+VL 2 VIN2 VSSSA_SENSE VCCSA_SENSE VSSSA_SENSE [41]
RC441 H20
+1.8VS_R VCCSA_SENSE VCCSA_SENSE [41]
7 6 1 2 14 OF 20
VIN thermal VOUT
0.1U_0201_10V K X5R
3
VBIAS
0_0402_5% 1 SKL-U_BGA1356 Trace Length Match < 25 mils
0.1U_0201_10V K X5R
CC27
1
CC24
4 5
[21,32,33,38] SUSP# ON GND
C @ 2 C
2 TPS22961DNYR_W SON8
+1.0VALW TO +1.0VS_VCCIO
+1.0V_VCCST +1.0VS_VCCIO
+VL +1.0VALW I(Max) : 3.04 A(+1.0VS_VCCIO)
RON(Max) : 6.2 mohm PSC Side BSC Side
V drop : 0.019 V
1U_0402_6.3V6K
0.1U_0201_10V K X5R
1 1
CC32
CC30
UC6
+1.0VS_VCCIO
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
@ 1 1 1 1
2 2 2 VIN1
VIN2
CC35
CC34
CC28
RC79
7 6 +1.0VS_VCCIO_STG 1 2 @
VIN thermal VOUT 2 2 2
Vinafix.com 1
3 0_0805_5%
VBIAS CC33
SUSP# 4 5 @ 0.1U_0201_10V K X5R
ON GND 2
B B
TPS22961DNYR_W SON8 Close to A18 Close to K20 Close to A22
+1.0VS_VCCIO +1.2V
BSC Side PSC Side BSC Side PSC Side BSC Side
10U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 2 1 1 1 1 1 1 1
CC36
CC41
CC29
CC48
CC49
CC37
CC40
CC42
CC45
CC128
CC46
CC47
CC50
CC43
@ @ @ @ @ @ @ @
2 2 2 2 2 2 2 2 1 2 2 2 2 2 2 2
CC38
CC39
Underneath CPU Close to CPU Close to AL23 Close to AM40 Close to CPU Underneath CPU
A A
2017/10/16
Compal Secret Data
2020/5/17 Title
SKL-U(8/12)Power
Custom
LA-F571P 1.0

5 4 3 2 1
5 4 3 2 1
D +1.0VALW D
+1.0V_APLL +1.0VALW +1.8VALW
RF@ UC1O SKL-U
Rev_1.0 +3VALW
LC1 CPU POWER 4 OF 4
1 2 CC51 1 2 1U_0402_6.3V6K AB19
AB20 VCCPRIM_1P0 AK15
BLM15EG221SN1D_2P @ P18 VCCPRIM_1P0 VCCPGPPA AG15
2 VCCPRIM_1P0 VCCPGPPB
RF@ Y16
CC31 CC54 1 2 1U_0402_6.3V6K AF18 VCCPGPPC Y15
AF19 VCCPRIM_CORE VCCPGPPD T16
Close to V15 1
0.1U_0201_10V K X5R Imax : 2.57A VCCPRIM_CORE VCCPGPPE
@ V20
VCCPRIM_CORE VCCPGPPF
AF16 VCCPGPPF support 1.8V only
V21 AD15
VCCPRIM_CORE VCCPGPPG
CC55 1 2 1U_0402_6.3V6K DCPDSW AL1 V19
DCPDSW_1P0 VCCPRIM_3P3_V19
CC56 1 2 1U_0402_6.3V6K K17 T1 +1.0VALW
L1 VCCMPHYAON_1P0 VCCPRIM_1P0_T1
Close to K17 VCCMPHYAON_1P0
+1.0V_AMPHYPLL AA1 CC57 1 2 1U_0402_6.3V6K
CC1001 2 22U_0603_6.3V6M N15 VCCATS_1P8
N16 VCCMPHYGT_1P0_N15 AK17
@
Imax : 1.54A N17 VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3
CC66 1 2 1U_0402_6.3V6K P15 VCCMPHYGT_1P0_N17 AK19
VCCMPHYGT_1P0_P15 VCCRTC_AK19 +3VL_RTC
22U_0603_6.3V6M
1U_0402_6.3V6K
Close to P15 P16 BB14
VCCMPHYGT_1P0_P16 VCCRTC_BB14
1 1
CC58
CC59
+1.0V_AMPHYPLL
K15 BB10 DCPRTC CC62 1 2 0.1U_0201_10V K X5R
L15 VCCAMPHYPLL_1P0 DCPRTC
@ @ VCCAMPHYPLL_1P0 A14
2 2 VCCCLK1 +1.0V_CLK6_24TBT
V15
+1.0V_APLL VCCAPLL_1P0 K19
AB17 VCCCLK2
Y18 VCCPRIM_1P0_AB17 L21
VCCPRIM_1P0_Y18 VCCCLK3 +1.0V_APLL
AD17 N20
+3VALW VCCDSW_3P3_AD17 VCCCLK4 +1.0V_CLK4_F100OC
AD18
+1.0V_CLK5_F24NS AJ17 VCCDSW_3P3_AD18 L19
C VCCDSW_3P3_AJ17 VCCCLK5 +1.0V_CLK5_F24NS C
Follow 543016_SKL_U_Y_PDG_1_0
+3V_1.8V_HDA
AJ19 A10 +1.0V_CLK6_24TBT
+3VALW RF@ +3V_1.8V_HDA VCCHDA VCCCLK6
AJ16 AN11
VCCSPI GPP_B0/CORE_VID0
15P_0402_50V8J
0.1U_0201_10V K X5R
LC4 AN13
1 2 1 2 AF20 GPP_B1/CORE_VID1
1 VCCSRAM_1P0
1
CC63
CC64
BLM15EG221SN1D_2P CC65 1U_0402_6.3V6K AF21

@ @ T19 VCCSRAM_1P0
Close to AF20 VCCSRAM_1P0
2 T20
VCCSRAM_1P0
2
@ 2 RF@
CC52 1 2 AJ21
CC67 1U_0402_6.3V6K VCCPRIM_3P3_AJ21
0.1U_0201_10V K X5R
1 @ AK20
Close to AJ21 VCCPRIM_1P0_AK20
1 2 N18
RF request CC68 1U_0402_6.3V6K VCCAPLLEBB_1P0 15 OF 20
+1.0V_CLK4_F100OC Close to N18
Follow 543016_SKL_U_Y_PDG_1_0 SKL-U_BGA1356
@
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1
CC69
CC70
@ @
2 2
Follow 543016_SKL_U_Y_PDG_1_0
RTC Bat t er y
+1.0VALW +3VALW +1.8VALW +3VALW +3VL_RTC +RTCBATT
Vinafix.com Delete R-short for layout placement
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
W=20mils
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
+1.0V_CLK6_24TBT 1 1 1 1 1 1 RC90 1 2 0_0402_5%
1U_0402_6.3V6K
CC71
CC72
CC73
CC76
1U_0402_6.3V6K
CC74
CC75
0.1U_0201_10V K X5R
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1
B Follow 543016_SKL_U_Y_PDG_1_0 1 B
CC80
CC77
CC79
CC78
CC81
@ @ @ @ @ @ @ @ @ CC82
2 2 2 2 2 2 1U_0402_6.3V6K
2 2 2 2 2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1
CC85
CC86
Close to AG15 Close to Y16 Close to T16 Close to AK17

CC83
CC84
@ @ @ @ Saf t y s ugges t i on r emove EE s i de , Keep PW

R s i de
2 2 2 2
A A

SKL-U(9/12)Power
Custom
LA-F571P 1.0

5 4 3 2 1
5 4 3 2 1
+VCCCORE +VCCCORE +VCCGT +VCCGT

+VCCCORE UC1M SKL-U
UC1L SKL-U Rev_1.0
Rev_1.0 CPU POWER 2 OF 4
CPU POWER 1 OF 4
N70
A30 G32 A48 VCCGT N71
A34 VCC_A30 VCC_G32 G33 A53 VCCGT VCCGT R63
D D
AK33 VCC_A44 VCC_G37 G38 A66 VCCGT VCCGT R66
AK35 VCC_AK33 VCC_G38 G40 AA63 VCCGT VCCGT R67
AK37 VCC_AK35 VCC_G40 G42 AA64 VCCGT VCCGT R68
AK38 VCC_AK37 VCC_G42 J30 AA66 VCCGT VCCGT R69
AK40 VCC_AK38 VCC_J30 J33 AA67 VCCGT VCCGT R70
AL33 VCC_AK40 VCC_J33 J37 AA69 VCCGT VCCGT R71
AL37 VCC_AL33 VCC_J37 J40 AA70 VCCGT VCCGT T62
AL40 VCC_AL37 VCC_J40 K33 AA71 VCCGT VCCGT U65
AM32 VCC_AL40 VCC_K33 K35 AC64 VCCGT VCCGT U68
AM33 VCC_AM32 VCC_K35 K37 AC65 VCCGT VCCGT U71
AM35 VCC_AM33 VCC_K37 K38 AC66 VCCGT VCCGT W63
VCC_AM38 VCC_K42 VCCGT VCCGT
G30
VCC_G30 VCC_K43
K43 Trace Length Match < 25 mils AC69
VCCGT VCCGT
W66
AC70 W67
K32 E32 AC71 VCCGT VCCGT W68
RSVD VCC_SENSE VCCCORE_SENSE [41] VCCGT VCCGT
E33 J43 W69
VSS_SENSE VSSCORE_SENSE [41] VCCGT VCCGT
AK32 J45 W70 +VCCCORE
RSVD B63 SOC_SVID_ALERT# J46 VCCGT VCCGT W71
AB62 VIDALERT# A63 VR_SVID_CLK J48 VCCGT VCCGT Y62
VCCOPC_AB62 VIDSCK VR_SVID_DATA VR_SVID_CLK [41] VCCGT VCCGT
P62 D64 J50
VCCOPC_P62 VIDSOUT VCCGT
V62
VCCOPC_V62
ALERT signal must be routed J52
VCCGT
G20 between CLK and DATA signals J53 AK42
H63 VCCSTG_G20 J55 VCCGT VCCGTX_AK42 AK43
VCC_OPC_1P8_H63 +1.0VS_VCCIO J56 VCCGT VCCGTX_AK43 AK45
G61 J58 VCCGT VCCGTX_AK45 AK46
VCC_OPC_1P8_G61 J60 VCCGT VCCGTX_AK46 AK48
C AC63 K48 VCCGT VCCGTX_AK48 AK50 C
AE63 VCCOPC_SENSE K50 VCCGT VCCGTX_AK50 AK52
VSSOPC_SENSE K52 VCCGT VCCGTX_AK52 AK53
AE62 K53 VCCGT VCCGTX_AK53 AK55
AG62 VCCEOPIO K55 VCCGT VCCGTX_AK55 AK56
VCCEOPIO VCCGT VCCGTX_AK56
For CPU GT3 SKU

K56 AK58
AL63 K58 VCCGT VCCGTX_AK58 AK60
AJ62 VCCEOPIO_SENSE K60 VCCGT VCCGTX_AK60 AK70
VSSEOPIO_SENSE 12 OF 20 L62 VCCGT VCCGTX_AK70 AL43
L63 VCCGT VCCGTX_AL43 AL46
SKL-U_BGA1356 L64 VCCGT VCCGTX_AL46 AL50
@ L65 VCCGT VCCGTX_AL50 AL53
L68 VCCGT VCCGTX_AL60 AM48
L69 VCCGT VCCGTX_AM48 AM50
M62 VCCGT VCCGTX_AM53 AM56
N63 VCCGT VCCGTX_AM56 AM58
N64 VCCGT VCCGTX_AM58 AU58
SVID ALERT N66 VCCGT
VCCGT
VCCGTX_AU58
VCCGTX_AU63
AU63
+1.0V_VCCST
Place the PU N67
VCCGT VCCGTX_BB57
BB57
N69 BB66
resistors close to CPU VCCGT VCCGTX_BB66
Vinafix.com [41] VCCGT_SENSE
VCCGT_SENSE J70
VCCGT_SENSE VCCGTX_SENSE
AK62
1
VSSGT_SENSE J69 AL61

[41] VSSGT_SENSE VSSGT_SENSE
RC94 13 OF 20VSSGTX_SENSE
56_0402_5%
B B
Trace Length Match < 25 mils SKL-U_BGA1356
@
2
SOC_SVID_ALERT# 1 2 (To VR)

VR_ALERT# [41]
RC95 220_0402_5%
+1.0V_VCCST
SVID DATA Place the PU

resistors close to CPU
1
RC96
100_0402_1%
2
VR_SVID_DATA
VR_SVID_DATA [41] (To VR)
A A
Vinafix
2017/10/16
Compal Secret Data
2020/5/17 Title
SKL-U(10/12)Power,SVID
Custom
LA-F571P 1.0

5 4 3 2 1
5 4 3 2 1
D D
UC1P SKL-U UC1Q SKL-U
Rev_1.0 Rev_1.0 UC1R SKL-U
GND 1 OF 3 GND 2 OF 3 Rev_1.0
GND 3 OF 3
A5 AL65 AT63 BA49 F8 L18
A67 VSS VSS AL66 AT68 VSS VSS BA53 G10 VSS VSS L2
A70 VSS VSS AM13 AT71 VSS VSS BA57 G22 VSS VSS L20
AA2 VSS VSS AM21 AU10 VSS VSS BA6 G43 VSS VSS L4
AA4 VSS VSS AM25 AU15 VSS VSS BA62 G45 VSS VSS L8
AA65 VSS VSS AM27 AU20 VSS VSS BA66 G48 VSS VSS N10
AA68 VSS VSS AM43 AU32 VSS VSS BA71 G5 VSS VSS N13
AB15 VSS VSS AM45 AU38 VSS VSS BB18 G52 VSS VSS N19
AB16 VSS VSS AM46 AV1 VSS VSS BB26 G55 VSS VSS N21
AD13 VSS VSS AM68 AV71 VSS VSS BB43 G63 VSS VSS P17
AD16 VSS VSS AM71 AW10 VSS VSS BB55 G66 VSS VSS P19
AD19 VSS VSS AM8 AW12 VSS VSS BB6 H15 VSS VSS P20
AD20 VSS VSS AN20 AW14 VSS VSS BB60 H18 VSS VSS P21
AD21 VSS VSS AN23 AW16 VSS VSS BB64 H71 VSS VSS R13
AD62 VSS VSS AN28 AW18 VSS VSS BB67 J11 VSS VSS R6
AD8 VSS VSS AN30 AW21 VSS VSS BB70 J13 VSS VSS T15
AE64 VSS VSS AN32 AW23 VSS VSS C1 J25 VSS VSS T17
AE67 VSS VSS AN37 AW30 VSS VSS D10 J35 VSS VSS T21
AE68 VSS VSS AN38 AW32 VSS VSS D11 J38 VSS VSS T4
C AE69 VSS VSS AN40 AW34 VSS VSS D14 J42 VSS VSS U10 C
AF1 VSS VSS AN42 AW36 VSS VSS D18 J8 VSS VSS U63
AF10 VSS VSS AN58 AW38 VSS VSS D22 K16 VSS VSS U64
AF15 VSS VSS AN63 AW41 VSS VSS D25 K18 VSS VSS U66
AF17 VSS VSS AP10 AW43 VSS VSS D26 K22 VSS VSS U67
AF63 VSS VSS AP23 AW49 VSS VSS D39 K64 VSS VSS V16
AG16 VSS VSS AP28 AW51 VSS VSS D44 K65 VSS VSS V17
AG17 VSS VSS AP32 AW53 VSS VSS D45 K66 VSS VSS V18
AG18 VSS VSS AP35 AW55 VSS VSS D47 K67 VSS VSS W13
AG21 VSS VSS AP58 AW60 VSS VSS D58 K71 VSS VSS Y17
AG71 VSS VSS AP63 AW62 VSS VSS D6 L11 VSS VSS Y19
AH13 VSS VSS AP68 AW64 VSS VSS D62 L16 VSS VSS Y20
AH6 VSS VSS AP70 AW66 VSS VSS D66 L17 VSS VSS Y21
AH63 VSS VSS AR11 AW8 VSS VSS D69 VSS VSS
AH64 VSS VSS AR15 AY66 VSS VSS E11
AH67 VSS VSS AR16 B10 VSS VSS E15 18 OF 20
AJ15 VSS VSS AR20 B14 VSS VSS E18
AJ18 VSS VSS AR23 B18 VSS VSS E21 SKL-U_BGA1356
AJ20 VSS VSS AR28 B22 VSS VSS E46 @
AJ4 VSS VSS AR35 B30 VSS VSS E50
AK11 VSS VSS AR42 B34 VSS VSS E53
Vinafix.com
B AK27 VSS VSS AR5 B58 VSS VSS F1 B
AK63 VSS VSS AR50 B62 VSS VSS F13
AK8 VSS VSS AR55 BA1 VSS VSS F23
AL2 VSS VSS AR58 BA10 VSS VSS F27
AL35 VSS VSS AT2 BA2 VSS VSS F33
AL52 VSS VSS AT4 F68 VSS VSS F40
AL58 VSS VSS AT56 VSS VSS BA41
AL64 VSS VSS AT58 VSS
VSS VSS
16 OF 20 17 OF 20
SKL-U_BGA1356 SKL-U_BGA1356
@ @
A A
2017/10/16
Compal Secret Data
2020/5/17 Title
SKL-U(11/12)GND
Custom
LA-F571P 1.0

5 4 3 2 1
5 4 3 2 1
UC1T SKL-U
Rev_1.0
SPARE
D D
+1.8VALW AW69 F6
UC1S SKL-U AW68 RSVD_AW69 RSVD_F6 E3 42E_SOC_XTAL24_IN_R
Rev_1.0 AU56 RSVD_AW68 RSVD_E3 C11
RESERVED SIGNALS-1 RC98 AW48 RSVD_AU56 RSVD_C11 B11
0_0402_5% 42E_SOC_XTAL24_OUT_R C7 RSVD_AW48 RSVD_B11 A11
E68 BB68 1 @ 2 RSVD1 U12 RSVD_C7 RSVD_A11 D12
B67 CFG[0] RSVD_TP_BB68 BB69 U11 RSVD_U12 RSVD_D12 C12
CFG[1] RSVD_TP_BB69 RSVD_U11 RSVD_C12
1U_0402_6.3V6K
D65 1 H11 F52
D67 CFG[2] AK13 RSVD_H11 RSVD_F52
CFG[3] RSVD_TP_AK13
CC98
CFG4 E70 AK12 20 OF 20
C68 CFG[4] RSVD_TP_AK12 @
D68 CFG[5] BB2 2 SKL-U_BGA1356
C67 CFG[6] RSVD_BB2 BA3 @
F71 CFG[7] RSVD_BA3
G69 CFG[8]
F70 CFG[9] AU5
G68 CFG[10] TP5 AT5
H70 CFG[11] TP6 follow 546765_546765_2014WW52_Skylake_MOW_Rev_1_0
G71 CFG[12] for Skylake-U and Cannonlake-U Compat i bili t y
H69 CFG[13] D5
G70 CFG[14] RSVD_D5 D4 EMI@
CFG[15] RSVD_D4 B2 42E_SOC_XTAL24_IN_R RC58 1 2 47_0201_1% 42E_SOC_XTAL24_IN
E63 RSVD_B2 C2
F63 CFG[16] RSVD_C2
CFG[17] B3
E66 RSVD_B3 A3 LC99 @EMI@
F66 CFG[18] RSVD_A3 1 2
C CFG[19] AW1 1 2 C
CFG_RCOMP E60 RSVD_AW1 1 2
CFG_RCOMP E1 4 3 RC38 1M_0402_5%
E8 RSVD_E1 E2 4 3
ITP_PMODE RSVD_E2 DLM0NSN900HY2D_4P
AY2 BA4 EMI@ YC3 SJ10000UJ00
AY1 RSVD_AY2 RSVD_BA4 BB4 42E_SOC_XTAL24_OUT_R 1 2 42E_SOC_XTAL24_OUT
24MHZ_18PF_XRCGB24M000F2P51R0
RSVD_AY1 RSVD_BB4 RC63 47_0201_1%
D1 A4 3 1
D3 RSVD_D1 RSVD_A4 C4 3 1
RSVD_D3 RSVD_C4 NC NC
27P_0402_50V8J
CC19
27P_0402_50V8J
CC20
1 1
K46 BB5
K45 RSVD_K46 TP4 4 2
RSVD_K45 A69
AL25 RSVD_A69 B69 2 2
AL27 RSVD_AL25 RSVD_B69
RSVD_AL27 AY3 RC97 1 @ 2 0_0402_5%
C71 RSVD_AY3
B70 RSVD_C71 D71
RSVD_B70 RSVD_D71 C70
F60 RSVD_C70
RSVD_F60 C54
A52 RSVD_C54 D54
RSVD_A52 RSVD_D54
BA70 AY4
Vinafix.com BA68 RSVD_TP_BA70 TP1 BB3
RSVD_TP_BA68 TP2 @
J71 AY71 RC213 1 2 0_0402_5%
J68 RSVD_J71 VSS_AY71 AR56
B RSVD_J68 ZVM# B
F65 AW71
G65 VSS_F65 RSVD_TP AW70
VSS_G65 RSVD_TP For 2+3e Solut i on
F61 AP56 LPM_ZVM#
E61 RSVD_F61 MSM# C64 SKL_CNL# +1.0V_VCCST PM_MSM#
RSVD_E61 PROC_SELECT#
19 OF 20 1 @ 2
RC99 100K_0402_5%
1 2 CFG_RCOMP SKL-U_BGA1356
RC100 49.9_0402_1% @
1 2 CFG4
Follow 544669_SKL_U_DDR3L_RVP7_schematic_rev1.0
RC101 1K_0402_5%
Stuff 100k(RC99) for CannonLake-U
Un-stuff 100k(RC99) for SkyLake-U
Display Port Presence Strap
1 : Disabled;
No Physical Display Port at t ac hed t o E mbedded Dis pl ay Port
CFG4
0 : Enabled;
A An external Display Port device is connected to the Embedded Display Port A
2017/10/16
Compal Secret Data
2020/5/17 Title
SKL-U(12/12)CFG,RSVD
Custom
LA-F571P 1.0

5 4 3 2 1
A B C D E
+DDRA_VREF_DQ
+DDRA_VREF_DQ +DDRA_VREF_DQ
+DDRA_VREF_DQ
U6 U5 U7
U8
M1 G2 DDR_A_D14 M1 G2 DDR_A_D23 M1 G2 DDR_A_D51
.047U_0402_16V7K
.047U_0402_16V7K
.047U_0402_16V7K
VREFCA DQL0 F7 DDR_A_D10 VREFCA DQL0 F7 DDR_A_D19 VREFCA DQL0 F7 DDR_A_D55 M1 G2 DDR_A_D47
.047U_0402_16V7K
DQL1 H3 DDR_A_D15 DQL1 H3 DDR_A_D18 DQL1 H3 DDR_A_D50 VREFCA DQL0 F7 DDR_A_D45
DDR_A_MA0 P3 DQL2 H7 DDR_A_D11 DDR_A_MA0 P3 DQL2 H7 DDR_A_D22 DDR_A_MA0 P3 DQL2 H7 DDR_A_D54 DQL1 H3 DDR_A_D42
1 DDR_A_MA1 A0 DQL3 DDR_A_D12 1 DDR_A_MA1 A0 DQL3 DDR_A_D21 1 DDR_A_MA1 A0 DQL3 DDR_A_D49 DDR_A_MA0 DQL2 DDR_A_D44
P7 H2 P7 H2 P7 H2 P3 H7
CD130
CD129
CD131
DDR_A_MA2 A1 DQL4 DDR_A_D8 DDR_A_MA2 A1 DQL4 DDR_A_D16 DDR_A_MA2 A1 DQL4 DDR_A_D52 1 DDR_A_MA1 A0 DQL3 DDR_A_D43
R3 H8 R3 H8 R3 H8 P7 H2
CD128
DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D13 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D17 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D48 DDR_A_MA2 R3 A1 DQL4 H8 DDR_A_D41
2 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D9 2 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D20 2 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D53 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D46
DDR_A_MA5 P8 A4 DQL7 DDR_A_MA5 P8 A4 DQL7 DDR_A_MA5 P8 A4 DQL7 2 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D40
DDR_A_MA6 P2 A5 DDR_A_MA6 P2 A5 DDR_A_MA6 P2 A5 DDR_A_MA5 P8 A4 DQL7
DDR_A_MA7 R8 A6 A3 DDR_A_D7 DDR_A_MA7 R8 A6 A3 DDR_A_D27 DDR_A_MA7 R8 A6 A3 DDR_A_D34 DDR_A_MA6 P2 A5
DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D5 DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D31 DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D33 DDR_A_MA7 R8 A6 A3 DDR_A_D63
1 DDR_A_MA9 A8 DQU1 DDR_A_D3 DDR_A_MA9 A8 DQU1 DDR_A_D29 DDR_A_MA9 A8 DQU1 DDR_A_D38 DDR_A_MA8 A7 DQU0 DDR_A_D57 1
R7 C3 R7 C3 R7 C3 R2 B8
DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D4 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D28 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D39 DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_D59
DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D2 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D30 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D37 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D56
DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D1 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D25 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D35 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D62
DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D6 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D26 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D36 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D60
DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D0 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D24 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D32 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D58
A14/WE DQU7 A14/WE DQU7 A14/WE DQU7 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D61
DDR_A_BA0 N2 DDR_A_BA0 N2 DDR_A_BA0 N2 A14/WE DQU7
[7] DDR_A_BA0 DDR_A_BA1 BA0 DDR_A_BA1 BA0 DDR_A_BA1 BA0 DDR_A_BA0
N8 B3 +1.2V N8 B3 +1.2V N8 B3 +1.2V N2
[7] DDR_A_BA1 BA1 VDD BA1 VDD BA1 VDD DDR_A_BA1 BA0
B9 B9 B9 N8 B3 +1.2V
E2 VDD D1 E2 VDD D1 E2 VDD D1 BA1 VDD B9
+1.2V DMU/DBIU VDD +1.2V DMU/DBIU VDD +1.2V DMU/DBIU VDD VDD
E7 G7 E7 G7 E7 G7 +1.2V E2 D1
DML/DBIL VDD J1 DML/DBIL VDD J1 DML/DBIL VDD J1 E7 DMU/DBIU VDD G7
VDD J9 VDD J9 VDD J9 DML/DBIL VDD J1
VDD L1 VDD L1 VDD L1 VDD J9
DDR_A_CLK0 K7 VDD L9 DDR_A_CLK0 K7 VDD L9 DDR_A_CLK0 K7 VDD L9 VDD L1
[7] DDR_A_CLK0 DDR_A_CLK#0 CK_t VDD DDR_A_CLK#0 CK_t VDD DDR_A_CLK#0 CK_t VDD DDR_A_CLK0 VDD
K8 R1 K8 R1 K8 R1 K7 L9
[7] DDR_A_CLK#0 DDR_A_CKE0 CK_c VDD DDR_A_CKE0 CK_c VDD DDR_A_CKE0 CK_c VDD DDR_A_CLK#0 CK_t VDD
K2 T9 K2 T9 K2 T9 K8 R1
[7] DDR_A_CKE0 CKE VDD CKE VDD CKE VDD DDR_A_CKE0 CK_c VDD
K2 T9
CKE VDD
A1 A1 A1
VDDQ A9 VDDQ A9 VDDQ A9 A1
VDDQ C1 VDDQ C1 VDDQ C1 VDDQ A9
VDDQ D9 VDDQ D9 VDDQ D9 VDDQ C1
VDDQ F2 VDDQ F2 VDDQ F2 VDDQ D9
VDDQ F8 VDDQ F8 VDDQ F8 VDDQ F2
DDR_A_ODT0 K3 VDDQ G1 DDR_A_ODT0 K3 VDDQ G1 DDR_A_ODT0 K3 VDDQ G1 VDDQ F8
[7] DDR_A_ODT0 DDR_A_CS#0 ODT VDDQ DDR_A_CS#0 ODT VDDQ DDR_A_CS#0 ODT VDDQ DDR_A_ODT0 VDDQ
L7 G9 L7 G9 L7 G9 K3 G1
[7] DDR_A_CS#0 DDR_A_MA16 CS VDDQ DDR_A_MA16 CS VDDQ DDR_A_MA16 CS VDDQ DDR_A_CS#0 ODT VDDQ
L8 J2 L8 J2 L8 J2 L7 G9
DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA16 L8 CS VDDQ J2
CAS VDDQ CAS VDDQ CAS VDDQ DDR_A_MA15 M8 RAS VDDQ J8
B2 B2 B2 CAS VDDQ
VSS E1 DDP@ VSS E1 DDP@ VSS E1 DDP@ B2
VSS E9 RD200 1 2 240_0402_1% VSS E9 RD201 1 2 240_0402_1% VSS E9 RD202 1 2 240_0402_1% VSS E1
VSS G8 VSS G8 VSS G8 VSS E9
DDR_A_DQS#0 A7 VSS K1 DDR_A_DQS#3 A7 VSS K1 DDR_A_DQS#4 A7 VSS K1 VSS G8
DDR_A_DQS0 B7 DQSU_c VSS K9 DDR_A_DQS3 B7 DQSU_c VSS K9 DDR_A_DQS4 B7 DQSU_c VSS K9 DDR_A_DQS#7 A7 VSS K1
DDR_A_DQS#1 F3 DQSU_t VSS M9 DDR_A_BG1_R DDR_A_DQS#2 F3 DQSU_t VSS M9 DDR_A_BG1_R DDR_A_DQS#6 F3 DQSU_t VSS M9 DDR_A_BG1_R DDR_A_DQS7 B7 DQSU_c VSS K9
DDR_A_DQS1 DQSL_c VSS DDR_A_DQS2 DQSL_c VSS DDR_A_DQS6 DQSL_c VSS DDR_A_DQS#5 DQSU_t VSS DDR_A_BG1_R
1
G3 N1 G3 N1 G3 N1 F3 M9
DQSL_t VSS T1 DQSL_t VSS T1 DQSL_t VSS T1 DDR_A_DQS5 G3 DQSL_c VSS N1 RD203
MEMRST# P1 VSS MEMRST# P1 VSS MEMRST# P1 VSS DQSL_t VSS T1 240_0402_1%
RESET RESET RESET MEMRST# P1 VSS DDP@
[7,19] MEMRST# RESET
1 2 RD164 F9 1 2 RD165 F9 1 2 RD170 F9
2
240_0402_1% ZQ 240_0402_1% ZQ 240_0402_1% ZQ 1 2 RD168 F9
240_0402_1% ZQ
2 M_A_ACT# M_A_ACT# M_A_ACT# 2
[7] M_A_ACT# L3 A2 L3 A2 L3 A2
DDR_A_BG0 M2 ACT VSSQ A8 DDR_A_BG0 M2 ACT VSSQ A8 DDR_A_BG0 M2 ACT VSSQ A8 M_A_ACT# L3 A2
[7] DDR_A_BG0 BG0 VSSQ BG0 VSSQ BG0 VSSQ DDR_A_BG0 ACT VSSQ
N9 C9 N9 C9 N9 C9 M2 A8
DDR_A_ALERT# P9 TEN VSSQ D2 DDR_A_ALERT# P9 TEN VSSQ D2 DDR_A_ALERT# P9 TEN VSSQ D2 N9 BG0 VSSQ C9
[7] DDR_A_ALERT# DDR_A_PARITY ALERT VSSQ DDR_A_PARITY ALERT VSSQ DDR_A_PARITY ALERT VSSQ DDR_A_ALERT# TEN VSSQ
[7] DDR_A_PARITY T3 D8 T3 D8 T3 D8 P9 D2
PAR VSSQ E3 PAR VSSQ E3 PAR VSSQ E3 DDR_A_PARITY T3 ALERT VSSQ D8
T7 VSSQ E8 T7 VSSQ E8 T7 VSSQ E8 PAR VSSQ E3
B1 NC VSSQ F1 B1 NC VSSQ F1 B1 NC VSSQ F1 T7 VSSQ E8
+2.5V VPP VSSQ +2.5V VPP VSSQ +2.5V VPP VSSQ NC VSSQ
R9 H1 R9 H1 R9 H1 +2.5V B1 F1
VPP VSSQ H9 VPP VSSQ H9 VPP VSSQ H9 R9 VPP VSSQ H1
96-BALL VSSQ 96-BALL VSSQ 96-BALL VSSQ VPP VSSQ H9
SDRAM DDR4 SDRAM DDR4 SDRAM DDR4 96-BALL VSSQ
K4A8G165WB-BCPB_FBGA96 K4A8G165WB-BCPB_FBGA96 K4A8G165WB-BCPB_FBGA96 SDRAM DDR4
X76RAM@ X76RAM@ X76RAM@ K4A8G165WB-BCPB_FBGA96
X76RAM@
[7] DDR_A_MA[0..16]
[7] DDR_A_DQS#[0..7] +0.6VS DDP_SDP@ DDP_SDP@ SDP@

RD204 RD200 RD200
[7] DDR_A_DQS[0..7] SD028000080 SD000009T80 SD028000080
0_0402_1% 240_0402_1% 0_0402_1%
[7] DDR_A_D[0..63]
DDP_SDP@ SDP@
DDR_A_MA11
DDR_A_MA13
1
2
RP17
8
7
CLOCK TERMINATION +0.6VS DDR_A_BG1_R RD204 1
DDP@
2 0_0402_5%
RD201
SD000009T80
240_0402_1%
RD201
SD028000080
0_0402_1%
DDR_A_PARITY DDR_A_BG1 [7]
3 6
DDR_A_MA7 4 5 DDP_SDP@ SDP@
RD202 RD202
36_0804_8P4R_5% DDR_A_CLK0 RD171 1 2 36_0402_1% SDP@ SD000009T80 SD028000080
DDR_A_CLK#0 RD169 1 2 36_0402_1% RD205 1 2 0_0402_5% 240_0402_1% 0_0402_1%
3
Vinafix.com DDR_A_MA0
DDR_A_MA5
DDR_A_MA6
DDR_A_MA4
DDR_A_MA16
DDR_A_MA14
DDR_A_CKE0
1
2
3
4
1
2
3
4
RP18
8
7
6
5
36_0804_8P4R_5%
RP19
8
7
6
5
36_0804_8P4R_5%
DDR_A_ALERT# RD42 2 1 49.9_0402_1%
INTEL suggest 50ohm 1%

+1.2V
Co-lay for SDP / DDP memory die
Data mapping
U6
DQL0
DQ
D14
U5
DQL0
DQ
D23
U7
DQL0
DDP_SDP@
RD203
SD000009T80
240_0402_1%
DQ
D51
SDP@
RD203
SD028000080
0_0402_1%
DQL0
U8 DQ
D47
3
DQL1 D10 DQL1 D19 DQL1 D55 DQL1 D45

RP20 DQL2 D15 DQL2 D18 DQL2 D50 DQL2 D42
DDR_A_BG0 1 8 +1.2V
DDR_A_MA12 2 7
DDR_A_MA15 DQL3 D11 DQL3 D22 DQL3 D54 DQL3 D44
3 6
M_A_ACT# 4 5 DQL4 D12 DQL4 D21 DQL4 D49 DQL4 D43
36_0804_8P4R_5% DQL5 D8 DQL5 D16 DQL5 D52 DQL5 D41
2

RD194
1.8K_0402_1%
+DDRA_VREF_DQ
RP21 RD10
DDR_A_ODT0 1 8 2.7_0402_1% DQU0 D7 DQU0 D27 DQU0 D34 DQU0 D63
1
DDR_A_CS#0 2 7 2 1
DDR_A_BG1_R 3 6 [7] +0.6V_A_VREFDQ
DDR_A_MA3 DQU1 D5 DQU1 D31 DQU1 D33 DQU1 D57
4 5
1 DQU2 D3 DQU2 D29 DQU2 D38 DQU2 D59
36_0804_8P4R_5%
CD21 DQU3 D4 DQU3 D28 DQU3 D39 DQU3 D56
0.022U_0402_16V7K
2
DQU4 D2 DQU4 D30 DQU4 D37 DQU4 D62
2
1
RP22 DQU5 D1 DQU5 D25 DQU5 D35 DQU5 D60

1 8 RD12 RD195
DDR_A_MA2 2 7
DDR_A_MA9
24.9_0402_1% 1.8K_0402_1% DQU6 D6 DQU6 D26 DQU6 D36 DQU6 D58
3 6
DDR_A_MA8 4 5
4 DQU7 D0 DQU7 D24 DQU7 D32 DQU7 D61 4
1
2
36_0804_8P4R_5%
RP24
DDR_A_MA10 1 8
DDR_A_BA1 2 7
DDR_A_BA0 3 6
DDR_A_MA1 4 5
36_0804_8P4R_5% Security Classification Compal Secret Data

Title
Issued Date 2017/10/16 Deciphered Date 2020/5/17
DDR4_DIMM
Custom
LA-F571P 1.0
A B C D E
A B C D E
+DDRB_VREF_DQ
+DDRB_VREF_DQ +DDRB_VREF_DQ
+DDRB_VREF_DQ
U2 U1 U3
U4
M1 G2 DDR_B_D15 M1 G2 DDR_B_D22 M1 G2 DDR_B_D45
.047U_0402_16V7K
.047U_0402_16V7K
.047U_0402_16V7K
VREFCA DQL0 F7 DDR_B_D12 VREFCA DQL0 F7 DDR_B_D21 VREFCA DQL0 F7 DDR_B_D47 M1 G2 DDR_B_D54
.047U_0402_16V7K
DQL1 H3 DDR_B_D14 DQL1 H3 DDR_B_D23 DQL1 H3 DDR_B_D44 VREFCA DQL0 F7 DDR_B_D48
DDR_B_MA0 P3 DQL2 H7 DDR_B_D13 DDR_B_MA0 P3 DQL2 H7 DDR_B_D20 DDR_B_MA0 P3 DQL2 H7 DDR_B_D46 DQL1 H3 DDR_B_D50
1 DDR_B_MA1 A0 DQL3 DDR_B_D11 1 DDR_B_MA1 A0 DQL3 DDR_B_D19 1 DDR_B_MA1 A0 DQL3 DDR_B_D43 DDR_B_MA0 DQL2 DDR_B_D49
P7 H2 P7 H2 P7 H2 P3 H7
CD133
CD134
CD135
DDR_B_MA2 A1 DQL4 DDR_B_D9 DDR_B_MA2 A1 DQL4 DDR_B_D17 DDR_B_MA2 A1 DQL4 DDR_B_D41 1 DDR_B_MA1 A0 DQL3 DDR_B_D51
R3 H8 R3 H8 R3 H8 P7 H2
CD132
DDR_B_MA3 N7 A2 DQL5 J3 DDR_B_D10 DDR_B_MA3 N7 A2 DQL5 J3 DDR_B_D18 DDR_B_MA3 N7 A2 DQL5 J3 DDR_B_D42 DDR_B_MA2 R3 A1 DQL4 H8 DDR_B_D53
2 DDR_B_MA4 N3 A3 DQL6 J7 DDR_B_D8 2 DDR_B_MA4 N3 A3 DQL6 J7 DDR_B_D16 2 DDR_B_MA4 N3 A3 DQL6 J7 DDR_B_D40 DDR_B_MA3 N7 A2 DQL5 J3 DDR_B_D55
DDR_B_MA5 P8 A4 DQL7 DDR_B_MA5 P8 A4 DQL7 DDR_B_MA5 P8 A4 DQL7 2 DDR_B_MA4 N3 A3 DQL6 J7 DDR_B_D52
DDR_B_MA6 P2 A5 DDR_B_MA6 P2 A5 DDR_B_MA6 P2 A5 DDR_B_MA5 P8 A4 DQL7
DDR_B_MA7 R8 A6 A3 DDR_B_D7 DDR_B_MA7 R8 A6 A3 DDR_B_D35 DDR_B_MA7 R8 A6 A3 DDR_B_D31 DDR_B_MA6 P2 A5
DDR_B_MA8 R2 A7 DQU0 B8 DDR_B_D0 DDR_B_MA8 R2 A7 DQU0 B8 DDR_B_D37 DDR_B_MA8 R2 A7 DQU0 B8 DDR_B_D26 DDR_B_MA7 R8 A6 A3 DDR_B_D62
1 DDR_B_MA9 A8 DQU1 DDR_B_D6 DDR_B_MA9 A8 DQU1 DDR_B_D38 DDR_B_MA9 A8 DQU1 DDR_B_D30 DDR_B_MA8 A7 DQU0 DDR_B_D57 1
R7 C3 R7 C3 R7 C3 R2 B8
DDR_B_MA10 M3 A9 DQU2 C7 DDR_B_D5 DDR_B_MA10 M3 A9 DQU2 C7 DDR_B_D32 DDR_B_MA10 M3 A9 DQU2 C7 DDR_B_D27 DDR_B_MA9 R7 A8 DQU1 C3 DDR_B_D59
DDR_B_MA11 T2 A10/AP DQU3 C2 DDR_B_D2 DDR_B_MA11 T2 A10/AP DQU3 C2 DDR_B_D34 DDR_B_MA11 T2 A10/AP DQU3 C2 DDR_B_D25 DDR_B_MA10 M3 A9 DQU2 C7 DDR_B_D56
DDR_B_MA12 M7 A11 DQU4 C8 DDR_B_D1 DDR_B_MA12 M7 A11 DQU4 C8 DDR_B_D33 DDR_B_MA12 M7 A11 DQU4 C8 DDR_B_D29 DDR_B_MA11 T2 A10/AP DQU3 C2 DDR_B_D58
DDR_B_MA13 T8 A12/BC DQU5 D3 DDR_B_D3 DDR_B_MA13 T8 A12/BC DQU5 D3 DDR_B_D39 DDR_B_MA13 T8 A12/BC DQU5 D3 DDR_B_D24 DDR_B_MA12 M7 A11 DQU4 C8 DDR_B_D60
DDR_B_MA14 L2 A13 DQU6 D7 DDR_B_D4 DDR_B_MA14 L2 A13 DQU6 D7 DDR_B_D36 DDR_B_MA14 L2 A13 DQU6 D7 DDR_B_D28 DDR_B_MA13 T8 A12/BC DQU5 D3 DDR_B_D63
A14/WE DQU7 A14/WE DQU7 A14/WE DQU7 DDR_B_MA14 L2 A13 DQU6 D7 DDR_B_D61
DDR_B_BA0 N2 DDR_B_BA0 N2 DDR_B_BA0 N2 A14/WE DQU7
[7] DDR_B_BA0 DDR_B_BA1 BA0 DDR_B_BA1 BA0 DDR_B_BA1 BA0 DDR_B_BA0
N8 B3 +1.2V N8 B3 +1.2V N8 B3 +1.2V N2
[7] DDR_B_BA1 BA1 VDD BA1 VDD BA1 VDD DDR_B_BA1 BA0
B9 B9 B9 N8 B3 +1.2V
E2 VDD D1 E2 VDD D1 E2 VDD D1 BA1 VDD B9
+1.2V DMU/DBIU VDD +1.2V DMU/DBIU VDD +1.2V DMU/DBIU VDD VDD
E7 G7 E7 G7 E7 G7 +1.2V E2 D1
DML/DBIL VDD J1 DML/DBIL VDD J1 DML/DBIL VDD J1 E7 DMU/DBIU VDD G7
VDD J9 VDD J9 VDD J9 DML/DBIL VDD J1
VDD L1 VDD L1 VDD L1 VDD J9
DDR_B_CLK0 K7 VDD L9 DDR_B_CLK0 K7 VDD L9 DDR_B_CLK0 K7 VDD L9 VDD L1
[7] DDR_B_CLK0 DDR_B_CLK#0 CK_t VDD DDR_B_CLK#0 CK_t VDD DDR_B_CLK#0 CK_t VDD DDR_B_CLK0 VDD
K8 R1 K8 R1 K8 R1 K7 L9
[7] DDR_B_CLK#0 DDR_B_CKE0 CK_c VDD DDR_B_CKE0 CK_c VDD DDR_B_CKE0 CK_c VDD DDR_B_CLK#0 CK_t VDD
K2 T9 K2 T9 K2 T9 K8 R1
[7] DDR_B_CKE0 CKE VDD CKE VDD CKE VDD DDR_B_CKE0 CK_c VDD
K2 T9
CKE VDD
A1 A1 A1
VDDQ A9 VDDQ A9 VDDQ A9 A1
VDDQ C1 VDDQ C1 VDDQ C1 VDDQ A9
VDDQ D9 VDDQ D9 VDDQ D9 VDDQ C1
VDDQ F2 VDDQ F2 VDDQ F2 VDDQ D9
VDDQ F8 VDDQ F8 VDDQ F8 VDDQ F2
DDR_B_ODT0 K3 VDDQ G1 DDR_B_ODT0 K3 VDDQ G1 DDR_B_ODT0 K3 VDDQ G1 VDDQ F8
[7] DDR_B_ODT0 DDR_B_CS#0 ODT VDDQ DDR_B_CS#0 ODT VDDQ DDR_B_CS#0 ODT VDDQ DDR_B_ODT0 VDDQ
L7 G9 L7 G9 L7 G9 K3 G1
[7] DDR_B_CS#0 DDR_B_MA16 CS VDDQ DDR_B_MA16 CS VDDQ DDR_B_MA16 CS VDDQ DDR_B_CS#0 ODT VDDQ
L8 J2 L8 J2 L8 J2 L7 G9
DDR_B_MA15 M8 RAS VDDQ J8 DDR_B_MA15 M8 RAS VDDQ J8 DDR_B_MA15 M8 RAS VDDQ J8 DDR_B_MA16 L8 CS VDDQ J2
CAS VDDQ CAS VDDQ CAS VDDQ DDR_B_MA15 M8 RAS VDDQ J8
B2 B2 B2 CAS VDDQ
VSS E1 DDP@ VSS E1 DDP@ VSS E1 DDP@ B2
VSS E9 RD206 1 2 240_0402_1% VSS E9 RD207 1 2 240_0402_1% VSS E9 RD208 1 2 240_0402_1% VSS E1
VSS G8 VSS G8 VSS G8 VSS E9
DDR_B_DQS#0 A7 VSS K1 DDR_B_DQS#4 A7 VSS K1 DDR_B_DQS#3 A7 VSS K1 VSS G8
DDR_B_DQS0 B7 DQSU_c VSS K9 DDR_B_DQS4 B7 DQSU_c VSS K9 DDR_B_DQS3 B7 DQSU_c VSS K9 DDR_B_DQS#7 A7 VSS K1
DDR_B_DQS#1 F3 DQSU_t VSS M9 DDR_B_BG1_R DDR_B_DQS#2 F3 DQSU_t VSS M9 DDR_B_BG1_R DDR_B_DQS#5 F3 DQSU_t VSS M9 DDR_B_BG1_R DDR_B_DQS7 B7 DQSU_c VSS K9
DDR_B_DQS1 DQSL_c VSS DDR_B_DQS2 DQSL_c VSS DDR_B_DQS5 DQSL_c VSS DDR_B_DQS#6 DQSU_t VSS DDR_B_BG1_R
1
G3 N1 G3 N1 G3 N1 F3 M9
DQSL_t VSS T1 DQSL_t VSS T1 DQSL_t VSS T1 DDR_B_DQS6 G3 DQSL_c VSS N1 RD209
MEMRST# P1 VSS MEMRST# P1 VSS MEMRST# P1 VSS DQSL_t VSS T1 240_0402_1%
RESET RESET RESET MEMRST# P1 VSS DDP@
[7,18] MEMRST# RESET
1 2 RD166 F9 1 2 RD167 F9 1 2 RD174 F9
2
240_0402_1% ZQ 240_0402_1% ZQ 240_0402_1% ZQ 1 2 RD172 F9
240_0402_1% ZQ
2 M_B_ACT# M_B_ACT# M_B_ACT# 2
[7] M_B_ACT# L3 A2 L3 A2 L3 A2
DDR_B_BG0 M2 ACT VSSQ A8 DDR_B_BG0 M2 ACT VSSQ A8 DDR_B_BG0 M2 ACT VSSQ A8 M_B_ACT# L3 A2
[7] DDR_B_BG0 BG0 VSSQ BG0 VSSQ BG0 VSSQ DDR_B_BG0 ACT VSSQ
N9 C9 N9 C9 N9 C9 M2 A8
DDR_B_ALERT# P9 TEN VSSQ D2 DDR_B_ALERT# P9 TEN VSSQ D2 DDR_B_ALERT# P9 TEN VSSQ D2 N9 BG0 VSSQ C9
[7] DDR_B_ALERT# DDR_B_PARITY ALERT VSSQ DDR_B_PARITY ALERT VSSQ DDR_B_PARITY ALERT VSSQ DDR_B_ALERT# TEN VSSQ
[7] DDR_B_PARITY T3 D8 T3 D8 T3 D8 P9 D2
PAR VSSQ E3 PAR VSSQ E3 PAR VSSQ E3 DDR_B_PARITY T3 ALERT VSSQ D8
T7 VSSQ E8 T7 VSSQ E8 T7 VSSQ E8 PAR VSSQ E3
B1 NC VSSQ F1 B1 NC VSSQ F1 B1 NC VSSQ F1 T7 VSSQ E8
+2.5V VPP VSSQ +2.5V VPP VSSQ +2.5V VPP VSSQ NC VSSQ
R9 H1 R9 H1 R9 H1 +2.5V B1 F1
VPP VSSQ H9 VPP VSSQ H9 VPP VSSQ H9 R9 VPP VSSQ H1
96-BALL VSSQ 96-BALL VSSQ 96-BALL VSSQ VPP VSSQ H9
SDRAM DDR4 SDRAM DDR4 SDRAM DDR4 96-BALL VSSQ
K4A8G165WB-BCPB_FBGA96 K4A8G165WB-BCPB_FBGA96 K4A8G165WB-BCPB_FBGA96 SDRAM DDR4
X76RAM@ X76RAM@ X76RAM@ K4A8G165WB-BCPB_FBGA96
X76RAM@
[7] DDR_B_MA[0..16]
[7] DDR_B_DQS#[0..7] +0.6VS

DDP_SDP@ SDP@
[7] DDR_B_DQS[0..7] RD206 RD206
SD028000080 SD028000080
[7] DDR_B_D[0..63] DDP@ 0_0402_1% 0_0402_1%
DDR_B_BG1_R RD210 1 2 0_0402_5% DDR_B_BG1 [7]
DDR_B_MA9
DDR_B_PARITY
1
2
RP23
8
7
CLOCK TERMINATION +0.6VS
DDP_SDP@
RD207
SD028000080
SDP@
RD207
SD028000080
DDR_B_MA11 3 6 SDP@ 0_0402_1% 0_0402_1%
DDR_B_MA8 4 5 RD211 1 2 0_0402_5%
DDP_SDP@ SDP@
36_0804_8P4R_5% DDR_B_CLK0 RD175 1 2 36_0402_1% RD208 RD208
DDR_B_CLK#0 RD173 1 2 36_0402_1% SD028000080 SD028000080
DDP_SDP@ 0_0402_1% 0_0402_1%
3
Vinafix.com DDR_B_MA4
DDR_B_MA6
DDR_B_MA0
DDR_B_MA2
DDR_B_CKE0
DDR_B_ODT0
DDR_B_MA14
1
2
3
4
RP25
8
7
6
5
36_0804_8P4R_5%
1
2
3
4
RP126
8
7
6
5
36_0804_8P4R_5%
DDR_B_ALERT# RD43 2 1 49.9_0402_1%
INTEL suggest 50ohm 1%

+1.2V
Co-lay for SDP / DDP memory die

RD211
SD028000080
0_0402_1%
Data mapping
U2
DQL0
DQ
D15
U1
DQL0
DQ
D22
DDP_SDP@
RD209
SD028000080
0_0402_1%
U3
DQL0
DQ
D45
SDP@
RD209
SD028000080
0_0402_1%
DQL0
U4 DQ
D54
3

RP27 DQL2 D14 DQL2 D23 DQL2 D44 DQL2 D50
DDR_B_BG0 1 8 +1.2V
DDR_B_BG1_R 2 7
DDR_B_MA10 DQL3 D13 DQL3 D20 DQL3 D46 DQL3 D49
3 6
DDR_B_BA0 4 5 DQL4 D11 DQL4 D19 DQL4 D43 DQL4 D51
36_0804_8P4R_5% DQL5 D9 DQL5 D17 DQL5 D41 DQL5 D53
2

RD196
1.8K_0402_1%
+DDRB_VREF_DQ
RP28 RD11
M_B_ACT# 1 8 2.7_0402_1% DQU0 D7 DQU0 D35 DQU0 D31 DQU0 D62
1
DDR_B_CS#0 2 7 2 1
DDR_B_MA15 [7] +0.6V_B_VREFDQ
3 6 DQU1 D0 DQU1 D37 DQU1 D26 DQU1 D57
DDR_B_MA16 4 5
1 DQU2 D6 DQU2 D38 DQU2 D30 DQU2 D59
36_0804_8P4R_5%
CD22 DQU3 D5 DQU3 D32 DQU3 D27 DQU3 D56
0.022U_0402_16V7K
2
DQU4 D2 DQU4 D34 DQU4 D25 DQU4 D58
1
RP29 DQU5 D1 DQU5 D33 DQU5 D29 DQU5 D60

1 8 RD13 RD197
DDR_B_MA13 2 7
DDR_B_MA7
24.9_0402_1% 1.8K_0402_1% DQU6 D3 DQU6 D39 DQU6 D24 DQU6 D63
3 6
DDR_B_MA5 4 5
4 DQU7 D4 DQU7 D36 DQU7 D28 DQU7 D61 4
2
36_0804_8P4R_5%
RP30
DDR_B_MA1 1 8
DDR_B_BA1 2 7
DDR_B_MA3 3 6
DDR_B_MA12 4 5
36_0804_8P4R_5% Security Classification Compal Secret Data

Title
Issued Date 2017/10/16 Deciphered Date 2020/5/17
DDR4_DIMM
Custom
LA-F571P 1.0
A B C D E
Vinafix.com
1
1.0
Re v
45
of
20
Sheet
DDR4_DIMM

LA-F571P
E
E
Document Number
15P_0402_50V8J
CD280 1 2
@
15P_0402_50V8J
10P_0402_50V8J
CD102
1 2
2
1
@
CD279
@
10P_0402_50V8J
Custom
1
Date:
Title
Size
CD101
@
2 as near each on board RAM device as possible
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CD278 1U_0402_6.3V6K
1
CD312 1U_0402_6.3V6K
1
@
CD252
1
@
1U_0402_6.3V6K CD268
1U_0402_6.3V6K
1
@
CD277 1U_0402_6.3V6K
1
CD311 1U_0402_6.3V6K
1
CD266
2020/5/17
1
1U_0402_6.3V6K CD259
1U_0402_6.3V6K
1
CD276 1U_0402_6.3V6K
1
CD310 1U_0402_6.3V6K
1
CD255
1
1U_0402_6.3V6K CD243
1U_0402_6.3V6K
1
CD275 1U_0402_6.3V6K
@
@
CD309 1U_0402_6.3V6K
1
@
CD260
1
Deciphered Date
@
1U_0402_6.3V6K CD247 Compal Secret Data
1U_0402_6.3V6K
1
@
CD274 1U_0402_6.3V6K
1
CD299 CD308 1U_0402_6.3V6K

@
CD269
1
1U_0402_6.3V6K CD257 CD262

10U_0603_6.3V6M 1U_0402_6.3V6K
1
2
1
CD273 1U_0402_6.3V6K
1
CD298 CD307 10U_0603_6.3V6M 1U_0402_6.3V6K

1
CD315 CD249
1
2
1
1U_0402_6.3V6K CD256 CD240 CD231

1
2
D
D
10U_0603_6.3V6M 1U_0402_6.3V6K 10U_0402_6.3V6M
1
2
1
CD272 10U_0603_6.3V6M 1U_0402_6.3V6K

@
1
1
@
CD306 10U_0603_6.3V6M 1U_0402_6.3V6K
1
1U_0402_6.3V6K CD297 CD244

1
1U_0402_6.3V6K CD314 CD235

@
1
CD271 1U_0402_6.3V6K CD250 CD233

1
2
1
2017/10/16
10U_0603_6.3V6M CD305 1U_0402_6.3V6K 10U_0402_6.3V6M
1
10U_0603_6.3V6M CD263
1
1
10U_0603_6.3V6M CD254
+2.5V
+2.5V
Issued Date
+0.6VS
+0.6VS
C
C
1U_0402_6.3V6K
1U_0402_6.3V6K
2
CD270

1
@
CD296
1U_0402_6.3V6K
1U_0402_6.3V6K
2
@
CD264
1
CD295
1U_0402_6.3V6K
1U_0402_6.3V6K
2
@
CD265
1
@
CD294
1U_0402_6.3V6K
1U_0402_6.3V6K
2
CD261
1
CD293
1U_0402_6.3V6K
1U_0402_6.3V6K
2
CD258
1
CD292
@
1U_0402_6.3V6K
1U_0402_6.3V6K
2
CD251
@
1
CD291
B
B
1U_0402_6.3V6K
1U_0402_6.3V6K
2
@
CD242
1
@
CD290
1U_0402_6.3V6K
1U_0402_6.3V6K
2
CD248
1
CD289
1U_0402_6.3V6K
1U_0402_6.3V6K
2
CD238
@
1
CD288
1U_0402_6.3V6K
1U_0402_6.3V6K
2
CD253
1
CD287
1U_0402_6.3V6K
1U_0402_6.3V6K
2
DDR4 Channel A
DDR4 Channel B
CD232
1
CD286 CD246
CD304
2
1U_0402_6.3V6K
2
1U_0402_6.3V6K 10U_0603_6.3V6M
2
@
10U_0603_6.3V6M CD241
1
CD285 CD237
CD303
2
1U_0402_6.3V6K
2
1U_0402_6.3V6K 10U_0603_6.3V6M
2
10U_0603_6.3V6M CD245
1
2
CD284 CD234
1U_0201_6.3V6M
CD302
2
CD236
2
1U_0402_6.3V6K 10U_0603_6.3V6M
2
10U_0603_6.3V6M
1
2
@
CD283 CD229
CD301
2
1U_0402_6.3V6K
2
1U_0402_6.3V6K 10U_0603_6.3V6M
2
10U_0603_6.3V6M CD230
2
1U_0201_6.3V6M
CD282
A
A
CD239
CD267
1U_0402_6.3V6K CD300
2
1
2
CD281 10U_0603_6.3V6M
10U_0603_6.3V6M
+1.2V
+1.2V
1
4
5 4 3 2 1
UT1A
[12] PCIE_PTX_C_DRX_P1
PCIE_PTX_C_DRX_P1 Y23 V23 PCIE_PRX_C_DTX_P1 CT14 TBT@ 1 2 0.22U_0201_6.3V6M
PCIE_PRX_DTX_P1 [12]
Closed to UT1 +3.3V_TBT_SX
PCIE_PTX_C_DRX_N1 Y22 PCIE_RX0_P PCIE_TX0_P V22 PCIE_PRX_C_DTX_N1 CT16 TBT@ 1 2 0.22U_0201_6.3V6M
[12] PCIE_PTX_C_DRX_N1 PCIE_RX0_N PCIE_TX0_N PCIE_PRX_DTX_N1 [12]
PCIE_PTX_C_DRX_P2 T23 P23 PCIE_PRX_C_DTX_P2 CT12 TBT@ 1 2 0.22U_0201_6.3V6M
PCIe GEN3
[12] PCIE_PTX_C_DRX_P2 PCIE_PTX_C_DRX_N2 PCIE_RX1_P PCIE_TX1_P PCIE_PRX_DTX_P2 [12]
T22 P22 PCIE_PRX_C_DTX_N2 CT2 TBT@ 1 2 0.22U_0201_6.3V6M TBT_PCIE_WAKE# RT20 2 TBT@ 1 10K_0201_5%
[12] PCIE_PTX_C_DRX_N2 PCIE_RX1_N PCIE_TX1_N PCIE_PRX_DTX_N2 [12] TBT_CIO_PLUG_EVENT# RT108 2 TBT@ 1 10K_0201_5%
PCIE_PTX_C_DRX_P3 M23 K23 PCIE_PRX_C_DTX_P3 TBT@ 1
CT1027 2 0.22U_0201_6.3V6M TBTA_I2C_INT RT111 2 TBT@ 1 10K_0201_5%
[12] PCIE_PTX_C_DRX_P3 PCIE_PTX_C_DRX_N3 PCIE_RX2_P PCIE_TX2_P PCIE_PRX_DTX_P3 [12]
M22 K22 PCIE_PRX_C_DTX_N3 TBT@ 1
CT1026 2 0.22U_0201_6.3V6M TBTB_I2C_INT RT112 2 @ 1 10K_0201_5%
[12] PCIE_PTX_C_DRX_N3 PCIE_RX2_N PCIE_TX2_N PCIE_PRX_DTX_N3 [12] RTD3_CIO_PWR_EN_R RT117 2 TBT@ 1 10K_0201_5%
PCIE_PTX_C_DRX_P4 H23 F23 PCIE_PRX_C_DTX_P4 TBT@ 1
CT1025 2 0.22U_0201_6.3V6M TBT_A_AUX_N_C RT93811 TBT@ 2 100K_0201_5%
[12] PCIE_PTX_C_DRX_P4 PCIE_PTX_C_DRX_N4 PCIE_RX3_P PCIE_TX3_P PCIE_PRX_C_DTX_N4 PCIE_PRX_DTX_P4 [12] TBT_B_AUX_N_C
D
[12] PCIE_PTX_C_DRX_N4
H22 F22 TBT@ 1
CT1024 2 0.22U_0201_6.3V6M RT93801 TBT@ 2 100K_0201_5% D
PCIE_RX3_N PCIE_TX3_N PCIE_PRX_DTX_N4 [12]
CLK_PCIE_TBT V19 L4 PCI_RST# TBT_I2C_SDA RT138 2 TBT@ 1 2.2K_0201_5%
[10] CLK_PCIE_TBT CLK_PCIE_TBT# PCIE_REFCLK_100_IN_P PERST_N PCI_RST# [10,28,33] TBT_I2C_SCL
T19 RT139 2 TBT@ 1 2.2K_0201_5%
[10] CLK_PCIE_TBT# TBTCLK_REQ# PCIE_REFCLK_100_IN_N N16 PCIE_RBIAS
AC5 RT140 1 TBT@ 2 3.01K_0201_1%
[10] TBTCLK_REQ# PCIE_CLKREQ_N PCIE_RBIAS
0.1U_0201_10V6K 2 1 TBT@ CT226 CPU_DP1_P0_C AB7 R2
[6] CPU_DP1_P0 CPU_DP1_N0_C DPSNK0_ML0_P DPSRC_ML0_P
[6] CPU_DP1_N0 0.1U_0201_10V6K 2 1 TBT@ CT218 AC7 R1
DPSNK0_ML0_N DPSRC_ML0_N TBT_SRC_CFG1 RT126 2 @ 1 10K_0201_5%
0.1U_0201_10V6K 2 1 TBT@ CT276 CPU_DP1_P1_C AB9 N2
[6] CPU_DP1_P1 CPU_DP1_N1_C DPSNK0_ML1_P DPSRC_ML1_P DPSNK_DDC_CLK
0.1U_0201_10V6K 2 1 TBT@ CT277 AC9 N1 SRC0
SOURCE PORT 0
[6] CPU_DP1_N1 DPSNK0_ML1_N DPSRC_ML1_N DPSNK_DDC_DATA
SINK PORT 0
0.1U_0201_10V6K 2 1 TBT@ CT317 CPU_DP1_P2_C AB11 L2
[6] CPU_DP1_P2
0.1U_0201_10V6K 2 1 TBT@ CT312 CPU_DP1_N2_C AC11 DPSNK0_ML2_P DPSRC_ML2_P L1
Enable 2.2K pull high 3.3V for enable function
[6] CPU_DP1_N2 DPSNK0_ML2_N DPSRC_ML2_N
0.1U_0201_10V6K 2 1 TBT@ CT323 CPU_DP1_P3_C AB13 J2
Disable 100K pull down
[6] CPU_DP1_P3 CPU_DP1_N3_C DPSNK0_ML3_P DPSRC_ML3_P TBT_SRC_CFG1
[6] CPU_DP1_N3 0.1U_0201_10V6K 2 1 TBT@ CT339 AC13 J1 RT135 1 TBT@ 2 1M_0201_1%
DPSNK0_ML3_N DPSRC_ML3_N DPSRC_HPD RT93851 TBT@ 2 1M_0201_1%
0.1U_0201_10V6K 2 1 TBT@ CT468 CPU_DP1_AUXP_C Y11 W19 TBT_DDPB_CTRL_CLK RT93591 TBT@ 2 100K_0201_5%
[6] DDI1_AUX_DP
0.1U_0201_10V6K 2 1 TBT@ CT659 CPU_DP1_AUXN_C W11 DPSNK0_AUX_P DPSRC_AUX_P Y19
DPSNK Rbias TBT_DDPB_CTRL_DATA RT93581 TBT@ 2 100K_0201_5%
[6] DDI1_AUX_DN DPSNK0_AUX_N DPSRC_AUX_N Place as close as possible to pins TBT_DDPC_CTRL_CLK RT93571 TBT@ 2 100K_0201_5%
CPU_DP1_HPD AA2 G1 DPSRC_HPD TBT_DDPC_CTRL_DATA RT93561 TBT@ 2 100K_0201_5%
[6] CPU_DP1_HPD DPSNK0_HPD DPSRC_HPD TBT_HDMI_DDC_DATA
CPU DDI RT109 1 TBT@ 2 100K_0201_5%
TBT_DDPB_CTRL_CLK Y5 N6 DPSRC_RBIAS 1 TBT@ 2 TBT_HDMI_DDC_CLK RT110 1 TBT@ 2 100K_0201_5%
Near UT1 TBT_DDPB_CTRL_DATAR4 DPSNK0_DDC_CLK DPSRC_RBIAS 14K_0402_1% RT9354 TBT_TMU_CLK_OUT RT38 1 TBT@ 2 100K_0201_5%
DPSNK0_DDC_DATA U1 TBT_I2C_SDA TBT_FORCE_PWR RT127 1 TBT@ 2 100K_0201_5%
CPU_DP2_P0_C GPIO_0 TBT_I2C_SCL TBT_I2C_SDA [23] RTD3_USB_PWR_EN_R
[6] CPU_DP2_P0 0.1U_0201_10V6K 2 1 TBT@ CT1029 AB15 U2
TBT_I2C_SCL [23] RT115 1 TBT@ 2 10K_0201_5%
0.1U_0201_10V6K 2 1 TBT@ CT1030 CPU_DP2_N0_C AC15 DPSNK1_ML0_P GPIO_1 V1 TBT_EE_WP_N TBT_TEST_PWG RT136 1 TBT@ 2 100_0201_5%
LC GPIO
[6] CPU_DP2_N0 DPSNK1_ML0_N GPIO_2 TBT_TMU_CLK_OUT TBT_TEST_EN
V2 RT137 1 TBT@ 2 100_0201_5%
0.1U_0201_10V6K 2 1 TBT@ CT1028 CPU_DP2_P1_C AB17 GPIO_3 W1 TBT_PCIE_WAKE# RT77 1 2 0_0402_5% TBT_A_AUX_P_C RT93791 TBT@ 2 100K_0201_5%
[6] CPU_DP2_P1 CPU_DP2_N1_C DPSNK1_ML1_P GPIO_4 EC_PCIE_WAKE# [28,33]
0.1U_0201_10V6K 2 1 TBT@ CT1032 AC17 W2 TBT_CIO_PLUG_EVENT# TBT_B_AUX_P_C RT93781 TBT@ 2 100K_0201_5%
[6] CPU_DP2_N1 DPSNK1_ML1_N GPIO_5 TBT_HDMI_DDC_DATA TBT_CIO_PLUG_EVENT# [8]
Y1
C 0.1U_0201_10V6K 2 1 TBT@ CT1031 CPU_DP2_P2_C AB19 GPIO_6 Y2 TBT_HDMI_DDC_CLK RTD3_CIO_PWR_EN_R RT116 2 @ 1 10K_0201_5% C
SINK PORT 1
[6] CPU_DP2_P2 CPU_DP2_N2_C DPSNK1_ML2_P GPIO_7
0.1U_0201_10V6K 2 1 TBT@ CT1035 AC19 AA1 TBT_SRC_CFG1
[6] CPU_DP2_N2 DPSNK1_ML2_N GPIO_8 TBTA_I2C_INT
J4
TBTA_I2C_INT [23] BATLOW# RT31 2 @ 1 10K_0201_5%
0.1U_0201_10V6K 2 1 TBT@ CT1033 CPU_DP2_P3_C AB21 POC_GPIO_0 E2 TBTB_I2C_INT SUSP#_R RT30 2 @ 1 10K_0201_5%
POC GPIO
[6] CPU_DP2_P3 CPU_DP2_N3_C DPSNK1_ML3_P POC_GPIO_1 RTD3_USB_PWR_EN_R
0.1U_0201_10V6K 2 1 TBT@ CT1034 AC21 D4
[6] CPU_DP2_N3 DPSNK1_ML3_N POC_GPIO_2 TBT_FORCE_PWR
H4 @
CPU_DP2_AUXP_C Y12 POC_GPIO_3 TBT_FORCE_PWR [6]
[6] DDI2_AUX_DP 0.1U_0201_10V6K 2 1 TBT@ CT1037 F2 BATLOW# R9604 1 2 0_0402_5%
PM_BATLOW# [10]
0.1U_0201_10V6K 2 1 TBT@ CT1036 CPU_DP2_AUXN_C W12 DPSNK1_AUX_P POC_GPIO_4 D2 SUSP#_R R9605 1 2 0_0402_5%
[6] DDI2_AUX_DN DPSNK1_AUX_N POC_GPIO_5 RTD3_CIO_PWR_EN_R SUSP# [13,32,33,38]
F1 @ EMI@
CPU_DP2_HPD Y6 POC_GPIO_6 TBT_XTAL_25_IN 1 2 TBT_XTAL_25_IN_R
[6] CPU_DP2_HPD DPSNK1_HPD E1 TBT_TEST_EN R9598 33_0201_1%
TBT_DDPC_CTRL_CLK Y8 TEST_EN
Misc
TBT_DDPC_CTRL_DATAN4 DPSNK1_DDC_CLK AB5 TBT_TEST_PWG
DPSNK1_DDC_DATA TEST_PWR_GOOD LC100 @EMI@
1 TBT@ 2 DPSNK_RBIAS Y18 F4 1 2
DPSNK_RBIAS RESET_N TBT_RESET_N [23] 1 2
14K_0402_1% RT5
TBT_TDI Y4 D22 TBT_XTAL_25_IN
DPSNK Rbias TBT_TMS V4 TDI XTAL_25_IN D23 TBT_XTAL_25_OUT 4 3
Place as close as possible to pins TBT_TCK T4 TMS XTAL_25_OUT 4 3
TBT_TDO TCK AB3 TBT_EE_DI
W4
TDO MISC EE_DI TBT_EE_DI [23]
DLM0NSN900HY2D_4P YT1 TBT@ SJ10000UH00
AC4 TBT_EE_DO 25MHZ_20PF_XRCGB25M000F2P18R0
Place as close as possible to pinsTBT_RSENSE H6 EE_DO AC3 TBT_EE_CS_N TBT_EE_DO [23]
EMI@
2 1 TBT_RBIAS J6 RBIAS EE_CS_N AB4 TBT_EE_CLK TBT_EE_CS_N [23] TBT_XTAL_25_OUT 1 2 TBT_XTAL_25_OUT_R 3 1
Near UT1 RT25 TBT@ 4.75K_0402_0.5% RSENSE EE_CLK TBT_EE_CLK [23] Near UT1 R9599 33_0201_1% 3 1
A15 B7 NC NC
[24] USB3_A_TRX_DTX_P0 PA_RX1_P PB_RX1_P USB3_B_TRX_DTX_P0 [25]
B15 A7 1 1
[24] USB3_A_TRX_DTX_N0 PA_RX1_N PB_RX1_N USB3_B_TRX_DTX_N0 [25] 4 2 TBT@
CT39 TBT@ 2 1 0.22U_0201_6.3V6M USB3_A_TTX_DRX_P0 A17 A9 USB3_B_TTX_DRX_P0 CT1041 TBT@ 2 1 0.22U_0201_6.3V6M CT37 TBT@ CT38
[24] USB3_A_TTX_C_DRX_P0 PA_TX1_P PB_TX1_P USB3_B_TTX_C_DRX_P0 [25]
Type-C CT40 TBT@ 2 1 0.22U_0201_6.3V6M USB3_A_TTX_DRX_N0 B17 B9 USB3_B_TTX_DRX_N0 CT1040 TBT@ 2 1 0.22U_0201_6.3V6M 27P_0402_50V8J 27P_0402_50V8J
[24] USB3_A_TTX_C_DRX_N0 PA_TX1_N PB_TX1_N USB3_B_TTX_C_DRX_N0 [25] 2 2
CONN CT41 TBT@ 2 1 0.22U_0201_6.3V6M USB3_A_TTX_DRX_P1 A19 A11 USB3_B_TTX_DRX_P1 CT1039 TBT@ 2 1 0.22U_0201_6.3V6M
[24] USB3_A_TTX_C_DRX_P1 PA_TX0_P PB_TX0_P USB3_B_TTX_C_DRX_P1 [25]
CT42 TBT@ 2 1 0.22U_0201_6.3V6M USB3_A_TTX_DRX_N1 B19 B11 USB3_B_TTX_DRX_N1 CT1038 TBT@ 2 1 0.22U_0201_6.3V6M
B
[24] USB3_A_TTX_C_DRX_N1 PA_TX0_N PB_TX0_N USB3_B_TTX_C_DRX_N1 [25] B
TBT PORTS
B21 A13
[24] USB3_A_TRX_DTX_P1 PA_RX0_P PB_RX0_P USB3_B_TRX_DTX_P1 [25]
A21 B13
Port A
PORT B
[24] USB3_A_TRX_DTX_N1 PA_RX0_N PB_RX0_N USB3_B_TRX_DTX_N1 [25]
CT43 TBT@ 2 1 0.1U_0201_10V6K TBT_A_AUX_P Y15 Y16 TBT_B_AUX_P CT1042TBT@ 2 1 0.1U_0201_10V6K
[24] TBT_A_AUX_P_C TBT_A_AUX_N PA_DPSRC_AUX_P PB_DPSRC_AUX_P TBT_B_AUX_P_C [25]
CT44 TBT@ 2 1 0.1U_0201_10V6K W15 W16 TBT_B_AUX_N CT1043TBT@ 2 1 0.1U_0201_10V6K TBTA_I2C_INT
[24] TBT_A_AUX_N_C PA_DPSRC_AUX_N PB_DPSRC_AUX_N TBT_B_AUX_N_C [25]
E20 E19
D20 PA_USB2_D_P PB_USB2_D_P D19
PD PA_USB2_D_N PB_USB2_D_N
2
TBTA_LSTX A5 B4 TBTB_LSTX RT9376
[24] TBTA_LSTX TBTA_LSRX PA_LS_G1 PB_LS_G1 TBTB_LSRX TBTB_LSTX [25]
POC
POC
Vinafix.com A4 B5 @ 0_0201_5%
[24] TBTA_LSRX TBTA_HPD PA_LS_G2 PB_LS_G2 TBTB_HPD TBTB_LSRX [25]
M4 G2
[23] TBTA_HPD PA_LS_G3 PB_LS_G3 TBTB_HPD [23]
1
+3.3V_FLASH 2 TBT@ 1 PA_USB2_RBIAS H19 F19 PB_USB2_RBIAS 2 TBT@ 1
RT43 499_0201_1% PA_USB2_RBIAS PB_USB2_RBIAS RT9355 499_0201_1%
AC23 D6 TBTB_I2C_INT
THERMDA MONDC_SVR
2
USB2 Rbias AB23

RT105 THERMDA A23
0_0402_5%
Place as close as possible to pins V18 ATEST_P B23
PCIE_ATEST ATEST_N
AC1
TEST_EDM DEBUG USB2_ATEST
E18
1
UT2 TBT@
+3.3V_FLASH_R 8 1 TBT_EE_CS_N L15 W13 +3.3V_LC RT9377 1 TBT@ 2 100K_0402_5% TBTB_HPD
TBT_HOLD_N 7 VCC CS# 2 TBT_EE_DO N15 FUSE_VQPS_64 MONDC_DPSNK_0 +3.3V_LC RT41 1 TBT@ 2 100K_0402_5% TBTA_HPD
TBT_EE_CLK 6 HOLD#(IO3) DO(IO1) 3 TBT_EE_WP_N FUSE_VQPS_128 W18 JTAG1 @ RT1037 1 TBT@ 2 100K_0402_5%CPU_DP1_HPD
TBT_EE_DI 5 CLK WP#(IO2) 4 C23 MONDC_DPSNK_1 RPT3 1 2 100K_0402_5%CPU_DP2_HPD
RT9384 1 TBT@
DI(IO0) GND C22 MONDC_CIO_0 AB2 1 8 TBT_TDI TBT_TDI 2 1
RT50 1 TBT@ 2 2.2K_0402_5% TBT_EE_CS_N W25Q80DVSSIG_SO8 MONDC_CIO_1 MONDC_DPSRC 2 7 TBT_TDO TBT_TMS 3 2
RT51 1 TBT@ 2 3.3K_0402_5% TBT_HOLD_N
SA00003EW10 3 6 TBT_TMS TBT_TCK 4 3
RT48 1 TBT@ 2 3.3K_0402_5% TBT_EE_WP_N ALPINE-RIDGE_BGA337 4 5 TBT_TCK TBT_TDO 5 4
RT49 2 TBT@ 1 2.2K_0402_5% TBT_EE_DO UT1 @ 6 5 RT42 1 TBT@ 2 1M_0201_1% TBTA_LSTX
A SA00009ZV60 6 RT120 1 TBT@ 2 1M_0201_1% TBTA_LSRX A
S IC JHL6540 SLLSM C1 FC-CSP 337P 10K_0804_8P4R_5% 7 RT9383 1 TBT@ 2 1M_0201_1% TBTB_LSTX
1 GND TBTB_LSRX
TBT@ TBT@ TBT@ 8 RT9382 1 TBT@ 2 1M_0201_1%
CT45 GND
0.1U_0201_10V K X5R ACES_50228-0067N-001
2

Thunderbolt AR-LP(1/4)
5 4 3 2 1
5 4 3 2 1
+3VALW +3VS_TBT +3.3V_TBT_SX +3VS_TBT +3VS_TBT

+3.3V_TBT_SX
1
1 @ 2 +3.3V_LC
+3VALW +3VS_TBT
0.1U_0201_10V K X5R
RT841 0_0402_5%
SHI0000N600 TBT@ LT7
1 2 1 2 1UH +-20% LQM18PN1R0MFHD
1U_0201_6.3V6M
CT1049 TBT@
RT842 0_0805_5% RT843 0_0402_5% 1 1
CT1048 TBT@
Cable Disconnect / Sleep Mode
2
VCC3P3_SVR
AR ON Mode
47U_0603_6.3V6M
2 2 VCC3P3_SVR
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
+V0P9_CIO +V0P9_USB +V0P9_PCIE +V0P9_DP
10U_0603_6.3V6M
22U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
CT1060 @TBT@
CT1058 @TBT@
CT129 @TBT@
CT1062 TBT@
CT1063 TBT@
CT123 TBT@
CT141 TBT@
CT1072 TBT@
CT142 TBT@
CT1061 TBT@
CT1059 TBT@
CT130 TBT@
CT137 TBT@
CT138 TBT@
CT139 TBT@
CT140 TBT@
1 1 1 1 1 1 1 1 1 1 1 1
1
+V0P9_DP
R13
UT1B
R6
H9
F8
D D
2
2 2 2 2 2 2 2 2 2 2 2 2
L8 A2
VCC3P3_SX
VCC3P3A
VCC3P3_LC
VCC3P3_S0
L11 VCC0P9_DP VCC3P3_SVR A3
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
L12 VCC0P9_DP VCC3P3_SVR B3
1 1 1 1 1 1 VCC0P9_DP VCC3P3_SVR
CT1045 TBT@
CT1044 TBT@
CT54 @TBT@
CT125 TBT@
CT126 TBT@
CT127 TBT@
M8
T11 VCC0P9_DP
T12 VCC0P9_DP L9 +0.9V_SVR
2 2 2 2 2 2 L6 VCC0P9_DP VCC0P9_SVR M9
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
VCC0P9_ANA_DPSRC VCC0P9_SVR
1U_0201_6.3V6M
M6 E12 1 1 1 1 1 1 1
VCC0P9_ANA_DPSRC VCC0P9_SVR_ANA
CT1053 TBT@
CT1050 TBT@
CT1052 TBT@
CT1051 TBT@
CT128 TBT@
CT1054 TBT@
CT1055 TBT@
V11 E13
V12 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F11
V13 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F12
VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F13 2 2 2 2 2 2 2
M13 VCC0P9_SVR_ANA F15
M15 VCC0P9_PCIE VCC0P9_SVR_ANA J9
+V0P9_USB M16 VCC0P9_PCIE VCC0P9_SVR_SENSE
L19 VCC0P9_PCIE LT2 TBT@
N19 VCC0P9_ANA_PCIE_1 C1 TBT_SVR_IND 1 2 +0.9V_SVR
L18 VCC0P9_ANA_PCIE_1 SVR_IND C2 0.6UH_MND-04ABIR60M-XGL_20%
1U_0201_6.3V6M
1U_0201_6.3V6M
VCC0P9_ANA_PCIE_2 SVR_IND
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
M18 D1
VCC0P9_ANA_PCIE_2 SVR_IND
CT115 TBT@
CT1056 TBT@
1 1 N18
VCC
VCC0P9_ANA_PCIE_2
CT144 TBT@
CT145 TBT@
CT143 TBT@
CT1071 TBT@
1 1
1
R15 A1
R16 VCC0P9_USB SVR_VSS B1
2 2 VCC0P9_USB SVR_VSS B2
2
SVR_VSS
2
R8 2 2
R9 VCC0P9_CIO
R11 VCC0P9_CIO
R12 VCC0P9_CIO F18 +0.9V_LVR_OUT
VCC0P9_CIO VCC0P9_LVR H18
VCC0P9_LVR
47U_0603_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
L16 J11
1U_0201_6.3V6M
1U_0201_6.3V6M
VCC3P3_ANA_PCIE VCC0P9_LVR
CT146 @TBT@
+V0P9_PCIE J16 H11
1U_0201_6.3V6M
1U_0201_6.3V6M
VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE 1 1 1 1 1
1
RT9386 TBT@
10K_0201_5%
CT136 TBT@
CT113 TBT@
CT135 TBT@
@
1 1
CT1047 TBT@
CT1046 TBT@ A6 V5
C
A8 VSS_ANA VSS_ANA V6 C
VSS_ANA VSS_ANA 2 2 2 2 2
CT114
A10 V8
2 2 VSS_ANA VSS_ANA
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
A12 V9
2
VSS_ANA VSS_ANA
CT118 TBT@
CT119 TBT@
CT120 TBT@
CT121 TBT@
1 1 1 1 A14 V15
A16 VSS_ANA VSS_ANA V16
A18 VSS_ANA VSS_ANA V20
A20 VSS_ANA VSS_ANA W5
2 2 2 2 A22 VSS_ANA VSS_ANA W6
B6 VSS_ANA VSS_ANA W8
B16 VSS_ANA VSS_ANA Y9
+V0P9_CIO B22 VSS_ANA VSS_ANA AA22
D8 VSS_ANA VSS_ANA AA23
D9 VSS_ANA VSS_ANA AB6
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M

VSS_ANA VSS_ANA
CT117 TBT@
CT116 TBT@
CT1057 TBT@
1 1 1 D15 AB14
GND
E8 VSS_ANA VSS_ANA AB20
2 2 2 E9 VSS_ANA VSS_ANA AB22
E11 VSS_ANA VSS_ANA AC6
E15 VSS_ANA VSS_ANA AC8
B
Vinafix.com E16
E22
E23
F9
F16
F20
G22
G23
H1
H2
H12
H13
H15
H16
H20
J5
J18
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AC10
AC12
AC14
AC16
AC18
AC20
AC22
D5
E4
E5
E6
F5
F6
H5
H8
J8
J12
B
J19 VSS_ANA VSS J13

J20 VSS_ANA VSS J15
J22 VSS_ANA VSS L13
J23 VSS_ANA VSS M11
K1 VSS_ANA VSS M12
K2 VSS_ANA VSS N8
L5 VSS_ANA VSS N9
L20 VSS_ANA VSS N11
L22 VSS_ANA VSS N12
L23 VSS_ANA VSS N13
M1 VSS_ANA VSS T6
M2 VSS_ANA VSS T8
M5 VSS_ANA VSS T9
M19 VSS_ANA VSS T13
M20 VSS_ANA VSS T15
N5 VSS_ANA VSS T16
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
N20 VSS_ANA VSS T18

N22 VSS_ANA VSS AB1
N23 VSS_ANA VSS AC2
VSS_ANA VSS
R20
R22
P1
R23
P2
R5
R18
R19
T1
T2
T5
T20
U22
U23
ALPINE-RIDGE_BGA337
A @ A

Thunderbolt AR-LP(2/4)
1.0
5 4 3 2 1
5 4 3 2 1
+5VALW +5VALW_PD +3VALW +3VALW_PD
D D
120mil 3A 120mil 3A
CT91 @TBT@
22U_0402_6.3V6M
CT90 TBT@
CT92 TBT@
CT93 TBT@
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1
1 1 1 1
CT22
4.7U_0402_6.3V6K
2
2 2 2 2 TBT@
+TBTA_VBUS_F
+5VALW_PD +5VALW_PD 120mil 3A

120mil 3A 2 TBT@
2
TBT@ CT222
120mil 3A 2 2
CT260
1U_0603_25V6K
0.1U_0402_25V6
1
CT266 CT267 1
10U_0402_6.3V6M 22U_0402_6.3V6M
TBT@ @TBT@
1 1
Close to UT4 +TBTB_VBUS_F
+3VALW 120mil 3A
C C
2 TBT@
2
+3VALW_PD UT3 TBT@ CT1065
CT1066 0.1U_0402_25V6
7 8 1U_0603_25V6K
1
TBTA_CC1
2
PP_HV1 VBUS1 1 CT265 1 2 220P_0201_25V7K

3.3K_0201_5%
3.3K_0201_5%
RT9370
@ @ 10K_0201_5% 1 2 TBT@
TBT@ +3VALW_PD PP_HV2 VBUS2 +LDO_1V8_PD +3.3V_FLASH TBTA_CC2 CT1067 1 2 220P_0201_25V7K
Close to UT4
1
@ TBT@
5 RT453 1 2 0_0402_5% TBTB_CC1 CT1068 1 2 220P_0201_25V7K
R9589
R9588
1 LDO_3V3
3 26
CT263 VIN_3V3 LDO_1V8 TBT@
2 TBTB_CC2
3 1 1 2 220P_0201_25V7K
D
10U_0402_6.3V6M 2 10U_0402_6.3V6M CT264
2 TBT@ 15 TBTA_CC1 QT10 CT158
C1_CC1 TBTA_CC2 TBTA_CC1 [24]
17 TBTA_CC2 [24] CT262 DMP3056L-7_SOT23-3 TBT@ TBT@
18 C1_CC2 4.7U_0402_6.3V6M @ 1
G
[33,35,36] EC_SMB_CK1
2
19 I2C1_SCL 36 TBTB_CC1 1 TBT@
[33,35,36] EC_SMB_DA1 I2C1_SDA C2_CC1 TBTB_CC2 TBTB_CC1 [25]
20 38 TBTB_CC2 [25]
[33] PD_IRQ# I2C1_IRQ C2_CC2
[21] TBT_I2C_SCL
23
24 I2C2_SCL 4 ADCIN1
[21] TBT_I2C_SDA I2C2_SDA ADCIN1 +5VALW_PD
[21] TBTA_I2C_INT
25 6 ADCIN2
I2C2_IRQ ADCIN2 +3.3V_FLASH
16
PP1_CABLE 37
TBT_EE_DO PP2_CABLE 1 1
[21] TBT_EE_DO
27
TBT_EE_DI 28 SPI_MISO(GPIO8) 41 CT156 CT157
[21] TBT_EE_DI TBT_EE_CLK SPI_MOSI(GPIO9) C1_USB_P(GPIO18)
1
29 42 4.7U_0402_6.3V6M 0.1U_0201_10V6K
[21] TBT_EE_CLK TBT_EE_CS_N SPI_CLK(GPIO10) C1_USB_N(GPIO19) 2 2
[21] TBT_EE_CS_N
30 RT7060 RT7062
SPI_SS(GPIO11) 43 TBT@ 10K_0201_1% 10K_0201_1%
C2_USB_P(GPIO20) 44 TBT@ TBT@
C2_USB_N(GPIO21)
2
@ 9 TBT_RESET_N ADCIN1
R9603 1 2 0_0402_5% HRESET 35 GPIO0 10 GPIO1 TBT_RESET_N [21] ADCIN2
[33] PD_RESET HRESET GPIO1
Vinafix.com 11
GPIO2 21
HPD1(GPIO3) TBTA_HPD [21]
1
22 TBTB_HPD [21]
45 HPD2(GPIO4) 12 TBTA_DP_MODE RT7059 RT7061
NC GPIO5 TBTA_POL TBTA_DP_MODE [24]
46 13 100K_0201_1% 100K_0201_1%
NC GPIO6 TBTA_TBT_MODE TBTA_POL [24]
B 14 TBT@ TBT@ B
GPIO7 TBTA_TBT_MODE [24]
47 31
2
G-Pad GPIO12 32
+3VALW_PD GPIO13 TBTB_DP_MODE [25]
33
GPIO14(PWM) TBTB_POL [25] +5VALW_PD
A1 34
NC1 GPIO15(PWM) TBTA_PPEXT_EN TBTB_TBT_MODE [25]
A2 39
A3 NC2 GPIO16(PP_EXT1) 40 TBTB_PPEXT_EN TBTA_PPEXT_EN [34]
RT760 1 @ 2 100K_0201_5% HRESET A4 NC3 GPIO17(PP_EXT2) TBTB_PPEXT_EN [34]
NC4
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
RT9375 1 TBT@ 2 100K_0201_5%
@ SN1701012RSLR_VQFN48_6X6 2 2
0.01U_0201_6.3V7K 2 1 CT231
CT225
CT1064
SA0000BAN00
TBT@
GPIO1 1M_0201_1% 2 TBT@ 1 RT9387
1 1
TBTA_PPEXT_EN 100K_0201_5% 2 TBT@ 1 RT820
TBT@ TBT@
TBTB_PPEXT_EN 100K_0201_5% 2 TBT@ 1 RT9374
place near 16,37 pin

SI: Swap TBTA_PPEXT_EN & TBTB_PPEXT_EN
A A
Security Classification Compal Secret Data

Vinafix.com Compal Electronics, Inc.
CC_TPS65982DB
1.0
Date: Tuesday, December 05, 2017 Sheet 23 of 45
5 4 3 2 1
5 4 3 2 1
UT5 TBT@
ESD RPD_G1
7
6
DT232 ESD@ RPD_G2
USB3_A_TTX_C_DRX_P0 1 2
[21] USB3_A_TTX_C_DRX_P0 TBTA_CC1 TBTA_CC1_CONN
[23] TBTA_CC1 12 4
AZ5B25-01F_DFN0603P2Y2 CC1 C_CC1
DT233 ESD@ TBTA_CC2 11 TPD8S300 5 TBTA_CC2_CONN
USB3_A_TTX_C_DRX_N0 [23] TBTA_CC2 CC2 C_CC2
[21] USB3_A_TTX_C_DRX_N0 1 2
TBTA_SBU1 15 1 TBTA_SBU1_CONN
AZ5B25-01F_DFN0603P2Y2 SBU1 C_SBU1
DT234 ESD@ TBTA_SBU2 14 2 TBTA_SBU2_CONN
D USB3_A_TRX_DTX_P0 1 2 SBU2 C_SBU2 D
[21] USB3_A_TRX_DTX_P0
AZ5B25-01F_DFN0603P2Y2
DT235 ESD@ 20
USB3_A_TRX_DTX_N0 1 2 D1
[21] USB3_A_TRX_DTX_N0 +3.3V_FLASH 19
AZ5B25-01F_DFN0603P2Y2 3 D2
DT236 ESD@ VBIAS 17
USB3_A_TTX_C_DRX_P1 1 2 10 D3
[21] USB3_A_TTX_C_DRX_P1 VPWR 16
AZ5B25-01F_DFN0603P2Y2 D4
DT237 ESD@
USB3_A_TTX_C_DRX_N1 1 2 RT134 2 TBT@ 1 100K_0402_5% 9 18
[21] USB3_A_TTX_C_DRX_N1 FLT GND1 8
AZ5B25-01F_DFN0603P2Y2 GND2 13
GND3
1U_0201_6.3V6M
CT153
1U_0201_6.3V6M
CT154
DT238 ESD@ 1 1 21
USB3_A_TRX_DTX_P1 1 2 PAD
[21] USB3_A_TRX_DTX_P1
AZ5B25-01F_DFN0603P2Y2 TPD8S300_QFN20_3X3
2 2
TBT@
TBT@
DT239 ESD@
USB3_A_TRX_DTX_N1 1 2
[21] USB3_A_TRX_DTX_N1
EMI
LT3 EMI@
USB20_N3 1 2 USB20_N3_L
[12] USB20_N3 1 2
C USB20_P3 USB20_P3_L C
[12] USB20_P3 4 3
4 3
DLM0NSN900HY2D_4P
+3VALW_PD
ESD
ESD@ D26
UT9 3 6 USB20_N3_L
13 20 TBT_A_AUX_N_C I/O2 I/O4 DT242 @ESD@
VCC A1_OUTp TBT_A_AUX_P_C +5VALW_PD TBTA_CC2_CONN 1 1 TBTA_CC2_CONN
A1_OUTn
19 10 9
TBTA_SBU1 1
TBTA_SBU2 A_INp TBT_A_AUX_P_C TBTA_CC1_CONN
2 18
TBT_A_AUX_P_C [21]
2 5 2 2 9 8 TBTA_CC1_CONN
A_INn A0_OUTp 17 TBT_A_AUX_N_C GND VDD
A0_OUTn TBT_A_AUX_N_C [21] TBTA_SBU2_CONN
RT9366 1 @ 2 0_0201_5% 14 4 4 7 7 TBTA_SBU2_CONN
16 SAI 15 TBTA_POL
EN_A SAO USB20_P3_L TBTA_SBU1_CONN
[23] TBTA_DP_MODE TBTA_POL [23] 1 4 5 5 6 6 TBTA_SBU1_CONN
I/O1 I/O3
3 6 TBTA_LSRX AZC099-04S.R7G_SOT23-6 3 3
4 B_INp B1_OUTp 7 TBTA_LSTX
B_INn B1_OUTn 8
12 8 TBTA_LSTX
10 SBI B0_OUTp 9 TBTA_LSRX TBTA_LSTX [21] L05ESDL5V0NA-4_SLP2510P8-10-9
[23] TBTA_TBT_MODE EN_B B0_OUTn TBTA_LSRX [21]
Vinafix.com 5 11
GND SBO
2
21
RT9365 Thermal pad +TBTA_VBUS +TBTA_VBUS
0_0201_5% @ S IC TS3DS10224RUKR WQFN 20P
TBT@
B B
1
SA00008H700 JTYPEC1
A1 B12
TS3DS10224 Function Table GND_A1 GND_B12
USB3_A_TTX_C_DRX_P0 A2 B11 USB3_A_TRX_DTX_P0
USB3_A_TTX_C_DRX_N0 A3 SSTXP1 SSRXP1 B10 USB3_A_TRX_DTX_N0
SSTXN1 SSRXN1
TBT@ CT94 1 2 0.47U_0402_25V6K A4 B9 TBT@ CT96 1 2 0.47U_0402_25V6K
VBUS_A4 VBUS_B9
TBTA_CC2_CONN A5 B8 TBTA_SBU1_CONN
CC1 SBU2
USB20_P3_L A6 B7 USB20_N3_L
USB20_N3_L A7 DP1 DN2 B6 USB20_P3_L
Bottom
DN1 DP2
TOP
TBTA_SBU2_CONN A8 B5 TBTA_CC1_CONN
SBU1 CC2
VBUS_A9 VBUS_B4
USB3_A_TRX_DTX_N1 A10 B3 USB3_A_TTX_C_DRX_N1
USB3_A_TRX_DTX_P1 A11 SSRXN2 SSTXN2 B2 USB3_A_TTX_C_DRX_P1
SSRXP2 SSTXP2
A12 B1
GND_A12 GND_B1
1 2
GND1 GND2
3
3 4
5 GND3 GND4 6 ESD@ DT245
GND5 GND6
L30ESD24VC3-2_SOT23-3
1
DRAPH_UB11246-0500W-1H
ME@
A SP061706210 A

USB3.1 TypeC
1.0
5 4 3 2 1
5 4 3 2 1
UT6 TBT@
ESD RPD_G1
7
6
DT809 ESD@ RPD_G2
USB3_B_TTX_C_DRX_P0 1 2
[21] USB3_B_TTX_C_DRX_P0 TBTB_CC1 TBTB_CC1_CONN
[23] TBTB_CC1 12 4
AZ5B25-01F_DFN0603P2Y2 CC1 C_CC1
DT810 ESD@ TBTB_CC2 11 TPD8S300 5 TBTB_CC2_CONN
USB3_B_TTX_C_DRX_N0 [23] TBTB_CC2 CC2 C_CC2
[21] USB3_B_TTX_C_DRX_N0 1 2
TBTB_SBU1 15 1 TBTB_SBU1_CONN
AZ5B25-01F_DFN0603P2Y2 SBU1 C_SBU1
DT811 ESD@ TBTB_SBU2 14 2 TBTB_SBU2_CONN
USB3_B_TRX_DTX_P0 1 2 SBU2 C_SBU2
D [21] USB3_B_TRX_DTX_P0 D
DT812 ESD@ 20
USB3_B_TRX_DTX_N0 1 2 D1
[21] USB3_B_TRX_DTX_N0 +3.3V_FLASH 19
AZ5B25-01F_DFN0603P2Y2 3 D2
DT813 ESD@ VBIAS 17
USB3_B_TTX_C_DRX_P1 1 2 10 D3
[21] USB3_B_TTX_C_DRX_P1 VPWR 16
AZ5B25-01F_DFN0603P2Y2 D4
DT814 ESD@
USB3_B_TTX_C_DRX_N1 1 2 RT93712 TBT@ 1 100K_0402_5% 9 18
[21] USB3_B_TTX_C_DRX_N1 FLT GND1 8
AZ5B25-01F_DFN0603P2Y2 GND2 13
GND3
1U_0201_6.3V6M
CT1070 TBT@
1U_0201_6.3V6M
CT1069 TBT@
DT815 ESD@ 1 1 21
USB3_B_TRX_DTX_P1 1 2 PAD
[21] USB3_B_TRX_DTX_P1
AZ5B25-01F_DFN0603P2Y2 TPD8S300_QFN20_3X3
DT816 ESD@ 2 2
USB3_B_TRX_DTX_N1 1 2
[21] USB3_B_TRX_DTX_N1
EMI
DLM0NSN900HY2D_4P
USB20_N4 4 3 USB20_N4_L
C [12] USB20_N4 4 3 C
USB20_P4 1 2 USB20_P4_L
[12] USB20_P4 1 2
LT8 EMI@
DT817 @ESD@
TBTB_CC2_CONN 1 1 TBTB_CC2_CONN
10 9
+3VALW_PD
UT10
ESD TBTB_CC1_CONN 2 2 9 8 TBTB_CC1_CONN
13 20 TBT_B_AUX_N_C ESD@ D27 TBTB_SBU2_CONN 4 4 7 7 TBTB_SBU2_CONN

VCC A1_OUTp 19 TBT_B_AUX_P_C 3 6 USB20_N4_L
TBTB_SBU1 A1_OUTn I/O2 I/O4 TBTB_SBU1_CONN
1 5 5 6 6 TBTB_SBU1_CONN
TBTB_SBU2 2 A_INp 18 TBT_B_AUX_P_C +5VALW_PD
A_INn A0_OUTp TBT_B_AUX_N_C TBT_B_AUX_P_C [21]
17 3 3
A0_OUTn TBT_B_AUX_N_C [21]
RT9373 1 @ 2 0_0201_5% 14 2 5
16 SAI 15 TBTB_POL GND VDD 8
[23] TBTB_DP_MODE EN_A SAO TBTB_POL [23]
L05ESDL5V0NA-4_SLP2510P8-10-9
3 6 TBTB_LSRX 1 4 USB20_P4_L
4 B_INp B1_OUTp 7 TBTB_LSTX I/O1 I/O3
B_INn B1_OUTn AZC099-04S.R7G_SOT23-6
12 8 TBTB_LSTX
10 SBI B0_OUTp 9 TBTB_LSRX TBTB_LSTX [21]
[23] TBTB_TBT_MODE EN_B B0_OUTn TBTB_LSRX [21]
Vinafix.com 5 11
GND SBO
2
21
RT9372 Thermal pad
0_0201_5% @ S IC TS3DS10224RUKR WQFN 20P +TBTB_VBUS +TBTB_VBUS
TBT@
B B
1
SA00008H700
JTYPEC2
TS3DS10224 Function Table A1 B12
GND_A1 GND_B12
USB3_B_TTX_C_DRX_P0 A2 B11 USB3_B_TRX_DTX_P0
USB3_B_TTX_C_DRX_N0 A3 SSTXP1 SSRXP1 B10 USB3_B_TRX_DTX_N0
SSTXN1 SSRXN1
VBUS_A4 VBUS_B9
TBTB_CC2_CONN A5 B8 TBTB_SBU1_CONN
CC1 SBU2
USB20_P4_L A6 B7 USB20_N4_L
USB20_N4_L A7 DP1 DN2 B6 USB20_P4_L
Bottom
DN1 DP2
TOP
TBTB_SBU2_CONN A8 B5 TBTB_CC1_CONN
SBU1 CC2
VBUS_A9 VBUS_B4
USB3_B_TRX_DTX_N1 A10 B3 USB3_B_TTX_C_DRX_N1
USB3_B_TRX_DTX_P1 A11 SSRXN2 SSTXN2 B2 USB3_B_TTX_C_DRX_P1
SSRXP2 SSTXP2
A12 B1
GND_A12 GND_B1
1 2
GND1 GND2
3
3 4
5 GND3 GND4 6 ESD@ DT11
GND5 GND6
L30ESD24VC3-2_SOT23-3
1
DRAPH_UB11246-0500W-1H
ME@
A A
SP061706210

USB3.1 TypeC
1.0
5 4 3 2 1
5 4 3 2 1
LCD Power Circuit

W=60mils
+3VS +LCDVDD_CONN
D D
W=60mils U10 R311
5 1 +LCDVDD 1 2
IN OUT
2 0_0805_5%
C128
1
4.7U_0402_6.3V6K
GND
1
C1220 4 3
1U_0402_6.3V6K EN OC
G5016KD1U SOT23 2
2
[6] PCH_ENVDD
1
R120
100K_0402_5%
2
R121 W=100mils
B+ 1 2 +LEDVDD
R211 1 @ 2 0_0402_5% 0_0805_5%
C133
From PCH [6,33] ENBKL 1
4.7U_0805_25V6-K
From EC R123 1 2 0_0402_5% DISPOFF#
C
[33] BKOFF#
2 @
2
eDP CONN. C
2
JEDP1
R218 R124 1
100K_0402_5% @ 100K_0402_5% 2 1
3 2
4 3
1
1
5 4
[6] INVPWM 5
DISPOFF# 6
EDP_HPD_R 7 6
8 7
+LCDVDD_CONN W=60mils 9 8
eDP C134 1 2 0.1U_0201_10V K X5R EDP_AUXN_C 10 9
[6] EDP_AUXN EDP_AUXP_C 10
C135 1 2 0.1U_0201_10V K X5R 11
[6] EDP_AUXP 1 2 EDP_TXP0_C 12 11
C136 0.1U_0201_10V K X5R
[6] EDP_TXP0 EDP_TXN0_C 12
C137 1 2 0.1U_0201_10V K X5R 13
[6] EDP_TXN0 1 2 EDP_TXP1_C 14 13
C138 0.1U_0201_10V K X5R
EDP_HPD_R [6] EDP_TXP1 EDP_TXN1_C 14
[6] EDP_HPD R126 1 2 0_0402_5% C139 1 2 0.1U_0201_10V K X5R 15
[6] EDP_TXN1 EDP_TXP2_C 15
C141 1 2 0.1U_0201_10V K X5R 16
[6] EDP_TXP2 16
1
C140 1 2 0.1U_0201_10V K X5R EDP_TXN2_C 17

[6] EDP_TXN2 EDP_TXP3_C 17
C142 1 2 0.1U_0201_10V K X5R 18
[6] EDP_TXP3 1 2 EDP_TXN3_C 19 18
R128 C143 0.1U_0201_10V K X5R
[6] EDP_TXN3 19
100K_0402_5% W=20mils 20
21 20
[12] USB20_P5
2
22 21
Camera [12] USB20_N5
23 22
24 23
EMI [29,33]
[29,33]
EC_SMB_DA4
EC_SMB_CK4
+3VS
25
26
27
24
25
26
Sensor +3VALW
28 27
29 28
Vinafix.com DMIC_CLK [33] TAB_SW# 29
30
[27] DMIC_CLK 30
DMIC 31
[27] DMIC_DAT 32 31
10P_0402_50V8J
1 2 10U_0402_6.3V6M 33 32
@EMI@
1 33
C1235 34
C1211
35 34
B [6] TS_I2C_RST# 35 B
36 41
2 [11] TS_INT# 37 36 G1 42
Touch Panel [11] I2C1_SDA_TS
38 37 G2 43
[11] I2C1_SCL_TS 38 G3
39 44
[33] TS_DISABLE# 39 G4
+3VS 40 45
40 G5
SP010013I00
C1236 1 2 0.1U_0201_10V K X5R ACES_50398-04041-001
@ESD@ ME@
RF
DISPOFF# EDP_HPD_R DFP7
ESD DMIC_DAT
DMIC_CLK
1 1
2 2
10 9
DMIC_DAT
DMIC_CLK
1 1 9 8
C232 C233 4 4 7 7
6.8P_0402_50V8C 6.8P_0402_50V8C
2 RF@ 2 RF@ 5 5 6 6
3 3
L05ESDL5V0NA-4_SLP2510P8-10-9
TAB_SW# TS_I2C_RST# TS_INT#
ESD@
1 1 1
C235 C236 C237
A 6.8P_0402_50V8C 6.8P_0402_50V8C 6.8P_0402_50V8C A
2 RF@ 2 RF@ 2 RF@

eDP / Camera
C 1.0
5 4 3 2 1
A B C D E
+5VS
ALC3240 +5VS_PVDD RA1 1 2 0_0805_5% Input place close audio codec
4.7U_0402_6.3V6K
4.7U_0402_6.3V6K
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
+3VDD_CODEC +3VDD_CODEC
2 1 2 1
+1.8VS
CA3
CA1
CA32
CA2
Combo Jack
2
1 2 1 2 RA38
2
CA17
4.7U_0402_6.3V6K
100K_0402_5% (Normal Open)
@
1
1 PLUG_IN_R RA13 1 2 200K_0402_1%~N PLUG_IN
1 1
29
34
39
1
UA1
SM010016720
EMI
PVDD1
PVDD2
CPVDD
DVDD
33_0402_5% 2 1 RA12 HDA_SDIN0_AUDIO 7 SM010016720
[9] HDA_SDIN0 SDATA-IN HP_OUTL EXT_MIC_SLEEVE
[9] HDA_SDOUT_AUDIO 4
SDATA-OUT HPOUT-L(PORT-I-L)
25
26 HP_OUTR Headphone W=40mils EXT_MIC_RING2
EMI@
EMI@
RA19 2
RA20 2
1 FBMA-L11-160808-121LMT 0603
1 FBMA-L11-160808-121LMT 0603
HGNDB
HGNDA
HPOUT-R(PORT-I-R) W=40mils HP_OUTL EMI@ RA22 1 2 47_0402_5% HPOUT_L
EMI PC_BEEP 11
PCBEEP
VREF
22
CA27 1 2 1U_0402_6.3V6K AGND
HP_OUTR EMI@ RA23 1 2 47_0402_5%
SD028470A80
HPOUT_R
Place RA10 & CA12 on AGND moat [9] HDA_BITCLK_AUDIO 5 27 CPVEE 2 1 SD028470A80
BCLK CPVEE
CA35 EMI@
CA36 EMI@
CA33 EMI@
CA34 EMI@
22P_0402_50V8J @EMI@ CA12 33_0402_5% 2 @EMI@ 1 RA10 CA20 1U_0402_6.3V6K
470P_0402_50V7K
470P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
For Universal Audio Jack
2
EXT_MIC_RING2 1 1
2
RA6 1 2 2.2K_0402_5% 13 17 LINE1-L CA21 2 1 1U_0402_6.3V6K
RA26
RA27
LINE1-R
10K_0402_5%
10K_0402_5%
wide 40MIL 1 2 2.2K_0402_5% EXT_MIC_SLEEVE 14 MIC2-L(PORT-F-L)/RING
MIC2-R(PORT-F-R)/SLEEVE
LINE1-R(PORT-C-R)
LINE1-L(PORT-C-L)
18 LINE1-L
EMI @ @
AGND
RA7 CA19 2 1 2.2U_0402_6.3V6M 15 24

+LINE1-VREFO-R LINE1-R CA22 2 1 1U_0402_6.3V6K
1
23 MIC2-CAP LINE1-VREFO-L 12 PLUG_IN_R 2 2
+MIC2-VREFO
1
MIC2-VREFO HP/ LINE1-JD(JD1)
SPK_L2+ 35 2
SM01000NY00
External DMIC
SPK_L1- 36 SPK-OUT-LP GPIO0/DMIC-DATA12 3 DMIC_CLK_R 220_0402_5%2 1 LA1 DMIC_DAT [26] RA29 1 2 4.7K_0402_5% AGND AGND AGND AGND AGND AGND
SPK_R1- 37 SPK-OUT-LN GPIO1/DMIC-CLK EMI@ DMIC_CLK [26]
SPK_R2+ 38 SPK-OUT-RN 8 RA32 1 2 4.7K_0402_5%
SPK-OUT-RP DVDD-IO +IOVDD_CODEC +LINE1-VREFO-R
AGND AGND
2.2U_0402_6.3V6M1 2 CA26 1
LDO1 21 28
2.2U_0402_6.3V6M1 2 CA16 LDO2 32 LDO1-CAP CBN 30 CA15
LDO3 6 LDO2-CAP CBP JHP1
1U_0402_6.3V6K
2.2U_0402_6.3V6M1 2 CA13 LDO3-CAP 2 HGNDA 3
40 1 2 HPOUT_L 1
PDB EC_MUTE# [33]
10 0_0402_5% RA11 2 1
VD33STB
9 DC DET 41
AVDD1
AVDD2
AVSS1
AVSS2
[9] HDA_SYNC_AUDIO SYNC THERMAL PAD PLUG_IN
RA8 10K_0402_5% 5
@
6
D2 D1
HPOUT_R
20
33
19
31
16
HGNDB 2 2 HPOUT_R 2
1 1
HPOUT_L 3
HGNDA 3 HGNDB 4 7
MESC5V02BD03_SOT23-3 MESC5V02BD03_SOT23-3
ESD@ @ESD@ DC231709260
YUQIU_PJ567-F07M1BE-G
2 2
ME@
AGND +3VALW
+5VDDA_CODEC +1.8VS
RA5 1 2
0_0402_5%
Place RA5 on AGND moat
CA8 1 2 1U_0402_6.3V6K
AGND
Place near Pin33 Output

EMI
SPEAK 4 ohm：
40 M
IL JSPK1
6
SPEAK 8 ohm：
20 M
IL GND2
+5VS → +5VDDA_C ODEC

5
GND1
Each PlaM or m Po wer Net Support Li st： SPK_R1-

SPK_R2+
SPK_L1-
LA8
LA7
2
2
1 0_0603_5%
1 0_0603_5%
SPK_R1-_CONN
SPK_R2+_CONN
SPK_L1-_CONN
4
3 4
3
LA6 2 1 0_0603_5% 2
SPK_L2+ LA5 2 1 0_0603_5% SPK_L2+_CONN 1 2
1
+5VS +5VDDA_CODEC
+1.5VS +1.8VS +3VS +5VS +3VALW
SP020018F00
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
JXT_WB201H-004G10M
RA4 2 1 0_0603_5% 1.5V(S0) 1.8V(S0) 3.3V(S0) 5V(S0) 3.3V(S0~S5) 1 1 1 1 ME@
EMI@ CA28
EMI@ CA29
EMI@ CA30
EMI@ CA31
Intel Broadwell V X V V V
0.1U_0201_10V K X5R
1U_0402_6.3V6K
1 1
Intel Skylake X V V V V 2 2 2 2
CA7
CA11
Place RA4 on AGND moat

2 2
3
Vinafix.com Place near Pin20
AGND
Each PlaM or m HDA Li nk Volt age Support ( Pi n 8)：
Intel
Intel Skylake
Broadwell V (default)
V (default)
3.3V 1.5V
V
V
ESD
SPK_R1-_CONN
SPK_R2+_CONN
+5VS
ESD protection needs to be placed near connector side
4
@ESD@
I/O4
VDD
I/O3
DA3
I/O2
GND
I/O1
3
1
SPK_L2+_CONN
SPK_L1-_CONN
3
AZC099-04S.R7G_SOT23-6
+3VS → +I OVDD_C ODEC +3VS → +3VDD_C ODEC PC Beep EMI

+3VS +IOVDD_CODEC +3VS +3VDD_CODEC
place close audio codec
RA40 1 2 47K_0402_5% BEEP_N CA37 2 1 0.1U_0201_10V6K PC_BEEP CA38 1 2 0_0201_5%

EC Beep [33] BEEP#
RA3 2 1 0_0603_5% RA2 2 1 0_0603_5% RA41 1 2 47K_0402_5%
APU Beep [9] HDA_SPKR
RA42 1 2 0_0402_5%
1U_0402_6.3V6K
0.1U_0201_10V K X5R
100P_0402_50V8J
CA40 @ESD@
0.1U_0201_10V K X5R
1 1
1
1
CA4
CA5
1
RA43 1 2 0_0402_5%
CA6
RA39
27K_0402_5%
2
2 2
Place near Pin8 2 CA42 1 2 0_0201_5%
2
update from 4K7 to 27K

Place near Pin1
GN D AGND
AGND
4 4
Security Classification Compal Secret Data

Vinafix.com Compal Electronics, Inc.
HD Audio Codec_ALC3240
A B C D E
A B C D E F G H
+3VS_SSD
SSD(TYPE M) +3VS_SSD
+3VS_SSD
0.01U_0402_16V7K
10U_0402_6.3V6M
+3VS R134 1 @ 2 0_0402_5%
0.1U_0201_10V6K
10U_0402_6.3V6M
NGFF_SSD_PEDET [12]
C222
2
C223
2
1 1 2
C220
C221
@ R17 R133
1 2 10K_0402_5%
1 SSD_DET@
2 2 1
0_0805_5%
1
D
NGFF_SSD_PEDET# 2 SSD_DET@
1 1
JSSD1 G
1 2 S Q32
3
3 GND 3.3VAUX 4 2N7002K_SOT23-3
5 GND 3.3VAUX 6
[12] PCIE_PRX_DTX_N9 PERn3 N/C
7 8
[12] PCIE_PRX_DTX_P9 PERp3 N/C
9 10
0.22U_0201_6.3V6M 2 1 CC118 PCIE_PTX_C_DRX_N9 11 GND DAS/DSS# 12
[12] PCIE_PTX_DRX_N9 PCIE_PTX_C_DRX_P9 PETn3 3.3VAUX
0.22U_0201_6.3V6M 2 1 CC119 13 14
[12] PCIE_PTX_DRX_P9 15 PETp3 3.3VAUX 16
17 GND 3.3VAUX 18
[12] PCIE_PRX_DTX_N10 PERn2 3.3VAUX
19 20
SSD PCIE
[12]
[12]
PCIE_PRX_DTX_P10
PCIE_PTX_DRX_N10
0.22U_0201_6.3V6M
0.22U_0201_6.3V6M
2
2
1 CC120
1 CC121
PCIE_PTX_C_DRX_N10
PCIE_PTX_C_DRX_P10
21
23
25
PERp2
GND
PETn2
N/C
N/C
N/C
22
24
26
NGFF_SSD_PEDET#
[12] PCIE_PTX_DRX_P10
27
29
PETp2
GND
N/C
N/C
28
30
H : PCIE Interface
[12]
[12]
PCIE_PRX_DTX_N11
PCIE_PRX_DTX_P11
31
33
PERn1
PERp1
N/C
N/C
32
34
L : SATA Interface
[12] PCIE_PTX_DRX_N11
0.22U_0201_6.3V6M
0.22U_0201_6.3V6M
2
2
1 CC102
1 CC103
PCIE_PTX_C_DRX_N11
PCIE_PTX_C_DRX_P11
35
37
GND
PETn1
N/C
N/C
36
38
Fellow 543016_SKL_U_Y_PDG_0_9
[12] PCIE_PTX_DRX_P11 PETp1 DEVSLP DEVSLP2 [12]
39 40
41 GND N/C 42
[12] SATA_PRX_C_DTX_P12 PERn0/SATA B+ N/C
43 44
[12] SATA_PRX_C_DTX_N12 45 PERp0/SATA B- N/C 46
SSD SATA 0.22U_0201_6.3V6M 2 1 CC122 SATA_PTX_C_DRX_N12 47 GND N/C 48
[12] SATA_PTX_DRX_N12 SATA_PTX_C_DRX_P12 PETn0/SATA A- N/C PCI_RST#
0.22U_0201_6.3V6M 2 1 CC123 49 50
[12] SATA_PTX_DRX_P12 51 PETp0/SATA A+ PERST# 52
GND CLKREQ# SSDCLK_REQ# [10]
53 54
[10] CLK_PCIE_SSD# 55 REFCLKn PEWake# 56
[10] CLK_PCIE_SSD REFCLKp N/C
57 58
GND N/C
67 68
NGFF_SSD_PEDET# 69 N/C SUSCLK 70
71 PEDET 3.3VAUX 72
73 GND 3.3VAUX 74
75 GND 3.3VAUX
GND
2 2
77 76
MTG77 MTG76
SP07001GE00
LOTES_APCI0146-P008A
ME@
NGFF WLAN /BT(TYPE E) +3VS
RWL153 1 2 0_0603_5%
+3VS_WLAN
+3VS_WLAN
1
JWLAN1
2
RF
GND_1 3.3VAUX_2 1
3 4 @
[12] USB20_P7 5 USB_D+ 3.3VAUX_4 6
BT CWL157 1 1
[12] USB20_N7 USB_D- LED1#
7 8 4.7U_0402_6.3V6K CWL155 CWL156
9 GND_7 PCM_CLK 10 2
Vinafix.com 11 SDIO_CLK PCM_SYNC 12 4.7U_0402_6.3V6K 0.1U_0201_10V K X5R
13 SDIO_CMD PCM_OUT 14 2 2
15 SDIO_DAT0 PCM_IN 16
17 SDIO_DAT1 LED2# 18
19 SDIO_DAT2 GND_18 20
21 SDIO_DAT3 UART_WAKE 22 WL_UART_RX R135 1 @ 2 0_0402_5%
3 SDIO_WAKE UART_TX UART0_RX [11] 3
23
SDIO_RST
32 WL_UART_TX R136 1 @ 2 0_0402_5%
UART for intel debugging in WIN7
33 UART_RX 34 UART0_TX [11]
35 GND_33 UART_RTS 36
[12] PCIE_PTX_C_DRX_P6 PET_RX_P0 UART_CTS
37 38
[12] PCIE_PTX_C_DRX_N6 39 PET_RX_N0 CLink_RST 40 EC_TX [33]
GND_39 CLink_DATA EC_RX [33]
41 42
[12] PCIE_PRX_DTX_P6 43 PER_TX_P0 CLink_CLK 44
[12] PCIE_PRX_DTX_N6 PER_TX_N0 COEX3
45 46
WLAN 47 GND_45 COEX2 48
[10] CLK_PCIE_WLAN 49 REFCLK_P0 COEX1 50
[10] CLK_PCIE_WLAN# REFCLK_N0 SUSCLK(32KHz) SUSCLK [10]
51 52 PCI_RST# [10,21,33]
RWL158 1 2 0_0402_5% WLANCLK_REQ#_R 53 GND_51 PERST0# 54
[10] WLANCLK_REQ# WAKE#_R CLKREQ0# W_DISABLE2# WLBT_OFF# [11]
[21,33] EC_PCIE_WAKE# RWL162 1 @ 2 0_0402_5% 55 56
PEWAKE0# W_DISABLE1# WL_OFF# [12]
57 58
59 GND_57 I2C_DAT 60
61 RSVD/PCIE_RX_P1 I2C_CLK 62
63 RSVD/PCIE_RX_N1 I2C_IRQ 64
65 GND_63 RSVD_64 66
67 RSVD/PCIE_TX_P1 RSVD_66 68
Note: The real behavior of BT_DISABLE are
69 RSVD/PCIE_TX_N1 RSVD_68 70 BT_DISABLE=LOW, BT=OFF
71 GND_69 RSVD_70 72 BT_DISABLE=HIGH, BT=ON
73 RSVD_71 3.3VAUX_72 74
RSVD_73 3.3VAUX_74
2
75
GND_75 76 RWL507
77 GND1 100K_0402_5%
GND2
LOTES_APCI0147-P007A
1
ME@
SP07001GF00
4 4

NGFF SSD/WLAN
C 1.0
A B C D E F G H
5 4 3 2 1
THERMISTOR +3VS
G-Sensor
2
EX_THM@
R390
Close to UTS1 0_0402_5% CPU
1
UTS1 EX_THM@
+3V_Thermal 1 8 EC_SMB_CK2 +3VS
1 VDD SCL EC_SMB_CK2 [8,33]
EX_THM@ +3VS_GS_R
CTS1 REMOTE1+ 2 7 EC_SMB_DA2 UGS2
D+ SDA EC_SMB_DA2 [8,33]
2200P_0402_50V7K RGS2 1 2 0_0402_5% +3VS_GS_R 7 3
D 2 VDD VDDIO D
0.1U_0201_10V K X5R
REMOTE1- 3 6 10 11
D- ALERT# CSB PS
+3V_Thermal RTS340 1 2 4.7K_0402_5% 4 5 2 5 4
EX_THM@ T_CRIT# GND 6 INT1 NC
INT2
CGS3
1
NCT7718W_MSOP8 2 SDO 9
1 [26,33] EC_SMB_DA4 12 SDx GND 8
[26,33] EC_SMB_CK4 SCx GNDIO
SMB Address: 1001100x
REMOTE1+/-: BMA250E_LGA12
SA00005BP10
Trace width/space:10/10 mil
Trace length:<8"
SMB Address: 0X18
DDR
REMOTE1+
1
1
C
EX_THM@ CTS2 2 QTS1 EX_THM@
100P_0402_50V8J B MMST3904-7-F_SOT323-3
2 E
Hall Sensor
3
REMOTE1-
+3VALW
LID_SW#
LID_SW# [33]
+EC_VCCA +EC_VCCA
3
C +EC_VCCA C
VCC
VOUT
16.5K_0402_1% 1 2
16.5K_0402_1%
16.5K_0402_1%
1
1
1
C6 C7
RTS337
RTS336
RTS342
GND
0.1U_0201_10V6K 10P_0402_50V8J
2 1
U14
2
2
1
TCS40DPR_SOT23F3
[33] CUST_TEMP1 [33] CUST_TEMP2 [33] CUST_TEMP3

1
1
1
RTS338 RTS339 RTS341
DDR 100K +-1% 0402 B25/50 4250K CPU 100K +-1% 0402 B25/50 4250K Charger 100K +-1% 0402 B25/50 4250K
2
2
2
ECAGND ECAGND ECAGND
B
Vinafix.com +5VS
RF168 2
[33]
1 0_0603_5%
EC_FAN_SPEED1
+5VS_FAN1 4
3
2
JFAN1
4 GND
3 GND
6
5
FD1 FD2 FD3 FD4
H4
HOLEA
H1
HOLEA
CPU
H2
HOLEA
H3
HOLEA
H27
HOLEA
DDR Shielding Clip
Larger
CLIP4
HOLEA
CLIP5
HOLEA
CLIP6
HOLEA
CLIP8
HOLEA
CLIP9
HOLEA
CLIP11
HOLEA
B
1
1
1
1
1
1 2 @ @ @ @ @ @
[33] EC_FAN_PWM1
1
1
1
1
1 2
SP010022U00
CF164 CF162 JXT_FP202DH-004M10M H_4P1X5P1 H_3P3 H_3P3 H_3P3 H_3P3
6.8P_0402_50V8C 10U_0603_6.3V6M
2 RF@ 1 ME@
H31 H15 H16 H25 H9 H30 H7 H12 H8 H13 H29 H28

Smaller
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA CLIP1 CLIP2 CLIP3 CLIP10 CLIP7 CLIP12 CLIP13 CLIP14
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
1
1
1
1
1
@ @ @ @ @ @ @ @
1
1
1
H_3P2 H_2P3-G H_2P3-G H_2P8X2P3 H_2P3 H_2P3 H_3P3 H_3P3 H_3P3 H_3P3 H_2P3-G H_2P1
+5VS
JFAN2 H17 H18 SSD WLAN USB3.0 Shielding Clip

RF169 2 1 0_0603_5% +5VS_FAN2 4 6 HOLEA HOLEA
[33] EC_FAN_SPEED2
3
2
4 GND
3 GND
5 H20
HOLEA
H19
HOLEA
Larger Smaller
1 2 CLIP15 CLIP16 CLIP19
[33] EC_FAN_PWM2
1
1 HOLEA HOLEA HOLEA

1 2
SP010022U00
1
1
CF1 CF163 JXT_FP202DH-004M10M
6.8P_0402_50V8C 10U_0603_6.3V6M H_2P9X3P2 H_2P9X3P5 @ @ @
1
1
1
2 RF@ 1 ME@
H_3P2 H_3P2
A A
EC_FAN_PWM2 EC_FAN_SPEED2
1 1
CF2 CF3
6.8P_0402_50V8C 6.8P_0402_50V8C
2 RF@ 2 RF@
FAN / Thermal Senser
C 1.0
5 4 3 2 1
Finger printer Keyboard ME@
JFP1 +5VS
1
2 1 KSI[0..7] JXT_FP257H-032G10M
3 2 KSI[0..7] [33] SP01002FA00
4 3 KSO[0..15] R263 2 1 866_0402_5% CAPS_LED#_R 32
5 4 KSO[0..15] [33] 31 32
5 [33] CAPS_LED# 31
6 9 KSO15 30 34
[12] USB20_P6 6 G1 30 GND
@ 7 10 KSO10 29 33
[12] USB20_N6 +3V_FP 7 G2 29 GND
C229
R9681 1 2 0_0402_5% 8 KSO11 28
+3VS 8 28
1 KSO14 27
R9680 1 2 0_0402_5% SP01001AE00 KSO13 26 27
+3VALW 26
@ ACES_51522-00801-001 ESD@ KSO12 25
25
0.1U_0201_10V K X5R
ME@ KSO3 24
DFP6 2 KSO6 23 24
ESD USB20_P6
USB20_N6
1 1
2 2
10 9
USB20_P6
USB20_N6
KSO8
KSO7
22
21
23
22
21
9 8 CFP166 KSO4 20
0.1U_0201_10V K X5R KSO2 19 20
4 4 19
7 7 KSI0 18
KSO1 17 18
5 5 17
6 6 KSO5 16
KSI3 15 16
15
Power Button Pad

3 3 KSI2 14
KSO0 13 14
8 KSI5 12 13
KSI4 11 12
L05ESDL5V0NA-4_SLP2510P8-10-9 KSO9 10 11
KSI6 9 10
ESD@ KSI7 8 9
KSI1 7 8
+3VL 6 7
5 6
4 5
4
Touch Pad
3
3
2
2
[33] KB_MUTLI_KEY 1 2
R170
SW2 1
100K_0402_5%
JKB1
+3VS +3VS TBF312KQR_5P
1
RTP2
1 2 ON/OFF# 1 3
[33] ON/OFF#
2 4
0_0402_5% @
CTP1
5
1
2
0.1U_0201_10V K X5R
RTP1
4.7K_0402_5% D24
ESD ESD@
2
JTP1 L03ESDL5V0CC3-2_SOT23-3
1
+TP_VCC 1
2 1
[11] I2C0_SCL_TP 2
3
[11] I2C0_SDA_TP 4 3
[11] TP_INT# TP_DISABLE#_R 4
1 2 5
[33] TP_DISABLE# 6 5
6
Novo Button
RTP3 7
0_0402_5% 8 G1
G2
SP01002DQ00
100P_0402_50V8J
100P_0402_50V8J
1 1 JXT_FP201CH-006G10M
3
+3VL
CTP2
CTP3
ME@
@
@ @ESD@
2
2 2 DTP1
PSOT24C_SOT23-3
R172
1
100K_0402_5%
SW1
1
NOVO# 1 2
[33] NOVO#
ESD 3 4
2
D23
ESD@
ESD TCHC2QR_2P
L03ESDL5V0CC3-2_SOT23-3
1
Keyboard Backlight
Vinafix.com
+5VS +5VALW
+5VS
KBL@
QKBL121
+5VS_KBL
JKBL1
LED [33]
[33]
Charger LED (LED_B) (White+Amber)
BATT_CHG_LED#
BATT_LOW_LED#
BATT_CHG_LED#
BATT_LOW_LED#
1
1
RS175
RS176
2
412_0402_1%
2
523_0402_1%
2
3
LED1
White
1
RS177 1
RS178 1 @
2 0_0402_5%
2 0_0402_5%
+VL
+3VL
1
4 6 Amber
3 1 3 4 GND 5
S
@ KBL@ SC50000FV10
RKBL1 RKBL2 2 3 GND HT-210UD5-BP5_AMBER-WHITE
10K_0402_5% 10K_0402_5% ME2301DC-G_SOT23-3 1 2
@ CKBL906
KBL@ CKBL908
10U_0603_6.3V6M
1
0.1U_0201_10V K X5R
G
1 2
2
R277 SP010022U00
[33] KB_BL_PWM 1 2 JXT_FP202DH-004M10M Power LED (LED_A) (White+Amber) LED2
30K_0402_1% 2 1 ME@ White

1 RS179
KBL@ KBL@
CKBL907 1 2 2
[33] PWR_LED#
0.01U_0402_16V7K 820_0402_1%
2 RS180 1 R173 1 2 0_0402_5%
PWR_BATT_LOW# +VL
[33] PWR_BATT_LOW# 1 2 3
976_0402_1%
Amber
SC50000FV10
HT-210UD5-BP5_AMBER-WHITE
LED3
White
RS181
PWR_LED# 1 2 2
820_0402_1%
RS182 1 R9674 1 2 0_0402_5% +VL
PWR_BATT_LOW# 1 2 3
976_0402_1%
Amber
SC50000FV10
HT-210UD5-BP5_AMBER-WHITE

2017/10/16 2020/5/17 Title
Issued Date Deciphered Date KBL/KBD/LED/TP/HS Conn.
C 1.0
5 4 3 2 1
ESD
USB Charger U3RXDN2 9 10
U3RXDP2 8 9
ESD@ D7
1 1U3RXDN2
2 2U3RXDP2
U2DP2 3
I/O2
ESD@ D8
I/O4
6
U3TXDN2 7 7 4 4U3TXDN2
2 5 +5V_CHGUSB
GND VDD
U3TXDP2 6 6 5 5U3TXDP2
3 3
+3VL +5VALW_USBCH +5V_CHGUSB 1 4 U2DN2
8 I/O1 I/O3
L30ESDL5V0C6-4 SOT23
D D
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
L05ESDL5V0NA-4 SLP2510P8 ESD
R2028
R2029
R118 @
80mil
2
USB_CHG_STATUS#
1
9
U12
IN
12
OUT 10 USB20_CH_P2 USB3.0_Port
[33]
[33]
USB_CHG_STATUS#
USB_CHG_ILIM_SEL USB_CHG_EN
13
4
5
STATUS#
FAULT#
ILIM_SEL
DP_IN 11
DM_IN 2
DM_OUT 3
USB20_CH_N2
USB20_N2
USB20_P2 USB20_N2 [12]
USB3.0 With USB2.0 For Charge
EMI
[33] USB_CHG_EN USB_CHG_CTL1 EN DP_OUT 15 USB20_P2 [12]
[33] USB_CHG_CTL1 6 R183 1 2 2.7M_0402_1%
USB_CHG_CTL2 7 CTL1 ILIM_LO 16 R197 1 2 24.9K_0402_1%
[33] USB_CHG_CTL2 USB_CHG_CTL3 8 CTL2 ILIM_HI 14 Intel_PCH_USB2.0
[33] USB_CHG_CTL3 CTL3 GND 17
1 L12 EMI@
T-PAD USB20_CH_N2
150U 6.3V M B2 R45M

1 1 2 U2DN2
1 2
2
C194 TPS2546RTER QFN 16P PWR SW
+
1
C195
R1659 0.1U_0201_10V K X5R SA000064O00 C198
10K_0402_5% 2 470P_0402_50V7K
@
USB20_CH_P2 4
4 3
3 U2DP2 USB3.0 CONN (for charger)
2 2 DLM0NSN900HY2D_4P
1
W=80mils
+5V_CHGUSB
RF U2DN2
1
2
JUSB1
VBUS
U2DP2 3 D-
+VL +5VALW_USBCH +5VALW 4 D+
GND
Down USB charger Iout ripple CMF-2012-2G45-32T_6P
U3RXDN2
U3RXDP2
5
6 STDA-SSRX- 10
must under 20mA on DC S5 STDA-SSRX+ GND
5
Intel_PCH_USB3.0 7 11
GND U3TXDN2 8 GND GND 12
C STDA-SSTX- GND C
U3TXDP2 9 13
L59 STDA-SSTX+ GND
+5VALW 1 R215 2 2 1 3 1 USB3_RX2_N 4 6 U3RXDN2 DC231709290
D
[12] USB3_RX2_N 4 6
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
47U_0805_6.3V6M
1 0_0603_5% BLM15PX331SN1D_2P Q28 1 SANTA_375010-1
ME2301DC-G_SOT23-3
1 1 C454 L60 C453 ME@
@ USB3_RX2_P
1
@ @ @ 4.7U_0402_6.3V6K 2 1 4.7U_0402_6.3V6K 3 1 U3RXDP2
G
[12] USB3_RX2_P
2
3 1
C224
C225
C226
C227
C228
BLM15PX331SN1D_2P
2 2
2
2 2
GND
+VL L15
2
R130 RF@
1 2
100K_0402_5%
+VL
1 @
D
1
22U_0603_6.3V6M
22U_0603_6.3V6M
C90
@ @ R339 1 2 0_0402_5% EC_ON_R 2 0.1U_0201_10V K X5R
[32,33,37,39] 3V/5VALW_PG
1
G Q29
2
C1221
C1222
S 2N7002K_SOT23-3
3
2
2
C457 CMF-2012-2G45-32T_6P
5
0.1U_0201_10V K X5R
1 GND
C168
0.1U_0201_10V K X5R
1 2 U3TXDN2_L 4 6 U3TXDN2
[12] USB3_TX2_N 4 6
C169
0.1U_0201_10V K X5R
1 2 U3TXDP2_L 3 1 U3TXDP2
[12] USB3_TX2_P 3 1
B Place TX AC coupling Cap (C168,169). Close to connector GND B

L16
2
RF@
Vinafix.com
A A

2017/10/16 2020/5/17 Title
USB2 / USB3 / FP / IO Board
Custom 1.0
5 4 3 2 1
A B C D E
+3VS +3VALW
+3VALW J4
2 1
2 1
+VL
10U_0603_6.3V6M
JUMP_43X79
10U_0603_6.3V6M
0.1U_0201_10V K X5R
1 1 1 1 1
0.1U_0201_10V K X5R +3VALW
C211
C212
1 1 +3VS
C231
C205
C206
@ C230
@ +3VALW to +3VS 2 2 2
6.8P_0402_50V8C
RF@
1 2
2 2
U13 6.8P_0402_50V8C
1 14 RF@
2 VIN1 VOUT1 13 +3VALW_3VS
VIN1 VOUT1
3 12 C207 1 2
ON1 CT1 470P_0402_50V7K
4 11
[13,21,33,38] SUSP# VBIAS GND
5 10 1 2 220P_0402_50V7K +5VS
+5VALW ON2 CT2 C213 J5
6 9 +5VALW_5VS 2 1
7 VIN2 VOUT2 8 2 1
VIN2 VOUT2
10U_0603_6.3V6M
10U_0603_6.3V6M
JUMP_43X79
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
1 1 15 1 1
GPAD
C214
C215
C217
C218
@ EM5209VF_DFN14_2X3 @
2 2 2 2
+5VALW to +5VS
2 2
3
Vinafix.com 3
For +1.8VALW Discharge For +0.6VS Discharge
+1.8VALW
+0.6VS
+5VALW
1
+5VALW
1
R2005
22_0603_5% R228
1
@
1
R2004 470_0402_5%
2
100K_0402_5% R230
2
@
100K_0402_5%
2
D D
2
1.8VALW_PWR_EN# 5 SUSP 5 @
G Q143B G Q144B
2N7002KDW_SOT363-6 2N7002KDW_SOT363-6
S S
4
4
6
6
4 D D 4
2 SUSP# 2 @
[31,33,37,39] 3V/5VALW_PG G G
Q143A Q144A
2N7002KDW_SOT363-6 2N7002KDW_SOT363-6
S S
1
1

DC to DC
C 1.0
A B C D E
+3VL +3VL
R189 1 @ 2 0_0603_5% 1@
C179
+3VALW_EC 100P_0402_50V8J
1 1 1 1 2
0.1U_0201_10V K X5R
C180
0.1U_0201_10V K X5R
C181
1000P_0402_50V7K
C182
1000P_0402_50V7K
C183
L20
BLM15AX601SN1D_2P
1 2 2 2 @ 2 @ 2 +EC_VCCA
+3VALW_EC +EC_VCCA
SM01000KL00 1 1
C184 C185 @
0.1U_0201_10V K X5R
111
125
L21 1000P_0402_50V7K
22
33
96
67
U11
9
1 2 2 ECAGND 2
BLM15AX601SN1D_2P
VCC0
VCC_LPC
VCC
VCC
VCC
VCC
AVCC
SM01000KL00
ECAGND
1 21 +3VALW
[23] PD_IRQ# GATEA20/GPIO00 EC_VCCST_PG/GPIO0F VCCST_PWRGD [10]
2 23 BEEP#
[37] 5VLDO_EN KBRST#/GPIO01 BEEP#/GPIO10 BEEP# [27]
100P_0402_50V8J
C124 @ESD@
3 26 1
[8] SERIRQ SERIRQ EC_FAN_PWM/GPIO12 EC_FAN_PWM1 [29]
1
4 PWM Output 27
[8] LPC_FRAME# LPC_FRAME# AC_OFF/GPIO13 EC_FAN_PWM2 [29]
5 R217
EMI
@EMI@ @EMI@
[8] LPC_AD3
[8] LPC_AD2
[8] LPC_AD1
7
8
10
LPC_AD3
LPC_AD2
LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38
63
64
VCIN1_BATT_TEMP [35,36]
2
10K_0402_5%
[8] LPC_AD0 LPC_AD0LPC & MISC VCIN1_BATT_DROP [37]
2
2 1 R190 2 1 10_0402_1% VCIN1_BATT_DROP/AD1/GPIO39 65
ADP_I/AD2/GPIO3A ADP_I [36] KB_MUTLI_KEY
C186 22P_0402_50V8J 12 AD Input 66
[8] CLK_LPC_EC 13 CLK_PCI_EC AD_BID/AD3/GPIO3B 75 CUST_TEMP3 [29]
[10,21,28] PCI_RST# EC_RST# PCIRST#/GPIO05 AD4/GPIO42
1 2 37 76
+3VALW_EC R192 @ 47K_0402_5% EC_SCI# 20 EC_RST# AD5/GPIO43 CUST_TEMP2 [29]
[6,10] EC_SCI#2 1 PM_CLKRUN#_R 38 EC_SCI#/GPIO0E
2 [8] PM_CLKRUN# CLKRUN#/GPIO1D
0_0402_5% @ R300
C187 @ 68
DA0/GPIO3C NOVO# [30] VCIN1_BATT_TEMP
0.1U_0201_10V K X5R DA Output EN_DFAN1/DA1/GPIO3D 70 1 2
1 TP_DISABLE# [30] +1.8VS
KSI0 55 71 C189 100P_0402_50V8J
KSI1 56 KSI0/GPIO30 DA2/GPIO3E 72
KSI2 57 KSI1/GPIO31 DA3/GPIO3F RPC10
@ESD@ KSI3 58 KSI2/GPIO32 83 I2C0_SCL_SEN I2C2_SCL_SEN 1 8 +3VS
1 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A I2C0_SDA_SEN I2C2_SCL_SEN [11] I2C2_SDA_SEN
C188 KSI4 59 84 2 7
KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B EC_SMB_CK4 I2C2_SDA_SEN [11] EC_SMB_CK4
0.1U_0201_10V K X5R KSI5 60 85 3 6
61 KSI5/GPIO35 PSCLK2/GPIO4C 86 EC_SMB_DA4 EC_SMB_CK4 [26,29] EC_SMB_DA4 4 5
KSI6 PS2 Interface
2 KSI6/GPIO36 PSDAT2/GPIO4D EC_SMB_DA4 [26,29]
KSI7 62 87
39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TAB_SW# USB_CHG_ILIM_SEL [31]
KSO0 1K_0804_8P4R_5%
KSO0/GPIO20 TP_DATA/GPIO4F TAB_SW# [26]
KSO1 40
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97
ESD KSO4
KSO5
43
44
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
ENKBL/GPXIOA00
WOL_EN/GPXIOA01
98
99
ENBKL [6,26]
SYS_PWROK [10]
KSO6
KSO7
KSO8
45
46
47
KSO6/GPIO26 Matrix
KSO7/GPIO27
ME_EN/GPXIOA02
VCIN0_PH1/GPXIOD00
109
ME_EN [9]
VCIN0_PH1 [35] Keyboard BackLight_SELECT
KSO8/GPIO28 SPI Device Interface Funct i on KBL_ID
KSO9 48 119
KSO[0..15] 49 KSO9/GPIO29 MISO/GPIO5B 120 EC_SPI_MISO [8]
KSO10 KBL 1
KSO[0..15] [30] KSO10/GPIO2A MOSI/GPIO5C EC_SPI_MOSI [8]
KSO11 50 SPI Flash ROM SPICLK/GPIO58 126
KSI[0..7] KSO11/GPIO2B EC_SPI_CLK [8]
KSO12 51 128
KSI[0..7] [30]
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A EC_SPI_CS0# [8] NO KBL 0
KSO14 53 KSO13/GPIO2D
KSO14/GPIO2E +3VALW
+3VALW_EC KSO15 54 73
KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 CUST_TEMP1 [29] EC_MUTE# +3VS
81 74 R198 1 2 10K_0402_5%
[30] KB_MUTLI_KEY KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 SENSOR_EC_INT [11]
R201 82 89
1 2 EC_SMB_CK1 KSO17/GPIO49 GPIO50 90 EC_MUTE# [27]
BATT_CHG_LED#/GPIO52 BATT_CHG_LED# [30]
1
2.2K_0402_5% 91
EC_SMB_CK1 77 CAPS_LED#/GPIO53 92 CAPS_LED# [30]
R202 GPIO R340
EC_SMB_DA1 [23,35,36] EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CLK1/GPIO44 PWR_LED#/GPIO54 PWR_LED# [30]
1 2 78 93 10K_0402_5%
[23,35,36] EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_LOW_LED# [30]
2.2K_0402_5% 79 95 SYSON
[8,29] EC_SMB_CK2 EC_SMB_DA2 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 SYSON [13,38] @
80 121
[8,29] EC_SMB_DA2 VR_ON [41]
2
EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 127 KB_BL_PWM
DPWROK_EC/GPIO59 AC_PRESENT [10]
SM Bus
1
6 100 R325
[10] PM_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_RSMRST# [10]
[31] USB_CHG_CTL1 GPIO07 GPXIOA04 3V/5VALW_PG [31,32,37,39] 10K_0402_5%
15 102 NOKBL@
[10] EC_CLEAR_CMOS# 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103
[31] USB_CHG_CTL3 VCOUT1_PROCHOT# [36]
2
17 GPIO0A VCOUT1_PROCHOT#/GPXIOA06 104
Vinafix.com [31] USB_CHG_EN GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 VCOUT0_MAIN_PWR_ON [37]
18 105 BKOFF#
[31] USB_CHG_CTL2 19 GPIO0C BKOFF#/GPXIOA08 106 BKOFF# [26]
[31] USB_CHG_STATUS# AC_PRESENT/GPIO0D GPIO GPO GPXIOA09 PD_RESET [23]
25 107
[30] KB_BL_PWM 28 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 108 EC_PCIE_WAKE# TS_DISABLE# [26]
[29] EC_FAN_SPEED1 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 EC_PCIE_WAKE# [21,28]
ESD@ 29
[29] EC_FAN_SPEED2 EC_TX FANFB1/GPIO15
C125 1 2 100P_0402_50V8J 30
[28] EC_TX EC_RX 31 EC_TX/GPIO16 110 VCIN1_AC_IN @
[28] EC_RX PCH_PWROK EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 EC_ON VCIN1_AC_IN [36]
32 112 R1664
[10] PCH_PWROK 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON [37] 1 2
ON/OFF# [30] SUSP#
[30] PWR_BATT_LOW# SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 LID_SW#
36 GPI 115
[41] VR_PWRGD NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# [29]
116 SUSP# 100K_0402_5%
SUSP#/GPXIOD05 SUSP# [13,21,32,38]
100P_0402_50V8J
C123 ESD@
1 117
GPXIOD06 118 PECI 1 2
PBTN_OUT# 122 PECI/GPXIOD07 H_PECI [6]
@ R208 43_0402_1%
[10] PBTN_OUT# PM_SLP_S4# PBTN_OUT#/GPIO5D
123 124 +V18R R209 1 2 0_0402_5% +3VALW_EC
2 [10,36,38] PM_SLP_S4# PM_SLP_S4#/GPIO5E V18R/VCC_IO2
1
AGND
C192
GND
GND
GND
GND
GND
4.7U_0402_6.3V6K
+3VALW VCOUT1_PROCHOT# R204 1 2 0_0402_5%

2
+3VALW
11
24
94
35
113
69
KB9022QD_LQFP128_14X14
SA000075S30 R1665 R205 1 2 0_0402_5% H_PROCHOT# [6]
LID_SW# [41] VR_HOT#
1 2
ECAGND
100K_0402_5%
R212 1
1 2 EC_PCIE_WAKE# ESD@
1K_0402_5% R1666 C191
@ +3VALW ESD TAB_SW# 1 2
100K_0402_5%
2
47P_0402_50V8J
ESD SYSON
1
R9678
C193
1
0.1U_0201_10V K X5R
@ESD@ 10K_0402_5% @ @ESD@

C197 1
0.1U_0201_10V K X5R
2
2
PBTN_OUT#
2
+3VS
EC_FAN_SPEED1
Vinafix.com
1 2
R214 10K_0402_5%
1 2 EC_FAN_SPEED2
R213 10K_0402_5%
EC NPCE388
C 1.0
5 4 3 2 1
+TBTA_VBUS
+TBTA_VBUS_F PQ101 PQ102
AON7409_DFN8-5 AON7409_DFN8-5 +19V_VIN
PF101 1 1
7A_32VDC_0437007.WRML 2 2
1 2 3 5 5 3
1
2200P_0402_25V7K
499K_0402_1%
PD101
1
BZT52-B5V1S_SOD323-2
4
PC101
PR101
1
D D D
ideal_1
2
2
2
G
S PQ103
470K_0402_1%
TP0610K-T1-GE3 1P SOT23-3
PR103
PR102
49.9K_0402_1% PQ104A PQ104B
METR3906KW-G_SOT363-6 METR3906KW-G_SOT363-6
2
1
4
2
2 5
L2N7002DW1T1G_SC88-6
6
PQ105A
3
2
[23] TBTA_PPEXT_EN
1
PR104 PR106
47K_0402_1% PR105 47K_0402_1%
470K_0402_1%
2
+TBTB_VBUS
+TBTB_VBUS_F PQ111 PQ112
C AON7409_DFN8-5 AON7409_DFN8-5 +19V_VIN C
PF102 1 1
7A_32VDC_0437007.WRML 2 2
1 2 3 5 5 3
2200P_0402_25V7K
499K_0402_1%
1
4
PC111
PR111
1
D
ideal_1
2
2
G
2
S PQ113
3
TP0610K-T1-GE3 1P SOT23-3
1
PR112 PQ114A PQ114B
49.9K_0402_1% METR3906KW-G_SOT363-6 METR3906KW-G_SOT363-6
4
2
2 5
L2N7002DW1T1G_SC88-6
3
3
PQ105B
5
[23] TBTB_PPEXT_EN
1
4
PR113 PR115
47K_0402_1% PR114 47K_0402_1%
470K_0402_1%
2
B
Vinafix.com B
A A
2016/06.23
Compal Secret Data
2017/06/23 Title
TYPE-C IN
Custom
LA-E5513P 1.0

5 4 3 2 1
5 4 3 2 1
EMI@
12
GND 11 VMB2 +8.4V_VMB PL201 SUPPRE_ 5A Z80 20M 0805
GND 10 PF201 1 2
GND 9 15A_24V_F1206HB15V024TM
GND 8 1 2
8 7 EMI@
+12.6V_BATT+ PH201 under CPU botten side :
7 6 EC_SMCA PL202
D 6 5 EC_SMDA 1 2 CPU thermal protection at 93 +-3 degree C D
5 4
4 Recovery at 56 +-3 degree C
3
3 SUPPRE_ 5A Z80 20M 0805 +EC_VCCA
1
2
2
1
100_0402_1%
100_0402_1%
1
1
16.5K_0402_1%
PC201 EMI@ PC202 EMI@
1
CONN@ JBAT1 1000P_0402_50V7K 0.01U_0402_25V7K
2
PR201
PR202
PR206
2
2
SUYIN_125022HB008M200ZL
2
[33] VCIN0_PH1
EC_SMB_CK1 [23,33,36]
1
EC_SMB_DA1 [23,33,36]
PH201
100K +-1% 0402 B25/50 4250K
1 2
+3VL
PR203
2
200K_0402_1%
1 2
PR205
10K_0402_5%
+RTCBATT_R
ECAGND
C C
+RTCBATT_R
PD201
3 PR207
1 1.5K_0402_1%
+RTCBATT 2 1 2
+3VL
LRB715FT1G_SOT323-3
2
PR208
45.3K_0402_1%
1
B
Vinafix.com B
A A

Issued Date 2016/06.23 Deciphered Date 2017/06/23 Title
PWR- BATTERY CONN/OTP
Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LAE551P
5 4 3 2 1
5 4 3 2 1
D D
+19V_VIN
Max Current = 3.25(A)
Should be placed near ACP, ACN
Keep these two signals as a pair routing

These MLCCs must be placed
DCIN_CURRENT_P_R
symmetrically on Top and Bottom.
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
PC402
PC403
PC404
PC405
PC406
PC401
PR401
2
0.01_1206_1%
1
1
1
@ @
low noise MLCC
4
DCIN_CURRENT_N_R
PQ402
B+
5
AON7534_DFN3X3-8-5
5
PQ401
AON7408L_DFN8-5
SDV_EC033_DCDC low noise MLCC
1
PR402 PR403 4
4.99_0402_1% 4.99_0402_1%
SDV_EC032_DCDC VINT20
4
PL401 Dimensions: 11.5 X 10.3 X 2.0 mm These MLCCs must be placed

2
SDV_EC033_DCDC 7.5A max symmetrically on Top and Bottom.
1
2
3
PL401 2.2UH_MMD-10BZN2R2M-M1L_10A_20%
3
2
1
@
PC407 1 4
330P_0402_50V8J
1000P_0402_50V7K
2200P_0402_25V7K
1U_0402_16V6K
0.01U_0402_25V7K
PQ404 EMI@ @EMI@
10U_0603_25V6M
100U_D2_16VM_R50M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
330P_0402_50V8J
0.033U_0402_25V7K
0.033U_0402_25V7K
1 2 2 3
2
2
2
AON7534_DFN3X3-8-5
PC423
PC418
2 2 @EMI@ @EMI@ 1
1
2
PC409
PC410
PC408
PC411
PC412
PC413
PC414
PC415
PC416
PC417
0.1U_0402_25V6
2
+
PC419
PC422
PC440
1
1
1
C PC420 PC421 C
2
1
1 1 4 0.047U_0402_25V7K 0.047U_0402_25V7K
1
4 @ 2
2.2_0805_5%
@EMI@
2
EMI @EMI@
3
2
1
EMI
2.2_0805_5%
PR405
PQ403
1
2
3
PQ405
2
PR404
SDV_EC019_DCDC AON7534_DFN3X3-8-5 PR406 PR407
0_0402_5% 1
AON7409_DFN8-5 PR408
0.01_1206_1% +12.6V_BATT+
0_0402_5%
1
2 Max Current = 3.5(A)
3 5 1 4
1
BST_CHGBK PU401 BST_CHGBT 2 3
EMI EMI
4
30 25 PC426
BTST1 BTST2 1 2
REGN VDDA LX_CHGBK 32 23 LX_CHGBT
2
SW1 SW2
0.1U_0402_25V6
PC425 0.1U_0402_25V6
DL_CHGBK DL_CHGBT
0.1U_0402_25V6
29 26
VDDA LODRV1 LODRV2 1U_0402_16V6K
2
2
10_0603_1%
PC427
1
PR411 0_0402_5%
DH_CHGBK_R 1 DH_CHGBK DH_CHGBT 2 1 DH_CHGBT_R
2
10_0603_1%
PR410
PC428
2 31 24
HIDRV1 HIDRV2
PR412
PR409 0_0402_5%
1
2
2 1 1 22
1
PR413 PR433 1_0805_5% VBUS VSYS
1
1
ACN 2 21 2 1
B+ 10_0402_1%
1
PR415 ACN /BATDRV PR414 0_0402_5%
165K_0402_1% ACP 3 20 SRP
PC429
1
ACP SRP
1 2 VDDA 7 19 SRN
2
VDDA SRN
1
@ PD401
BZT52-B11S_SOD323-2
1U_0402_16V6K
6
REGN SDV_EC029_DCDC VDDA
ILIM_HIZ 28 2 1
REGN
1
1 2 2 1
2
PC430 2.2U_0402_10V6M
2
Vinafix.com @ PQ406 PC431 1800P_0402_50V7K PR417 40.2K_0402_1% 16 2 1 2 1 PR419

LTC015EUBFS8TL_UMT3F 1 2 COMP1 17 PR418 10K_0402_1% PC432 680P_0402_50V7K
COMP2 1 2 150K_0402_1%
PC433 33P_0402_50V8J
2 2 1 11 PC434 15P_0402_50V8J @ PR434 0_0402_5%
/PROCHOT
2
B [33] VCOUT1_PROCHOT# B
1
1 2
PR421 PR420 0_0402_5% 1 2
100K_0402_1% 18 PR422 137K_0402_1%
1 EC_SMB_CK1_1 CELL_BATPRES
1
1
[23,33,35] EC_SMB_CK1 2 13 D
2 1
PM_SLP_S4# [10,33,38] REGN
3
SCL
2
PR423 0_0402_5% PC435 100P_0402_50V8J 2
1
[23,33,35] EC_SMB_DA1 2 1 EC_SMB_DA1_1 12 8 ADP_I [33] PR425 G

2 @ PQ407 PR424 0_0402_5% SDA IADPT
S
3
100K_0402_1%
4 9 @ PQ408
CHRG_OK IBAT
2
LSK3541G1ET2L_VMT3 2 1 100K_0402_1%
1
PR426
1 2 5 10 PC436 100P_0402_50V8J L2N7002WT1G_SC70-3

VDDA PR428 10K_0402_5% ENZ_OTG PSYS
3
@ 15 27
CMPOUT PGND
1
14 33 PMON_SKYLAKE [41]
[33] VCIN1_AC_IN PR429 CMPIN PAD
2
10K_0402_5%
PC438 PR432 PC439
SDV_EC020_DCDC 30.1K_0402_1% 100P_0402_50V8J

1
1
0.68U_0805_50V BQ25700ARSNR QFN 32P CHARGER
100K_0402_1%
1
2
PR427
1
A
SDV_EC030_DCDC A
SDV_EC005_DCDC
SDV_EC006_DCDC
SDV_EC012_DCDC
SDV_EC013_DCDC Security Classification Compal Secret Data Compal Electronics, Inc.
SDV_EC015_DCDC Issued Date 2016/06.23 Deciphered Date 2017/06/23 Title
BATTERY CHARGER(BQ25700)
Custom
LA-E5513P 1.0

5 4 3 2 1
A B C D E
+19VB_5V
Module model information Trigger = 6.1V
SY8286B_V3_single.mdd
51K_0402_1%
SY8286B_V3_dual.mdd
1
PR537
2
Vinafix.com
VCIN1_BATT_DROP [33]
1 1
10K_0402_1%
keep short pad,
1
0.1U_0402_25V6
snubber is for EMI only.
PR538
PC546
B+ PU501
2
SY8286BRAC_QFN20_3X3 PR502 PC504
2
@ PJ501 0_0402_5% 0.1U_0201_10V6K
1 2 +19VB_3V BST_3V 1 2 BST_3V_R 1 2 Use 5x5x3 size when the layout space is enough.
1 2
2200P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
EMI@ PC501
0.1U_0402_25V6
JUMP_43X118
1
EMI@ PC502
PL501
PC547
PC503
1.5UH_6A_20%_5X5X3_M
BS
IN
IN
IN
IN
2
2
LX_3V6 20 LX_3V 1 4
+3VALWP
2
LX LX
7 19 2 3
GND LX
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
4.7_0805_5%
1
1
PR503
RF@
8 18
+3VLP GND GND
PC505
PC506
PC507
PC508
9 17
+3VLP
2
PG LDO
1
10 16 @
3V_SN2
NC NC
1
Check pull up resistor of SPOK at HW side PC509
OUT
EN2
EN1
21
NC
4.7U_0603_6.3V6M
FF
2
GND
680P_0402_50V7K
PR501
RF@
100K_0402_5%
11
12
13
14
15
1
2
3.3V LDO 150mA~300mA Vout is 3.234V~3.366V
PC510
[31,32,33,39] 3V/5VALW_PG
2
2 ENLDO_3V5V 2
PC511
1000P_0402_25V8J
PR504
1K_0402_1%
TDC=6A Iocp=8A
5V_3V_EN 3V_FB 1 2 3V_FB_1 1 2
EN1 and EN2 dont't be floating.

EN :H>0.8V ; L<0.4V Fsw : 600K Hz @ PJ502
1 2
+3VALWP 1 2 +3VALW
Module model information JUMP_43X118
SY8286C_V3_single.mdd @ PJP502
SY8286C_V3_dual.mdd JUMP_43X39
1 2
2 Cell battery : Cin=10uF*2pcs keep short pad, +3VLP 1 2 +3VL
3 Cell ~ 4 Cell battery : Cin=10uF*1pcs snubber is for EMI only.
EMI@ PL504 +19VB_5V

PR505 PC512
SUPPRE_ 5A Z80 20M 0805 0_0402_5% 0.1U_0201_10V6K
1 2 +19VB_5V BST_5V1 2 BST_5V_R 1 2
B+
EMI@ PL505 PU502
13
1
SY8270CTMC_QFN13_4X3
SUPPRE_ 5A Z80 20M 0805
BS
IN
2200P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
Vinafix.com 1 2 3.3UH_PCMB103T-3R3MS_9A_20%
PL502
LX_5V 2 12 LX_5V 1 2
LX LX +5VALWP
1
1
PC552
PC513
PC514
EMI@ PC515
@EMI@ PC516
PR506
499K_0402_1%
ENLDO_3V5V
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
3 1 2 3 11 3
B+
2
GND GND
1
1
1
1
PR507
PC519
PC520
PC523
PC518
PC521
PC522
4.7_0805_5%
4 10 VCC_5V 1 2
RF@
2
PG VCC
1
PC532
PR508 1U_0402_16V6K PC517 @
OUT
LDO
EN2
EN1
499K_0402_1% 3V/5VALW_PG 4.7U_0402_6.3V6M

FF
2
2
+3VLP
2
15V_SN
@ PR551
1
0_0402_5%
ENLDO_3V5V
680P_0402_50V7K
1 2 @ PR553
100K_0402_1% +5VLP Vout is 4.998V~5.202V
PC525
RF@
PR552
1
@ 0_0402_5% PC524 5V LDO 150mA~300mA

2
2
1 2
[33] 5VLDO_EN 4.7U_0603_6.3V6M
Ipeak=11.5A Iocp=12A
2
5V_3V_EN
PR540
1
0_0402_5%
@ PC551 @ PR554 2 1
1
4.7U_0402_6.3V6M 100K_0402_1%
PR510 PC526 PR512
2.2K_0402_5% 1000P_0402_25V8J 1K_0402_1%
2
1 2 5V_FB 1 2 5V_FB_1 1 2
[33] EC_ON
@ PR511
0_0402_5% @ PJ504
1 2 EN1 and EN2 dont't be floating. +5VALWP 1 2
+5VALW
[33] VCOUT0_MAIN_PWR_ON EN :H>0.8V ; L<0.4V
1 2
JUMP_43X118
4 5V_3V_EN Fsw : 600K Hz @ PJP504 4
JUMP_43X39
1 2
+5VLP 1 2 +VL
1M_0402_5%
4.7U_0402_6.3V6M
1
PC527
PR513

2
+3VALW/+5VALW
2
A B C D E
5 4 3 2 1
Pin19 need pull separate from +1.35VP.

PL601 EMI@
If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
SUPPRE_ 5A Z80 20M 0805 you can change from +1.35VP to +1.35VS. TDC 0.7A
B+ +12.6VB_DDR Peak Current 1A
1 2 PR601
2.2_0603_5%
BST_DDR_R 1 2 BST_DDR
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
0.1U_0402_25V6
+1.2VP
1
PC601
EMI@ PC602
PC603
PC604
UG_DDR +0.6VSP
2
D D
LX_DDR
@EMI@
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
PC605
5
0.1U_0603_25V7K
PC606
PC607
16
17
18
19
20
2
PU601
2
PHASE
VLDOIN
UGATE
BOOT
VTT
21
PQ601 PAD
4 LG_DDR 15 1
LGATE VTTGND
AON7408L_DFN8-5
Iocp=7.20A PL602 1UH_11A_20%_7X7X3_M PR602
14
PGND VTTSNS
2
1
2
3
13K_0402_1%
2 1 1 2 CS_DDR 13 3
+1.2VP CS RT8207PGQW _W QFN20_3X3 GND
1
PC608 1U_0201_6.3V6K
RF@ 1 2 12 4 VTTREF_DDR
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
VDDP VTTREF
5
PR603 PR604
1
1
4.7_1206_5% PQ602 5.1_0603_5%

PC611
PC609
PC610
PC612
PC613
PC614
AON7506_DFN3X3-8-5 1 2 VDD_DDR 11 5
+5VALW +1.2VP
1 2
VDD VDDQ
1
PGOOD
2
2
RF@ PC616
+5VALW PR605
TON
1
PC615 4 0.033U_0402_16V7K
FB
S5
S3
2
680P_0402_50V7K PC617 1 2
2
1U_0201_6.3V6K 5.1_0603_5%
10
6
1
2
3
C C
EN_DDR
EN_0.675VSP
FB_DDR
TON_DDR
PR607
1 2 +1.2VP
MOSFET: 3x3 DFN PR608 470K_0402_1%
+12.6VB_DDR1 2
H/S Rds(on): 27mohm(Typ), 34mohm(Max) 6.04K_0402_1%
Idsm: 7.5A@Ta=25C, 5.5A@Ta=70C
1
L/S Rds(on): 19mohm(Typ), 23.5mohm(Max) PR609
PR610 0_0402_5% 10K_0402_1%
Idsm: 11A@Ta=25C, 8.8A@Ta=70C 1 2
[13,33] SYSON
2
Mode Level +0.675VSP VTTREF_1.35V
S5 L off off Choke: 7x7x3
1
@ PC618
S3 L off on Rdc=6.7mohm(Typ), 7.4mohm(Max) 0.1U_0402_10V7K
S0 H on on
2
Switching Frequency:540kHz
Note: S3 - sleep ; S5 - power off Ipeak=5.47A @ PR611
Iocp~7.14A 0_0402_5%
OVP: 113%~120% 1 2 @ PJ601
VFB=0.75V, Vout=1.3545V [13,21,32,33] SUSP# +1.2VP 1 2 +1.2V
@ PR606 0_0402_5% 1 2
Vinafix.com +3VALW +5VALW JUMP_43X118
1 2
[7] DDR_VTT_PG_CTRL
1
@ PC619
1
B 0.1U_0402_10V7K B
2
1
PC620 @ PJ604
1
1U_0402_6.3V6K 1 2
JUMP_43X79 +0.6VSP 1 2 +0.6VS
2
@ PJ603
2
JUMP_43X39
Vout=0.8V* (1+Rup/Rdown)
2
PU602
1
PC621 G9661MF11U_SO8
4.7U_0603_6.3V6K
4 5
+2.5VP
2
PR612 0_0402_5% 3 VPP NC 6 @ PJ605

VIN VO
1
1 2 2 7
3.4K_0402_1%
GND
0.01U_0402_25V7K
[10,33,36] PM_SLP_S4# VEN ADJ

1
1 8 +2.5VP 1 2 +2.5V
POK GND 1 2
PC622
PR614
22U_0603_6.3V6M
1
Rup JUMP_43X79
0.1U_0402_25V6
2
9
PR615
PC623
47K_0402_5% PC624
2
2
2
1.6K_0402_1%
PR616
Rdown
2
A Ultra Low Dropout 0.23V(typical) at 3A Output Current A

Issued Date 2017/06/23 Title
2016/06.23 Deciphered Date
RT8207P
5 4 3 2 1
5 4 3 2 1
Module model information

APL5930_V2.mdd
D D
+3VALW +5VALW
Ultra Low Dropout 0.23V(typical) at 3A Output Current
1
PC701
1
1U_0402_6.3V6K
JUMP_43X79
2
@ PJ701
2
2
PU701
1
C PC702 G9661MF11U_SO8 C
4.7U_0603_6.3V6K
4 5 PJ702
PR701 @
+1.8VALWP
2
0_0402_5% 3 VPP NC 6 1 2
VIN VO +1.8VALWP 1 2 +1.8VALW
1
1 2 2 7
12.7K_0402_1%
0.01U_0402_25V7K
GND
[31,32,33,37] 3V/5VALW_PG VEN ADJ
1
1 8 JUMP_43X79
POK GND
PR703
PC703
22U_0603_6.3V6M
1
1
Rup
0.1U_0402_16V7K
1
PC704
PR704
2
2
PC705
1M_0402_5%
2
@ PR702
2
100K_0402_5%
10K_0402_1%
1
PR705
Rdown
2
+3VALW
PGOOD [40]
Vout=0.8V* (1+Rup/Rdown)
B B
Vinafix.com
A A

APL5930
5 4 3 2 1
A B C D E
Module model information

SY8286_V1_single.mdd
SY8286_V1_dual.mdd
+19VB_1V Confirm HW side

1
keep short pad, RF@ PR802 RF@ PC802
1
snubber is for EMI only. 4.7_0805_5% 680P_0402_50V7K
PL802 EMI@ 1 2 SNUB_1V 1 2
PU801
S SUPPRE_ 5A Z80 20M 0805
+19VB_1V
B+ 1 2 2
IN PG
9 PR804
0_0402_5%
PC805
0.1U_0201_10V6K
Use 5x5x1.8 size when the layout space is enough.
10U_0603_25V6M
0.1U_0402_25V6
3 1 BST_1V 1 2 BST_1V_R 1 2
2200P_0402_50V7K
6.8P_0402_50V8C
IN BS PL801
1
1
EMI@ PC801
EMI@ PC803
PC804
LX_1V
RF@PC814 4 6 1 2
+1.0VALW
RF@ PC815
6.8P_0201_25V8B IN LX
2
2
2
2
5 19 1UH_MMD-05AHN1R0M-X2L_8A_20%
16.5K_0402_1%
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
IN LX
1
7 20
PR805
PC806
PC807
PC808
PC809
PC810
GND LX
FB_1V R1
8 14
Iocp=9A
2
PR801 GND FB
2
18 17 LDO_3V
0_0402_5% GND VCC
1
1 2 EN_1V 11 10
[39] PGOOD EN NC PC811 FB=0.6V
1
ILMT_1V 13 12 2.2U_0402_6.3V6M
2
ILMT NC
1
@ PC812
PR806
1M_0402_5%
0.1U_0402_25V6 +3VALW 15
BYP NC
16
Vout=0.6V* (1+R1/R2) R2 PR807
24K_0402_1%
=0.6*(1+(16.5/24))
2
21
+3VALW
2
PAD
2
EN :H>0.8V ; L<0.4V SY8286RAC_QFN20_3X3

Vout=1.0125V
1
PC813
EN pin don't floating
1
1U_0402_6.3V6K
2
If have pull down resistor at HW side, @ PR808
please delete PR601. 0_0402_5%
2
1
2 @ PR809 2
0_0402_5%
2
The current limit is set to 6A, 9A or 12A when this pin

is pull low, floating or pull high.
3
Vinafix.com 3
4 4
2016/06.23
Compal Secret Data
2017/06/23 Title
SY8286
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
A B C D E
1 2 3 4 5
CPU CORE
PSYS:
A PMON_SKYLAKE [36] Please confirm charger pull low resistance. A
Charger side should be unpop.
PRI1
PCI1
1.5K_0402_1%
OCP for VCCSA 1 2 1 2
PRI2, PRI8 place near CPU side.
If the resisters are at HW side and POP. PRI2, PRI8 can be canceled. 0.01U_0402_25V7K
PCI3 COMP_1b_CPU 1 2 PCI2
1000P_0402_50V7K 100P_0402_50V8J
+VCCSA PRI2 1 2 PRI119
1000P_0402_50V7K
100_0402_1% 10_0402_1%
1 2 PRI3 PRI4 1 2
1
0_0402_5% 806_0402_1% CSN_1b_VCCSA [42]
PRI5
8.87K_0402_1%
1
1 2 VSPP_1b_CPU_R 1 2 VSP_1b_CPU
[13] VCCSA_SENSE
2200P_0402_50V7K
PHI1
PCI4
Close to SA choke
1200P_0402_50V7K
2
1
RDRPSP 100K_0402_1%_B25/50 4250K
4700P_0402_25V7K
PRI6 PCI5 PRI7
PCI76
2
1
0_0402_5% 1000P_0402_50V7K 1K_0402_1%
PCI7
2
1 2
1
1
1 2 VSNN_1b_CPU_R 1 2 VSN_1b_CPU CSN_1b_VCCSA_NTC
PCI6
[13] VSSSA_SENSE
2
1 2 1 2 PRI9
2
PRI8 100_0402_1% PCI8 2200P_0402_25V7K 12K_0402_1%
+VCCCORE PRI10 CSP_1b_VCCSA +3VS
PRI13 1 2 [42] CSP_1b_VCCSA_R
2
1 2 0_0402_5% 20K_0402_1% PRI14 1 2
1
PRI11 100_0402_1% 25.5K_0402_1% 7.5K_0402_1%
1 2 VSP_2ph_CPU 1 2 PRI12 PRI15
[15] VCCCORE_SENSE
10K_0402_1%
1
1 2
[15] VSSCORE_SENSE PRI17 PCI9 PRI18 PCI10 470P_0402_50V7K
2
0_0402_5% 1000P_0402_50V7K 1.21K_0402_1% VR_PWRGD [33]
2
1 2 1 2 VSN_2ph_CPU_R 1 2 VSN_2ph_CPU
PRI16 100_0402_1%
1 2 IMVP8_EN
Upper Threshold > 0.8V +1.0V_VCCST
B PCI11 3300P_0402_25V7K B
Lower Threshold < 0.3V
1
PRI19
1
49.9_0402_1%
PRI11, PRI16 place near CPU side. PRI20 PRI21 0_0402_5%
If the resisters are at HW side and POP. PRI11, PRI16 can be canceled. 845_0402_1% 1 2
110_0402_1%
100_0402_1%
45.3_0402_1%
1 2
RIOUT@GT VR_ON [33] GT is the same spec in both U42 and U22
IOUT_1b_CPU
ILIM_1b_CPU
470P_0402_50V7K
2
PCI12
EN_CPU
PWM_1b_CPU [42]
1
470P_0402_50V7K
2
CSCOMP_2ph_CPU_R
Close to VGT1 choke DRVON [42]
1
1
PRI23 PRI24 @
PCI13
23.2K_0402_1% PCI14 110_0402_1% PRI34
1
1
4.75K_0402_1%
PHI2 7.5K_0402_1%
49
48
47
46
45
44
43
42
41
40
39
38
37
0.1U_0402_25V6
2
220K_0402_5%_B25/50 4700K @ 1 2
CSP1_VGT [42]
PRI25
1
1
1 2
VSN_2ph
VSP_2ph
VSP_1b
VSN_1b
COMP_1b
ILIM_1b
CSN_1b
IOUT_1b
CSP_1b
EN
TAB
PSYS
VR_RDY
2
2
PCI15 PUI1 VR_HOT# [33] PRI29
PRI26
PRI27
PRI33
15P_0402_50V8J 2 NCP81218DMNTXG QFN 48P PWM 12K_0402_1%
1 2
PRI31 PRI32 IOUT_2ph_CPU 1 36 PCI17 1 2
8200P_0402_25V7K
2200P_0402_50V7K
165K_0402_1% 75K_0402_1% DIFFOUT_2ph_CPU 2 IOUT_2ph PWM_1b 35 PRI36 49.9_0402_1% 470P_0402_50V7K CSN1_VGT_NTC
0.022U_0402_16V7K
1 2 1 2 1 2 PCI16 FB_2ph_CPU 3 DIFFOUT_2ph DRVON 34 SCLK_CPU 1 2 1 2
[42] CSP_1a_VCORE_R FB_2ph SCLK VR_SVID_CLK [15]
1
1
PRI30 390K_0603_1% PRI39 16.9K_0402_1% 2200P_0402_50V7K COMP_2ph_CPU 4 33 ALERT#_CPU PRI37 1 2 0_0402_5% Close to GT choke
PCI20
PCI21
VR_ALERT# [15]
2
COMP_2ph ALERT#
1
1 2 PCI18 PCI19 1 2 ILIM_2ph_CPU 5 32 SDIO_CPU PRI40 1 2 10_0402_1% PRI42 PHI3
[42] CSP_2a_VCORE_R ILIM_2ph SDIO VR_SVID_DATA [15]
1
PRI38 390K_0603_1% 220P_0402_50V7K 47P_0402_50V8J CSCOMP_2ph_CPU 6 31 VR_HOTL# PRI41 1 2 100_0402_1% 16.9K_0402_1% 100K_0402_1%_B25/50 4250K
2
CSSUM_2ph_CPU 7 CSCOMP_2ph VR_HOT# 30 IOUT_1a_CPU 1 2 PRI120
PCI77
2
1 2 CSREF_2ph_CPU 8 CSSUM_2ph IOUT_1a 29 CSP_1a_VCORE @ 10_0402_1%
[42] CSN_2a_VCORE
2
PRI43 10_0402_1% CSP2_2ph_CPU 9 CSREF_2ph CSP_1a 28 1 2
CSP1_2ph_CPU CSP2_2ph CSN_1a ILIM_1a_CPU CSN1_VGT [42]
1 2 10 27
20K_0402_1%
ROSC_COREGT
[42] CSN_1a_VCORE
0.01U_0402_25V7K
CSP1_2ph ILIM_1a
1
PRI44 10_0402_1% TSENSE_2ph_CPU_R 1 2 TSENSE_2ph_CPU 11 26 COMP_1a_CPU
ADDR_VBOOT
PCI23
PRI118
20K_0402_1%
0.01U_0402_25V7K
TSENSE_2ph COMP_1a
1
1
TSENSE_1ph
RSOC_SAUS
ICCMAX_2ph
PRI45 0_0402_5% 1 2 12 25
ICCMAX_1a
ICCMAX_1b
VRMP VSN_1a PCI24
PWM1_2ph
PWM2_2ph
1
1
PCI26 PRI46 3300P_0402_50V7-K PCI27
VRMP_CPU
PCI22
PRI117
+19VB_CPU 1K_0402_1%
2
PWM_1a
1
0.47U_0402_25V6K 1 2 VSN_1a_CPU_R
VSP_1a
PCI25 PCI29 1000P_0402_50V7K
2
2
100K_0402_1%_B25/50 4250K
Vinafix.com @ PRI48
VCC
150P_0402_50V8J 0.015U_0402_25V7K
2
1 2
2
1
@ PHI4 61.9K_0402_1% PCI28 PRI49 PRI50 PRI51
1
1000P_0402_50V7K 499_0402_1% 0_0402_5% 100_0402_1%
1
CSP_1a_VCORE_R 1 2 PCI30 VSN_1a_CPU
1 2 1 2 1 2 PRI52 PRI53
2
13
14
1ROSC_SAUS_CPU 15
16
17
18
19
20
21
22
23
24
PRI47 3.92K_0402_1% 0.01U_0402_50V7K 2.15K_0402_1% 9.53K_0402_1%
1
CSP_2a_VCORE_R 1 2 PCI31 VSSGT_SENSE [15]
2
C C
PRI54 3.92K_0402_1% 1000P_0402_50V7K
ICCMAX_2ph_CPU
2
ADDR_VBOOT_CPU
VCC_CPU
ICCMAX_1a_CPU
ICCMAX_1b_CPU
2
+5VALW PRI55 PRI56 PRI57 OCP for GT
1 2 2_0402_1% 806_0402_1% 0_0402_5% +VCCGT
+5VALW @ PRI116 1 2 1 2VSP_1a_CPU_R 1 2 VCCGT_SENSE [15]
1K_0402_1%
VSP_1a_CPU 1
1ROSC_COREGT_CPU
2 1 2 1 2
24K_0402_1%
825_0402_1% PRI58 100_0402_1%
1
PCI32 PRI115
PRI60
PCI33 1000P_0402_50V7K PRI61
1U_0603_10V6K 0_0402_5%
2
TSENSE_1ph_CPU 1 2 TSENSE_1ph_CPU_R
2
Current
1000P_0402_50V7K
24K_0402_1%
61.9K_0402_1%
1
1
Fsw for SA
2
PWM_1a_CPU [42] PHI5
PRI59
PCI34
100K_0402_1%_B25/50 4250K
PRI62
100K_0402_1%
97.6K_0402_1%
19.1K_0402_1%
35.7K_0402_1%
Fsw for CORE & GT
2
2
1
1 472mV/120uA=3.933K
Active Point110 degreeC = 4.206K
PRI63
PRI64
PRI65
PRI66
2
2
2
VBOOT:
Debug setting=51.1K
D D
PWM2_2ph_CPU [42]
PWM1_2ph_CPU [42]
GT is the same spec in both U42 and U22
Title
NCP81218(U22&U42)
1.0

1 2 3 4 5
1 2 3 4 5
InputCapacitor:
EMI@ PLI1
CPU POWER STAGES +19VB_CPU 10uF_0805_X5R_25V SUPPRE_ 5A Z80 20M 0805 B+
1 2
VCC_CORE
2200P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
FSW=450kHz
0.1U_0402_25V6
PCI40
EMI@ PCI41
1
100U_D2_16VM_R50M
DCR = 0.9 mohm +/- 5%
1
+
PCI36
PCI37
PCI35
2
2
2
PRI68
BST_VGT 2 1BST_VGT_R
+5VALW PU2
3.9_0603_1%
NCP81382MNTXG_QFN38_4X6
20
21
22
23
24
25
28
30
1
2
A A
PCI44
BOOT
THWN
VIN
VIN
VIN
VIN
VIN
VIN
GH
0.22U_0603_25V7K
1
1 PRI75 2 6
2_0402_1% VCC
29
PHASED
2
PCI71
1U_0402_16V6K 27
1
PHASEF
7
VCCD
1
Dimensions:
PCI70 7.3Max*6.6±
PLI2 0.2*1.8Max +VCCGT
1U_0402_16V6K
2
12 LX_VGT 1 4
5 VSW 13
CGND VSW
330U_B2_2.5VM_R9M
14 2 3
VSW 15
VSW 1
16 PCI42
[41] PWM_1a_CPU 4 VSW 17 0.15UH_MMD-06AH-R15MEV1L_15A_20% +
PWM VSW
1
18 [41] CSN1_VGT
VSW RF@
DRVON 2 PRI67 2
DISB#
4.7_0805_5%
2
31
SNB_VGT
+5VALW ZOD_EN
[41] CSP1_VGT
1
PGND
PGND
3 RF@
TEST
SMOD# PCI43
GL
GL
GL
GL
680P_0402_50V7K
2
8
9
10
11
32
19
26
B B
PLI3 EMI@
InputCapacitor: S SUPPRE_ 5A Z80 20M 0805
10uF_0805_X5R_25V U42@ U42@ +19VB_CPU
+19VB_CPU B+
1 2
2200P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
U42@ PCI57
U42_EMI@ PCI55
0.1U_0402_25V6
PCI54
EMI@ PCI50
1
PCI45
PCI46
1
1
PCI47
PCI48
2
2
2
U42@ PRI71
PRI72 +5VALW BST2_VCORE2

2 1 BST2_VCORE2_R
+5VALW BST1_VCORE1
2 1 BST1_VCORE1_R
U42@ PU4 3.9_0603_1% U42@
20
21
22
23
24
25
28
30
1
2
PU3 3.9_0603_1% U42@ NCP81382MNTXG_QFN38_4X6
20
21
22
23
24
25
28
30
1
NCP81382MNTXG_QFN38_4X6 2 PCI61
BOOT
THWN
VIN
VIN
VIN
VIN
VIN
VIN
GH
PCI62 PRI76 0.22U_0603_25V7K
VCC_CORE(2 phase)
BOOT
THWN
VIN
VIN
VIN
VIN
VIN
VIN
GH
1
PRI77 0.22U_0603_25V7K 1 2 6
1
1 2 6
VCC
FSW=450kHz VCC
2_0402_1% U42@ 29
DCR = 0.9 mohm +/- 5% PHASED
2
2_0402_1% 29
PHASED
2
PCI72
PCI75 1U_0402_16V6K 27
1
27 PHASEF
1U_0402_16V6K
1
PHASEF U42@ 7
VCCD
1
7 U42@
VCCD
1
PLI5 PCI73 PLI4

PCI74 1U_0402_16V6K 0.15UH_MMD-06AH-R15MEV1L_15A_20% +VCCCORE
2
1U_0402_16V6K 0.15UH_MMD-06AH-R15MEV1L_15A_20% +VCCCORE 12 LX_VCORE2 1 4
2
12 LX_VCORE1 1 4 5 VSW 13
5 VSW 13 CGND VSW 14 2 3
C CGND VSW 14 2 3 VSW 15 C
VSW VSW 1
15 1 16
VSW 16 [41] PWM2_2ph_CPU 4 VSW 17 + U42@ PCI58
[41] PWM1_2ph_CPU 4 VSW 17 + PCI51 PWM VSW 18 [41] CSN_2a_VCORE
PWM VSW VSW
1
18 [41] CSN_1a_VCORE 330U_B2_2.5VM_R9M U42_RF@ 330U_B2_2.5VM_R9M
VSW
1
RF@ DRVON 2 PRI69 2

[41] DRVON 2 PRI70 2 DISB#
4.7_0805_5%
DISB#
4.7_0805_5%
31
+5VALW
2
31 ZOD_EN
SNB_VCORE2
+5VALW
Vinafix.com
2
ZOD_EN [41] CSP_2a_VCORE_R

SNB_VCORE1
[41] CSP_1a_VCORE_R
PGND
PGND
3
TEST
SMOD#
PGND
PGND
3
TEST
GL
GL
GL
GL
SMOD#
1
RF@
GL
GL
GL
GL
1
PCI60 U42_RF@
8
9
10
11
32
19
26
680P_0402_50V7K PCI59
8
9
10
11
32
19
26
680P_0402_50V7K
+19VB_CPU
2
2200P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
PCI65
PCI66
1
1
1
PCI63
PCI64
EMI@
PRI73 PCI67
2
2
2
2.2_0603_5% 0.22U_0603_16V7K
1 2 BST_VCCSA_R 1 2
VCCSA
BST_VCCSA
UG_VCCSA
FSW=450kHz
AON7934 DCR 6.2mohm +/- 5%
Rds(on)=12.4~15.8m ohm TYP MAX
PUI5 PQI1 H/S Rds(on) :12.4mohm , 15.8mohm
4
NCP81253MNTBG_DFN8_2X2 AONH36334_DFN3X3A8-10 Dimensions:

5.49± 0.25*5.18± 0.25*1.0± 0.2
L/S Rds(on) :9.1mohm , 11.6mohm
D1
D1
D1
G1
1 8
PLI6
+VCCSA
BST DRVH
2 7 10 9 LX_VCCSA 1 4
D [41] PWM_1b_CPU PWM SW D1 D2/S1 D
DRVON 3 6 2 3
+5VALW EN GND
G2
S2
S2
S2
4 5
PAD
VCC DRVL 0.47UH_MHCI05012B-R47M-R8A_7A_20%

5
RF@
1
PRI74
9
2.2U_0603_16V6K
PCI68
4.7_0805_5%
2
CSN_1b_VCCSA [41]
2
SNB_VCCSA
1
RF@ CSP_1b_VCCSA_R [41]

LX_VCCSA PCI69 Title
680P_0402_50V7K Power Stage
2
LG_VCCSA Size Document Number Rev

1.0

1 2 3 4 5
A
B
C
D
2 1 2 1
+VCCCORE
PC1364 PC11188
10U_0402_6.3V6M 10U_0402_6.3V6M
+VCCCORE
2 1 2 1
PC1363 PC11176
10U_0402_6.3V6M 10U_0402_6.3V6M
5
5
2 1
PC2072 2 1 2 1 2 1 2 1
2
1
1U_0201_6.3V6M
PC2086 PC2076 PC2031 PC2021 PC2001
2 1 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
2
1
PC2064
1U_0201_6.3V6M PC2087 PC2077 PC2032 PC2022 PC2002
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1
VCC_CORE
2
1
PC2070 PC2088 PC2078 PC2033 PC2023 PC2003

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
2
1
2 1
PC2089 PC2079 PC2034 PC2024 PC2007
PC2062 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M 2 1 2 1 2 1 2 1
10U_0402 * 24 pcs
2 1
2 1 PC2080 PC2035 PC2025 PC2008
PC2090 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M
PC2061 1U_0201_6.3V6M 2 1 2 1 2 1 2 1
1U_0201_6.3V6M
@
PC2081 PC2036 PC2026 PC2010

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M
2 1 2 1 2 1 2 1
PC2082 PC2037 PC2027 PC2011

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M
2 1 2 1 2 1 2 1
PC2083 PC2038 PC2028 PC2012

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M
2 1 2 1 2 1
2
1
22U_0603 * 16 pcs +1U_0201*40 pcs
PC2084 PC2039 PC2029 PC1367

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
4
4
PC2085 PC2040 PC2030 PC11168

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M
2 1
+VCCSA
PC1369
2 1 10U_0402_6.3V6M
2 1
PC11171
10U_0402_6.3V6M PC1370
2 1 10U_0402_6.3V6M
2 1
PC11169
10U_0402_6.3V6M PC11156
2 1 2 1 10U_0402_6.3V6M
+VCCSA
2 1
PC11170 PC11166
@
10U_0402_6.3V6M 10U_0402_6.3V6M PC11157

2 1 2 1 10U_0402_6.3V6M
2
1
2 1
PC1391 PC2103 PC11165
22U_0603_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M PC11158
2 1 2 1 10U_0402_6.3V6M
+VCCCORE
2
1
2
1
2 1
@
PC1392 PC2104 PC1362 PC1352
@
22U_0603_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M PC11159

2 1 10U_0402_6.3V6M
2
1
1
2
1
2 1
@
@
PC1394 PC1397 PC11167 PC1359

22U_0603_6.3V6M 22U_0603_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M PC11160
2 1
VCC_SA
2 1 10U_0402_6.3V6M
2
1
2 1
PC1398 PC1368 PC1360
10U_0402_6.3V6M 10U_0402_6.3V6M 22U_0603_6.3V6M PC11161
2 1 10U_0402_6.3V6M
2
1
2 1
22U_0603 * 3
10U_0402 * 6
@
PC1396 2 1 PC1365
@
22U_0603_6.3V6M 10U_0402_6.3V6M PC11162

PC2111 10U_0402_6.3V6M
2
1
1U_0201_6.3V6M
3
3
2 1 PC1361
2
1
pcs
22U_0603_6.3V6M
2
1
@
U42
PC1393 PC2112
22U_0603_6.3V6M 1U_0201_6.3V6M PC11191
2
1
2 1 2 1 22U_0603_6.3V6M
U42@
PC1366
@
PC2105 PC2113 22U_0603_6.3V6M
2
1
10U_0402_6.3V6M 1U_0201_6.3V6M
2
1
2 1 2 1 PC11192
PC2004 22U_0603_6.3V6M
U42@
@
PC2106 PC2114 22U_0603_6.3V6M
10U_0402_6.3V6M 1U_0201_6.3V6M 2 1
Issued Date
2
1
2 1 2 1
@
PC2005 PC11193
@
PC11172 PC2115 10U_0402_6.3V6M 22U_0603_6.3V6M
U42@
10U_0402_6.3V6M 1U_0201_6.3V6M
2
1
2 1 2 1
2
1
PC2006
@ PC11173 PC2116 22U_0603_6.3V6M PC11194
2 1
pcs + 1U_0201 * 7 pcs
10U_0402_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M

U42@
2 1
@
PC2009
PC2117 10U_0402_6.3V6M
1U_0201_6.3V6M 2 1
@
PC11163
10U_0402_6.3V6M
2016/6/2
2 1
@
PC11164
10U_0402_6.3V6M
+VCCGT
2
2
+VCCGT
Compal Secret Data 2 1 2 1

Deciphered Date PC11178 PC1323
10U_0402_6.3V6M 10U_0402_6.3V6M
2 1 2 1
2
1
2
1
2
1
PC11179 PC2042
PC1316 PC1311 PC1301 10U_0402_6.3V6M 10U_0402_6.3V6M
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 2 1 2 1
2
1
2
2
1
1
PC11180 PC2043
@
PC1317 PC1312 PC1302 2 1 10U_0402_6.3V6M 10U_0402_6.3V6M

22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 2 1 2 1
2017/6/2
PC2063
2
1
2
1
2
1
@
VCC_GT CAP
1U_0201_6.3V6M PC11181 PC2044

PC1318 PC1313 PC1303 10U_0402_6.3V6M 10U_0402_6.3V6M

22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 2 1 2 1 2 1
2
2
1
1
2
1
PC2065 PC11182 PC2045

@
PC1319 PC1314 PC1304 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M

22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 2 1 2 1 2 1
10U_0402 * 31 pcs
C
2
1
@
2 1 PC2066 PC11183 PC2046

@
PC1305 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M

Size
Title
Date:
@ PC2041 22U_0603_6.3V6M 2 1 2 1 2 1
10U_0402_6.3V6M
2
1
2 1 2 1 PC2067 PC11184 PC2047

PC1306 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M
U42@ PC1324 PC1315 22U_0603_6.3V6M 2 1 2 1 2 1
10U_0402_6.3V6M 10U_0402_6.3V6M
2
1
2 1 PC2068 PC11185 PC2048

@
2 1 PC1307 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M

U42@ PC11174 22U_0603_6.3V6M 2 1 2 1 2 1
Document Number
10U_0402_6.3V6M PC11177
2
1
@
2 1 10U_0402_6.3V6M PC2069 PC11186 PC2049

PC1308 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M
22U_0603 * 14 pcs +1U_0201*8 pcs
U42@ PC11175 22U_0603_6.3V6M 2 1 2 1

10U_0402_6.3V6M
1
1
2
1
@
PC11187 PC2050
PC1309 10U_0402_6.3V6M 10U_0402_6.3V6M

22U_0603_6.3V6M 2 1 2 1 2 1
2 1
2
1
PC2071 PC11189 PC2051

PC1322 PC1310 1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M
Sheet
10U_0402_6.3V6M 22U_0603_6.3V6M 2 1
PC2052
43
10U_0402_6.3V6M
2 1 2 1 2 1
of
PC2073 PC11190 PC2053

1U_0201_6.3V6M 10U_0402_6.3V6M 10U_0402_6.3V6M
45
PWR-PROCESSOR_DECOUPLING
Rev
Vinafix.com
1.0
A
B
D

Lenovo Yoga 3

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Lenovo Yoga 3

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A B C D E

UMA M/B Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

Panel FHD/UHD eDP x1 DDR4 2400MHz DDR4-on board RAM

SPI ROM SPI

Security Classification Compal Secret Data Compal Electronics, Inc.

EMI unpop @EMI@

ZZZ @ ZZZ @ ZZZ @

16G DDR4-Samsung 16G DDR4-Hynix 16G DDR4-Micron 16G

PCH SM Bus address Vinafix.com DA8001D1010 X4EA9Z38L01

D Full ON HIGH HIGH HIGH HIGH ON ON ON ON D

S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF

S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF

CIZY3 -PowerMap_KBL-U42_DDR4_Volume_NON CS]

Security Classification Compal Secret Data Compal Electronics, Inc.

[CIZY3-PWR Sequence_KBL-U42_DDR4_Volume_NON CS]

G3->S0 S0->S3/DS3 S0/ DS3 ->S0 S0->S5

PCH_PWR_EN (SLP_SUS#) PCH_PWR_EN (SLP_SUS#)

EXT_PWR_GATE# If EXT_PWR_GATE# Toffmin is too small, Pwr EXT_PWR_GATE#

Vinafix.com tCPU04 Min : 100 ns

Security Classification Compal Secret Data Compal Electronics, Inc.

RT93612 TBT@ 1 2.2K_0201_5% CPU_DDPC_CTRL_DATA +1.0VS_VCCIO

1 2 H_PROCHOT#_R C65 SOC_XDP_TDI RC12 1 @ 2 51_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Non- Interleaved Memory

<35uS RC16 RC16

(tCPU18) CC1 SD034121090 SD034121090

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Wednesday, November 29, 2017 Sheet 7 of 45

SML0ALERT# (Internal Pull Down):

0 = LPC is selected for EC ==> Default

1 = eSPI is selected for EC

RPC1, RPC3 and RC30 are close to UC3

< SPI ROM - 8M >

Date: W ednesday, November 29, 2017 Sheet 8 of 45

33_0804_8P4R_5% HDA_SYNC BA22

TOP Swap Override

0 = Disable TOP Swap mode. ==> Default

D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1

Date: W ednesday, November 29, 2017 Sheet 9 of 45

RC36 1 2 20K_0402_5% SOC_SRTCRST# 10 OF 20

CC6 1 2 1U_0402_6.3V6K SKL-U_BGA1356

Stuff 60.4 ohm(RC110) PD for CannonLake-U

32.768KHZ 9PF 20PPM 9H03280012

RC53 1 2 60.4_0402_1% EC_VCCST_PG

Date: Wednesday, November 29, 2017 Sheet 10 of 45

GSPI0_MOSI (Internal Pull Down):

8GB Micron MT40A512M16LY-075:E 0 1 0 0

RC60 1 @ 2 150K_0402_5% GSPI1_MOSI

RC83 1 2 49.9K_0402_1% UART0_RX

RC27 1 2 499_0402_1% I2C1_SDA_TS AN8 P2

GPP_F7/I2C3_SCL Sx_EXIT_HOLDOFF# / GPP_A12 / BM_BUSY# / ISH_GP6

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Wednesday, November 29, 2017 Sheet 11 of 45

[28] PCIE_PTX_C_DRX_P6 PCIE6_TXP USB2P_4 USB20_P4 [25] Type C port B

Date: W ednesday, November 29, 2017 Sheet 12 of 45

Date: W ednesday, November 29, 2017 Sheet 13 of 45

BLM15EG221SN1D_2P CC65 1U_0402_6.3V6K AF21

Close to AG15 Close to Y16 Close to T16 Close to AK17

@ @ @ @ Saf t y s ugges t i on r emove EE s i de , Keep PW

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Wednesday, November 29, 2017 Sheet 14 of 45