DAYANANDA SAGAR COLLEGE OF ENGINEERING

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING

Embedded Computing System (CS74)
Module-wise Question Bank

Module - 1

1. Explain Embedded Computing Systems and its components.

2. List the characteristics of ECS.
3. List the challenges of ECS.
4. Why Microprocessor is used in ECS?
5. List few ECS systems frequently used in day to day life.
6. Analyze the need of UML in design process of Embedded Systems. Draw use-case
diagram for online shopping.
7. Draw UML class diagram for the model train controller showing the composition of
the subsystems
8. Draw a class diagram for representing the interaction between the console panel and
train receiver system. The diagram must include the subsystems of the train controller
systems mentioning the attributes and functions and the relationship between the
classes.
9. Draw a sequence diagram for representing transmission of a control input of the console
to the receiver and controller of the train. All notations have to be followed as per the
UML standards.
10. Draw the state diagram for the panel active behavior of the model train controller.
11. Draw a class diagram for representing the GPS moving map. The diagram must include
the subsystems of the system mentioning the attributes and functions and the
relationship between the classes.
12. Draw a sequence diagram for representing set-speed command received by the train.
All notations have to be followed as per the UML standards.

Module – 2

1. What is the difference between a big-endian and little-endian data representation?

2. Discuss Von Neumann and Harvard architectures for computers.
3. Discuss ARM processor.
4. Discuss RISC and CISC architecture covering Pipelining, Load-store concepts.
5. Discuss the advantages of fixed length instructions.
6. What is CPI in Computer Architecture?
7. Discuss Programming model for architecture and hence discuss CPSR and SPSR.
8. Write the different types of indirect addressing modes in ARM.
9. What is the NZCV status of CPSR register for (a) -1+1 and (b) -2-31-1
10. Write ARM assembly code to implement the following C conditional: (05 M)
if ( x - y < 3 ) {
a = b – c ;
x = 0 ;
 }
else {
y = 0;
d = e * f + g ; }
11. Explain the following: (07 M)
(i) Restrictions of MUL instruction
(ii) Uses of MLA instruction
(iii) Register indirect addressing in ARM
(iv) Write an arm assembly code for below C statement z= (x | 22) and (y >>2)
(v) Disadvantages of busy-wait IO?
12. Write ARM assembly code to implement the following C assignment: (10 M)
x = (c – d) + (e – f) ;
13. What are the features of ARM assembly code. Explain the following terms:(08 M)
(i) Assembler
(ii) Pseudo-ops
(iii) Big endian and little endian
(iv) Current program status register
14. Implement the following C code in ARM APL: (06 M)
If(a<b){
X=5;
Y=c+d;
}
else
x=c-d;
15. Explain the following instructions with examples. (08 M)
(i) LDRSH
(ii) ROR
(iii) RSC
(iv) TEQ
16. Write ARM assembly code to implement the following code snippet:
z= (x | 22) and (y >>2)
17. Discuss on memory management, address translation and Cache.
18. Classify the different cache misses.
19. Explain how the address translation for a segment is done using a neat diagram, TLB
20. Explain the role of cache in the memory system using neat diagrams. What is the
average memory access time of a machine whose hit rate is 93%, with a cache access
time of 5ns and a main memory access time of 80 ns?
21. What is the hit rate if cache access time is 5 ns, average memory access time is 6.4 ns
and main memory access time is 80 ns?
22. Define the following terminologies: Non-maskable interrupts and virtual addressing.
23. Explain the difference between direct mapped cache and set associative cache using
suitable examples and block diagrams.
24. Discuss on supervisor mode, Interrupts, Interrupt cycle, Exceptions and its handling.
25. Explain with neat diagram the interrupt mechanism.
 26. Draw a UML sequence diagram for an interrupt-driven read of a device. The diagram
should include the background program, the handler and the device.
27. Give the typical structure of I/O device. Explain the difference between data registers
and status registers.
28. Explain the interrupt priorities and interrupt vectors using neat diagram.
29. Explain the hardware structure along with interrupt vector table.
30. Discuss CPU - its performance and power consumption.
31. Explain the sequence diagram of I/O with prioritized interrupts.
32. Explain the different interrupts in ARM.
33. What is the overhead incurred due to the interrupts?

Module – 3

1. Differentiate RTOS and GPOS and discuss RTOS functionalities.

2. Discuss Kernel and its responsibilities.
3. Explain RTOS with an example the hard real time and soft real time. What are the
factors needs to be evaluated in selection of an RTOS?
4. Differentiate process and threads. What are the parameters of PCB of a process? Why
should each process have a distinct PCB?
5. What is the significance of spinlock?
6. What are semaphores? Explain briefly the different types of semaphores.
7. Explain the difference between multiprocessing and multitasking in the context of
Operating Systems. Elaborate on the different types of multitasking techniques.
8. Given the following periodic tasks, compute the utilization of this set of tasks over
hyperperiod. (refer Wayne wolf textbook)

Tasks Period Execution time

P1 5 ms 2 ms
P2 10 ms 3 ms
P3 10 ms 3 ms
P4 15 ms 6 ms
9. Explain any one task synchronization technique in RTOS.
10. How do you evaluate the performance of an RTOS? Illustrate with an example the
overhead of context switching?
11. Discuss CPU scheduling techniques.
12. For the processes P1, P2 and P3 shown below schedule the processes using SJF policy
and FCFS policy. Estimated completion time of the processes is shown in the tabular
column below:

Processes Completion time (ms)

P1 10
P2 5
P3 7
13. Calculate the waiting time and turn-around time for each process and the average
waiting time and average turn-around time using both the algorithms. Compare the two
 algorithms, which is better over the other? Assume there is no I/O waiting for the
processes.
14. Differentiate between a process, task and thread.
15. Define release time, deadline, initiation time and completion time for a process with an
example.
16. How are the time critical responses for tasks or events addressed in real-time embedded
applications?
17. Explain with neat diagram the concept of memory mapped object.
18. Explain the following:
(i) Message passing
(ii) Remote procedure call for IPC
19. What are the factors needs to be evaluated in selection of an RTOS?
20. Write short notes on the following:
(i)Deadlock handling and prevention
(ii)Race condition
21. Explain Round-Robin scheduling policy with an example. Explain the difference
between priority based preemptive and priority based non preemptive scheduling.
22. Explain message passing technique of task communication using message queues.
23. Provide examples of blocking interprocess communication and non- blocking
interprocess communication.
24. Explain LIFO Scheduling policy using an example.

Module 4

1. What are processing elements (PE) and Application specific Integrated circuits (ASIC)?
2. What are the topologies supporting networks for embedded systems? Also discuss
blocking and non-blocking topologies.
3. What is bus arbitration?
4. Explain CSMA/CD.
5. Revisit OSI network model.
6. Bring out the need of distributed embedded systems and illustrate with examples.
7. Draw and explain the state transition diagram for I2C bus master and also the data
packet.
8. Using timing diagram, explain the transmission of a byte on I2C bus. Illustrate a typical
read and write transaction with I2C data format.
9. With the help of a neat diagram, Explain the working of CAN bus along with its data
frame format.
10. Explain the architecture of a CAN controller.
11. Write short notes on: (a) Field bus and (b) IP packet structure.
12. What is cross-compilation? Give details of the different files generated during cross-
compilation of an Embedded C file.
13. Draw the flow chart explaining the Ethernet CSMA/CD algorithm. Write the Ethernet
packet format.
Module 5

1. Bring out the need of IDE in Embedded Software Development.

2. Why is debugging necessary in an embedded application? In particular, what is
firmware debugging? Explain one of its techniques.
3. Explain the different hardware tools used for hardware debugging.
4. Write short notes on: (a) Disassembler and (b) Incremental EEPROM burning
technique.
5. Explain the Keil μ vision 3 IDE for 8051.
6. Explain Simulators, Emulators and Debugging.
7. Explain Target hardware debugging.
8. Explain function generator.
9. Explain boundary scan.