Integrated DATA CONVERTERS Part-6: Σ-Δ data converters: Overview: System design

Integrated DATA CONVERTERS
Part-6: Σ-Δ data converters
D. Strle
E-mail: drago.strle@fe.uni-lj.si
Overview: System design
1. Why over sampled converters

2. ΣΔ over sampled A/D converter
3. General ΣΔ modulator ( noise shaping )
4. Theoretical background
5. First order modulator
6. Second order modulator and higher order modulators
7. Possible integrator implementations
8. Multi-bit internal quantizers
9. Element randomization
10. Tones and its removal
11. Stability
12. ΣΔ over sampled D/A converter principles
13. Tools for ΣΔ modulators design
14. Circuit design issues and examples
15. Decimator
2018/2019 Microelectronic Systems
1
Over sampled converters
Over sampled A/D converters: Over sampled D/A converters:
•Relaxed requirements for the analog circuitry at the expense of

more complex digital blocks
•Simplified requirements for the analog anti-aliasing filters for A/D
converters and smoothing filters for D/A converters
Why oversampled converters
• Signal band occupies small fraction of Nyquist interval

– Most of quantization noise power is out of signal band
– Out of band (from fB to fs/2) quantization noise must be filtered by digital filter
– Noise power is reduced by
 2 fb Vref2 1
R  fs 2 fB ; Vn2,B  
12 f s 2 12  2 OSR
2N
ENOB  N  0.5  log 2  OSR 
2
Noise shaping
Quantization noise is shaped by appropriate analog filter.

In this way the oversampling method becomes more effective
Theoretical background -1:
Sigma Delta modulator general structure:
Linear model:
3
Theoretical background-2
Assuming that the two inputs of the linear model are independent (which is an approximation), we can
write the following transfer functions ( using superposition theorem) :
E ( z )  0 D( z )  U ( z)  Y ( z); X ( z)  D( z) H ( z); X ( z )  Y ( z)
Y ( z)  U ( z)  Y ( z)  H ( z)  U ( z) H ( z)  Y ( z) H ( z)
Y  z H z
STF  
U  z 1 H  z
U ( z)  0; Y ( z)  X ( z)  E ( z); D( z)  Y ( z); X ( z)  H ( z) D( z)
Y  z 1
NTF  z   
E  z  1 H ( z)
Y  z   STF ( z )U ( z )  NTF  z  E  z 
First order noise shaped LP modulator -1:
First order noise-shaping is often accomplished by a discrete-time integrator:
Since a pole in H(z) becomes a zero in NTF(z), the quantization noise will be
high-pass filtered.
4
First order noise shaped LP modulator -2:
Using the discrete-time integrator as our H(z), we can write the following
transfer functions:
Y z 1  z  1
STF  z     z 1 Delay
U z 1  1  z  1
Y  z 1
NTF  z     1  z 1 HP trans. func.
E  z 1  1  z  1
To estimate the improvement in SNR, we find the magnitude of the noise

transfer function :
z e jT
2 f f   j f f j
f
 f
j j
 e s e s
f
 j  f 
NTF  f   1  e fs
e fs
  2 j  2 je fs
sin  
 2j   fs 
 
1st order noise shaped LP modulator - 3:
The quantization noise power can be evaluated as follows:

2
q2 1    f 
f0 f0
S e2  f  NTF  f  df 
2
Pe    f 12 f s 2sin  f s  df
 f0 0  
 f   f   f 
NTF  f   2sin   for f o f s ; sin   
 fs   fs   fs 
f 2 3 2 3
 q2   1  0   f   q 2   1    8 f 0  q 2   2   2 f 0 
Pe        2  df           
 12   f s   f0  f s   12   f s  f s  3  12  3   f s 
S  vin _ rms _ max   N q 12 3 3 
   20 log10    20 log10  2  OSR  2  

 N max  v rms   2 2 q  
 6.02* N  1.76  5.17  30  log10  OSR   dB 
fs
OSR 
2 f0
Mod1: 2*OSR implies a 9 dB (or 1.5 bits). improvement in S/N.
5
Implementation of first order ΣΔ modulator with 1 bit quantizer
Block diagram
S-C implementation
1st order noise shaped modulator - 5: Differential implementation
6
2nd order noise shaped LP modulator - 1:
If in place of a quantizer a copy of a 1st order modulator is inserted:
7
2nd order noise shaped LP modulator - 2 :
• Discrete time integrator:
X 1  z   U1  z   X 1  z  z 1
1
X 1  z   U1  z 
1  z 1
X  z 1
H int  z   1 
U1  z  1  z 1
• Z domain description of linear model of 2nd order modulator

1
X 1  z   U  z   z 1Y  z  
 z 1 
1 
1
X 2  z    X 1  z   z 1Y  z  
1  z 1 
Y z  X2  z  E z
From which it follows:
Y  z   U  z   1  z 1  E  z  NTF ( z )  1  z 1 
2 2
 STF ( z )  1
2nd order noise shaped LP modulator – 3:
• S/N calculation:
STF ( z )  1
NTF ( z )  1  z 1 
2
4
2 f
 j
j
2 
NTF (e )  1  e f s 
 
 
4 4
  f   f 
  2sin     16   ;

  fs   fs 
for f o fs ;
f0 4 5 5
 q 2  16     2 f   q 2  4  1 
 f S e  f  NTF  f  df   12  f s  f s   f s    12    OVS 
2
Pe  2
S
   6.02* N  1.76  50 log10  OSR 
 N max
8
Nth order noise shaped N bit LP modulator :
• Lth order modulator with N bit quantizer

S   3 2L  1  2 L 1 
2L 
   N *6.02  10*log10  OVS  
N
 max  2  
Simulink model of a 2nd order modulator:
Error in the
picture?
9
STF and NTF of a 2nd order modulator:
Integrator output voltages for max. input voltage:
10
Input voltage and a bit-stream:
Spectrum of a bit-stream: ideal math. model and noise included.
11
Multi stage, cascaded LP Σ-Δ modulator:
• Basic concept:
V1  z   STF 1  z U  z   NTF 1  z  E1  z 
V2  z   STF 2  z  E1  z   NTF 2  z  E2  z 
Y  z   V1  z  H1  z   V2  z  H 2  z 
Multi stage, cascaded Σ-Δ LP modulator -2:
• H1 and H2 are designed such that E1 does not appear to the output Y(z)
This could be achieved by:
H1  z  NTF1  z   H 2  z  STF 2  z 
• One simple example :

H1  kSTF 1
H 2  kNTF 2
for 2 second order loops with
NTF 1  NTF 2  1  z 1 
2
STF 1  z 1 ; STF 2  0.5 z 1 k 2
V  z   z 2U  z   2 1  z 
1 4
E2  z 
• Under ideal conditions this shows 4th order behavior but have stability
behavior of 2nd order modulator
• In reality Ntf1 and Ntf2 are not realized ideally due to imperfections :
12
A/D and D/A converters inside the modulator:
S  3 2L  1  2 L 1 
2L 
   N *6.02  10*log10  OVS  
 N max 2  
A/D and D/A converters inside the modulator:
• Multi / single-bit of embedded A/D and D/A

1. Advantages:
– Quantization error is reduce by 6dB for every 1 bit of the resolution added to the Q. The S/N is
improved.
– The stop band performance of the decimator could be reduced
– The feedback performance is more linear, the stability of the loop is better, the performances
are closer to linear model, simplified simulations
– NTF could be selected more aggressively
– Changes in D/A are smaller from bit to bit if N is large the required slew-rate is reduced, which
may reduce the power consumption
– The linearity requirement of input opamp is smaller because of smaller steps, so simplified input
amplifier is required
– Stability of the loop for higher order modulator is better using multi bit internal A/D and D/A.
2. Disadvantages:
– Nonlinearity of internal DAC is limited to 10-12 bits only, therefore, the linearity of the whole
modulator is limited to 10-12 bits only. That is why in the past 1 bit internal A/D and D/A were so
popular: they are inherently linear.
13
Multi bit A/D and D/A:
Nonlinearity of a DAC is represented by:
w  n   F v  n 
Because of the loop in the signal band:

w(n)  u (n)
v(n)  F 1  w(n)  F 1 u (n)
Any nonlinearity of a DAC is directly seen at the output v(n) without any attenuation.
The linearity of a ADC is not so important because nonlinearity is in the signal band
Attenuated by NTF.
Multibit A/D and D/A:
• For N bits linearity internal DAC must be linear to at least N bits.

• DAC linearity is limited to 12 bits because of matching … etc.
• Possible solutions are:

– 1 bit approach ( inherently linear )
– Dual quantization
– Mismatch-shaping
– Digital corrections
14
Dual quantization:
Dual quantization:
V ( z )  z 1U  z   2 1  z 1  E2  z   2 z 1 1  z 1  ED  z 
3 2
Homework - project:
1. Verify the formula above
2. What is the effect of 3 bit quantizer to the linearity of the quantizer
3. What must be the transfer function of the noise cancellation block
15
Dual quantization: Solution of homework:
Dual quantization: Solution
• Dual quantization:
– Verify the formula above:
– What is the effect of 3 bit quantizer to the linearity of the modulator?
• The linearity of the modulator is improved because:
– Quantization noise of the first quantizer is ideally cancelled
– Quantization noise of 3 bit quantizer E2 is shaped
– Nonlinearity product of Ed are shaped
– What must be the transfer function of the noise cancellation block
• They are defined on the previous page. They are selected in such a way that:
– E1 is ideally cancelled and replaced by shaped E2, which is smaller because of multi bit used
– Nonlinear distortion products generated 3 bit D/A are shaped by the product of the first 2 integrators and
are thus reduced or negligible at high OSR
– The loop stability is improved because multi bit quantizer reduces inputs signals of both quantizers
16
Dynamic element randomization:
Element mismatch in internal D/A introduces:

• Harmonics
• Increased noise floor due to folding of HF quantization noise
Randomization of the static nonlinearity is one possible approach:
• Energy of the higher harmonics is by some randomization algorithm transferred to
pseudo-random noise in the whole band.
Second approach:
• Background calibration
• Digital correction of DAC at power up
Element randomization:
Linear gradient mismatch:

•Destroys higher
harmonics
•Increases the noise floor
in the signal band
Vector based mismatch

shaping:
•Higher order mismatch
noise spectral shaping
17
Tones mod1 - 1:
• Linear model used in calculations of

S/N ratio thus far is valid only for
– Large and random variations of u(n)
– The quantization error is not correlated with
input signal. In the opposite case linear
model is not valid any longer
– The situation is worst for 1st order modulator
V  z  Y  z  E  z ; E  z   V  z  Y  z 
• First order modulator:
Y ( z )  z 1Y ( z )  U  z   z 1V ( z )
V  z   Y  z   E  z   z 1Y  z   U  z   z 1V  z   E  z 
 U  z   E  z   z 1 V  z   Y  z  
 U  z   E  z   z 1E  z   U  z   E  z  1  z 1 
• The DC value of u and v (average values) could be obtained at z=1 if e(n) is finite:
V e j0   U e j0 
Tones mod1 - 2:
• For dc input u and y(0)=0 and v(0)=0: n y(n) v1(n) y(n) v2(n)
y  n   y  n  1  u  v  n  1 0 1/2 0 0 1
v  n   sgn  y  n   1 0 1 -1/2 -1
y  n   y  n  1  u  sgn  y  n  1  2 -1/2 -1 1 1
3 1 1 1/2 1
1
assume u 
2 4 1/2 1 0 1
1 y  0 5 0 1 -1/2 -1
sgn  y  n    
 1 y0 6 -1/2 -1 1 1
v1  n  
1  1  1  1  1 ; v2  n  
 1  1  1  1  1 ; fp 
fs
4 2 4 2 4
The output is in fact a periodic function with period of fs/4
• Homework: try the sequence with other |y(0)|<2
18
Tones mod1 - 6:
• Increasing u:
– moves the biggest tone out of
band of interest
– Unfortunately the tones close to
fs/2 have large energy and high
frequency and are very
dangerous because of cross-
talk;
– they can be aliased back to the
base band through common
substrate
• Decreasing u:
– Moves the tone to lower
frequencies but attenuation
would increase
• Simulation of a first order
modulator:
– Higher OSR improves the
average noise floor
Source [1]:
– Tones remain almost the same
Stability mod1 - 1:
• Linear analysis is good approx. to get the first insight into the behavior:
• General characteristics of a first order modulator:
– Unconditional stability:
• Loop gain decrease -6db/octave
• Loop phase is -90deg.
– Unfortunately the real signal processing function of the quantizer is not included in this linear
model:
• Time-domain considerations is needed
• Nonlinearity of the quantizer must be included
– Example:
• For u=1.3 the sequence of y becomes:
y  n   y  n  1  u  n   sgn  y  n  1 
y  0   0; u  1.3
y  n   [0, 0.6, 0.9,1.2, ]
– The mod1 modulator is stable for |u|<1.

– Fortunatelly it is able to recover from the instability
– Exercise:
• Calculate the y(n) for u=0.9 and y(0)=5
19
Tones mod2 - 1:
• Spectrum of mod2:
– Clearly exhibits noise shaping (

40dB/decade noise shaping )
– Higher harmonics,
• which can be only explained by
nonlinearity of the quantizer
– Tones
• Presence of tones at high
frequencies
• Detailed simulations show tones
even in band but with low
amplitudes ( see picture on next
slide )
Tones mod2 - 2:
• Second order modulator mod2:
– No analytic solution exists yet

– Simulation different than linear model
– Large tones for signal bigger than 0.7
– For u<0.7 the base band noise is
weekly dependent on input signal
which means that quantizer gain is
signal dependent
– If quantizer is modeled in a better way
than approximate results come closer
to simulation results
– More bits in internal quantizer
provides better approximation to
ideally random signal. The worst
situation is for binary quantizer
– More bits reduces the amplitudes of
tones in the base band and also out of
base band at high frequencies
Source: [1]
20
Tones
• Technique for the reduction of tones:

– Dithering: adding pseudo random noise source at the input of a quantizer
– Dithering breaks the limit cycles and thus prevent generation of the tones
• Example of PRNG:
Stability of mod2:
• From our block diagram:
• State space description:

 x1  n  1  1 0   x1  n    1 1
    x n    2  v(n)  1 u  n 
 2
x n  1    2    
1 1 
v(n)  sgn  x2  n  
for DC input u  1 mod2 is stable but x2 can become very large under certain conditions
 x1  u  2 It make sense to limit the input to u  0.8 and to detect the over-voltage
5  u 
2
x2 
8 1  u 
21
High order modulator stability:
For k=1:
Y  z   L0  z U  z   L1  z V  z 
V z  Y z  E z
L0  z  1
V z  U z  E z
1  L1  z  1  L1  z 
V  z   STF  z U  z   NTF  z  E  z 
L0  z  1
STF  z   NTF  z  
1  L1  z  1  L1  z 
STF  z  1
Selection of NTF: L0  z   ; L1  z   1 
NTF  z  NTF  z 
L1 must delay the propagation of input signal
For k≠1:
v by at least one clock period to be physically
1 NTF  z 
realizable: NTFk  z   
1  kL1  z  k  1  k  NTF  z 
1
L1     0  NTF     1
1  L1    For stability, poles of NTFk must be inside unit
circle z=1 for every k.
Rule of thumb for stability of single loop In reality extensive simulations are needed to
modulator: max

 
NTF e j  NTF e j   
 1.4 predict stability
ΣΔ D/A converters:
22
Tools for ΣΔ modulator design
Delta-Sigma-toolbox:
• Author: Prof. R. Schreier
• http://www.mathworks.com/matlabcentral/fileexchange
• Search for delsig, download and save
• Assuming that matlab is running and that the following toolboxes are available:
– Signal Processing Toolbox
– Control System Toolbox
– Optimization Toolbox
• To improve simulation speed compile the following functions by typing in matlab:
– mex simulateDSM.c
– mex simulateESL.c
– mex ai2mif.c
Circuit design issues:
• GBW of the opamps:

– For S-C implementation rule of thumb: f 0  5 f s
– For CT implementation much smaller speed is required
• A0,
– Simulation is needed since the influence is different for different structures, orders etc.
A0 influences the accuracy of charge transfer, temperature behavior and the behavior of
modulators with 1 bit internal A/D and D/A
• Slew-Rate,
– The opamp speed ( very important for 1st opamp ) must be limited by linear process and
not by Slew-rate which is nonlinear process. Simulation is needed for every case
– Insufficient slew rate increases in band noise
• noise ( thermal, kT/C),
– Thermal noise of first opamp enters the loop directly.
– Noise of Opamps of following integrators is shaped by appropriate noise transfer
function
– KT/C noise of input integrator enters the loop directly while noise of further stages are
shaped.
• jitter
– Usually not important for S-C implementation and important for C-T implementation
23
Some intuitive remarks:
1. Output of the integrator is bounded if its input is on average = 0. Why?

2. For LP modulators the NTF is in fact HP transfer function. For first order
modulator the quantization noise power is multiplied by 2 but fortuntelly most of its
power is out of band
3. Nonlinearity of ADC is of no concern since its effects are reduced by noise transfer
function attenuation ( big at low frequencies )
4. The feedback reduces the required number of bits for DAC but not other
parameters
5. Nonlinearities of DAC directly affect the nonlinearity of the converter because its
output is subtracted directly from the input
6. Noise produced by the ADC is shaped ( quantization and thermal ), while any
noise generated by DAC goes directly to the input path.
Digital decimation and Interpolation
Decimation filter has 2 purposes:

• Removing out of band shaped quantizatio noise
• Reduction of clock rate by decimation
Interpolation has oposite 2 purposes:

• Increase the output sampling rate by interpolation
• And obtaining the digital quantization noise shaping using digital modulator to
come from:
– Low frequency high number of bits to
– High frequency low number of bits
24
Decimation
Sinc filter calculates running average of N consecutive input samples:
N 1
1
Ysin c  n  
N
 X n  i
i 0
1 N 1
1 1 zN
H sin c  z  
N
z
i 0
i

N 1  z 1
L
 1 1 zN 
H sin c , L  z    1 
 N 1 z 
Decimation
25
Interpolation
Overview: circuit design
1. Elements of first order modulator and nonidealities

2. Offset voltage of the opamp
3. Finite gain
4. Finite GBW
5. Finite SR
6. Nonideal ADC
7. Nonideal DAC
8. Integrator clipping
9. Integrator scalling
10. Feed-forward architecure
11. Noise analysis
26
One bit, first order modulator
Offset
1. Integrator offset: opamp offset voltage is added to the input voltage.

• For first order modulator it is added to the output as input signal
• For second order modulator it has the same effect
• Offset voltage of second integrator in 2nd order modulator is multiplied by HP transfer
function (1-z^(-1))/k; Voff is DC signal, so it is attenuated; It may reduce the dynamic
range of the integrator 2
• DAC offset is added to the input and has similar effect as offset of the first amplifier
• Offset of ADC is HP filtered; we can optimize position of quantizer voltage
27
Finite opamp gain
 1   1   V  nT  
C2Vout  nT  T  1    C2Vout  nT  1    C1 V1  nT   V2  nT  T   out 
 A0   A0   A0 
 1  C  V 
Vout  z  1 1    1 V1  zV2  z out 
 A0  C 2  A0 
Vout  z  C1 A0 z 1

V1  z 1V2 C2 A0  1   C1 C2 
1
1  A0  C2 z 1
C1  C2  A0C2
1. STF is only slightly affected
2. NTF is changed: NTF 1  z p1 z 1 1  z p 2 z 1 
• At DC it is not 0 but …
Finite opamp gain
For A01  A02  A0 ;

and equal capacitances
2
 A 1 
NTF  1  z 1 0 
 A0  2 
Finite gain affects only the
shaping below fc
fs
fc 
2  A0  2 
For fB>>fc; the finite gain
does not effect the SnR
   A0  2   OSR
28
Finite opamp gain
Finite opamp bandwidth
• Dominant pole of the opamp produce roll-off 20dB/dec from pole frequency on until
the gain is lower than 0dB.
• Nondominant poles must occur after 0dB crossing
• For negligible effect of non-dominant poles and large A0 the step response is Vout
and results in gain error equivalent to time-constant error
• A settling error around 0.1% is acceptable
 
t

Vout  t  nT   Vout  nT   VstepU  nT  1  e  d 
 
 
C2
 for S-C integrator
C1  C2
Ts
Integration phase lasts
2
 b  Vstep eT  /2
s d 
29
Finite opamp bandwidth
The gain error due to passive elements and GBW slightly affects modulator response.
Using integrators with gains (1-εb,i) leeds to :
Vin z 1 1   b,1 1   b,2    Q 1  z 1 

2
Vout  z  
1  z 1   b,1  2 b,2   b,1 b,2   z 2 b,2
GBW effects:
1. Parasitic poles for STF and NTF are at HF so they do not alter the operation in
signal band
2. gain error in the STF
Finite OPAMP slew-rate
The whole response to a unit step function is composed of slewing and settling period.
The situation is the same for any S-C integrator.
For input step  Vin the ideal output voltage would be:Vout ,id  Vin  C1 C2 
Vout
Real opamp has slewing time:tslew    ; V  SR  ;
SR
difference to the final voltage from tslew on is:  SR  V  e  s
 T 2  tslew  
30
Non ideal ADC operation
• The signal at the output is digital presentation of input plus quantization noise and
ADC error
ADCout  Vin , ADC   Q   ADC
 Q   ADC are shaped with NTF
ADC with few bits is simple
Non ideal DAC operation
• DAC errors are not shaped by NTF; they are added to the input and transfered to
the output via STF
• Stringent linearity requirements force the use of 1 bit DAC which is inherently
linear
• Multi bit DAC require special dynamic element matching algorithm to spread or
shape the matching errors.
31
Integrator dynamic range
Voltage swing of integrators according to the scheme is limmited to Vsat

and produce 3 uncorrelated noise sources:
Y  Xz 1   s ,1 z 1   s ,2 1  z 1    Q   s ,Q  1  z 1 
2
Most critical is first integrator
Integrator clipping example
32
Integrator scalling
Integrator scalling
33
Feedforward architecture
• Feed-forward architecture is an
effective way for reducing opamp
dynamic range of multi bit
architecture
Noise analysis
Noise sources are:

• kT/C noise
• Thermal noise of opamp
• 1/f noise of the opamp
• Similar calculation as for any S-C circuit or S-C A/D
Example of 1 bit 2nd order modulator
4kT
, A1   A1
2
vnd ;
g m, A1
4kT
, A 1   A1
2
vnd ;
g m, A1
34
Noise analysis
35

Integrated DATA CONVERTERS Part-6: Σ-Δ data converters: Overview: System design

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Integrated DATA CONVERTERS

Part-6: Σ-Δ data converters

Overview: System design

1. Why over sampled converters

2018/2019 Microelectronic Systems

Over sampled A/D converters: Over sampled D/A converters:

•Relaxed requirements for the analog circuitry at the expense of

2018/2019 Microelectronic Systems

Why oversampled converters

• Signal band occupies small fraction of Nyquist interval

ENOB  N  0.5  log 2  OSR 

2018/2019 Microelectronic Systems

Quantization noise is shaped by appropriate analog filter.

2018/2019 Microelectronic Systems

Theoretical background -1:

Sigma Delta modulator general structure:

2018/2019 Microelectronic Systems

2018/2019 Microelectronic Systems

First order noise shaped LP modulator -1:

First order noise-shaping is often accomplished by a discrete-time integrator:

2018/2019 Microelectronic Systems

To estimate the improvement in SNR, we find the magnitude of the noise

2018/2019 Microelectronic Systems

1st order noise shaped LP modulator - 3:

The quantization noise power can be evaluated as follows:

S  vin _ rms _ max   N q 12 3 3 

   20 log10    20 log10  2  OSR  2  

Mod1: 2*OSR implies a 9 dB (or 1.5 bits). improvement in S/N.

2018/2019 Microelectronic Systems

Implementation of first order ΣΔ modulator with 1 bit quantizer

2018/2019 Microelectronic Systems

1st order noise shaped modulator - 5: Differential implementation

2018/2019 Microelectronic Systems

2018/2019 Microelectronic Systems

2nd order noise shaped LP modulator - 1:

If in place of a quantizer a copy of a 1st order modulator is inserted:

2018/2019 Microelectronic Systems

• Z domain description of linear model of 2nd order modulator

2018/2019 Microelectronic Systems

2nd order noise shaped LP modulator – 3:

2018/2019 Microelectronic Systems

• Lth order modulator with N bit quantizer

2018/2019 Microelectronic Systems

Simulink model of a 2nd order modulator:

2018/2019 Microelectronic Systems

2018/2019 Microelectronic Systems

Integrator output voltages for max. input voltage:

2018/2019 Microelectronic Systems

2018/2019 Microelectronic Systems

Spectrum of a bit-stream: ideal math. model and noise included.

2018/2019 Microelectronic Systems

2018/2019 Microelectronic Systems

Multi stage, cascaded Σ-Δ LP modulator -2:

• One simple example :

2018/2019 Microelectronic Systems

2018/2019 Microelectronic Systems

A/D and D/A converters inside the modulator:

• Multi / single-bit of embedded A/D and D/A

2018/2019 Microelectronic Systems

Nonlinearity of a DAC is represented by:

Because of the loop in the signal band:

2018/2019 Microelectronic Systems

Multibit A/D and D/A: