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Centro de Excelência em Redes Elétricas Inteligentes - CERIn
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Centro de Excelência em Redes Elétricas Inteligentes - CERIn
Inaugurado en Noviembre del 2013
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Centro de Excelência em Redes Elétricas Inteligentes - CERIn
Labs
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Centro de Excelência em Redes Elétricas Inteligentes - CERIn
Research Departments
Núcleo de Pré‐Incubação – NPRI
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Centro de Excelência em Redes Elétricas Inteligentes - CERIn
LAB EQUIPMENTS:
• Real Time Digital Simulator (RTDS)
• Protective relays and Meters
• Control and communication devices
• Power amplifiers
• Interoperability and communication
Devices
• PST simulation softwares
Research Lines
Real‐time simulation of power, control and communication devices
Power Quality
Protection, control and measurements (testing, model validation and integration)
Renewable energy resources (model and grid integration)
Power system analysis
Active and reactive power management, stability and reliability
Distribution Managment Systems
Energy storages and Electric Vehicles
Active Networks
Microgrids
Self‐healing schemes
Wide‐Area Protection, Control, and Monitoring
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Agenda
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Real Time Digital Simulator
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Real Time Digital Simulator
Features
rack
• Modular design
• Main interface is through user-friendly software
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Real Time Digital Simulator
Simulation Hardware
rack
GPC
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Real Time Digital Simulator
Simulation Hardware
GTWIF GTNET
Workstation Interface Card Network Interface Card
Intelligent Electronic Device
RTDS
Communication Network
GPC
Giga-Processor Card
GTDI/O GTAI/O GTFPI
Digital Analogue Front Panel
Input/Output Card Input/Output Card Interface Card
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Real-Time Digital Simulator
Types of Digital Simulation
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Real-Time Digital Simulator
EMT Simulation Algorithm
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Real-Time Digital Simulator
EMT Simulation Algorithm
Example Circuit: R1 C1
v(t) L1 R2
• Kirchhoff's current and voltage laws could be applied to the circuit above but
this would lead to differential equations which can be difficult to solve.
• A more systematic approach which can be more readily solved by a computer
is sought.
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Real-Time Digital Simulator
EMT Simulation Algorithm
iL (t ) L diL (t )
vL t L
v L (t ) dt iL t g L v L t I H t
Integrating both sides of this equation leads to....
The Equation above can be interpreted as the
following circuit shown below.
t
1
iL t vL d iL t t
L t t iL (t )
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Real-Time Digital Simulator
EMT Simulation Algorithm
iL(t) L
2L/Δt
iL(t)
vL(t)
ihL
vL(t) (history term)
Capacitor component IhC
iC(t) C
Δt/2C
iC(t)
vC(t)
vC(t)
ihC
(history term)
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Real-Time Digital Simulator
EMT Simulation Algorithm
Example Circuit:
C1
R1 C1
v (t )
R1 L1 R2
v(t) L1 R2 R
I HC1 t Convert voltage sources to their
Norton equivalents
gC1
g R1 v ( t ) gR1 gL1 I H L1 t gR2
Convert passive elements in their equivalents.
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Real-Time Digital Simulator
EMT Simulation Algorithm
I HC 1 t
gC1 g R1 v t I H L1 I H C 1
1
VN 1 g R1 g L1 gC1
N1 V gC1
g R 2 gC1 I H L1
N2 N2
gC1
g R1 v ( t ) gR1 gL1 I H L1 t
V G 1 I
gR2
• It is possible to calculate the node voltages N1 and N2 at any given time, t, if the driving
function V(t) and the history terms IHL1 and IHC1 are known.
• The node voltages and history terms can be used to calculate branch currents.
• The simulation of the circuit’s responses proceeds one time‐step at a time.
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Real-Time Digital Simulator
EMT Simulation Algorithm
• The algorithm can accommodate the modeling of breakers and faults.
• Consider the circuit below with the switch S1. The switch can be considered a
conductance value, g3. When the switch is open, g3 is small. When the switch is
closed, g3 is large.
V1 g2 V2
R1 V R2 V2
1
+ +
S1 g1 g3
V(t) g1V(t)
- -
• Writing the nodal equations for this circuit lead to ….
V G 1 I
• The switching is modeled by modifying g3 and re‐inverting the conductance
matrix every time a switching event occurs.
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Real-Time Digital Simulator
EMT Simulation Algorithm
Transmission Line
G
G
Network Solution:
1
• Size of conductance matrix increases as the
V G I number of nodes increases.
Y11 Y12 Y1N • In order to handle faults and breakers we
Y must decompose (effectively invert) G at
G 21
each time‐step.
YN 1 YNN • There is a finite limit on the number of
N x N matrix calculations the can be executed in one
time‐step (~50 us).
N Number of nodes in the network
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Agenda
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Cutting-Edge Applications
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Closed Loop Testing of Physical Devices
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Closed Loop Testing of Physical Devices
Synthetic Testing
BINARY
VOLTAGES INPUTS
CURRENTS
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Closed Loop Testing of Physical Devices
Electrical Interface
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Closed Loop Testing of Physical Devices
Electrical Interface
Modeled Systems
Switch
50V/V
5A/V
GTFPI Digital Signals
Front Panel
Interface Card
Amplifier Protective
Digital Signals Relay
RTDS
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Closed Loop Testing of Physical Devices
IEC 61850 Interface
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Closed Loop Testing of Physical Devices
IEC 61850 Interface
Modeled System
Switch
GTNET
Network Interface GOOSE Messages
Card
Sampled Values
GOOSE Messages
Protective
Sampled Values
Relay
1PPS
Satellite-Synchronized
RTDS 1PPS
Clock
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Control Systems Testing
STATCOM
• 2- and 3-level VSC plus MMC based schemes using small timestep subnetworks
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Control Systems Testing
Testing of Excitation Controllers
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Wide Area Protection and Control Testing
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Wide Area Protection and Control Testing
The RTDS Simulator is being increasingly used to carry out large scale studies
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SCADA Systems
The DNP firmware option allows the GTNET to act as a DNP slave using
the DNP 3.0 protocol. The support of this protocol allows the RTDS to be
used for the testing and validation of SCADA system interfaces used in
control centers and generating stations.
Binary simulation status/outputs (i.e. position)
1024 (scan rate 1000 Hz)
Binary simulation control/inputs (i.e. breaker commands)
512 (scan rate 1000 Hz)
Analogue outputs
500 (scan rate 4 Hz)
Analogue inputs
100 (scan rate 4 Hz)
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Smart Grid and Distributed Generation
- Wind generation
- Solar Energy
- Fuel Cells
- Battery Storage
- Power Electronic Converters
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Smart Grid and Distributed Generation
Power Hardware in the Loop
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Agenda
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UNIFEI Projects
Academic Dissertation
TPCL TPCL
FZ1 FZ1
TPCB Sistema de TPCB
OU OU
FZ2 Telecomunicação FZ2
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UNIFEI Projects
Academic Dissertation
Fonte Fonte
Equivalente Equivalente
(forte) (fraca)
Linha de Transmissão
Cabo pára‐raios
fase C
fase A
fase B
Cabos condutores Eixo vertical da torre
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UNIFEI Projects
Academic Dissertation
RTDS
Sistema de
Telecomunicação
Sistema de Teleproteção
Tempo de Operação da Teleproteção
(TA)
Relé Relé
SEL-421 SEL-421
Estrutura Geral do Esquema de Teleproteção definida no IEC 60834
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UNIFEI Projects
Academic Dissertation
Equipamento Equipamento
Terminal de Terminal de
SEL-421 Telecomunicação Telecomunicação SEL-421
BREAKER BREAKER
2 STATUS STATUS 2
1 TRIP TRIP 1
52-222 52-232
disjuntor disjuntor
LT principal
enlaces enlaces
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UNIFEI Projects
Academic Dissertation
RTDS
SEL-421 SEL-421
52-222 52-232
disjuntor disjuntor
LT Principal
OBJETIVO: analisar as vantagens da aplicação do padrão IEC 61850 em esquemas de teleproteção.
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UNIFEI Projects
Academic Dissertation
Ethernet Sincronizador
SEL-2407
switch
Sinais Analógicos
Sinais Digitais
Relé SEL-421
.......
(Subestação 2)
.......
Sinais Digitais
Amplificador
TCs TPCs TPCs
OMICRON CMS-156 TCs
IRIG-B
Sinais Analógicos
Sinais Digitais
Relé SEL-421
....... (Subestação 3)
.......
Sinais Digitais
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UNIFEI Projects
Academic Dissertation
RTDS Module
Protective
Relays
Rack 1
RSCAD Amplificadores
Amplifiers
Rack 2
Static Test
Equipment
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UNIFEI Projects
Academic Dissertation
Abertura do último pólo do
Período de pré‐falta disjuntor – Eliminação da falta
Tempo de Interrupção
do disjuntor
Tempo de
Coordenação
21SD:=2ciclos
67SD:=2ciclos
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UNIFEI Projects
ALSTOM – UNIFEI Agreement
Estudo da interconexão da Usina Hidrelétrica“São Simão”
UHE São Simão
SE São Simão
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UNIFEI Projects
ALSTOM – UNIFEI Agreement
UHE São Simão S/E
São Simão
283 MVA T1
LT1.1 S/E Itaguaçu
G1 500 Kv
16.5/500 Kv LT2
500 Kv FE1
283 MVA
T2
G2
LT1.2
S/E Itumbiara
B∞
500 Kv
16.5/500 Kv LT3 FE2
283 MVA T3 500 Kv
91 MVAr
LT1.3 S/E Jaguara
G3 500 Kv
100 MVAr
16.5/500 Kv LT4
283 MVA 500 Kv FE3
T4 LT7
91 MVAr 91 MVAr S/E
LT1.4
G4 500 Kv
Marimbondo
16.5/500 Kv LT5
283 MVA T5
FE4
500 Kv
LT1.5
G5 500 Kv
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UNIFEI Projects
ALSTOM – UNIFEI Agreement
Sistema de Excitação
Alspa® Controgen da ALSTOM
Sistema de 1) Blocos de filtragem dos sinais
Estabilização (PSS)
PMAC1f
de entrada (P, Q, If, VT, IT, W);
W1pss
SYSTEM EXCITATION
2) Malha de eleboração da
GEN1 IEEE Type ST7B
Pe w referência do AVR;
Governor/Turbine
PSS2A
IEEE Type 1 3) Malha de limitação da
PSS BUS2
1.02505 /_ 22.96401 corrente estatórica – STCL;
VSTOUT1
w Tm(HP) N4 N5 N6
GEN1
T1
Regulador de Vs
Velocidade 4) Malha de limitação da
referência do AVR;
W1
W TM
A
5) Malha principal de controle
LEAD de tensão – VREG
B
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UNIFEI Projects
ALSTOM – UNIFEI Agreement
Malha principal de
controle de tensão do AVR
Max Max
grv1
da malha de a1 G (1 + sT1) a4 m4BG1 a6 EFOUT1
-
limitação da + $Kavr max min min
m7G1 1 + sT2
referência do AVR
a2 a3 para controle
+
+ Min Min da tensão de
campo
ULG1
+
a5
-
+
-
LL1G1 LL2G1
m8G1
G
LL1G1 1 + sT
KL
1.0
KH
0
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UNIFEI Projects
ALSTOM – UNIFEI Agreement
2.5
3
P.U.
P.U.
2
2
1.5
1 1
0 1.667 3.333 5 6.667 8.333 10 0 1.667 3.333 5 6.667 8.333 10
Tempo Tempo
GOALS:
Intercâmbio de conhecimentos entre a UNIFEI e a ALSTOM.
Estudo de casos reais que são de interesse da ALSTOM.
Mostrar como um sistema virtual, simulado em tempo real, pode auxiliar previamente
aos testes de comisionamento de unidades geradoras reais.
Testar o modelo numérico do gerador do RTDS utilizando parâmetros reais de unidades
geradoras fabricadas pela ALSTOM.
Análisar em tempo real o desempenho do regulador de tensão conjuntamente com a
dinâmica do sistema de potência.
Modelagem no RSCAD e teste em tempo real do sistema de excitação Alspa® Controgen
V3 da ALSTOM.
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UNIFEI Projects
CEMIG – UNIFEI Agreement
CENTRO DE CONTROLE
(SCADA – DMS)
M
848
822 846
M
820 844
M
864
818 842
M
802 806 808 812 814 850 824 826 834 860 836
858 840
816
832 862
800 888 890
M
810
838
Carga PQcte 852
Carga Icte
Carga Zcte
828 830 854 856
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UNIFEI Projects
CEMIG – UNIFEI Agreement
Real ‐Time Communication
TCP/IP
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Thanks!!