Code R7310201 1

III B.Tech I Semester (R07) Regular & Supplementary Examinations, November 2010
COMPUTER SYSTEM ORGANIZATION
(Electrical & Electronics Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE questions
All questions carry equal marks
?????

1. (a) Explain the multiprocessor, and multicomputer system.

(b) Define execution time and response time. Explain the relation of throughput with execu-
tion time and response time. .

2. (a) Explain the 4- bit arithmetic circuit using multiplexer.

(b) Give the classification of instructions according to address reference.

3. (a) List and explain the memory- reference instructions.

(b) Dram and explain a block diagram of a control memory and associated hardware for
selecting the next microinstruction address.

4. (a) What are the different branching techniques used in microprogrammed control unit.
(b) Describe the various types of semiconductor memories.

5. (a) Draw and explain the block diagram of typical DMA controller.
(b) What is meant by priority interrupt? Explain polling & daisy - chaining methods.

6. (a) What is arithmetic pipeline? Explain arithmetic pipeline for floating point addition/
subtraction.
(b) What is vector processing? Explain the need of vector processing.

7. (a) Draw and explain the multiport memory system.

(b) What is cache coherence? Discuss the solution to the each coherence problem.

8. Write a short note on:

(a) Memory hierarchy

(b) Stack organization

?????
Code R7310201 3
III B.Tech I Semester (R07) Regular & Supplementary Examinations, November 2010
COMPUTER SYSTEM ORGANIZATION
(Electrical & Electronics Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE questions
All questions carry equal marks
?????

1. (a) Explain the IEEE standards for floating point numbers.

(b) Explain various arithmetic micro operations.

2. (a) Explain the implementation of common bus using multiplexers.

(b) Draw and explain the flowchart for interrupt cycle.

3. (a) Explain the typical way of separating the execution into multiple functional units with
the help of neat diagram.
(b) What is RISC pipeline? Explain the concept of delayed load and delayed branch.

4. (a) List and explain the input-output instructions.

(b) What are the design considerations for micro program sequencer?

5. (a) Compare hard wired control unit and microprogrammed control unit.
(b) What is cache coherency? Why is it necessary? Explain different approaches for cache
coherency.

6. (a) Draw and explain virtual memory organization.

(b) Explain the following:
i. Programmed I/O.
ii. Interrupt-initiated I/O.

7. (a) Draw and explain the crossbar switch system organization for multiprocessor.
(b) What is dynamic arbitration? Explain various techniques used for providing dynamic
arbitration.

8. Write a short notes on:

(a) DMA
(b) Error correcting and detecting codes.

?????
Code R7310201 2
III B.Tech I Semester (R07) Regular & Supplementary Examinations, November 2010
COMPUTER SYSTEM ORGANIZATION
(Electrical & Electronics Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE questions
All questions carry equal marks
?????

1. (a) Explain various ways of representing signed members in the fixed point number system.
(b) Explain the single line and the multiple bus structure.

2. (a) Draw and explain the bus structure for the data transfer between various registers and
the common bus.
(b) Explain the n- bit parallel adder and n-bit subtractor with the help of neat diagram.

3. (a) Explain the different phases in instruction cycle.

(b) What is RISC? What are the properties of RISC architecture? Explain its advantages and
disadvantages.

4. (a) Define the following.

i. Micro operation
ii. Micro instruction
iii. Micro program
iv. Microcode
(b) Write a micro program for ADD Src, R instruction.

5. (a) Explain the page replacement algorithms in detail.

(b) Draw and explain fully associative cache organization.

6. (a) Explain the DMA transfer in a computer system.

(b) Explain the I/O interface in detail.

7. (a) Draw and explain the flowchart of four stage CPU pipeline.
(b) Explain the general instruction format of the vector processor.

8. (a) Explain the characteristics of multiprocessors.

(b) Discuss the cache-coherence problem & its solution.

?????
Code R7310201 4
III B.Tech I Semester (R07) Regular & Supplementary Examinations, November 2010
COMPUTER SYSTEM ORGANIZATION
(Electrical & Electronics Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE questions
All questions carry equal marks
?????

1. (a) Explain the process of error detection and correction using Hamming code.
(b) Explain the various types of computers and their applications.

2. (a) Explain the 4- bit incrementer using combinational circuit.

(b) Explain 4- bit combinational shifter circuit.

3. (a) Discuss the different addressing modes with example.

(b) Explain the internal structure of a typical micro program sequencer with a block diagram.

4. (a) Explain the process for decoding of micro operation fields.

(b) List and explain various types of secondary memory devices.

5. (a) What is virtual memory? Why is it necessary to implement virtual memory?

(b) Explain the asynchronous serial transmission

6. (a) Explain the handling of branch instructions in instruction pipelining.

(b) Draw and explain the typical functional structure of a SIMD array processor.

7. (a) Explain the parallel arbitration technique with the help of neat diagram.
(b) What is mutual exclusion & critical section of program? Explain the process of mutual
exclusion with a semaphore.

8. Write short note on.

(a) First-In. First- Out (FIFO) buffer.

(b) RISC architecture.

?????