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25kΩ 25kΩ
APPLICATIONS +IN 3 1 REFERENCE
Line Receivers
Summing Amplifiers
Buffer Amplifiers–Drives 600 V Load
PIN CONNECTIONS
8-Pin Plastic Mini-DIP
(P Suffix)
Narrow Body SO
GENERAL DESCRIPTION (S Suffix)
The SSM2141 is an integrated differential amplifier intended to
receive balanced line inputs in audio applications requiring a
REFERENCE 1 8 NC
high level of noise immunity and optimum common-mode
–IN 2 SSM2141 7 V+
rejection. The SSM2141 typically achieves 100 dB of common-
+IN 3 TOP VIEW 6 OUTPUT
mode rejection (CMR), whereas implementing an op amp with (Not to Scale)
four off-the-shelf precision resistors will typically achieve only V– 4 5 SENSE
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
otherwise under any patent or patent rights of Analog Devices. Tel: 617/329-4700 Fax: 617/326-8703
SSM2141–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ VS = 618 V, TA = +258C, unless otherwise noted)
SSM2141
Parameter Symbol Conditions Min Typ Max Units
OFFSET VOLTAGE VOS VCM = 0 V –1000 25 1000 µV
GAIN ERROR No Load, VIN = ± 10 V, RS = 0 Ω 0.001 0.01 %
INPUT VOLTAGE RANGE IVR (Note 1) ± 10 V
COMMON-MODE REJECTION CMR VCM = ± 10 V 80 100 dB
POWER SUPPLY REJECTION RATIO PSRR VS = ± 6 V to ± 18 V 0.7 15 µV/V
OUTPUT SWING VO RL = 2 kΩ ± 13 ± 14.7 V
SHORT-CIRCUIT CURRENT LIMIT ISC Output Shorted to Ground +45/–15 mA
SMALL-SIGNAL BANDWIDTH (–3 dB) BW RL = 2 kΩ 3 MHz
SLEW RATE SR RL = 2 kΩ 6 9.5 V/µs
TOTAL HARMONIC DISTORTION RL = 100 kΩ 0.001 %
THD RL = 600 Ω 0.01
CAPACITIVE LOAD DRIVE CAPABILITY CL No Oscillation 300 pF
SUPPLY CURRENT ISY No Load 2.5 3.5 mA
NOTES
1
Input Voltage Range Guaranteed by CMR test.
Specifications subject to change without notice
–2– REV. B
SSM2141
ABSOLUTE MAXIMUM RATINGS 1
Package Type uJA2 uJC Units
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Input Voltage1 . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage 8-Pin Plastic DIP (P) 103 43 °C/W
Output Short-Circuit Duration . . . . . . . . . . . . . . Continuous
NOTES
Storage Temperature Range 1
For supply voltages less than ± 18 V, the absolute maximum input voltage is equal
P Package . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C to the supply voltage.
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C 2
θJA is specified for worst case mounting conditions, i.e., θJA is specified for device
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C in socket for P-DIP package.
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
ORDERING GUIDE
Total Harmonic Distortion vs. Frequency Dynamic Intermodulation Distortion vs. Frequency
REV. B –3–
SSM2141–Typical Performance Characteristics
Input Offset Voltage vs. Temperature Closed-Loop Gain vs. Frequency Closed-Loop Output Impedance
vs. Frequency
Gain Error vs. Temperature Slew Rate vs. Temperature Supply Current vs. Temperature
Supply Current vs. Supply Voltage Maximum Output Voltage vs. Maximum Output Voltage vs.
Output Current (Source) Output Current (Sink)
–4– REV. B
SSM2141
5mV 1S
+1µV
0V
–1µV
10mV 2mS
10mV 1mS
+10µV
+10µV
0V
0V
–10µV
–10µV
TA = +25°C
TA = +25°C
VS = ±15V
VS = ±15V
Voltage Noise from 0 kHz to 1 kHz Voltage Noise from 0 kHz to 10 kHz
APPLICATIONS INFORMATION
The SSM2141 represents a versatile analog building block. In
order to capitalize on fast settling time, high slew rate, and high
CMR, proper decoupling and grounding techniques must be
employed. For decoupling, place 0.1 µF capacitor located within
close proximity from each supply pin to ground.
REV. B –5–
SSM2141
MAINTAINING COMMON-MODE REJECTION
In order to achieve the full common-mode rejection capability
of the SSM2141, the source impedance must be carefully
controlled. Slight imbalances of the source resistance will result
in a degradation of DC CMR—even a 5 Ω imbalance will
degrade CMR by 20 dB. Also, the matching of the reactive
source impedance must be matched in order to preserve the
C1532–2.5–5/91
CMRR over frequency.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Figure 1. Precision Difference Amplifier. Rejects
[E1 + E 2 ] 8-Pin
Common-Mode Signal = by 100 dB Epoxy Mini-DIP
2
P-Suffix (N-8)
0.430 (10.92)
0.348 (8.84)
8 5
0.280 (7.11)
0.240 (6.10)
1 4 0.325 (8.25)
0.300 (7.62)
PIN 1 0.060 (1.52)
0.015 (0.38) 0.195 (4.95)
0.210 (5.33)
MAX 0.115 (2.93)
0.130
0.160 (4.06) (3.30)
0.115 (2.93) MIN
0.015 (0.381)
0.022 (0.558) 0.100 0.070 (1.77) SEATING
PLANE 0.008 (0.204)
0.014 (0.356) (2.54) 0.045 (1.15)
Figure 2. Precision Unity Gain Inverting Amplifier BSC
0.1968 (5.00)
0.1890 (4.80)
PRINTED IN U.S.A.
8 5
Figure 3. Precision Summing Amplifier 0.1574 (4.00) 0.2440 (6.20)
0.1497 (3.80) 1 4 0.2284 (5.80)
8°
0.0500 0.0192 (0.49) 0°
SEATING (1.27) 0.0138 (0.35) 0.0098 (0.25) 0.0500 (1.27)
PLANE BSC 0.0075 (0.19) 0.0160 (0.41)
–6– REV. B