In this article, grade school laptop repair online HPCOM want to share with you about the knowledge

related to the launch chipset INTEL laptop with the aim to make it easier for their learning. Learn the
HPCOM offline.

Usually the boot process laptop chipset INTEL here the signal line can be measured red symbols in the
drawing Laptop

1. In the absence of any power supply (no battery and adapter), by battery 3V CMOS circuits to create
Southbridge VCCRTC provide RTC circuits, to maintain internal information 32768 CMOS time
measurement levels RTC circuit: VCCRTC-DCPRTC / RTCRST # / SRTCRST # / 32.768KHz # 3.3V EC
sources to save time system Southbridgechip Nam

2. When the battery or power adapter 2 creates a common,

followed by EC provides backup power (typically 3.3V linear power supply current 0.08A) 3. To get a
standby power supply EC (AVCC / VCC0) and RTC CMOS source, (32.768Khz 3.3V) and reset (3.3V
EC_RST # / ECRST # / WRST # / VCC_POR / VCC1_RST #) after read (BIOS) programming (oscillators
can measure the waveform) 4. If the EC discovered the power adapter (charger IC good signal
conversion ACOK ACIN / AD_IN / AC_IN / RI2 / WUI1 / GPD1 / ACAV_IN), will automatically send a
signal to launch South voltage chip standby (VCCSUS3_3, V5REF_SUS), and then sent to South chip
called "RSMRST #" (3.3V) If good chip voltage Nam is normal, if the EC does not signal ACOK (battery
mode), the EC should receive signal conversion trigger, only to turn Southbridge power standby mode to
save power current 0.02 to 0.03 5. When you press the switch ON / OFF, after the EC received signal
switch (connected to the EC name GPIO03 / GPIO06 PWUREQ # / GPC7 / PWR_SW # - ASUS / TMRI0
/ WUI2 / GPC4 / EC_GPXIOD3 / KBC_PWRBTN #) sent 1 signal high - Southbridge PWRBTN control
switch to the cap (COVER_SW # / LID_SW #) 6. When southbridge received PWRBTN # signal it sends
signals about SLP_S5 EC #, SLP_S4 #, SLP_S3 #, SLP_S5 / S4 # conducted using the following feed +
3.3VSUS EC open source RAM (DDR1 0.05A 2.5 V 1.8V DDR3 1.5V DDR2), open the feed after
SLP_S3 # 3.3V_RUN, + 5_RUN, south bridge power supply (1.5 V) bus-powered, (VCCP) 0.3A 0.2A-
1.05V) graphics card offers power (, (0.5-0.7A 1.2V) VGPU_CORE VGA source EC 7. Received signal
feeds back OK, EC or other vessels to switch to open the CPU voltage (VCORE) to line up with the
current 0.6A CPU means source, (can see the line about 0.3-0.5A). at this point, the entire voltage has
been opened completely. 8. After the CPU power supply is normal, CPU power management chip PG last
emitted serve chips operating conditions of South VRMPWRGD / SYS_PWROK / MEPWROK
approximately 3.3V CPU signal good CPU) 9, the CPU power supply is normal, turning the clock chip
through conversion circuit, generating around CLOCK GEN (945 or less and HM55 Series is the # CPU
CLK_EN open the pulse signal CLOCK GEN; 965 and 945 series are VRMPWRGD to send Southbridge
Southbridge CK_PWRGD problems started 3.3V CLOCK GEN) 10, southbridge receives power, pulse
CLOCK GEN, VRMPWRGD, and receive signals sent to the EC or other circuit PWROK (3.3V) ,
southbridge will signal (CPUPWRGD / PROCPWRGD / DRAMPWROK approximately 1.05V) (notice to
successfully open the CPU voltage, and also signaling system startup PLTRST # 3.3V) and PCIRST #
(3.3V) 11. Northbridge Chip north after receiving PLTRST #, signaling CPURST # (1.05V 0.7A) signal to
the CPU, the CPU begins work boots completed
12. CPU start solving ADS #, read and retrieve data BIOS

13. Initiating line memory consumes about 0.7-0.8A

14. Created graphics 0.9-1.1A current consumption

15. Show LOGO

16. Display Peripherals

Can use specific measurements, but this signal to check for errors cause damage and repair methods
given thanks.

I wish you every success,

Source: laptop repair training