PSW (Program Status Word)

The PSW is 64 or 128 bits hardware register depending on the machine that you

are running.

In the ESA/390 architecture it is 64 bits, Bits 0 to 32 are various control

bits like program mask, condition code etc., and 33-63 is the instruction

address.

In Z Architecture it is 128 bits with bits 64-127 holding the 64 bit instruction

While CPU running a program the PSW specifies current status of that program
and temporarily stored in PSW Hardware register. If got interrupted then it'll
be stored into the storage location assigned for the Program.

suppose CPU handling two programs A & B,

While A interrupted CPU place the current PSW which handled by CPU currently
into the place of Old PSW for A, it actually happens in the assigned storage
location for A.

after A's interruption CPU started B and first thing it does the loading of

PSW for B which stored in the place of storage location assigned for B.

and when B again interrupted thus CPU can attend A, the current PSW will be

stored into the place of Old PSW for B in the assigned storage location for B.

and again started A, by loading PSW for A from the storage location assigned

for A.

PSW holds:
1)current instruction address
2)Condition Code
3)other info for controlling instruction sequencing.
4)State of CPU.
PSW Format
┌─┬─┬───┬─┬─┬─┬───────┬─┬─┬─┬─┬──┬──┬────────┬───────┬──┐
│0│R│000│T│I│E│PSW KEY│1│M│W│P│AS│CC│PGM MASK│0000000│EA│
└─┴─┴───┴─┴─┴─┴───────┴─┴─┴─┴─┴──┴──┴────────┴───────┴──┘
0 5 8 12 16 18 20 24 31

┌──┬────────────────────────────────────────────────────┐
│BA│Instruction Address │
└──┴────────────────────────────────────────────────────┘
32 33 63

Actual Values
┌─┬─┬───┬─┬─┬─┬───────┬─┬─┬─┬─┬──┬──┬────────┬───────┬──┐
│0│0│000│1│1│1│1000 │1│1│0│1│00│10│0000 │0000000│0 │
└─┴─┴───┴─┴─┴─┴───────┴─┴─┴─┴─┴──┴──┴────────┴───────┴──┘
0 5 8 12 16 18 20 24 31

┌──┬────────────────────────────────────────────────────┐
│1 │18601172 │
└──┴────────────────────────────────────────────────────┘
32 33 63

Bit Meaning
───── ────────────────────────────────
1 Program (R)
5 DAT Mode (T = 1)
6 Input/Output Mask (I)
7 External Mask (E)
12 Zero indicates z/Architecture
13 Machine Check Mask (M)
14 Wait State (W = 1)
15 Problem State (P = 1)
16-17 xx Real Mode (T = 1)
00 Primary Space Mode (T = 1)
01 Access Register Mode (T = 1)
10 Secondary Spacer Mode (T = 1)
11 Home Space Mode (T = 1)
18-19 Condition Code (CC)
20 Fixed Point Overflow Mask
21 Decimal Overflow Mask
22 HFP Exponent Overflow Mask
23 HFP Signficance Mask
31-32 Extended/Basic Address Mode (EA/BA)
00 24-bit Mode
01 31-bit Mode
10 Invalid
11 64-bit Mode
33-63 Instruction Address (Hexadecimal)

**** Bottom of data.

 Program Status Word (PSW)

The Program Status Word or PSW is a collection of data 8 bytes (or 64 bits) long,
maintained by the operating system. It keeps track of the current state of the system.

We can usually ignore the PSW unless an ABEND has occurred. When an ABEND
does occur, ASSIST will print out various information for us including the PSW. The
PSW is printed out as 16 hex digits in two groups of 8.

What information is in the PSW?

You can find a detailed list of the fields in the PSW in the yellow card. We use the
"BC Mode" of the PSW. Here is a list of some fields we will need in this course:
Bytes Contents

1 & 2: assorted data we can ignore for now

3 & 4: Interruption Code
5: 2 bits = Instruction Length Code (ILC)
2 bits = Condition Code (CC)
4 bits we can ignore for now
6 - 8: Address of the next instruction

What are all these?

 The Interruption Code indicates the type of ABEND that has occurred.
 The ILC gives us the length of the current instruction, measured in halfwords,
 The CC gives us the condition code as set most recently.
 The address of the next instruction gives us the location of the instruction that
would have been executed if the program had not ABENDed.

So what do we do with all this?

One problem with an ABEND is to determine which instruction caused the ABEND.
We can find it using the information in the PSW:
Address of ABENDing instruction = Address of next instruction - 2 * ILC

Example
Suppose an ABEND occurs and the PSW has the value FFC50001 8000001A.

We can look at this and know that:

 The interrupt code is 0001 (Operation Exception).

 The ILC is 10 (binary) or 2 (decimal), so the ABENDing instruction is 4 bytes
long.
 The CC is 00.
 The address of the next instruction is 00001A.
 The address of the ABENDing instruction is 00001A - 4 = 000016.