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Programs for Multiplication

Example 4.27: Write an assembly language program to multiply two 8-bit numbers
stored in register B and register C. The 16-bit result should be stored in DE register pair.

Program Analysis: This program demonstrates that the multiplication is multiple additions.
Register B contains multiplicand (say A2H) and register C contains multiplier (say 0BH).
Accumulator is cleared using XRA A instruction (Explained in Example 4.12). Register D and
E are also cleared by copying the contents of A into them. DE register pair is used to store the
result of multiplication.

To perform multiplication operation, multiplicand (in B) is added with Accumulator as many


times as the multiplier (in C).

In this program it is assumed that the two numbers to be multiplied are non-zero. One can
modify the program by adding this feature also.

PROGRAM:
Memory Label Mnemonics Hex Remarks
Address Code
2000H MVI B, 06H Store multiplicand in B.
A2H
2001H A2H
2002H MVI C, 0BH 0EH Store multiplier in C.
2003H 0BH
2004H XRA A AFH Clear Accumulator.
2005H MOV D, A 57H Clear D. used to store high-order byte of the
result.
2006H MOV E, A 5FH Clear E. used to store low-order byte of the
result.
2007H LOOP: ADD B 80H Add multiplicand with A.
2008H JNC SKIP D2H If no carry is generated by the addition skip the
2009H 0CH increment operation.
200AH 20H
200BH INR D 14H If carry is generated in the Add operation
increment D.
200CH SKIP: DCR C 0DH Decrement counter.
200DH JNZ LOOP C2H Repeat the process from 2007H, until counter
200EH 07H reaches zero.
200FH 20H
2010H MOV E, A 5FH Copy low-order byte of the result in E.
2011H HLT 76H Stop the program.

Result of multiplication in DE register pair will be 06F6H

Example 4.28: Write a program to multiply two 8-bit numbers. Multiplicand is extended
to 16-bit and stored in the two consecutive memory locations 2050H and 2051H. The
multiplier is stored at 2052H. Store the 16-bit product at two consecutive memory
locations 2053H and 2054H.
Program Analysis: The drawback of the program shown in Example 4.27 is that the program
is time consuming. To perform multiplication, multiplicand is added as many times as the
multiplier. i.e., if the multiplier is FFH (max possible value, equivalent to 255 in decimal)
addition will be performed 255 times. Hence, the program shown in Example 4.27 is not
efficient.

Now, we apply another method to write program for multiplication. This is the method (also
explained in chapter 1), which we normally use to multiply two binary numbers, as shown
below:

0110 Multiplicand (=610)


x 0101 Multiplier (=510)
0110
0000
0110
0000
0011110 (=3010)

In this program DE register pair contains the 16-bit multiplicand. A contains the 8-bit
multiplier. HL pair is initialised to 0, which is used to store the product. Register C is used as
the counter, initialised always with 8. Whatever may be value of the multiplier, the loop will
execute only 8 times.

Every time the loop executes, the product is shifted left by one position using DAD H
instruction. The multiplier is shifted left by one position using RAL instruction. RAL transfers
the D7 bit of the accumulator into Carry flag. If carry flag is set by RAL instruction DE pair is
added to HL pair and result is stored in HL pair, otherwise not. The counter C is decremented
every time and loop is repeated 8 times as the multiplier is of 8-bits.

Fig 4.16 Flow Chart for Multiplication.

PROGRAM:
Memory Label Mnemonics Hex Remarks
Address Code
2000H LHLD 2050H 2AH Load HL pair with 16-bit multiplicand
2001H 50H stored at 2050H and 2051H.
2002H 20H
2003H XCHG EBH Exchange the contents of HL with DE
pair. Multiplicand is now in DE pair.
2004H LDA 2052H 3AH Load 8-bit multiplier into Accumulator.
2005H 52H
2006H 20H
2007H LXI H, 0000H 21H Copy 0000H in HL pair.
2008H 00H
2009H 00H
200AH MVI C, 08H 0EH Initialise counter with 08H.
200BH 08H
200CH LOOP: DAD H 29H Add HL with HL to shift the contents of
HL left by one position.
200DH RAL 17H Shift the contents of Accumulator left by
one position.
200EH JNC SKIP D2H If Carry flag is not set skip following
200FH 12H DAD D instruction.
2010H 20H
2011H DAD D 19H Add DE with HL. Store result in HL.
2012H SKIP: DCR C 0DH Decrement counter.
2013H JNZ LOOP C2H Repeat the process from 200CH, until
2014H 0CH counter reaches zero.
2015H 20H
2016H SHLD 2053H 22H Store result in HL to the memory
2017H 53H locations 2053H & 2054H.
2018H 20H
2019H HLT 76H Stop the program.

If data stored in memory is, as shown below:

Memory Data Remarks


Location
2050H 67H LSB of the Multiplicand
2051H 00H MSB of the Multiplicand
2052H 25H Multiplier

Then after the execution of the program, the result available at following memory addresses
will be:
Memory Data Remarks
Location
2053H E3H LSB of the Product
2054H 0EH MSB of the Product

Programs for Division

Example 4.29: Write an assembly language program to divide an 8-bit number stored in
register A by an 8-bit number stored in register B. After division the quotient must be
stored in C register and remainder in Accumulator.

Program Analysis: This program demonstrates that the division is multiple subtractions.
Divisor is subtracted from the dividend until the remainder is less than divisor.

In the following program the dividend is stored in Accumulator and divisor is stored in register
B. After every subtraction register C, which is initially 0, is increment by one, hence stores the
quotient. Finally Accumulator will be left with the remainder. Before subtracting CMP
instruction is used to check whether the remainder is less than divisor or not. If A < B, Carry
flag is set and division is ended.

It is assumed in this program that both divisor and dividend are non-zero.
PROGRAM:
Memory Label Mnemonics
Hex Remarks
Address Code
2000H MVI A, EFH 3EH Accumulator initially loaded with
2001H EFH dividend. But contains remainder during
the process and at the end.
2002H MVI B, 20H 06H Load divisor in register B.
2003H 20H
2004H MVI C, 00H 0EH Initialise C with 0, used to store the
2005H 00H quotient.
2006H LOOP: CMP B B8H Compare remainder with divisor.
2007H JC END DAH If Carry flag is set, i.e., remainder is less
2008H 0FH than divisor then the division is ended.
2009H 20H
200AH SUB B 90H Otherwise subtract divisor from the
remainder.
200BH INR C 0CH Increment quotient.
200CH JMP LOOP C3H Repeat the process from 2006H.
200DH 06H
200EH 20H
200FH END: HLT 76H Stop the program.

Result: [C=07H, A=0FH]

Example 4.30: Write an assembly language program to divide a 16-bit dividend, stored
in memory locations 2051H & 2052H, by an 8-bit divisor, stored in memory location
2053H. After division the quotient must be stored in memory location 2054H and
remainder in memory location 2055H.

Program Analysis: In this program the dividend is of 16-bit and divisor is of 8-bits. The
divisor is subtracted from the 8 most significant bits of the dividend. If there is no borrow, the
bit of quotient is set to 1; otherwise 0. The dividend and quotient share a 16-bit register. The
dividend is shifted left by one bit before each subtraction. Due to the shift of dividend one bit
of the register becomes available on the right side. One bit of quotient is stored on the vacant
right most bit of the 16-bit register.

Fig. 4.17 Flow Chart for division

PROGRAM:
Memory Label Mnemonics Hex Remarks
Address Code
2000H LHLD 2051H 2AH Load 16-bit dividend in HL register pair
2001H 51H from the memory locations 2051H &
2002H 20H 2052H
2003H LDA 2053H 3AH Load 8-bit divisor into A from memory
2004H 53H location 2053H.
2005H 20H
2006H MOV B, A 47H Copy A into B.
2007H MVI C, 08H 0EH Initialise Counter with 08H.
2008H 08H
2009H LOOP: DAD H 29H
Shift Dividend and quotient left by one
position.
200AH MOV A, H 7CH Copy high-order byte of the dividend in A
200BH SUB B 90H Subtract divisor form high-order byte of
the dividend.
200CH JC SKIP DAH If high-order byte of the dividend is less
200DH 0FH than divisor then go to 200FH.
200EH 20H
200FH MOV H, A 67H Otherwise copy high-order into H.
2010H INR L 2CH Increment the quotient by one.
2011H SKIP: DCR C 0DH Decrement the count.
2012H JNZ LOOP C2H Repeat the process from 2009H, until
2013H 09H counter reaches zero.
2014H 20H
2015H SHLD 2054H 22H Store the result in Hl pair at memory
2016H 54H locations 2054H & 2055H
2017H 20H
2018H HLT 76H Stop the program.

Sample Execution of the program:


Suppose if we want to divide 0AH (=1010) by 03H then data at memory locations 2501H,
2502H and 2503H should be stored as shown below:

Data:
2501H 0AH Low-Order byte of the dividend
2502H 00H High-Order byte of the dividend
2503H 03H The Divisor

Then Program will be executed in the following sequence:

S. Instruction Changes made in Modification in the


No. Executed the registers Flag to be checked
1 LHLD 2501 HL = 000AH
2 LDA 2503 A=03H
3 MOV B, A B=03H
4 MVI C, 08H C=08H
5 DAD H HL=0014H
6 MOV A, H A=00H
7 SUB B A=FDH CY=1
8 DCR C C=07 Z=0
9 DAD H HL=0028H
10 MOV A, H A=00H
11 SUB B A=FDH CY=1
12 DCR C C=06H Z=0
13 DAD H HL=0050H
14 MOV A, H A=00H
15 SUB B A=FDH CY=1
16 DCR C C=05H Z=0
17 DAD H HL=00A0H
18 MOV A, H A=00H
19 SUB B A=FDH CY=1
20 DCR C C=04H Z=0
21 DAD H HL=0140H
22 MOV A, H A=01H
23 SUB B A=FEH CY=1
24 DCR C C=03H Z=0
25 DAD H HL=0280H
26 MOV A, H A=02H
27 SUB B A=FFH CY=1
28 DCR C C=02H Z=0
29 DAD H HL=0500H
30 MOV A, H A=05H
31 SUB B A=02H CY=0
32 MOV H, A H=02H
33 INR L L=01H
34 DCR C C=01H Z=0
35 DAD H HL=0402H
36 MOV A, H A=04H
37 SUB B A=01H CY=0
38 MOV H, A H=01H
39 INR L L=03H
40 DCR C C=00H Z=1
41 SHLD 2504 At memory location At memory location
2504H=03H 2505=01H
(Quotient) (Remainder)
42 HLT