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A fault switching device is detected without using Step 5: Develop an intelligent control algorithm to connect
additional sensors but by monitoring the distorted shape of the auxiliary inverter during the fault.
output current waveform in [15]. A seven level inverter which Step 6: Implement ANN and auxiliary inverter control in
produces a symmetrical six level waveform during unbalanced 3kWp solar PV system.
condition and the reconfiguration of gating signals according Step 7: Test the experimental PV system for 20 different types
to the failure modes on occurrence of failure in power devices of faults to verify the fault detection and mitigation.
is discussed in [16]. Utilization of bidirectional switches, Often the faults are associated with reduction/increase in
transformers with different turns ratio, PWM of high the voltage/current. This can result in either lower voltage or
switching frequency makes the fault tolerant system much asymmetry in any individual H bridge or CMI. The novelty of
more complex [17]. the paper resides in overcoming these issues using an
It is observed that there remain a few short-comings in the intelligent based controller.
research on performance of the fault tolerant capability for the
B. Design Layout
entire solar PV system, i.e. it cannot meet the need of real
world applications. Much of the works are reported on inverter Fig.1 shows the proposed circuit topology for fault tolerant
without PV array [9-15].The little work that includes PV only capability system. Although we explain our results for our
reports fault in switches [3]. None of the works have dealt specific simulation and experimental test bed the methods and
with fault detection on PV with respect to batteries or inverter steps are applicable to other size PV arrays with different
and also not addressed fault tolerant operation for the entire levels of CMI. The figure comprises of seven PV arrays (each
solar PV system. Thus, the investigation of the fault detection array is a series connection of 4 modules) coupled with seven
and tolerant systems is an important issue. inverters connected in series which depicts the 15 level
The major contribution of the proposed research work is configuration. An additional inverter is connected in series
summarized as below: with this configuration termed as ‘auxiliary inverter’ whose
• Analyzed the causes and effects of faults in solar PV, action (ON/OFF) is manifested by the control of two switches
battery and inverter SA1 and SA2. The auxiliary inverter is also powered by the
• Performed extensive simulation and extensive experimental solar PV array. Hence the circuit has the capability to generate
studies for various fault conditions in PV systems 17 level output voltage as it illustrates an 8 stage CMI. The
• Implemented an intelligent controller to ensure the power control action for the inverter switches is performed with
flow even during fault and partial shaded conditions PDPWM (Phase Disposition Pulse Width Modulation) by
making the corresponding analysis on other PWM approaches
• The salient results obtained thus proved that the proposed
in [18].
inverter topology performs well in various fault conditions
The switching pulses are given to all the eight inverter
The paper is organized as follows: Section II presents the
stages without any variations to avoid the high switching
problem statement and methodology and Section III exhibits
frequency patterns, which are found as a drawback in most of
the problem formulation with ANN. Section IV illustrates the the literature. The switching frequency is fixed at 1 kHz and
experiemntal results, discussions and final conclusions. the inverter output frequency is 50Hz which is determined by
the carrier and reference signals respectively.
II. PROBLEM STATEMENT AND METHODOLOGY The individual solar PV module has the specification of
A. General Problem Statement open circuit voltage, Voc=21.2V, short circuit current,
Isc=7.4A, maximum peak voltage, Vmp=16.5V, maximum peak
The major objective of the proposed work is divided into
current, Imp=6.95A and maximum peak power, Pmp=115Wp.
fault identification and fault mitigation in the entire solar PV
Four such modules are connected in series to form a solar PV
energy conversion system. The fault identification process
array. Hence the overall solar PV rating of the system is
comprises of the following steps:
3220Wp. The solar PV output is connected to the battery of
Step 1: Model and simulate 20 types of different faults (8 solar
rating 48V, 100Ah (4 batteries in series with individual rating
PV faults: ground fault, line to line fault, open circuit fault,
of 12V, 100Ah) which is depicted in Fig.1 as B1 to B8. With
floating PV systems, double ground fault, blind spot,
the State of Charge (SoC) of 50% and greater, the battery
undervoltage and hot spot heating, 9 inverter faults:
provides 48V. The reason behind the 48Vp input to the
overcurrent, overheating, switch not driven, switch open, both
inverter stage is to provide the 230Vrms across the load
diode and switch open, only diode open, short circuit, gate
terminals. In the proposed design, Vdc=336V which is greater
drive failure and blackout, and 3 battery faults: overvoltage,
than the square root of the grid voltage (325.26V), makes the
undervoltage and abnornal charging-discharging cycles).
system suitable for both standalone and grid connected PV
Step 2: Experimentally create the 20 types of faults in a 3kWp
configurations [19].
solar PV test bed
Hence, the faults developed in the battery such as
Step 3: Measure and record H Bridge output voltage for fault
overvoltage, under voltage, abnormal charging and discharge
to create N datasets. In this research we have collected 1500
cycles also been considered. The individual battery (12V,
data sets (685 simulation and 815 experimental data sets).
100Ah) discharges to 10.8V at 270C. When the SoC >50%, the
Step 4: Use 70% of data to train Artificial Neural Networks
battery attains the maximum voltage leading to overcharging
(ANN) using advanced Back Propagation (BPN) algorithm to
condition. Similarly the voltage reduces while the SoC is less
identify faults.
than 50%. The cut off voltage of the battery is found to be
In continuation, the fault mitigation process comprises of
36V and the fully charged voltage is 55.8714V.
the following steps:
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Fig. 3. Output voltage waveform during fault in inverter 1 (Vbattery drop= 48V)
In general, a fault may cause a change of output voltage by
∆Vo across the output terminals of a fifteen level inverter. The
reduction ∆Vo may become equal to either ∆VPVi or ∆Vbatteryi
or an inverter failure, where i represent the ith stage of the
multi-level inverter. The reduction in PV voltage is expressed
as,
∆VPVi = VPV reference - VPV peak measured (1)
Similarly, the reduction in battery voltage is expressed as,
∆Vbatteryi = Vbattery reference - Vbattery peak measured (2)
The change in the output voltage is given as,
∆Voi = Vo reference – Vo peak measured (3)
where ∆VPVi , ∆Vbatteryi and ∆Voi represent the change in PV,
battery and output voltages of a particular stage in Fig.1,
i=1,2,…7. The variations given as ∆VPVi , ∆Vbatteryi and ∆Voi
are used to monitor the deviations incurred in the source and
load voltages. The reference value is fixed at 48V (±2V
tolerance) at all the three quantities.
When one of the inverter stages is in OFF, short or open
circuit, then Vo peak becomes less than the desired/reference
Fig. 1. Power circuit of the proposed topology
voltage by ∆Vo. The peak value of the output voltage is
decreased when the inverter is under fault. This low input
C. Simulation analysis voltage supply is due to the fault in the solar PV or battery,
Simulations are carried out in MATLAB 2016a/Simulink. which is unable to provide the voltage required for the
The output voltage of a CMI while making all the eight stages individual inverter stages. The low peak value of CMI causes
of the inverter including auxiliary inverter to operate produces the adverse effects to the loads connected in the system which
17 levels. The normal operation of CMI with 15 levels is is to be avoided. The purpose of this section is to provide the
given in Fig.2. Here the auxiliary inverter is turned OFF by the effects of faults in the source or converter. It shows that when
switching condition SA1=1 and SA2=0. there is a fault in solar PV cell or module it exhibits a reduced
If any one of the inverter stages is completely turned OFF voltage required to charge the battery.
due to the occurrence of solar PV or battery fault, then the In addition, if there is a fault in the battery, it provides the
overall output voltage of the system will be the summation of reduced voltage required for the converter (CMI). Also, the
output voltages in the other inverter stages. Suppose inverter 1 semiconductor devices failure provides the reduced and
whose input voltage of 48V is under fault. Then, the overall asymmetrical voltage waveform. On considering the faults
output voltage is 48Vx7stages-48V=288V as shown in Fig.3. from the source to the load, the effect is reduced or achieves
The output voltage of CMI during the occurrence of fault in low voltage at the output end.
two inverter stages is 48Vx7stages-48V-48V= 240V. When Hence in the proposed work, the reference value of the
any one of the inverters provides the output voltage of 0V, due output voltage in an individual inverter stage is fixed. Any
the cascaded connection at the output end, the other inverter change in the output voltage is considered as the uncertainity
stages tends to operate in providing the reduced output voltage and imprecision (even the condition is not primarly due to
without any interruption. fault). With a small variation over the tolerance limit in the
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The red color dotted line marked in the flow chart in In addition, the proposed system considers the fault in the
Fig.5 specifies the action performed by ANN (explained in entire standalone solar PV conversion process (solar PV,
section III). Initially, the output voltages of the individual battery, inverter, accessories) and also maintains the output
inverter stages are measured. If the voltages are equal to the voltage due to partial shading conditions. The auxiliary
desired 48V each, then the controller performs the normal switches are active not only during the fault, but also during if
mode (marked in green color dotted line). If the output any one of the solar PV array (numbered as 1 to 7) is subjected
voltages are not equal to the desired reference, then the fault to partial shading condition.
mode operation will be performed. In this mode, the controller The architecture of ANN used for the system is given in
will calculate the change of output voltage (∆Vo). During this Fig.6 which depicts the input layer with seven neurons (Vo1 to
process, the controller initiates the auxiliary inverter to operate Vo7), output layer with two neurons ([0,1] or [1,0]) and two
on compensating the loss ‘x’ and restores the continuity of the hidden layers with 20 and 10 neurons in each layer
supply without any interruption. Meanwhile, the location and respectively. The choice of hidden neurons is based on the
type of the fault is identified based on the value of voltage complexity of the problem. The hidden neurons can also be
dip//rise, shape of the waveform and measurement of voltage, calculated based on the formula given in the equation (4) [5].
current at the input/output terminals of battery. Here K represents the number of neurons in hidden, I is input
The output of ANN is set as [1,0] for normal and [0,1] for neurons, O is output neurons and θ is the positive semi definite
abnormal conditions. The [1,0] and [0,1] logic is used to turn constant between 0 to 10.
ON/OFF the switches SA1 and SA2 which then operates K = I +O + θ (4)
auxiliary inverter. During the normal operation, [1,0] logic
will provide the 15 level output voltage waveform. Similarly The activation functions used are ‘tansig’, ‘purelin’ and
the logic [0,1] will provide the 15 level output voltage ‘purelin’ between input and output through two hidden layers.
waveform if any fault exists in the system on considering the Levenberg Marquart algorithm (LMA) is used for the weight
faulted inverter stage output is equal to 0V. Hence the updation and ‘traingdm’ for training. LMA is the combination
proposed topology will provide 15 levels at all time without of error back propagation (gradient descent) and Gauss
reduction in the output voltage inspite of fault and partial Newton algorithm and blends between these two methods
shading conditions. Before the dataset is used for training, it is during training for stability and speed.
normalized. If the normalization is not made, the large LMA is the fastest back propagation algorithm (BPA) and
variations in the output voltages would monopoly the learning designed to approach second order training speed without
phase and would be difficult to react for any small variations. computing the Hessian matrix. The benefits of LMA include
The input dataset is normalized with the bipolar functions for fast, stable convergence, and it does not require more memory
initial scaling than other algorithms [3]. The performance of ANN after
training is shown in Fig.14.
III. ARTIFICIAL NEURAL NETWORK If any fault occurs in the system, ANN can detect the
change of output voltage (∆Vo) and provides subsequent
Artificial Neural Network (ANN) symbolically mimics the switching patterns to SAI and SA2 for the operation of
human brain and is widely used in various decision making auxiliary inverter which in turn provides 15 level output
applications. The success of ANN in any application resides in voltage waveform. It is also considered the condition of short
the way of its learning and adaptation with reduced duration fault which is due to the sudden change in climatic
computational complexity. Partially trained systems may not condition or resuming from any fault operation to normal as
be able to achieve the desired output. The three basic steps shown in the Fig.7 and Fig.8.
involved in ANN are dataset collection, learning/training and Fig.7 shows that when there is a fault (any one inverter
execution. The dataset collection can be made by either output voltage is 0V) from 2ms to 6ms (2 cycles) there is a
fundamental formulas [3] or with simulation and experimental reduction in peak voltage until the fault resumes at 6ms. If the
studies. Once the dataset is collected, it has to be preprocessed fault does not resume, even after few cycles, the reduction of
for feature extraction and then proceeded towards learning. voltage will be continued.
The process of finding weights is called learning.
The learning phase is structurally similar to the tuning of
synapses in the natural neuron structure. The weights are to be
adjusted or tuned to achieve the desired output, which will be
supported by various feedforward and feedback algorithms.
Once the network is trained it should be tested before it moves
for the final execution phase.
In the earlier works on fault diagnosis [12,13], ANN is used
to calculate the switching pattern of CMI, which alters the
carrier signals of PWM resulting in distorted output voltage
waveform. It also makes the system more complex. Only one
fault (either open circuit or short circuit) is considered [12]. In
this proposed work, the control to two switches (SA1, SA2) is
undertaken whose switching action is decided by Artificial
Neural Networks.
Fig. 6. ANN architecture
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The fault detection process is implemented by the In both the cases (a) and (b), the CMI provides the reduced
necessary preconditions (in terms of voltage, current and output voltage until or otherwise the fault is cleared by any
power) determined for the individual set of faults in binary bit external intervention. Similar faults are also experimentally
pattern. Based on the reduction or increase in the output tested for the different cases of solar PV and battery which
voltages it can locate the faults in the subsequent inverters. For reduces the CMI output levels to even of three level with 48V.
an example, for detecting the inverter fault, the output voltage It is noted that the fault in the system provides the reduced
will be depecited as 1110111 which mean that the H bridge 4 output voltage or even 0V if and only if the fault is considered
is under fault. Similar criteria hold for other fault conditions. in all the sources which may not be practically feasible.
Fig.11 and Fig.12 depicts the output voltage waveforms The power quality analyzer WT3000 is also used to
obtained during short circuit and open circuit fault conditions. visualize the output voltages given above as it can monitor the
The open circuit and short circuit conditions are waveforms for short interval of times under fault conditions.
experimentally made by rearranging the connections made for The output voltage obtained by the intervention of ANN is
the individual inverter stages. The waveforms obtained are given in Fig.14 which shows the fifteen levels during normal
asymmetrical with the Vbattery drop of 48V at either positive or condition on inducing the various faults to the system.
negative half cycles respectively. Fig.13 shows output voltage The analysis and discussions on the results was made on
waveform obtained during the fault operation of individual comparison with the other fault detection methods given in the
inverter stage. literature. The comparison given in Table I shows the
The waveform in Fig.13 is realized by considering the advantages of proposed system such as increased levels for
faults such as: a) battery fault (deep discharge, electrolyte power quality improvement, simple structure, fast detection
failure, discontinuation of series connection, combination of for diagnostic process and considering the fault for the entire
normal and abnormal battery in a series node) and b) solar PV solar PV conversion process.
fault (discontinuation of PV module, complete shading in one Based on the Table I it is found that majority of the works
or more modules, cable failure from solar PV to battery, solar reported are for switch faults on considering either open
cell damage and abnormal series connection). circuit and/or short circuit faults. This is due to the estimation
that about 38% of all the failures are found in the power
converter [20,21] and the most of faults are occurred in the
power switches [22,23].
Hence the proposed work extended to find a solution of
faults which occur in the entire system using an intelligent
controller. The most important parameters in a fault-tolerant
system design such as component quality, level of
redundancy, redundancy type and implementation,
maintenance, etc. are analyzed and studied which is well
depicted in the results obtained.
Fig. 14. Output voltage waveform waveform with the intervention of ANN
Fig. 12. Output voltage waveform during open circuit fault (normal)
TABLE I
COMPARISON AND ANALYSIS
Ref. Method adopted Levels Faults considered
[5] ANN (5-9-8 structure) - Switch faults
[9] Bidirectional switches 5 Switch faults
[10] T type inverter 3 Open switch fault only
[12] ANN (40-2-1 structure) 5 Open and short circuit
[13] ANN (4-4-3 structure) 5 Switch faults
[15] Level shifted PWM 7 Switch faults
[16] Carrier modulation 5 Switch faults
[24] Vector machine approach 5 Open switch fault only
[25] ANN 5 Switch fault only
Fig.13. Output voltage waveform during fault in one inverter stage Proposed work 15 & 17 20 different faults
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V. CONCLUSION [16] Mingyao Ma, Lei Hu, Alian Chen, and Xiangning He, “Reconfiguration
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[20] Nasrudin A. Rahim, Krismadinata Chaniago and Jeyraj Selvaraj, “Single
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[7] Ye Zhao, Jean-François de Palma, Jerry Mosesian, Robert Lyons, Jr., India, the M.E. degree in Power Electronics and
and Brad Lehman, “Line–Line Fault Analysis and Protection Challenges Drives and Ph.D in Renewable energy from Anna
in Solar Photovoltaic Arrays”, IEEE Transactions on Industrial University, India in 2004, 2007 and 2014,
Electronics, Vol. 60, No. 9, pp.3784-3795, Sep. 2013. respectively. He joined the Department of Electrical
[8] Mariusz Malinowski, K. Gopakumar, Jose Rodriguez and Marcelo A. and Electronics Engineering, Kongu Engineering
Pérez, “A survey on cascaded multilevel inverters”, IEEE Transactions College in 2007, and is currently a Associate
on Industrial Electronics, Vol. 57, No. 7, pp.2197-2206, July 2010. Professor. He served as the Principal Investigator for
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[10] V. Fernão Pires, D. Foito and Tito G. Amaral, “Fault detection and energy. He also received Raman research fellowship from Government of
diagnosis in a PV grid connected T-type three level inverter”, 4th India to pursue his post-doctoral studies in Northeastern University, USA.
International Conference on Renewable Energy Research and He has received 15 awards for the excellence in research from various
Applications, Palermo, Italy, 2015, pp.933-937. national and international organizations such as ISTE, IE (I), SPRERI, IET
[11] Hamed Nademi, Anandarup Das, Rolando Burgos, and Lars E. Norum, etc., and his special fields of interest include performance improvement in
“A new circuit performance of modular multilevel inverter suitable for solar PV systems, microgrid and smart grid.
photovoltaic conversion plants”, IEEE Journal of Emerging and
Selected Topics in Power Electronics, Vol. 04, No. 2, pp.393-404, June Brad Lehman (M’92–SM’08) is presently a Professor in the Department of
2016. Electrical and Computer Engineering at
[12] Surin Khomfoi, and Leon M. Tolbert, “Fault diagnostic system for a Northeastern University, Boston, MA. He performs
multilevel inverter using a neural network”, IEEE Transactions on research in solar energy, fault detection, and high
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[13] Surin Khomfoi, and Leon M. Tolbert, “Fault diagnosis and energy, LED lighting, battery chargers, and
reconfiguration for multilevel inverter drive using AI based techniques”, telecommunication power supplies. Dr. Lehman
IEEE Transactions on Industrial Electronics, Vol. 54, No. 6, pp.2954- previously chaired the IEEE LED lighting standards
2968, Dec.2007. group (PAR1789). He is Editor-in-Chief of the IEEE
[14] Sunil Rao et.al., “An 18 kW solar array research facility for fault Transactions on Power Electronics and was recently
detection experiments”, Proceedings of the 18th Mediterranean Electro highlighted in the inaugural edition of the book The
Technical Conference, Limassol, Cyprus, 2016. 300 Best Professors, Princeton Review, 2012. He is
[15] Seok-Min Kim, June-Seok Lee and Kyo-Beum Lee, “A modified level- the recipient of the 2015 IEEE Power Electronic Society Modeling and
shifted PWM strategy for fault tolerant cascaded multilevel inverters Control Technical Achievement Award. Prior to his career as a professor,
with improved power distribution”, IEEE Transactions on Industrial Professor Lehman served as the head coach of the nationally ranked Georgia
Electronics, Vol.63, No.11, pp.7264-7274, Mar. 2016. Institute of Technology varsity swimming and diving team.
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Transactions on Energy Conversion
APPENDIX 1
Table A1 provides the list of various solar PV faults along with its causes, effects and mitigation methods. Table A2 shows
the various inverter faults with its causes and consequences.
TABLE A1. SOLAR PV FAULTS AND ITS MITIGATION METHODS ( SPECIFIES THE FAULTS CONSIDERED IN THE WORK)
6 Only diode open (uncommon) Discontinuity in the connection between load High voltage spike in the module due to the
and switch or internal rupture of connectors interruption of current in one direction
7 Short circuit fault Continuous gating pulse, internal fault due to Causes immediate damage to the system and DC
overheating and freewheeling diode failure bus will get short circuited
8 Gate drive failure Non operation of control circuit, Inappropriate Unbalanced voltage and current with distorted
reference and carrier signals, non-uniform waveforms and reduced power
modulation regions
9 Total black out Defect in inverter or defect in control devices Complete shut down
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TEC.2017.2786299, IEEE
Transactions on Energy Conversion
APPENDIX II
Table A3 gives the complete analysis of entire system faults and the possibility in achieving the faults to obtain dataset
required for the intelligent controller.
0885-8969 (c) 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TEC.2017.2786299, IEEE
Transactions on Energy Conversion
APPENDIX III
Based on the characteristics it is found that when the SoC is greater than 50%, the battery attains the maximum voltage
leading to overcharging condition. Similarly the voltage reduces while the SoC is less than 50%.
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