MSI Logic

The complexity of a
chip
Scale of integration:
• SSI 1 - 10 gates
• MSI 10 - 100 gates
• LSI 100 - 1000 gates
• VLSI > 1000 gates
 Specialized MSI
components
• Encoders
• Decoders
• Multiplexers / Demultiplexer
• BCD-to-7-Segment Decoder and
Liquid Crystal Displays
 Encoders - Decoders

• Main function of encoder and decoder

• The purpose is to reduce the number of wires required for
interconnection.
 Decoders

Decoder – logic circuit that activates an

output that corresponds to a binary
number on the input (set of inputs).
May not use all of the possible input
codes
– ENABLE inputs
– The 74ALS138 decoder
– BCD to decimal decoders (the 7442)
– BCD to decimal decoder/driver (the 7445)
– Decoder applications
A 2n-to-n-line encoder
symbol
Symbol for an n-to-2n-
line decoder
 Binary Decoders, N-to-
2N decoders
• Accept a N-bit binary input code (number)
• Activate a 1-out-of-2Noutput code corresponding to the
input code (number)
• Some decoders do not use all 2Ninput codes
3-Line to 8-Line
Decoder
3-Line to 8-Line
Decoder
Example
 Example 74138
Decoder W/Enable
74138 Decoder
 Example BCD-to-Decimal
Decoders 74LS42 / 74HC42
 BCD-to-7-SEGMENT

• 7-segment configuration- to form the

decimal characters 0 -9 and sometimes
the hex characters A –F.
• BCD-to-7-segment decoder/driver is
used to take 4-bit BCD input and
provide the outputs that will pass
current through the appropriate
segment to display the decimal digit.
 BCD-to-7-SEGMENT

(a) BCD-to-7-
segment
decoder/driver
driving a
common-anode
7-segment LED
display;

(b) segment
patterns for all
possible input
codes.
 Encoder

• The opposite of this decoding process is

called encoding and is performed by a logic
circuit called an encoder.
• Encoder has a number of input lines, only
one of which is activated at a given time, and
produces an N-bit output code depending on
which input is activated.
• An 8-line-to-3-line encoder accepts 8 input
lines and produces a 3-bit output code
corresponding to the activated input.
 Encoder
Following through the logic, verify that a LOW
at any input will produce the output binary code
corresponding to that input.

Note that A0 is not internally connected (A1…A7=1111111, then

Q2Q1Q0=000
Only one input should be low. Example: If A3 = A5 =0, and all other
are High, then Q2Q1Q0=0112 (=310), NOT ACCEPTABLE
 Summary
Encoders

An encoder accepts an active logic level on one of its inputs and

converts it to a coded output, such as BCD or binary.

1
The decimal to BCD is an A0
encoder with an input for each of 2

the ten decimal digits and four 3

A1
outputs that represent the BCD
4
code for the active digit. The basic 5 A2
6
logic diagram is shown. There is 7
no zero input because the outputs 8
A3
are all LOW when the input is 9
zero.

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights
Reserved
 Summary
Encoders

Show how the decimal-to-BCD encoder converts

the decimal number 3 into a BCD 0011.
The top two OR gates have ones as indicated
with the red lines. Thus the output is 0011.

1 0 1
A0
2 0
1
3 1
A1

4 0
5 0 0
6
0
0 A2
7
8 0 0
A3
0
9

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights
Reserved
 Summary
Encoders

The 74HC147 is an example of an IC encoder. It is has ten active-LOW

inputs and converts the active input to an active-LOW BCD output.
VCC

(16)
This device is offers additional (11)
HPRI/BCD
1
flexibility in that it is a priority (12)
2
(13)
encoder. This means that if (1)
3
1
(9)
4 (7)
more than one input is active, Decimal (2) 5
2
(6)
BCD
4
the one with the highest order input (3)
(4)
6
8
(14)
output

decimal digit will be active. (5)

7
8
(10) 9
(8)
74HC147
The next slide shows an GND
application …
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights
Reserved
 Summary
VCC
Encoders
R7 R8 R9

Keyboard
7 8 9
encoder HPRI/BCD
1
R4 R5 R6 2
3
1
4 2
5 4 BCD complement
6
4 5 6 7
8 of key press
8
9

R1 R2 R3 74HC147

1 2 3

R0
The zero line is not needed by
0 the encoder, but may be used
by other circuits to detect a key
press.
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights
Reserved
 Multiplexers (Data
Selector)
• Multiplexer (MUX)- it selects one of the several
input signal sand passes it on to the output.
• Multiplexing- multiplexer selects 1 out of N input
data sources and transmits the selected data to a
single
• Digital multiplexer or data selector is a logic circuit
that accepts several digital data inputs and selects
one of them at any given time to pass on to the
output.
• The routing of the desired data input to the output
is controlled by SELECT inputs
 Multiplexers (Data
Selector)
Basic Two Input Multiplexer
• The logic level applied to the S input determines
which AND gate is enable so that its data input
passes through the OR gate to output Z.
 Multiplexers (Data
Selector)
Four Input Multiplexer

Four-input multiplexer: (a) using sum of products logic; (b) using tristate buffers.
 Multiplexers
• Main function of multiplexer and demultiplexer
• The purpose is to reduce the number of wires
required for interconnection
• by making the signals to time-share the link.
A multiplexer/demultiplexer
arrangement
for information transmission
Demultiplexer
A 2n-to-1-line multiplexer
symbol
MUX implementation of
a Boolean function

• Any Boolean function of n

variables can be implemented by
a multiplexer with n control inputs
in a straightforward manner.
 Multiplexers (Data
Selector)
Eight Input Multiplexer- 74LS151(74HC151)
This multiplexer has an enable input E’ and provides
both the normal and the inverted outputs.

E’=0, Select input S2S1S0 will select

one data input
E’=1, multiplexer is disable
 Multiplexers (Data
Selector)
Quad Two Input MUX (74ALS157/HC157)
 Multiplexer
Applications
1. Data routing
2. Parallel-to-serial conversion
3. Operation Sequencing
4. Logic Function Generation
Logic Function
Generation
1-Line-to-8-Line Demultiplexer
 Demux (Data
Distributer)
Clock Demultiplexer
• 74ALS138 demultiplexer being used
as a clock demultiplexer
• Under control of the SELECT lines,
the clock signal is routed to the
desired destination.
• If S2S1S0 = 000, the clock signal
applied to I will appear at output O’0.
• If S2S1S0 = 101, the clock signal
applied to I will appear at output O’5.
 Magnitude Comparator
• Magnitude comparator – combinational logic that compares
two input binary quantities and generates outputs to indicate
which one has the greater magnitude.
• Data inputs
– 74HC85 compares two unsigned 4-bit binary numbers.
– A3A2A1A0 which is called word A; the other B3B2B1B0
which is called word B
• Outputs
– Has 3 active-HIGH outputs
– Output OA>B will be HIGH when the magnitude of word A
is greater than the magnitude of word B
– Output OA<B will be HIGH when magnitude of word A is
less than the magnitude of word B.
– Output OA=B will be HIGH when magnitude of word A is
identical with the magnitude of word B.
Magnitude Comparator
• Cascading Inputs
– Expanding the
comparison
operation to more
than 4 bits by
cascading two or
more 4-bit
comparators.
– When 2 comparators
are to be cascaded,
the outputs of the
lower-order
comparator are
connected to the
corresponding inputs
of higher-order
comparator.
 Summary
Comparators

The function of a comparator is to compare the magnitudes of

two binary numbers to determine the relationship between
them. In the simplest form, a comparator can test for equality
using XNOR gates.
How could you test two 4-bit numbers for
equality?
AND the outputs of four XNOR
gates.A1
B1
A2
B2 Output
A3
B3
A4
B4

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights
Reserved
 Code Converters

• Code converter is a logic circuit that changes

data presented in one type of binary code to
another type of binary code.
• BCD-to-7 segment decoder is a code
converter because it changes a BCD input
code to the 7 segment code needed by the
LED.
• BCD-to-binary converter
– 2 digit decimal values ranging from 00 to 99
can be represented in BCD by 2 4-bit code
groups.
BCD-to-binary converter
Code Converters
 Try this....

What’s the output, if 74ALS138

….
E3 = 1, E 2 = E 1 = 0; A1 = A0 = 1, A2 = 0

E3 = E 2 = 1, E 1 = 0; A2 = A0 = 1, A1 = 0

Figure 1
 Try this....
Determine the states of the 74147 decimal-to-BCD priority
encoder outputs when are LOW and
the other are HIGH.
A 2 , A 6 , A 7
Basic Adders
 Half-Adder

Simple Binary Addition

0+0=0 Zero plus zero equals zero
0+1=1 Zero plus one equals one
1+0=1 One plus zero equals one
1 + 1 = 10 One plus one equals zero with a carry
of one
Half-Adder
Full-Adder
 Full-Adder

• Full adder from two half-adder circuits

Parallel Binary Adders
 Parallel Binary Adders

• Two-bit parallel binary adder

 Parallel Binary Adders

• Four-bit parallel binary adder