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1 1

Compal Confidential
2 2

PAV70 DDR3 Schematics Document


Intel Pineview Processor with Tigerpoint + DDRIII

3
2010-06-25 3

REV: 1.0

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Friday, June 25, 2010 Sheet 1 of 39
A B C D E
A B C D E

Clock Generator
Compal Confidential CK505 page 8

Model Name : PAV50


File Name : LA-6421P CRT Conn
page 10
1 ZZZ 1

RGB
Memory BUS(DDRIII) DDRIII-SO-DIMM
PCB
Pineview page 7

DA60000I610
LCD Conn. LVDS FCBGA 559 1.5V DDRIII 667

page 9 22x22mm
Thermal Sensor page 4,5,6
EMC1402
page 5
DMI
X2 mode
GEN1

PCI-Express USB USB Port x2(L)


2
Tigerpoint HDA page 20
2

PCBGA360 SATA BlueTooth


LPC BUS
page 15
TPM 17x17mm
page 27
page 11,12,13,14
MINI Card x1 10/100 Ethernet CMOS CAM
WLAN HDD page 9
3G page 15 page 26
AR8152
page 16
page 25
3G
page 15

Transfermer LPC BUS


USB Port x1(R)
3 3
page 20
Aralia Codec
RJ45
ALC272 page 22
Power ON/OFF DC/DC Interface Card Reader
page 29
ENE6252
page 18
3VALW/5VALW Int.KBD ENE KBC SPI page 25
page 33
page 19
DC IN
page 30
KB926page 17
1.5VP/VCCP
page 34 AMP & INT INT MIC HeadPhone & SD/MMC/MS
BATT IN MIC Jack
page 31 Speaker CONN
0.89VP/1.8VP SPI ROM
page 17
CHARGER 0.75VS Light Sensor Touch Pad
page 32
4
page 35 page27 page19 4

CPU_CORE
page 36
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Friday, June 25, 2010 Sheet 2 of 39
A B C D E
A B C D E

1 1

Voltage Rails External PCI Devices


Power Plane Description S1 S3 S5 DEVICE IDSEL # REQ/GNT # PIRQ
VIN Adapter power supply (19V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A No PCI Device
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF
+VCCP VCCP switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.5V 1.5V power rail for DDR ON ON OFF
+0.89V Graphic core power rail ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*

2
+5VS 5V switched power rail ON OFF OFF 2

+VSB VSB always on power rail ON ON ON*


+RTCVCC RTC power ON ON ON EC SM Bus1 address EC SM Bus2 address
Device Address Device Address
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. Smart Battery 0001 011X b EMC1402 100_1100

SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

Full ON HIGH HIGH HIGH ON ON ON ON

S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW

S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF

S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF

S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF

3
ICH7M SM Bus address 3

BOARD ID Table(Page 17) Device Address

Clock Generator 1101 001Xb


VCC 3.3V (SLG8SP556VTR)

Ra 100K DDR DIMMA 1010 000Xb

ID BRD ID Rb Vab-Min Vab-Typ Vab-Max


0 R01 (EVT) 0 0V 0V 0V
1 R02 (DVT) 8.2K 0.216V 0.250V 0.289V
PAV50
2 R03 (PVT) 18K 0.436V 0.503V 0.538V
3 R10A (MP) 33K 0.712V 0.819V 0.875V
4 R01 (EVT) 56K 1.036V 1.185V 1.264V
5 R02 (DVT) 100K 1.453V 1.650V 1.759V
6 R03 (PVT) 200K 1.935V 2.200V 2.341V
7 R10A (MP) NC 2.500V 3.3V 3.3V

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Monday, May 03, 2010 Sheet 3 of 39
A B C D E
5 4 3 2 1

(7) DDR_A_DQS#[0..7]
PINEVIEW_M
U71
PINEVIEW_M
N475@ (7) DDR_A_D[0..63] N475@
U71A U71B
REV = 1.1
(7) DDR_A_DM[0..7]
REV = 1.1 DDR_A_MA0 AH19 AD3 DDR_A_DQS0
DMI_RX0_R (7) DDR_A_DQS[0..7] DDR_A_MA1 DDR_A_MA_0 DDR_A_DQS_0 DDR_A_DQS#0
F3 DMI_RXP_0 DMI_TXP_0 G2 DMI_TX0 (13) AJ18 DDR_A_MA_1 DDR_A_DQS#_0 AD2
N455@ DMI_RX#0_R F2 G1 DDR_A_MA2 AK18 AD4 DDR_A_DM0
DMI_RXN_0 DMI_TXN_0 DMI_TX#0 (13) (7) DDR_A_MA[0..14] DDR_A_MA_2 DDR_A_DM_0
DMI_RX1_R H4 H3 DMI_TX1 (13) DDR_A_MA3 AK16
DMI_RX#1_R DMI_RXP_1 DMI_TXP_1 DDR_A_MA4 DDR_A_MA_3 DDR_A_D0
G3 DMI_RXN_1 DMI_TXN_1 J2 DMI_TX#1 (13) AJ14 DDR_A_MA_4 DDR_A_DQ_0 AC4
DDR_A_MA5 AH14 AC1 DDR_A_D1

DMI
DDR_A_MA6 DDR_A_MA_5 DDR_A_DQ_1 DDR_A_D2
AK14 DDR_A_MA_6 DDR_A_DQ_2 AF4
DDR_A_MA7 AJ12 AG2 DDR_A_D3
DDR_A_MA8 DDR_A_MA_7 DDR_A_DQ_3 DDR_A_D4
AH13 DDR_A_MA_8 DDR_A_DQ_4 AB2
D DDR_A_MA9 DDR_A_D5 D
AK12 DDR_A_MA_9 DDR_A_DQ_5 AB3
N7 L10 DDR_A_MA10 AK20 AE2 DDR_A_D6
(8) CLK_CPU_EXP# EXP_CLKINN EXP_RCOMPO DDR_A_MA_10 DDR_A_DQ_6
N6 L9 R162 DDR_A_MA11 AH12 AE3 DDR_A_D7
(8) CLK_CPU_EXP EXP_CLKINP EXP_ICOMPI DDR_A_MA_11 DDR_A_DQ_7
L8 R203 49.9_0402_1% DDR_A_MA12 AJ11
EXP_RBIAS 750_0402_1% DDR_A_MA13 DDR_A_MA_12 DDR_A_DQS1
R10 AJ24 AB8
EXP_TCLKINN DDR_A_MA14 DDR_A_MA_13 DDR_A_DQS_1 DDR_A_DQS#1
R9 EXP_TCLKINP RSVD_TP N11 T38 AJ10 DDR_A_MA_14 DDR_A_DQS#_1 AD7
N10 P11 AA9 DDR_A_DM1
RSVD RSVD_TP T39 Must be placed within 500 mils from Pineview-M pins DDR_A_DM_1
N9 RSVD DDR_A_WE# AK22 AB6 DDR_A_D8
(7) DDR_A_WE# DDR_A_WE# DDR_A_DQ_8
U71 DDR_A_CAS# AJ22 AB7 DDR_A_D9
(7) DDR_A_CAS# DDR_A_RAS# DDR_A_CAS# DDR_A_DQ_9 DDR_A_D10
(7) DDR_A_RAS# AK21 DDR_A_RAS# DDR_A_DQ_10 AE5
K2 K3 AG5 DDR_A_D11
RSVD RSVD DDR_A_BS0 DDR_A_DQ_11 DDR_A_D12
J1 RSVD RSVD L2 (7) DDR_A_BS0 AJ20 DDR_A_BS_0 DDR_A_DQ_12 AA5
M4 M2 DDR_A_BS1 AH20 AB5 DDR_A_D13
RSVD RSVD (7) DDR_A_BS1 DDR_A_BS2 DDR_A_BS_1 DDR_A_DQ_13 DDR_A_D14
L3 N2 (7) DDR_A_BS2 AK11 AB9
N550@ RSVD RSVD DDR_A_BS_2 DDR_A_DQ_14 DDR_A_D15
AD6
DDR_A_DQ_15
1 OF 6 DDR_A_DQS2
PINEVIEW-M_FCBGA8559 AD8
DDR_CS#0 DDR_A_DQS_2 DDR_A_DQS#2
(7) DDR_CS#0 AH22 DDR_A_CS#_0 DDR_A_DQS#_2 AD10
DDR_CS#1 AK25 AE8 DDR_A_DM2
(7) DDR_CS#1 DDR_A_CS#_1 DDR_A_DM_2
JP16 AJ21
XDP_PREQ# CONN@ DDR_A_CS#_2 DDR_A_D16
(5) XDP_PREQ# 1 AJ25 AG8
XDP_PRDY# 1 DDR_A_CS#_3 DDR_A_DQ_16 DDR_A_D17
(5) XDP_PRDY# 2 2 DDR_A_DQ_17 AG7
3 DDR_CKE0 AH10 AF10 DDR_A_D18
XDP_BPM#3 3 (7) DDR_CKE0 DDR_CKE1 DDR_A_CKE_0 DDR_A_DQ_18 DDR_A_D19
(5) XDP_BPM#3 4 (7) DDR_CKE1 AH9 AG11
XDP_BPM#2 4 DDR_A_CKE_1 DDR_A_DQ_19 DDR_A_D20
(5) XDP_BPM#2 5 5 AK10 DDR_A_CKE_2 DDR_A_DQ_20 AF7
6 AJ8 AF8 DDR_A_D21
C435 XDP_BPM#1 6 DDR_A_CKE_3 DDR_A_DQ_21 DDR_A_D22
1 2 DMI_RX0_R (5) XDP_BPM#1 7 AD11
(13) DMI_RX0 7 DDR_A_DQ_22
(5) XDP_BPM#0 XDP_BPM#0 8 M_ODT0 AK24 AE10 DDR_A_D23
0.1U_0402_10V7K 8 (7) M_ODT0 DDR_A_ODT_0 DDR_A_DQ_23
9 M_ODT1 AH26
C436 9 (7) M_ODT1 DDR_A_ODT_1 DDR_A_DQS3
1 2 DMI_RX#0_R (5,13) H_PWRGD R354 1 @2 1K_0402_5% 10 AH24 AK5
(13) DMI_RX#0 10 DDR_A_ODT_2 DDR_A_DQS_3 DDR_A_DQS#3
0.1U_0402_10V7K R347 1 @2 1K_0402_5% 11 AK27 AK3
C (13) SLPIOVR# 11 DDR_A_ODT_3 DDR_A_DQS#_3 DDR_A_DM3 C
(8) CPU_ITP 12 12 DDR_A_DM_3 AJ3
C437 DMI_RX1_R 13
(13) DMI_RX1 1 2 (8) CPU_ITP# 13
14 AH1 DDR_A_D24
0.1U_0402_10V7K +VCCP 14 DDR_A_DQ_24
PLTRST# 1 R348 @2 1K_0402_1% 15 M_CLK_DDR0 AG15 AJ2 DDR_A_D25
C438 DMI_RX#1_R (5,13,15,17,25,26,27) PLTRST# 15 (7) M_CLK_DDR0 M_CLK_DDR#0 DDR_A_CK_0 DDR_A_DQ_25 DDR_A_D26
(13) DMI_RX#1 1 2 16 AF15 AK6
16 (7) M_CLK_DDR#0 M_CLK_DDR1 DDR_A_CK_0# DDR_A_DQ_26 DDR_A_D27
0.1U_0402_10V7K 17 (7) M_CLK_DDR1 AD13 AJ7
XDP_TDO 17 M_CLK_DDR#1 DDR_A_CK_1 DDR_A_DQ_27 DDR_A_D28
(5) XDP_TDO 18 18 (7) M_CLK_DDR#1 AC13 DDR_A_CK_1# DDR_A_DQ_28 AF3
(5) XDP_TRST# XDP_TRST# 19 AH2 DDR_A_D29
19 DDR_A_DQ_29
Close to CPU (5) XDP_TDI
XDP_TDI
XDP_TMS
20
21
20
AC15
DDR_A_DQ_30 AL5
AJ6
DDR_A_D30
DDR_A_D31
(5) XDP_TMS 21 DDR_A_CK_3 DDR_A_DQ_31
22 22 AD15 DDR_A_CK_3#
23 AF13 AG22 DDR_A_DQS4
XDP_TCK 23 DDR_A_CK_4 DDR_A_DQS_4 DDR_A_DQS#4
(5) XDP_TCK 24 24 AG13 DDR_A_CK_4# DDR_A_DQS#_4 AG21
25 (7) DRAM_PWROK DRAM_PWROK AD19 DDR_A_DM4
G1 DDR_A_DM_4
2010-1-18 modify 26
G2
AE19 DDR_A_D32
ACES_87151-24051 DDR_A_DQ_32 DDR_A_D33
AD17 AG19
+1.5V RSVD DDR_A_DQ_33 DDR_A_D34
AC17 AF22
RSVD DDR_A_DQ_34 DDR_A_D35
AB15 AD22
RSVD DDR_A_DQ_35 DDR_A_D36
AB17 RSVD DDR_A_DQ_36 AG17
2

AF19 DDR_A_D37
R1412 XDP Reserve +VCCP 2010/01/18 DDR3 add DDR_A_DQ_37
DDR_A_DQ_38
AE21 DDR_A_D38
@ 10K_0402_5% AD21 DDR_A_D39
DDR_A_DQ_39
XDP_TDI R341 1 2 51 +-1% 0402 +1.5V +1.5V AE26 DDR_A_DQS5
1

DRAM_PWROK AB4 DDR_A_DQS_5 DDR_A_DQS#5


AG27
R1413 XDP_TMS R342 1 51 +-1% 0402 DRAMRST#_R AK8 RSVD DDR_A_DQS#_5 DDR_A_DM5
2 RSVD DDR_A_DM_5 AJ27

2
DRAMRST#_R 1 2 DRAMRST#

1
DRAMRST# (7) XDP_TDO DDR_A_D40
R343 1 2 51 +-1% 0402 R370 AE24
R50 DDR_A_DQ_40

0.1U_0402_10V7K
0_0402_5% 0_0402_5% AG25 DDR_A_D41
XDP_PREQ# R344 1 51 +-1% 0402 DDR_A_DQ_41 DDR_A_D42
2 @ T40 AB11 AD25
1K_0402_1% RSVD_TP DDR_A_DQ_42 DDR_A_D43
T41 AB13 AD24

1
B RSVD_TP DDR_A_DQ_43 DDR_A_D44 B

2
DDR_A_DQ_44 AC22
AL28 AG24 DDR_A_D45
R243 DDR_VREF DDR_A_DQ_45 DDR_A_D46
AK28 AD27

1
XDP_TRST# R345 1 51 +-1% 0402 R242 80.6_0402_1% DDR_RPD DDR_A_DQ_46 DDR_A_D47
2 2 AJ26 DDR_RPU DDR_A_DQ_47 AE27
+5VS R142
FAN1 Conn XDP_TCK R346 1 2 51 +-1% 0402
1K_0402_1%
C439 2
80.6_0402_1%
AK29
RSVD DDR_A_DQS_6
AE30 DDR_A_DQS6
AF29 DDR_A_DQS#6
Modify follow KAV60 schematic 06/12 1 C440 DDR_A_DQS#_6 DDR_A_DM6

2
AF30
DDR_A_DM_6
0.01U_0402_16V7K
1 AG31 DDR_A_D48
DDR_A
DDR_A_DQ_48 DDR_A_D49
DDR_A_DQ_49 AG30
AD30 DDR_A_D50
DDR_A_DQ_50 DDR_A_D51
+5VS Modify D38 D39 D40 Pin define 08/13 DDR_A_DQ_51 AD29
AJ30 DDR_A_D52
C312 2.2U_0603_10V6K DDR_A_DQ_52
3

XDP_TMS AJ29 DDR_A_D53


1 2 D19@ XDP_TCK DDR_A_DQ_53 DDR_A_D54
AE29
DDR_A_DQ_54 DDR_A_D55
DAN217_SC59 AD28
DDR_A_DQ_55
3

U12
XDP_PREQ# 2
XDP_TDO D38 AB27 DDR_A_DQS7
1 8 DDR_A_DQS_7 DDR_A_DQS#7
EN GND AA27
1

2 7 DDR_A_DQS#_7
3

VIN GND 1 2 C314 AB26 DDR_A_DM7


+VCC_FAN1 3 6 DDR_A_DM_7
VOUT GND D39
1 2 4 5
PJDLC05C_SOT23-3
(17) EN_FAN1 VSET GND 4.7U_0603_6.3V6K AA24 DDR_A_D56
PJDLC05C_SOT23-3

R47 330_0402_5% DDR_A_DQ_56 DDR_A_D57


APL5607KI-TRG_SO8 DDR_A_DQ_57 AB25
C313 1 2 XDP_TRST# W24 DDR_A_D58
XDP_TDI DDR_A_DQ_58 DDR_A_D59
1 W22
1

4.7U_0603_6.3V6K DDR_A_DQ_59 DDR_A_D60


DDR_A_DQ_60 AB24
3

C1151 AB23 DDR_A_D61


+3VS
0.01U_0402_16V7K C1150 D40 DDR_A_DQ_61 DDR_A_D62
AA23
1

2 1000P_0402_50V7K DDR_A_DQ_62 DDR_A_D63


W27
DDR_A_DQ_63
PJDLC05C_SOT23-3

1 2
1

A R256 A
2 OF 6
10K_0402_5% PINEVIEW-M_FCBGA8559
40mil Add 2009-6-17
JP12
2

+VCC_FAN1 1 1
(17) FAN_SPEED1 2 4
2 G1
3 3 G2 5
1
ACES_85204-03001 Security Classification Compal Secret Data Compal Electronics, Inc.
C311 3G@ CONN@ Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
2
100P_0402_50V8J
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Pineview(1/3)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Monday, June 28, 2010 Sheet 4 of 39
5 4 3 2 1
5 4 3 2 1

Add 470PF on H_SMI# for known issue 07/08

PINEVIEW_M N475@
U71C
C1171
@
T2 D12 REV = 1.1 R249 15_0402_5% 1 2
XDP_RSVD_00
T12 A7 XDP_RSVD_01 CRT_HSYNC M30 GMCH_CRT_HSYNC_R 1 2 GMCH_CRT_HSYNC (10)
T3 D6 XDP_RSVD_02 CRT_VSYNC M29 GMCH_CRT_VSYNC_R 1 2 GMCH_CRT_VSYNC (10) U71D PINEVIEW_M N475@
470P_0402_50V7K
T4 C5 R247 15_0402_5%
XDP_RSVD_03
T13 C7 XDP_RSVD_04
C6 N31 GMCH_CRT_R REV = 1.1
D T5 GMCH_CRT_R (10) H_SMI# D
XDP_RSVD_05 CRT_RED GMCH_CRT_G (9) LVDS_ACLK# U25 E7 H_SMI# (12)
T6 D8 P30 GMCH_CRT_G (10) LA_CLKN SMI# H_A20M#
R1378 XDP_RSVD_06 CRT_GREEN GMCH_CRT_B (9) LVDS_ACLK U26 H7 H_A20M# (12)
T7 B7 P29 GMCH_CRT_B (10) LA_CLKP A20M# H_FERR#
XDP_RSVD_07 CRT_BLUE (9) LVDS_A0# R23 H6 H_FERR# (12)
T14 A9 N30 LA_DATAN_0 FERR# H_INTR
XDP_RSVD_08 CRT_IRTN (9) LVDS_A0 R24 F10 H_INTR (12)

VGA
1 2 D9 LA_DATAP_0 LINT0 H_NMI
XDP_RSVD_09 (9) LVDS_A1# N26 F11 H_NMI (12)
T8 C8 LA_DATAN_1 LINT1 H_IGNNE#
1K_0402_5% T15 XDP_RSVD_10 (9) LVDS_A1 N27 E5 H_IGNNE# (12)
B8 LA_DATAP_1 IGNNE# H_STPCLK#
XDP_RSVD_11 (9) LVDS_A2# R26 F8 H_STPCLK# (12)
T9 C10 L31 GMCH_CRT_DATA (10) LA_DATAN_2 STPCLK#
XDP_RSVD_12 CRT_DDC_DATA

ICH
(9) LVDS_A2 R27 LA_DATAP_2
T16 D10 XDP_RSVD_13 CRT_DDC_CLK L30 GMCH_CRT_CLK (10)
T10 B11 XDP_RSVD_14 H_DPRSTP#
R201 665_0402_1% DPRSTP# G6 H_DPRSTP# (13)
T17 B10 XDP_RSVD_15 DAC_IREF P28 R151 H_DPSLP#
R22 LIBG DPSLP# G10 H_DPSLP# (13)
T11 B12 XDP_RSVD_16 2.37K_0402_1% H_INIT#
CPU_DREFCLK J28 LVBG INIT# G8 H_INIT# (12)
T28 C11 XDP_RSVD_17 REFCLKINP Y30 CPU_DREFCLK (8) XDP_PRDY#
CPU_DREFCLK# N22 LVREFH PRDY# E11 XDP_PRDY# (4)
REFCLKINN Y29 CPU_DREFCLK# (8) XDP_PREQ#
CPU_SSCDREFCLK N23 LVREFL PREQ# F15 XDP_PREQ# (4)
REFSSCLKINP AA30 CPU_SSCDREFCLK (8) GMCH_ENBKL
CPU_SSCDREFCLK# (17) GMCH_ENBKL L27 LBKLT_EN
AA31

LVDS
REFSSCLKINN CPU_SSCDREFCLK# (8) (9,17) INVT_PW M L26
0_0402_5% LBKLT_CTL H_THERMTRIP#
L23 LCTLA_CLK THERMTRIP# E13 H_THERMTRIP# (12)
T37 L11 RSVD R213 @ K25
Add INVT_PWM
(9)
05/11
LVDS_SCL K23
LCTLB_DATA
LDDC_CLK
0_0402_5% (9) LVDS_SDA K24
R200 LDDC_DATA
PM_EXTTS#1 (9) GMCH_ENVDD H26 LVDD_EN
PM_EXTTS#_1/DPRSLPVR K29 PM_DPRSLPVR (13) H_PROCHOT#
PM_EXTTS#0 PROCHOT# C18
PM_EXTTS#_0 J30 PM_EXTTS#0 (7) H_PW RGD
H_PW ROK CPUPWRGOOD W1 H_PW RGD (4,13)
PWROK L5
AA3 PLTRST#
RSTIN# PLTRST# (4,13,15,17,25,26,27)

A13 H_GTLREF
W8 CLK_CPU_HPLCLK# GTLREF
HPL_CLKINN CLK_CPU_HPLCLK# (8) H27
CLK_CPU_HPLCLK
C HPL_CLKINP W9 CLK_CPU_HPLCLK (8) Del R323 05/11 VSS
C
AA7 Modify 08/04
MISC

T18 RSVD_TP
T19 AA6 RSVD_TP
RSVD L6
T20 R5 RSVD_TP
RSVD E17
T21 R6 RSVD_TP (4) XDP_BPM#0 G11 BPM_1_0#
E15 H10 CLK_CPU_BCLK#
T22 AA21 @ (4) XDP_BPM#1 BPM_1_1# BCLKN CLK_CPU_BCLK# (8)
RSVD_TP R305 G13 J10 CLK_CPU_BCLK
T23 W21 H_PW ROK 1 2 (4) XDP_BPM#2 BPM_1_2# BCLKP CLK_CPU_BCLK (8)
RSVD_TP VGATE (8,13,17,36) F13
T24 T21 (4) XDP_BPM#3 BPM_1_3#
RSVD_TP 0_0402_5% K5 CPU_BSEL0
T25 V21 BSEL_0 CPU_BSEL0 (8)
RSVD_TP R306 T48 B18 H5 CPU_BSEL1
1 2 BPM_2_0#/RSVD BSEL_1 CPU_BSEL1 (8)
PCH_POK (13,17) T49 B20 K6 CPU_BSEL2
BPM_2_1#/RSVD BSEL_2 CPU_BSEL2 (8)
0_0402_5%

CPU
T50 C20 BPM_2_2#/RSVD
T51 B21 H30 CPU_VID0
BPM_2_3#/RSVD VID_0 CPU_VID0 (36)
H29 CPU_VID1
VID_1 CPU_VID1 (36)
H28 CPU_VID2
VID_2 CPU_VID2 (36)
G30 CPU_VID3
VID_3 CPU_VID3 (36)
T55 G5 G29 CPU_VID4
RSVD VID_4 CPU_VID4 (36)
XDP_TDI D14 F29 CPU_VID5
(4) XDP_TDI TDI VID_5 CPU_VID5 (36)
XDP_TDO D13 E29 CPU_VID6
(4) XDP_TDO TDO VID_6 CPU_VID6 (36)
XDP_TCK B14
(4) XDP_TCK TCK
XDP_TMS C14 L7
(4) XDP_TMS TMS RSVD
XDP_TRST# C16 D20
(4) XDP_TRST# TRST# RSVD
RSVD H13
RSVD D18
H_THERMDA D30
H_THERMDC THRMDA_1
E30 THRMDC_1 RSVD_TP K9 T26
RSVD_TP D19 T27
K7 H_EXTBGREF
EXTBGREF
B XDP_TCK B
Place closed to chipset T58

T59 XDP_TDI
3 OF 6 R307
GMCH_CRT_R 1 2
PINEVIEW-M_FCBGA8559 150_0402_1% T60 XDP_TDO
GMCH_CRT_G C30
1 R308 2 THRMDA_2/RSVD
150_0402_1% XDP_TMS D31 THRMDC_2/RSVD
T61
GMCH_CRT_B 1 R309 2
150_0402_1% XDP_TRST# 4 OF 6
T62 PINEVIEW-M_FCBGA8559
GMCH_ENBKL R34
100K_0402_5% T63 H_PW RGD
+VCCP
+VCCP
H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil
R244
R144
+VCCP 976_0402_1%
1K_0402_1%
+3VS
+3VS H_EXTBGREF
CPU THERMAL SENSOR H_GTLREF
1

R202

1U_0603_10V6K

1U_0603_10V6K
R143 68_0402_5% 1 1 R156

@ C939

@ C940
1 10K_0402_5% R155
0.1U_0402_16V4Z

3.3K_0402_1%
2K_0402_1%
C80 H_PROCHOT#
2

U2 PM_EXTTS#0 2 2
2
A
1 8 EC_SMB_CK2
Close to Processor Close to Processor placed within 0.5" A
EC_SMB_CK2 (17,27)
VDD SMCLK
pin pin placed within 0.5"
H_THERMDA 2 7 EC_SMB_DA2 of processor pin.
C79 DP SMDATA EC_SMB_DA2 (17,27) of processor pin.
1 2 H_THERMDC 3 6 2 R58 1 +3VS
2200P_0402_50V7K DN ALERT# 10K_0402_5%
4 5
Security Classification Compal Secret Data Compal Electronics, Inc.
THERM# GND
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Pineview(2/3)
EMC1402-1-ACZL-TR MSOP 8P SENSOR Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Address:100_1100 B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, June 03, 2010 Sheet 5 of 39
5 4 3 2 1
5 4 3 2 1

N475@
U71F PINEVIEW_M

N475@
U71E +CPU_CORE A11 REV = 1.1
F24
GFX supply current: 2.64A PINEVIEW_M
+CPU_CORE A16
VSS VSS
F28
1U_0402_6.3V6K 1U_0402_6.3V6K VSS VSS
A23 22UF 6.3V M X5R 0805 2 x 330uF(9mohm/2) A19 F4
VCC VSS VSS
VCC A25 A29 RSVD_NCTF VSS G15
+0.89V REV = 1.1
A27 A3 G17
VCC 1 1 1 1 1 1 1 1 1 RSVD_NCTF VSS
B23 C428 C429 C430 C431 C1154 C1152 C1153 A30 G22
D VCC + + C278 RSVD_NCTF VSS D
T13 VCCGFX VCC B24 A4 RSVD_NCTF VSS G27
T14 B25 22UF 6.3V M X5R 0805 C275 AA13 G31
VCCGFX VCC 2 2 2 2 2 2 2 330U 2.5V Y 330U 2.5V Y VSS VSS
T16 VCCGFX VCC B26 AA14 VSS VSS H11
T18 B27 2 2 AA16 H15
VCCGFX VCC 1U_0402_6.3V6K 22UF 6.3V M X5R 0805 VSS VSS
T19 C24 1U_0402_6.3V6K AA18 H2
VCCGFX VCC VSS VSS
V13 VCCGFX VCC C26 AA2 VSS VSS H21
V19 D23 AA22 H25
VCCGFX VCC VSS VSS
W14 VCCGFX VCC D24 PLACE IN CAVITY AA25 VSS VSS H8
W16 VCCGFX VCC D26 AA26 VSS VSS J11
W18 D28 AA29 J13
VCCGFX VCC VSS VSS

GFX/MCH
W19 VCCGFX VCC E22 AA8 VSS VSS J15
E24 AB19 J4
VCC VSS VSS
E27 AB21 K11

CPU
VCC VSS VSS
F21 AB28 K13
VCC VSS VSS
F22 AB29 K19
VCC VSS VSS
F25 +VCCP AB30 K26
VCC VSS VSS
DDR supply current 2.27A VCC G19 AC10 VSS VSS K27
G21 AC11 K28
VCC VSS VSS
VCC G24 AC19 VSS VSS K30
H17 C1161 C86 AC2 K4

GND
VCC VSS VSS
H19 1 1 1 AC21 K8
VCC C1160 1U_0402_6.3V6K VSS VSS
H22 AC28 L1
+1.5V VCC VSS VSS
VCC H24 AC30 VSS VSS L13
J17 0.1U_0402_10V6K 0.1U_0402_10V6K AD26 L18
C268 C82 C83 C84 C85 VCC 2 2 2 VSS VSS
AK13 J19 AD5 L22
VCCSM VCC VSS VSS
22UF 6.3V M X5R 0805

1 1 1 1 1 AK19 VCCSM VCC J21 AE1 VSS VSS L24


1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

AK9 J22 Close U71.D4 AE11 L25


VCCSM VCC VSS VSS
AL11 K15 R20 AE13 L29
VCCSM VCC +RING_EAST VSS VSS
AL16 VCCSM VCC K17 1 2 AE15 VSS VSS M28
2 2 2 2 2 AL21 K21 AE17 M3
VCCSM VCC 0_0603_5% 1 VSS VSS
AL25 L14 AE22 N1
+1.5V VCCSM VCC C242 VSS VSS
L16 +CPU_CORE AE31 N13
C VCC 1U_0603_10V6K VSS VSS C
VCC L19 AF11 VSS VSS N18
L21 2 AF17 N24
VCC VCCSENSE R32 VSS VSS
N14 1 2 AF21 N25
VCC VSS VSS
VCC N16 100_0402_1% R21 AF24 VSS VSS N28
AK7 VCCCK_DDR VCC N19 AF28 VSS VSS N4
1 1 AL7 N21 R31 1 2 +RING_WEST AG10 N5
+VCCP VCCCK_DDR VCC VSSSENSE 1 2 VSS VSS
C267 1 1 AG3 N8
DDR analog supply current: 1.32A 100_0402_1% 0_0603_5% VSS VSS
AH18 P13
VSS VSS
C238

C64 C241
22UF 6.3V M X5R 0805

U10 VCCA_DDR AH23 VSS VSS P14


2 2
1U_0402_6.3V6K

DDR

U5 1U_0603_10V6K 1U_0603_10V6K AH28 P16


@ VCCA_DDR 2 2 VSS VSS
1 1 1 U6 VCCA_DDR AH4 VSS VSS P18
U7 AH6 P19
C55 C243 C236 VCCA_DDR VSS VSS
POWER

U8 VCCA_DDR AH8 VSS VSS P21


U9 R28 AJ1 P3
2 2 2 VCCA_DDR RSVD_NCTF VSS
1U_0603_10V6K

+VCC_DMI
4.7U_0603_6.3V6K
22UF 6.3V M X5R 0805

V2 1 2 AJ16 P4
VCCA_DDR 0_0805_5% VSS VSS
V3 1 1 AJ31 R25
VCCA_DDR 1U_0603_10V6K RSVD_NCTF VSS
V4 AK1 R7
VCCA_DDR C68 C237 RSVD_NCTF VSS
W10 AK2 R8
VCCA_DDR 1U_0603_10V6K RSVD_NCTF VSS
W11 AK23 T11
VCCA_DDR VCCSENSE 2 2 VSS VSS
VCCSENSE C29 VCCSENSE (36) AK30 RSVD_NCTF VSS U22
AA10 B29 VSSSENSE AK31 U23
VCCACK_DDR VSSSENSE VSSSENSE (36) RSVD_NCTF VSS
AA11 Y2 +1.5VS AL13 U24
VCCACK_DDR VCCA VSS VSS
+VCCPProcessor 1
Core analog supply current: 0.08A AL19 U27
VSS VSS
AL2 V14
RSVD_NCTF VSS
C391 AL23 V16
VSS VSS
D4 AL29 V18
VCCP 2 0.01U_0402_16V7K RSVD_NCTF VSS
AL3 RSVD_NCTF VSS V28
B4 AL30 V29
VCCP RSVD_NCTF VSS
B3 AL9 W13
VCCP VSS VSS
Legacy I/O supply current: 0.42A B13 W2
VSS VSS
AA19 B16 W23
VCCD_AB_DPL VSS VSS
B19 W25
B VSS VSS B
B22 VSS VSS W26
B30 RSVD_NCTF VSS W28
+1.8VS V11 B31 W30
VCCD_HMPLL RSVD_NCTF VSS
B5 VSS VSS W4
R321 B9 W5
C192 C189 VSS VSS
2 1 AC31 C1 W6
0_0603_5% VCCSFR_AB_DPL +VCC_ALVD RSVD_NCTF VSS
1 1 V30 C12 W7
VCCALVDS +1.8VS VSS VSS
1U_0603_10V6K

1U_0603_10V6K

W31 +VCC_DLVD C21 Y28


VCCDLVDS VSS VSS
CRT DAC & LVDS supply current: 0.15A C22 Y3
VSS VSS
C25 Y4
LVDS

2 2 +VCC_CRT_DAC T30 R25 VSS VSS


VCCACRTDAC C31 RSVD_NCTF
EXP\CRT\PLL

1 2 +VCC_CRT_DAC D22
+3VS MBK1608601YZF_2P 1 VSS
E1 RSVD_NCTF
E10
DAC & GIO & LGI supply current: 0.19A +VCC_DMI C239 VSS
T31 VCC_GIO VCCA_DMI T1 E19 VSS
+RING_EAST J31 T2 DMI analog & PLL supply current: 0.54A 10U_0805_10V4Z E21
+RING_WEST VCCRING_EAST VCCA_DMI 2 VSS
C3 T3 E25 T29
DMI

VCCRING_WEST VCCA_DMI VSS VSS


B2 +DMI_HMPLL E8
VCCRING_WEST 1 R18 2 VSS
C2 P2 T56 F17
VCCRING_WEST RSVD +DMI_HMPLL 0_0603_5% 1 VSS
+VCCP A21 AA1 F19
VCC_LGI VCCSFR_DMIHMPLL VSS
Display PLL & DMIHMPLL supply current: 0.18A C69
VCCP E2 +VCCP 1U_0603_10V6K 6 OF 6
LGI &DPLL supply current: 0.06A 1 2 PINEVIEW-M_FCBGA8559
C1162 R26
1 2 +VCC_ALVD
5 OF 6 0.1U_0402_10V6K 100NH +-5% LL1608-FSLR10J 1 1
2
PINEVIEW-M_FCBGA8559
+0.89V C56 C1155
1U_0603_10V6K
2 H1.25 2
22UF 6.3V M X5R 0805
C74
C81 C71 C70 C76 C75 C78 C77 C400 C1217 Follow Intel check list change to 22uF 06/06
A R27 +VCC_DLVD A
2 1 1 1 1 1 1 1 1 1 1 2
10U_0603_6.3V6M
2.2U_0603_10V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

0_0603_5% 1
del C1218 2010/04/14
C235
0.1U_0402_10V6K

1 2 2 2 2 2 2 2 2 2 1U_0603_10V6K
2

Add C1217 2010/03/25


Modify to 2.2U 05/11 Security Classification Compal Secret Data Compal Electronics, Inc.
Close Chipset pin Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Pineview(3/3)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 6 of 39
5 4 3 2 1
5 4 3 2 1

+1.5V +1.5V
(4) DDR_A_DQS#[0..7]

(4) DDR_A_D[0..63]
JDIM1
+DDR_VREF_DQ (4) DDR_A_DM[0..7]
1 VREF_DQ VSS1 2
3 4 DDR_A_D4
(4) DDR_A_DQS[0..7]
2010/01/18 DDR3 modify DDR_A_D0 VSS2 DQ4 DDR_A_D5
5 DQ0 DQ5 6
DDR_A_D1 7 8 (4) DDR_A_MA[0..14]
C111 1 DQ1 VSS3 DDR_A_DQS#0
1 9 VSS4 DQS#0 10
C112 DDR_A_DM0 11 12 DDR_A_DQS0
+5VALW +1.5V DM0 DQS0
13 VSS5 VSS6 14

0.1U_0402_16V4Z
DDR_A_D2 15 16 DDR_A_D6
2 2 DQ2 DQ6

2.2U_0402_6.3VM
DDR_A_D3 17 18 DDR_A_D7
D DQ3 DQ7 D
19 VSS7 VSS8 20

1
DDR_A_D8 21 22 DDR_A_D12
R1415 DDR_A_D9 DQ8 DQ12 DDR_A_D13
23 DQ9 DQ13 24
10K_0402_5% 25 26
DDR_A_DQS#1 VSS9 VSS10 DDR_A_DM1
27 28
DDR_A_DQS1 DQS#1 DM1 DRAMRST#
29 30 DRAMRST# (4)

2
DRAM_PWROK DRAM_PWROK (4) DQS1 RESET#
31 32
DDR_A_D10 VSS11 VSS12 DDR_A_D14
33 DQ10 DQ14 34

2
2 1 DDR_A_D11 35 36 DDR_A_D15
C1192 C1191 DQ11 DQ15
37 38
R1416 R1417 DDR_A_D16 VSS13 VSS14 DDR_A_D20
39 DQ16 DQ20 40

2
1U_0402_6.3V4Z
DDR_A_D17 41 42 DDR_A_D21
0.1U_0402_10V7K 1 1K_0402_1% 0_0402_5% 2 DQ17 DQ21
43 44

1
@ R1418 DDR_A_DQS#2 VSS15 VSS16 DDR_A_DM2
45 46
0_0402_5% DDR_A_DQS2 DQS#2 DM2
47 48
DQS2 VSS17 DDR_A_D22
49 50

1
DDR_A_D18 VSS18 DQ22 DDR_A_D23
R1421 51 DQ18 DQ23 52

1
C C DDR_A_D19 53 54
@ Q38 Q39 DQ19 VSS19 DDR_A_D28
(13,17) PM_SLP_S4# 1 2 2 2 55 VSS20 DQ28 56
B B +1.5V_PG DDR_A_D24 57 58 DDR_A_D29
E E +1.5V_PG (34) DDR_A_D25 DQ24 DQ29
3 59 60

3
1K_0402_1% DQ25 VSS21 DDR_A_DQS#3
61 62
MMBT3904_SOT23 MMBT3904_SOT23 DDR_A_DM3 VSS22 DQS#3 DDR_A_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
DDR_A_D26 67 68 DDR_A_D30
R1422 DDR_A_D27 DQ26 DQ30 DDR_A_D31
69 DQ27 DQ31 70
(17,29,34) SYSON 1 2 71 72
VSS25 VSS26
1K_0402_1%

(4) DDR_CKE0 DDR_CKE0 73 74 DDR_CKE1


CKE0 CKE1 DDR_CKE1 (4)
75 76
C VDD1 VDD2 C
77 NC1 A15 78
(4) DDR_A_BS2 DDR_A_BS2 79 80 DDR_A_MA14
BA2 A14
81 82
DDR_A_MA12 VDD3 VDD4 DDR_A_MA11
83 A12/BC# A11 84
DDR_A_MA9 85 86 DDR_A_MA7
A9 A7
87 88
DDR_A_MA8 VDD5 VDD6 DDR_A_MA6
89 A8 A6 90
DDR_A_MA5 91 92 DDR_A_MA4
A5 A4
93 VDD7 VDD8 94
DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0
97 A1 A0 98
Layout Note: M_CLK_DDR0
99
VDD9 VDD10
100
M_CLK_DDR1
(4) M_CLK_DDR0 101 102 M_CLK_DDR1 (4)
Place near JDIMM1 (4) M_CLK_DDR#0 M_CLK_DDR#0 103
CK0 CK1
104 M_CLK_DDR#1
M_CLK_DDR#1 (4)
CK0# CK1#
105 106
DDR_A_MA10 VDD11 VDD12 DDR_A_BS1
107 108 DDR_A_BS1 (4)
DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
(4) DDR_A_BS0 109 110 DDR_A_RAS# (4)
BA0 RAS#
111 112
+1.5V DDR_A_WE# VDD13 VDD14 DDR_CS#0
(4) DDR_A_WE# 113 114 DDR_CS#0 (4)
DDR_A_CAS# WE# S0# M_ODT0
(4) DDR_A_CAS# 115 CAS# ODT0 116 M_ODT0 (4)
117 118
DDR_A_MA13 VDD15 VDD16 M_ODT1
119 120 M_ODT1 (4)
A13 ODT1
2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z DDR_CS#1
1 (4) DDR_CS#1 121 122
S1# NC2
330U 2.5V Y

1 1 1 1 1 1 1 1 1 1 1 1 123 124
VDD17 VDD18
C106

C105

C108

C107

C1196

C1197
+ 125 126 +DDR_VREF_CA
NCTEST VREF_CA
C1194

C128

C129

C110

C109

C130

C1195

127 128
DDR_A_D32 VSS27 VSS28 DDR_A_D36
129 DQ32 DQ36 130
2 2 2 2 2 2 2 2 2 2 2 2 2 DDR_A_D33 131 132 DDR_A_D37
DQ33 DQ37
133 134
DDR_A_DQS#4 VSS29 VSS30 DDR_A_DM4
135 136
DDR_A_DQS4 DQS#4 DM4 C1199 1
137
DQS4 VSS31
138 1 C1198
139 140 DDR_A_D38
VSS32 DQ38

0.1U_0402_16V4Z

2.2U_0402_6.3VM
B DDR_A_D34 DDR_A_D39 B
141 DQ34 DQ39 142
DDR_A_D35 143 144
DQ35 VSS33 DDR_A_D44 2 2
145 146
DDR_A_D40 VSS34 DQ44 DDR_A_D45
147 DQ40 DQ45 148
DDR_A_D41 149 150
DQ41 VSS35 DDR_A_DQS#5
151 152
DDR_A_DM5 VSS36 DQS#5 DDR_A_DQS5
153 154
DM5 DQS5
155 156
DDR_A_D42 VSS37 VSS38 DDR_A_D46
157 158
+1.5V DDR_A_D43 DQ42 DQ46 DDR_A_D47
Layout Note: 159 DQ43 DQ47 160
R1424 161 162
Place near JDIMM1.203 & JDIMM1.204 DDR_A_D48 163
VSS39 VSS40
164 DDR_A_D52
+DDR_VREF_DQ DDR_A_D49 DQ48 DQ52 DDR_A_D53
1 2 165 DQ49 DQ53 166
1K_0402_1% 167 168
DDR_A_DQS#6 VSS41 VSS42 DDR_A_DM6
1 169 DQS#6 DM6 170
2

+0.75VS DDR_A_DQS6 171 172


R1425 C115 DQS6 VSS43 DDR_A_D54
173 174
DDR_A_D50 VSS44 DQ54 DDR_A_D55
2 Layout Note: 175
DQ50 DQ55
176
0.1U_0402_16V4Z

DDR_A_D51 177 178


Place near JDIMM1.1 DQ51 VSS45
1K_0402_1%

179 180 DDR_A_D60


1

VSS46 DQ60
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_A_D56 181 182 DDR_A_D61


DDR_A_D57 DQ56 DQ61
1 1 1 1 183 DQ57 VSS47 184
C1201

C1202

C1203

C1204

185 186 DDR_A_DQS#7


DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7
187 DM7 DQS7 188
2 2 2 2 Change C116,C141 to DDR_A_D58
189
191
VSS49 VSS50
190
192 DDR_A_D62
DQ58 DQ62
SE076104K80 2010/04/06 DDR_A_D59 193 DQ59 DQ63 194 DDR_A_D63
195 196
+1.5V R65 VSS51 VSS52 PM_EXTTS#0
1 2 10K_0402_5% 197 198 PM_EXTTS#0 (5)
SA0 EVENT# CLK_SMBDATA
R1426 +3VS 199 200 CLK_SMBDATA (8,15,27)
VDDSPD SDA CLK_SMBCLK
201 202 CLK_SMBCLK (8,15,27)
SA1 SCL
C141

1 2 +DDR_VREF_CA 1 1 203 204


VTT1 VTT2 +0.75VS
1
10K_0402_5%

A
C116

A
.1U_0402_16V7K

.1U_0402_16V7K

1K_0402_1%
1 205 G1 G2 206
2

R66

R1427 C117 Layout Note:


2 2 FOX_AS0A626-U4RN-7F DIMM_A(REV)
4H
2

2 Place near JDIMM1.126


0.1U_0402_16V4Z
1K_0402_1%
1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR3-SODIMMA
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 7 of 39
5 4 3 2 1
5 4 3 2 1
Change C174 C175 to 10U_0603 05/14
+3VM_CK505
FSC FSB FSA CPU SRC PCI REF DOT_96 USB R137
+3VS

CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz +3VS 1
0_0603_5%
2
1 1 1 1 1
C1145 C174 C172 C138 C148 R72 R91
0 0 0 266 100 33.3 14.318 96.0 48.0
47P_0402_50V8J 10U_0603_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2.2K_0402_5% 2.2K_0402_5%
2 2 2 2 0.1U_0402_16V4Z 2 2N7002DW-T/R7_SOT363-6
0 0 1 133 100 33.3 14.318 96.0 48.0 Q10A
+1.05VM_CK505 CLK_SMBDATA
(13) ICH_SMBDATA 6 1
0 1 0 200 100 33.3 14.318 96.0 48.0 R138
+VCCP 1 2
0_0603_5% 1 1 1 1 1 1

2
0 1 1 166 100 33.3 14.318 96.0 48.0 C1146 1 C139 C167 C137 C146 C165 +3VS
D C175 D

5
47P_0402_50V8J 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 10U_0603_6.3V6M 2 2 2 2 2
1 0 0 333 100 33.3 14.318 96.0 48.0 2
(13) ICH_SMBCLK 3 4 CLK_SMBCLK

1 0 1 100 100 33.3 14.318 96.0 48.0 Q10B


Add C1145 C1146 C1147 for EMI 06/12 2N7002DW-T/R7_SOT363-6
1 1 0 400 100 33.3 14.318 96.0 48.0
IDT: SA00003H610 Change Q10 to SB00000DH00 2010/04/06
1 1 1 Reserved

Change co-lay net name to +1.5VM_CK505 07/03 Realtek: SA00003H730


+3VS
+3VS 1 @ 2
R1348 0_0603_5%
+3VM_CK505 U4
2

9 CLK_SMBDATA
R435 +1.5VM_CK505 SDA CLK_SMBDATA (7,15,27)
+1.5VS 1
R1349
2
0_0603_5%
55
VDD_SRC
SCL
10 CLK_SMBCLK
CLK_SMBCLK (7,15,27)
SRC PORT LIST
10K_0402_5% 0.1U_0402_16V4Z 6
VDD_REF
1 1 1 1 1
1

CLK_EN 47P_0402_50V8J C1119 C140 C160 C169 12 71 CLK_CPU_BCLK


VDD_PCI CPU_0 CLK_CPU_BCLK (5)
C1147
PORT DEVICE
1

10U_0603_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z 72 70 CLK_CPU_BCLK#


2 2 2 2 2 VDD_CPU CPU_0# CLK_CPU_BCLK# (5)
Q31
19
VDD_48 CPU_1
68 CLK_CPU_HPLCLK
CLK_CPU_HPLCLK (5) SRC1 CPU_SSCDREFCLK
CLK_CPU_HPLCLK#
(36) CLK_ENABLE# 2 27 VDD_PLL3 CPU_1# 67 CLK_CPU_HPLCLK# (5) SRC2
DTC115EUA_SC70-3 R1350 0_0402_5% +1.05VM_CK505 66 24 CLK_CPU_DREFCLK
CPU_DREFCLK (5)
SRC3
C VDD_CPU_IO SRC_0/DOT_96 C
Rename 06/06 +VCCP 1 @ 2
SRC4 PCIE_WLAN
3

31 25 CLK_CPU_DREFCLK#
VDD_PLL3_IO SRC_0#/DOT_96# CPU_DREFCLK# (5)
R1351
1 2
0_0402_5%
62
SRC6 PCIE_SATA
+1.5VS VDD_SRC_IO CPU_SSCDREFCLK
+VCCP
Change C1350 C1351 to 0402 type 06/24
1
C173 52
LCDCLK/27M
28 CPU_SSCDREFCLK (5) SRC7 PCIE_PCH
VDD_SRC_IO CPU_SSCDREFCLK#
0.1U_0402_16V4Z 23
LCDCLK#/27M_SS
29 CPU_SSCDREFCLK# (5) SRC8 CPU_ITP
VDD_IO
1

2
R68 @ 38 32
SRC9 CLK_CPU_EXP
VDD_SRC_IO SRC_2
R76 470_0402_5% del C1219 R1442 04/14 1 2 33
SRC10 PCIE_LAN
2.2K_0402_5% C1221 10P_0402_50V8J SRC_2#
SRC11 PCIE_WWAN
2

FSA 2 1 1 2 FSA 20
(13) CLK_PCH_48M R75 33_0402_5% USB_0/FS_A
35
FSB SRC_3
(5) CPU_BSEL0 1 2 2
R69 FS_B/TEST_MODE
36
SRC_3#
0_0402_5% 1 R104 2 FSC 7
REF_0/FS_C/TEST_
1

(13) CLK_PCH_14M 33_0402_5%


R73 1 2 8 39 CLK_PCIE_WLAN
REF_1 SRC_4 CLK_PCIE_WLAN (26)
C390 10P_0402_50V8J CLK_EN
1K_0402_5% 40 CLK_PCIE_WLAN#
SRC_4# CLK_PCIE_WLAN# (26)
@ 1 2 1
2

(5,13,17,36) VGATE R371 CKPWRGD/PD#


0_0402_5% 11 57 CLK_PCIE_SATA
NC SRC_6 CLK_PCIE_SATA (12)
@
56 CLK_PCIE_SATA#
+VCCP SRC_6# CLK_PCIE_SATA# (12)
53
R86 (13) H_STP_CPU# CPU_STOP# CLK_PCIE_PCH
SRC_7
61 CLK_PCIE_PCH (13) Modify CLK SRC Port list 05/12
1

@ 54
Add 1K follow R113 (13) H_STP_PCI# PCI_STOP# CLK_PCIE_PCH#
60 CLK_PCIE_PCH# (13)
Intel check list 05/11 SRC_7#
470_0402_5% CLK_XTAL_IN 5 XTAL_IN
B R52 1K_0402_1% 64 CPU_ITP (4) B
2

TPM@ CLK_XTAL_OUT SRC_8/CPU_ITP


FSB 1 2 4
XTAL_OUT
63 CPU_ITP# (4)
SRC_8#/CPU_ITP# +3VS
(5) CPU_BSEL1 1 2
R119
0_0402_5% 13 44 CLK_CPU_EXP
PCI_1 SRC_9 CLK_CPU_EXP (4)
1

Add R1443 for TPM 2010/03/25 Add R107 05/04


R110 PCI2_TME 14 45 CLK_CPU_EXP#
PCI_2 SRC_9# CLK_CPU_EXP# (4)
@ WLAN_CLKREQ# R121 2 1 10K_0402_5%
0_0402_5% TPM@ 1 R1443 2 15
(27) CLK_PCI_TPM PCI_3 CLK_PCIE_LAN
22_0402_5% 50 LAN_CLKREQ# R1430 2 1 4.7K_0402_5%
CLK_PCIE_LAN (25)
2

PCI4_SEL SRC_10
(17) CLK_PCI_LPC 1 2 16
R86 33_0402_5% PCI_4/SEL_LCDCL CLK_PCIE_LAN# R107 2
51 CLK_PCIE_LAN# (25)
WWAN_CLKREQ# 1 10K_0402_5%
ITP_EN SRC_10#
(11) CLK_PCI_PCH 1 2 17
+VCCP PCIF_5/ITP_EN
10P_0402_50V8J

R80 33_0402_5%
15P 50V J NPO 0402

CLK_PCIE_WWAN
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP# C389
1 1
C388 SRC_11
48 CLK_PCIE_WWAN (15)
REQ PORT LIST
1

18 47 CLK_PCIE_WWAN#
VSS_PCI SRC_11# CLK_PCIE_WWAN# (15)
R92 @ For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# 2 2
R98 470_0402_5% Pin28/29 : LCDCLK / LCDCLK# 3
VSS_REF PORT DEVICE
10K_0402_5% 1 = Pin24/25 : SRC_0 / SRC_0# 22 37
2

VSS_48 CLKREQ_3#
FSC 2 1
Pin28/29 : 27M/27M_SS 26 41 WLAN_CLKREQ#
Add WWAN_CLKREQ# 05/04
REQ_3#
VSS_IO CLKREQ_4# WLAN_CLKREQ# (26)
(5) CPU_BSEL2 1
R84
2
For PCI2_TME:0=Overclocking of CPU and SRC allowed 69 58
REQ_4# PCIE_WLAN
0_0402_5% VSS_CPU CLKREQ_6#
(ICS only) 1=Overclocking of CPU and SRC NOT allowed REQ_6#
1

30 65
R87 VSS_PLL3 CLKREQ_7#
@ 34 43
REQ_7#
0_0402_5% VSS_SRC CLKREQ_9#
+3VS +3VS +3VS 59 49 LAN_CLKREQ#
LAN_CLKREQ# (25)
REQ_9#
2

VSS_SRC SLKREQ_10#
42 46 WWAN_CLKREQ#
WWAN_CLKREQ# (15)
REQ_10# PCIE_WWAN
VSS_SRC CLKREQ_11#
2

A
Follow Intel check list change to 27P 06/05 R85 R95 R71 73 21
REQ_11# A
VSS USB_1/CLKREQ_A#
Follow Vendor check change to 22P 10/16 REQ_A#
Follow Vendor check change to 33P 05/24 10K_0402_5% 10K_0402_5% 10K_0402_5%
@ @ SLG8SP556VTR_QFN72_10X10
1

CLK_XTAL_IN ITP_EN PCI4_SEL PCI2_TME


C161 33P 50V J NPO 0402
1

Y1
2

@
14.31818MHZ L5020-14.31818-20 R89 R90 R77 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/10/15 Deciphered Date 2008/10/15 Title
2

CLK_XTAL_OUT 10K_0402_5% 10K_0402_5% 10K_0402_5%


C164 33P 50V J NPO 0402 Clock Generator CK505
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Routing the trace at least 10mil 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, June 03, 2010 Sheet 8 of 39
5 4 3 2 1
5 4 3 2 1

LCD POWER CIRCUIT


Change R577 to 0402 SIZE 06/16 J1

+3VS 1 2 +CAM_VCC
+LCDVDD +3VS 1 2

NTR4101PT1G 1P SOT-23-3
+LCDVDD
Q3
JUMP_43X39
W=20mils W=20mils

1
1 3 @

S
R577 +3VS
D D

@
470_0402_5% 1

G
2
C1105 1 C1106 1 1

2
0.1U_0402_16V4Z C1107 C1113

2
4.7U_0603_6.3V6K 0.1U_0402_16V4Z

1 +LCDVDD_R
2

4.7U_0603_6.3V6K
R578 1 2 2 2
C1108
100K_0402_5%
0.047U_0402_16V4Z

1
Q4 2
D
2 2 1
2N7002W-T/R7_SOT323-3 G PJUSB208_SOT23-6
S3 R579 4.7K_0402_5%
Change C1106 to 4.7U_0603 05/14 USB20_N3_1 6 3
CH3 CH2

+CAM_VCC 5 Vp Vn 2

4 1 USB20_P3_1
CH4 CH1
1

Q5 D6
DTC115EUA_SC70-3
@
(5) GMCH_ENVDD 2
Add D6 05/14
2

R174
3

C 100K_0402_5% C
1

2 1
Modify 05/11 0_0402_5% R1182

@ L3
USB20_N3_1 2 1 USB20_N3
2 1 USB20_N3 (13)

USB20_P3_1 3 4 USB20_P3
3 4 USB20_P3 (13)

1 1 WCM2012F2S-900T04_0805

C1167 C1168

10P_0402_50V8J

10P_0402_50V8J
2 1
CMOS & LCD/PANEL BD. Conn. 2 2

@
0_0402_5% R1183
+3VS

Modify JLVDS1 08/04


2.2K_0402_5%

2.2K_0402_5%
Add R1444 R1445 2010/03/25
2

2
R1180

R1181
0_0402_5% 2 MIC@ 1 R1444 Add for RF 07/02
JLVDS1
0_0402_5% 2 CMIC@ 1 R1445 +3VS
1

1 1
USB20_P3_1
2 USB20_N3_1
camera LVDS_SCL
B 3 LVDS_SCL (5) B
4 +CAM_VCC
LVDS_SDA
5 DMIC_CLK (22) LVDS_SDA (5)
6 DMIC_DATA (22)
7 LVDS_ACLK
8 LVDS_ACLK# LVDS_ACLK (5)
9 LVDS_ACLK# (5)
10 LVDS_A2
11 LVDS_A2 (5)
LVDS_A2#
12 LVDS_A2# (5)
INVT_PWM
13 LVDS_A1
14 LVDS_A1 (5)
LVDS_A1#
15 LVDS_A1# (5)
BKOFF#
16 LVDS_A0
17 LVDS_A0 (5)
LVDS_A0#
18 LVDS_A0# (5)
19
1

LVDS_SDA
20 LVDS_SCL C1156 C1109
21 BKOFF# 220P_0402_50V7K 1000P 50V K X7R 0402
BKOFF# (17)
2

22 INVT_PWM 3G@ 3G@


23 INVT_PWM (5,17)
24 +LCDVDD_L
+3VS For RF
25 1 2 +LCDVDD
L2
26 FBMA-L11-201209-221LMA30T_0805
27 (20 MIL)
+LEDVDD L1 2 1 B+
3628
3329 FBMA-L11-201209-221LMA30T_0805
3230 2 1
ACES_88341-3000B001 C1111 C1112
330P_0402_50V7K 100P_0402_50V8J
CONN@ 1 2
3G@ 3G@
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS /INVERTER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Friday, June 25, 2010 Sheet 9 of 39
5 4 3 2 1
A B C D E

Close to CRT CONN for ESD.

2
D18
D17
Modify C31- C308 C303 C307 C306 C304 BOM Structure 0615 @ @

PJDLC05C_SOT23-3
1 1

PJDLC05C_SOT23-3
Change L12. L14, L15 to SM01000C600 2010/04/06

1
L15
CHENG-HANN MBK1005470YZF 0402
1 2 RED
(5) GMCH_CRT_R
L14
CHENG-HANN MBK1005470YZF 0402
1 2 GREEN
(5) GMCH_CRT_G
L12
CHENG-HANN MBK1005470YZF 0402
1 2 BLUE
(5) GMCH_CRT_B

150_0402_1%

150_0402_1%

150_0402_1%
1

1
1 1 1
R255 R253 R250 C310 1 1 1

10P_0402_50V8J
C308 C303

10P_0402_50V8J

10P_0402_50V8J
C307 C306 C304
2 2 2 2 10P_0402_50V8J 10P_0402_50V8J 10P_0402_50V8J

2
2 2 2

+5VS JVGA_HS

1 2
C301 0.1U_0402_16V4Z JVGA_VS

1
2 U11 2

OE#
P
2 4 CRT_HSYNC_1
(5) GMCH_CRT_HSYNC A Y

G
SN74AHCT1G125DCKR_SC70-5
3 +3VS
+5VS

2
1 2
C298 0.1U_0402_16V4Z R149

1
U10 10K_0402_5%
High: CRT Plugged

OE#
P
@
2 4 CRT_VSYNC_1
(5) GMCH_CRT_VSYNC

1
A Y CRT_DET
G (13) CRT_DET

1
SN74AHCT1G125DCKR_SC70-5 D
3

CRT_DET# 2 Q11
G 2N7002W-T/R7_SOT323-3
S @

3
CRT PORT
+CRT_VCC

+5VS 12/29
0.1U_0402_16V4Z
3 3
C142
D3 W=40mils F1
+3VS
2 1 1 2 1 2 Change JCRT1 P/N to SP010906182 06/22
RB491D_SC59-3 1.1A_6VDC_FUSE JCRT1 CONN@
6
+CRT_VCC 11
RED 1
1

7
R248 2.2K_0402_5% VGA_DDC_DAT 12
+3VS GREEN 2
2.2K_0402_5% R245 8
1

JVGA_HS 13
2

R246 R251 BLUE 3


9
2.2K_0402_5% 2.2K_0402_5% JVGA_VS 14 16
4 17
2

2
5

10
VGA_DDC_CLK 15
4 3 VGA_DDC_DAT 5
(5) GMCH_CRT_DATA
SUYIN_070546FR015M21RZR
Q24B
2

2N7002DW-T/R7_SOT363-6
1 6 VGA_DDC_CLK
(5) GMCH_CRT_CLK
CRT_DET#
Q24A
2N7002DW-T/R7_SOT363-6

2
Change Q24 to SB00000DH00 2010/04/06 R1103
100K_0402_5%
4 4

1
+CRT_VCC

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT PORT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 10 of 39
A B C D E
5 4 3 2 1

D D

CLK_PCI_PCH
1

R336
@ 33_0402_5%
+3VS U72A TGP

1
2

A5 PAR AD0 B22


C432 8.2K_0402_5% R233 PCI_DEVSEL# B15 D18
@ 22P_0402_50V8J CLK_PCI_PCH DEVSEL# AD1
(8) CLK_PCI_PCH J12 PCICLK AD2 C17
2
A23 PCIRST# AD3 C18
For EMI, close to TigerPoint PCI_IRDY# B7 B17
8.2K_0402_5% R235 IRDY# AD4
C22 PME# AD5 C19
PCI_SERR# B11 B18
8.2K_0402_5% R236 PCI_STOP# SERR# AD6
F14 STOP# AD7 B19
8.2K_0402_5% R229 PCI_PLOCK# A8 D16
8.2K_0402_5% R207 PCI_TRDY# PLOCK# AD8
A10 TRDY# AD9 D15
8.2K_0402_5% R231 PCI_PERR# D10 A13
8.2K_0402_5% R230 PCI_FRAME# PERR# AD10
A16 FRAME# AD11 E14
8.2K_0402_5% R237 H14
C AD12 C
AD13 L14
AD14 J14
A18 GNT1# AD15 E10
E16 GNT2# AD16 C11
AD17 E12

8.2K_0402_5% R232
G16
A20
REQ1# PCI AD18 B9
B13
8.2K_0402_5% R209 REQ2# AD19
AD20 L12
AD21 B8
G14 GPIO48/STRAP1# AD22 A3
A2 GPIO17/STRAP2# AD23 B5
PCI_PIRQE# C15 A6
(27) G_SENSOR_INT GPIO22 AD24
10K_0402_5% R291 C9 G12
10K_0402_5% R292 GPIO1 AD25
AD26 H12
R362 R363 C8
10K_0402_5% 10K_0402_5% AD27
AD28 D9
@ @ PCI_PIRQA# B2 C7
8.2K_0402_5% R238 PCI_PIRQB# PIRQA# AD29
D7 PIRQB# AD30 C1
8.2K_0402_5% R205 PCI_PIRQC# B3 B1
8.2K_0402_5% R206 PCI_PIRQD# PIRQC# AD31
Add for G-sensor interrupt 2010/03/11 H10 PIRQD#
8.2K_0402_5% R208 PCI_PIRQE# E8
8.2K_0402_5% R210 PCI_PIRQF# PIRQE#/GPIO2
D6 PIRQF#/GPIO3
8.2K_0402_5% R211 PCI_PIRQG# H8 H16
8.2K_0402_5% R212 PCI_PIRQH# PIRQG#/GPIO4 C/BE0#
F8 PIRQH#/GPIO5 C/BE1# M15
8.2K_0402_5% R204 C13
C/BE2#
D11 STRAP0# C/BE3# L16
K9 RSVD01
8.2K_0402_5% R364 M13
8.2K_0402_5% R365 RSVD02
B 1 B
R366
10K_0402_5% TIGERPOINT_ES1_BGA360
@

STRAP2# STRAP1# Boot BIOS


GPIO17 GPIO48

0 1 SPI

1 0 PCI

A A
1 1 LPC

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Tigerpoint(1/4)
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, June 03, 2010 Sheet 11 of 39
5 4 3 2 1
5 4 3 2 1

D D

U72C TGP

R12 RSVD03 SATA0RXN AE6 SATA_DTX_C_IRX_N0 (16)


AE20 RSVD04 SATA0RXP AD6 SATA_DTX_C_IRX_P0 (16)
AD17 AC7 SATA_ITX_C_DRX_N0_R 0.01U_0402_16V7K C32
RSVD05 SATA0TXN SATA_ITX_C_DRX_P0_R SATA_ITX_C_DRX_N0 (16)
AC15 AD7 0.01U_0402_16V7K C31
C RSVD06 SATA0TXP SATA_ITX_C_DRX_P0 (16) C
AD18 AE8
RSVD07 SATA1RXN
Y12 AD8
RSVD08 SATA1RXP
AA10 AD9
RSVD09 SATA1TXN
AA12 RSVD10 SATA1TXP AC9 Del SATA1 04/30
Y10
RSVD11
AD15
RSVD12

SATA
W10 RSVD13
V12
RSVD14
AE21 RSVD15
AE18 RSVD16
AD19
RSVD17
U12
RSVD18 Placed within 500 mils of Tiger point chipset pin.
AD4 CLK_PCIE_SATA# (8)
SATA_CLKN
AC17 AC4 CLK_PCIE_SATA (8) +3VS
RSVD19 SATA_CLKP
AB13
RSVD20
AC13 RSVD21 SATARBIAS# AD11 R45
AB15 AC11 SATARBIAS R154 24.9_0402_1%
RSVD22 SATARBIAS SATA_LED# SATA_LED#
Y14 RSVD23 SATALED# AD25 SATA_LED# (16)
10K_0402_5%
AB16
RSVD24 R293
AE24 RSVD25 GATEA20
AE23
RSVD26 10K_0402_5%
R312
AA14 U16 GATEA20 GATEA20 (17) SERIRQ
RSVD27 A20GATE H_A20M#
V14 RSVD28 A20M# Y20 H_A20M# (5) 10K_0402_5%
Y21
CPUSLP# H_IGNNE#
Y18 H_IGNNE# (5)
IGNNE# +VCCP
AD16 AD21
RSVD29 INIT3_3V# H_INIT#
AB11 RSVD30 INIT# AC25 H_INIT# (5)
+3VS AB10 AB24 H_INTR
RSVD31 INTR H_INTR (5) 56 ohm±5% pull-up resistor has
HOST

1
Y22 H_FERR#
B FERR# H_FERR# (5) B
R294 8.2K_0402_5% AD23
GPIO36 NMI
T17 H_NMI
H_NMI (5)
R164 to be within 1" from the Tiger
AC21 KB_RST# KB_RST# (17) Point chipset.
RCIN# SERIRQ 56_0402_5%
SERIRQ AA16 SERIRQ (17,27)
AA21 H_SMI#
H_SMI# (5)

2
SMI# H_STPCLK#
V18 H_STPCLK# (5)
STPCLK#
AA20 H_THERMTRIP# (5)
THRMTRIP#

TIGERPOINT_ES1_BGA360
ESD request
H_A20M# C450 @
1 2 100P_0402_50V8J

H_IGNNE# C451 @
1 2 100P_0402_50V8J

H_INIT# C452 @
1 2 100P_0402_50V8J
+VCCP
H_INTR C453 @
1 2 100P_0402_50V8J

H_FERR# C454 @
1 2 100P_0402_50V8J
R198
56_0402_5% H_NMI C455 @
1 2 100P_0402_50V8J

H_SMI# C456 @
1 2 100P_0402_50V8J
H_FERR#
H_STPCLK# C457 @
1 2 100P_0402_50V8J
Close to TigerPoint
A
pin A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Tigerpoint(2/4)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, June 03, 2010 Sheet 12 of 39
5 4 3 2 1
5 4 3 2 1

USB Port List USB20_N6 1 R324 2 @


USB20_SIM_N (15)
0 USB Left1 0_0402_5%

PCIE Port List USB Left2 USB20_N7 1 R323 2 3G@


1 0_0402_5%
2 USB Right2
1 LAN
3 CMOS USB20_P6 1 R322 2 @
2 WLAN 4 CardReader 0_0402_5%
USB20_SIM_P (15)

3 WWAN 5 WWAN USB20_P7 1 R313 2 3G@


D D
0_0402_5%
6 BT
4 WIMAX
7

11/26 U72B TGP


U72D TGP

R23 H7 USB20_N0
GPIO0 (4) DMI_TX#0 DMI0RXN USBP0N USB20_P0 USB20_N0 (20)
AA5 T15 (4) DMI_TX0 R24 H6
LDRQ1#/GPIO23 BMBUSY#/GPIO0 CRT_DET +3VS DMI0RXP USBP0P USB20_N1 USB20_P0 (20)
(17,27) LPC_AD0 V6 LAD0/FWH0 GPIO6 W16 CRT_DET (10) (4) DMI_RX#0 P21 DMI0TXN USBP1N H3
USB20_N1 (20)

LPC
AA6 W14 GPIO7 P20 H2 USB20_P1
(17,27) LPC_AD1 LAD1/FWH1 GPIO7 EC_SMI# SLPIOVR# (4) (4) DMI_RX0 DMI0TXP USBP1P USB20_N2 USB20_P1 (20)
(17,27) LPC_AD2 Y5 K18 EC_SMI# (17) (4) DMI_TX#1 T21 J2
LAD2/FWH2 GPIO8 DMI1RXN USBP2N USB20_N2 (20)

2
W8 H19 EC_SCI# T20 J3 USB20_P2
(17,27) LPC_AD3 LAD3/FWH3 GPIO9 ACIN_C EC_SCI# (17) (4) DMI_TX1 DMI1RXP USBP2P USB20_N3 USB20_P2 (20)
Y8 M17 R1390 T24 K6
LDRQ0# GPIO10 GPIO12 (4) DMI_RX#1 DMI1TXN USBP3N USB20_P3 USB20_N3 (9)
(17,27) LPC_FRAME# Y4 A24 (4) DMI_RX1 T25 K5
LFRAME#/FWH4 GPIO12 DMI1TXP USBP3P USB20_P3 (9)

DMI
C23 EC_LID_OUT# 10K_0402_5% T19 K1 USB20_N4
R160 GPIO13 GPIO14 EC_LID_OUT# (17) DMI2RXN USBP4N USB20_P4 USB20_N4 (21)
33_0402_5% 1 2 P6 P5 T18 K2
(22,24) HDA_BITCLK_AUDIO

1
R158 HDA_BIT_CLK GPIO14 GPIO15 DMI2RXP USBP4P USB20_N5 USB20_P4 (21)
(22,24) HDA_RST_AUDIO# 33_0402_5% 1 2 U2 E24 U23 L2
HDA_RST# GPIO15 0_0402_5% DMI2TXN USBP5N USB20_N5 (15)

AUDIO
W2 AB20 2 R17 1 U24 L3 USB20_P5
(22) HDA_SDIN0 HDA_SDIN0 DPRSLPVR PM_DPRSLPVR (5) DMI2TXP USBP5P USB20_N6 USB20_P5 (15)
V2 Y16 R1391
2 @ 0_0402_5%
1 V21 M6
HDA_SDIN1 STP_PCI# H_STP_PCI# (8) DMI3RXN USBP6N USB20_P6 USB20_N6 (15)
P8 HDA_SDIN2 STP_CPU# AB19 H_STP_CPU# (8) V20 DMI3RXP USBP6P M5
33_0402_5% R159 2 USB20_N7 USB20_P6 (15)
(22,24) HDA_SDOUT_AUDIO 1 AA1 R3 V24 N1
33_0402_5% R157 2 HDA_SDOUT GPIO24 DMI3TXN USBP7N USB20_P7 USB20_N7 (26)
(22,24) HDA_SYNC_AUDIO 1 Y1 HDA_SYNC GPIO25 C24 1 R367 2 V23 DMI3TXP USBP7P N2 USB20_P7 (26)
AA3 D19 1K_0402_5%
(8) CLK_PCH_14M CLK14 GPIO26
D20
1

GPIO27 USB_OC#0_1
R337 U3 EE_CS GPIO28 F22 OC0# D4
PM_CLKRUN# USB_OC#0_1 USB_OC#0_1 (20)

USB
33_0402_5% AE2 EE_DIN CLKRUN# AC19 (25) PCIE_DTX_C_IRX_N1 K21 PERN1 OC1# C5
@ USB_OC#2
T6
V3
EE_DOUT EPROM GPIO33
U14
AC1 GPIO34 (25) PCIE_DTX_C_IRX_P1 K22
C565 0.1U_0402_10V7K PCIE_ITX_C_DRX_N1_RJ23 PERP1 OC2#
D3
D2 USB_OC#3 USB_OC#2 (20)
C EE_SHCLK GPIO34 GPIO38 (25) PCIE_ITX_C_DRX_N1 C566 0.1U_0402_10V7K PCIE_ITX_C_DRX_P1_RJ24 PETN1 OC3# USB_OC#4 C
2

1 GPIO38 AC23 PETP1 OC4# E5


GPIO39 (25) PCIE_ITX_C_DRX_P1 USB_OC#5
T4 AC24 (26) PCIE_DTX_C_IRX_N2 M18 E6
C433 LAN_CLK GPIO39 PERN2 OC5#/GPIO29 USB_OC#6
@ P7 (26) PCIE_DTX_C_IRX_P2 M19 C2
22P_0402_50V8J LANR_RSTSYNC H_PWRGD C53 0.1U_0402_10V7KPCIE_ITX_C_DRX_N2_RK24 PERP2 OC6#/GPIO30 USB_OC#7
B23 LAN_RST# CPUPWRGD/GPIO49 AB22 H_PWRGD (4,5) (26) PCIE_ITX_C_DRX_N2 PETN2 OC7#/GPIO31 C3
2 AA2 C49 0.1U_0402_10V7K PCIE_ITX_C_DRX_P2_RK25
LAN

MISC
LAN_RXD0 EC_THERM# (26) PCIE_ITX_C_DRX_P2 PETP2
For EMI, Close to TigerPoint AD1 AB17 EC_THERM# (17) (15) PCIE_DTX_C_IRX_N3 L23
LAN_RXD1 THRM# PERN3

PCI-E
AC2 V16 VGATE L24
LAN_RXD2 VRMPWRGD (15) PCIE_DTX_C_IRX_P3 C52 0.1U_0402_10V7K PCIE_ITX_C_DRX_N3_RL22 PERP3
W3 AC18 MCH_SYNC# G2
LAN_TXD0 MCH_SYNC# PBTN_OUT# (15) PCIE_ITX_C_DRX_N3 C54 0.1U_0402_10V7K PCIE_ITX_C_DRX_P3_RM21 PETN3 USBRBIAS USBRBIAS R152
T7 LAN_TXD1 PWRBTN# E21 PBTN_OUT# (17) (15) PCIE_ITX_C_DRX_P3 PETP3 USBRBIAS# G3
U4 H23 ICH_RI# P17 22.6_0402_1%
LAN_TXD2 RI# PERN4
SUS_STAT#/LPCPD# G22 P18 PERP4
RTCX1 W4 D22 N25
RTC

RTCX1 SUSCLK EC_CLK (17) PETN4


RTCX2 V5 G18 SYS_RST# N24
RTCRST# RTCX2 SYS_RESET# PLTRST# PLTRST# PETP4 CLK_PCH_48M
T5 G23 PLTRST# (4,5,15,17,25,26,27) F4 CLK_PCH_48M (8)
RTCRST# PLTRST# CLK48

1
C25 ICH_PCIE_WAKE#
SMBALERT# WAKE# INTRUDER# ICH_PCIE_WAKE# (15,26) R338
E20 T8
SMBALERT#/GPIO11 INTRUDER#

1
(8) ICH_SMBCLK ICH_SMBCLK H18 U10 T_PWROK C1158 33_0402_5%
SMBCLK PWROK
SMB

ICH_SMBDATA E23 AC3 EC_RSMRST#R @


(8) ICH_SMBDATA SMBDATA RSMRST#
LINKALERT# H21 AD3 INTVRMEN 220P_0402_50V7K 1

2
SMLINK0 LINKALERT# INTVRMEN SB_SPKR
F25 SMLINK0 SPKR J16 SB_SPKR (19)
SMLINK1 F24 +1.5VS R434
SMLINK1 @ 22P_0402_50V8J
SLP_S3#
H20 PM_SLP_S3# (17) For ESD R153 24.9_0402_1%
2
Change EC_LID_OUT# From GPIO13 to GPIO11 R2
SPI_MISO SLP_S4#
E25 PM_SLP_S4# (7,17) 1 2 H24
DMI_ZCOMP
T1 F21 J22 For EMI, Close to TigerPoint
06/08 SPI_MOSI SLP_S5# PM_SLP_S5# (17) DMI_IRCOMP
SPI

M8
SPI_CS# PM_BATT_LOW#
P9 B25 (8) CLK_PCIE_PCH# W23
SPI_CLK BATLOW# H_DPRSTP# DMI_CLKN
R4 SPI_ARB DPRSTP# AB23 H_DPRSTP# (5) (8) CLK_PCIE_PCH W24 DMI_CLKP
AA18 H_DPSLP#
DPSLP# H_DPSLP# (5) 0_0402_5% 2
+3VALW F20
RSVD31 T_PWROK 1 R310 2 VGATE
VGATE (5,8,17,36) TIGERPOINT_ES1_BGA360
@
2.2K_0402_5% 1 R147 2 ICH_SMBCLK
B
TIGERPOINT_ES1_BGA360 1 R311 2 PCH_POK (5,17)
+3VALW B
2.2K_0402_5% 1 R148 2 ICH_SMBDATA 0_0402_5%
10K_0402_5% 2 R40 1 LINKALERT# +3VS USB_OC#0_1 R46 10K_0402_5%
10K_0402_5% 2 R44 1 SMLINK0 D25 RB751V_SOD323 USB_OC#2 R49 10K_0402_5%
10K_0402_5% 2 10K_0402_5% 2 R37 1 T_PWROK ACIN_C 2 1 ACIN USB_OC#3 R48 10K_0402_5%
R43 1 SMLINK1 ACIN (17,32)
2

@ USB_OC#4
8.2K_0402_5% 10K_0402_5% 2 R38 1 EC_RSMRST#R
R239 PM_BATT_LOW# R1376 2 R223 1 2 1 USB_OC#5
+3VALW
USB_OC#6
1K_0402_5% 1 R145 2 ICH_PCIE_WAKE# 10K_0402_5% @ R222
USB_OC#7
modify 05/14
100K_0402_5% 0_0402_5%
10K_0402_5% 2 R39 1 SYS_RST#
1

GPIO38
8.2K_0402_5% R240 ICH_RI#
2

10K_0402_5% 2 R36 1 EC_LID_OUT# +3VS +RTCBATT


8.2K_0402_5% R314 GPIO12
R1377
10K_0402_5%
RSMRST circuit

2
8.2K_0402_5% R315 GPIO14 10K_0402_5% 2 R42 MCH_SYNC#
1 @
R295 R1370 R372
8.2K_0402_5% R316 GPIO15 8.2K_0402_5% GPIO7
1

0_0402_5%
8.2K_0402_5% R300 GPIO39 1K_0402_5%
8.2K_0402_5% R301 SMBALERT# 1 2
charge@
8.2K_0402_5% R368 EC_THERM#

1 1
+3VS Q30
8.2K_0402_5% R302 GPIO0 EC_RSMRST#R
+RTCVCC 3 1

C
D37 (17) EC_RSMRST#
1M_0402_5%

E
2

1 R146 2 INTRUDER# 10K_0402_5% 2 R241 1 PM_CLKRUN# charge@ BAV99DW-7_SOT363 @ MMBT3906_SOT23-3


1 2

B
R1380 +3VALW

1 2
R373 @ 4.7K_0402_5%
1 R197 2 INTVRMEN 10K_0402_5% +RTCVCC

2
332K_0402_1% 3G@ R374
3

2
D28B
1

GPIO34 @ 2.2K_0402_5% @
BAS40-04_SOT23-3 @ D28A
1 R196 2 RTCRST#
+RTCVCC +CHGRTC
2

20K_0402_5% Change Y3 to SJ132P7KW10 2010/04/06 BAV99DW-7_SOT363

1
A C368 1 A
R1379 charge@ R375

6
C1148 1 2
12P 50V J NPO 0402 Routing the trace at least 10mil 10K_0402_5%
2 R1184 @1 0_0402_5% RTCX1 NON3G@ 0.1U_0402_16V4Z
2 1 2 @ 2.2K_0402_5%
1

Add +RTCVCC circuit 06/12


10M_0402_5%

Y3
1

2 1
R288

C230 NC OSC
1 2 3 NC OSC 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
32.768KHZ_12.5PF_Q13MC14610002
2

1U_0603_10V6K C371
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Tigerpoint(3/4)
Change J3 to R1184 4/29 2 1 RTCX2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
Change C230 to SE080105K80 04/06 12P 50V J NPO 0402
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, June 03, 2010 Sheet 13 of 39
5 4 3 2 1
5 4 3 2 1

TGP
U72E
D D
F12 +V5REF_RUN 6mA
VCC5REF

U72F TGP
F5 +V5REF_SUS 10mA
+5VS +3VS VCC5REF_SUS
VSS01 A1
Y6 +SATAPLL 45mA A25
VCCSATAPLL VSS02
VSS03 B6
1

AE3 +RTCVCC B10


VCCRTC VSS04

0.01U_0402_16V7K
R33 D12

0.1U_0402_16V4Z
VSS05 B16
RB751V-40_SOD323-2 Y25 +DMIPLL B20
VCCDMIPLL VSS06

C42

C47
100_0402_5% 1 1 B24
10mA +VCCP VSS07
F6 E18
2

VCCUSBPLL VSS08
F16
+V5REF_RUN VSS09
G4
2 2 VSS10
VSS11 G8
1 W18 14mA 1 H1
C59 V_CPU_IO VSS12
H4
C41 0.1U_0402_16V4Z VSS13
VSS14 H5
1U_0603_10V6K K4
2 1.422A 2 VSS15

10U_0805_10V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z
VCC1_5_1 AA8 VSS16 K8

1U_0603_10V6K

1U_0603_10V6K
VCC1_5_2 M9 +1.5VS VSS17 K11
M20 K19
VCC1_5_3 VSS18

POWER

C48

C45

C61

C62

C459
N22 1 1 1 1 1 K20
VCC1_5_4 VSS19
L4
VSS20
M7
+5VALW +3VALW VSS21
M11
2 2 2 2 2 VSS22
N3
VSS23
2

N12
VSS24
1

C D10 0.955A C

0.1U_0402_16V4Z
J10 +VCCP N13

10U_0805_10V4Z
VCC1_05_1 VSS25

1U_0603_10V6K

1U_0603_10V6K
R35 RB751V-40_SOD323-2 K17 N14
VCC1_05_2 VSS26

C46

C60

C63

C460
VCC1_05_3 P15 1 1 1 1 VSS27 N23
10_0402_5% V10 P11
1

VCC1_05_4 VSS28
P13
2

+V5REF_SUS VSS29
VSS30 P19
2 2 2 2 R14
VSS31
R22
0.216A VSS32
1 H25 +3VS T2
VCC3_3_1 VSS33

1U_0603_10V6K

1U_0603_10V6K

1U_0603_10V6K
C40

0.1U_0402_16V4Z

0.1U_0402_16V4Z
AD13 T22
VCC3_3_2 VSS34

C43

C37

C38

C461

C462
0.1U_0402_16V4Z F10 1 1 1 1 1 V1
VCC3_3_3 VSS35
G10 V7
2 VCC3_3_4 VSS36
R10 V8
VCC3_3_5 VSS37
VCC3_3_6 T9 VSS38 V19
2 2 2 2 2
VSS39 V22
V25
0.092A VSS40
F18 W12
VCCSUS3_3_1 VSS41
N4 W22
VCCSUS3_3_2 VSS42
K7 Y2
VCCSUS3_3_3 VSS43
VCCSUS3_3_4 F1 +3VALW VSS44 Y24

1U_0603_10V6K

1U_0603_10V6K
0.1U_0402_16V4Z
VSS45 AB4
AB6
VSS46

C39

C44

C463
1 1 1 AB7
VSS47
VSS48 AB8
VSS49 AC8
VSS50 AD2
2 2 2
5 AD10
VSS51
AD20
VSS52
TIGERPOINT_ES1_BGA360 AD24
VSS53
AE1
B VSS54 B
AE10
VSS55
AE25
VSS56

Place closely pin Y25 within 100mlis.


G24
+1.5VS R30 VSS57
AE13
0.01U_0402_16V7K +DMIPLL VSS58
F2
0_0805_5% VSS59
1 1 1
C58 C28 C464 AE16
10U_0805_10V4Z RSVD32
2 2 2

4.7U_0603_6.3V6K
TIGERPOINT_ES1_BGA360

Place closely pin Y6 within 100mlis.

+1.5VS
R29
+SATAPLL
0_0805_5%
1 1
C57 C27
10U_0805_10V4Z 0.1U_0402_16V4Z
A A
2 2

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/04/15 Deciphered Date 2010/04/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Tigerpoint(4/4)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, March 25, 2010 Sheet 14 of 39
5 4 3 2 1
A B C D E

Add C1163 C1164 C1165 C1166 06/23


+1.5VS

1 1 1
MCP@1 MCP@ C1164 MCP@C1165
MCP@ C1165 C1166

0.01U_0402_25V7K

4.7U_0603_6.3V6K
C1163

47P_0402_50V8J
MCP@
2 2 2 +3VS

0.1U_0402_16V4Z
2

1 Add C850 06/12 1


1

+3VS_WWAN
C411 BT@
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2
MCP@1 1MCP@ 1
1 MCP@ 1 MCP@
C505 C507 R501
C508
C506 C850
2
0.1U_0402_16V4Z
2 2
MCP@
0.01U_0402_25V7K 2
47P_0402_50V8J (17,26) BT_ON# 2 1 BT MODULE CONN
2 10K_0402_5%
10U_0805_10V4Z

BT@
+3VS BT@ +3VS_BT
Q35
AO3413_SOT23-3 BT@
+3VS_WWAN C502
+3VS_WWAN +3VALW

D
+3VS 3 1 2 1
1
@ Change C847 to SE000000K80 2010/04/06 0.1U_0402_16V4Z
Change JMINI1 to FOX_AS0B246-S50U-7F_52P-T 06/29 @ C403 +

G
1 2 1 2

2
R405 0_1206_5% R504 0_1206_5%
150U_B_6.3VM_R40M

+3VS_BT
2
Close to WWAN CONN
JMINI1
(13,26) ICH_PCIE_WAKE# ICH_PCIE_WAKE# 1 2
1 2
3 4 JBT1
3 4
5 6 +1.5VS
WWAN_CLKREQ# 5 6 +UIM_PWR
(8) WWAN_CLKREQ# 7 7 8 8 1 1
9 10 UIM_DATA 2
9 10 UIM_CLK USB20_P6 2
(8) CLK_PCIE_WWAN# 11 12 (13) USB20_P6 3 5
11 12 UIM_RST USB20_N6 3 GND
(8) CLK_PCIE_WWAN 13 14 (13) USB20_N6 4 6
2 13 14 UIM_VPP 4 GND 2
15 15 16 16
ACES 88266-04001
17 18 CONN@
17 18 WXMIT_OFF#
19 19 20 20 WXMIT_OFF# (17)
21 22 R506 1 2 0_0402_5%
21 22 PLTRST# (4,5,13,17,25,26,27)
(13) PCIE_DTX_C_IRX_N3 23 23 24 24
(13) PCIE_DTX_C_IRX_P3 25 26
25 26 R507 0_0402_5%
Change to PCIE_P3 05/13 27 27 28 28 MINI_SMBCLK (26)
29 30 1 NON3G@
2
29 30 CLK_SMBCLK (7,8,27)
31 32 1 NON3G@
2
(13) PCIE_ITX_C_DRX_N3 31 32 CLK_SMBDATA (7,8,27)
33 34 R508 0_0402_5%
(13) PCIE_ITX_C_DRX_P3 33 34 MINI_SMBDATA (26)
35 35 36 36 USB20_N5 (13)
37 38 USB20_P5 (13)
10U_0805_10V4Z MCP@ 37 38
+3VS_WWAN 39 40
39 40
1
C504
2 41
41 42
42 WWAN_LED# (16,26) (9~16mA)
43 44 1 2 WLAN_LED# (16,26)
D15 WWAN_WAKEUP_R# 43 44 R511 0_0402_5%
45 46
@ CM1293-04SO_SOT23-6 45 46
47 48
UIM_VPP UIM_DATA 47 48
1 CH1 CH4 4 49 49 50 50
51 52
51 52
53 54
GND1 GND2
2 5 +UIM_PWR 55 56
Vn Vp NC NC
BELLW_80052-1021
CONN@
UIM_RST 3 6 UIM_CLK
CH2 CH3

JP3
4 1 +UIM_PWR
3 UIM_VPP GND VCC UIM_RST +3VALW 3
5 VPP RST 2
UIM_DATA 6 3 UIM_CLK
I/O CLK
7
DET
22P_0402_50V8J

C1116

C1115
0.1U_0402_16V4Z

3G@ 1 1

1
22P_0402_50V8J

22P_0402_50V8J

8 1 1 1 1 3G@
1 1 1
C1118
56P_0402_50V8

(13) USB20_SIM_P D+
1
C509

9 3G@ 1 3G@ C512 3G@ R509


D-
C510

(13) USB20_SIM_N
C511

C513

2 10 3G@ 3G@ 10K_0402_5%


C1117

2 GND
56P_0402_50V8

56P_0402_50V8
R12

@ 11
1U_0402_6.3V6K

GND
C1114
56P_0402_50V8

2 2 2 2 2 2 2
22P_0402_50V8J

2 @ @

2
@
2

10K_0402_5% 1 2 WWAN_WAKEUP_R#
(17) WWAN_WAKEUP#
R510 0_0402_5%
Modifiy 05/11
+UIM_PWR
@
TAITW_PMPAT2-08GLBS7N14N0
CONN@

Add C1115 C1114 C1116 C1117 C1118 05/11


Change C512 to 1U_0402 05/14

Reserve for SIM card does not meet rise time


and pull-up is needed.

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/05 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Mini-Card/BT CONN
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Monday, June 28, 2010 Sheet 15 of 39
A B C D E
A B C D E F G H

ADD LED PCB CONN 06/12


Change JP18 to NEW P/N 06/23
LED PCB CONN 09/03 Change +5VALW , +5VS to +3VALW +3VS
JP18
1 1
+3VALW 1 1
(17) PWR_LED# 2 2
(17) PWR_SUSP_LED# 3 3
(17) BATT_GRN_LED# 4
4
(17) BATT_AMB_LED# 5
MEDIA_LED# 5
6 6
7
7
8 8
9 9
+3VS 10
10 +RTCVCC +CHGRTC +RTCBATT1
11 11 GND 17
(15,26) WWAN_LED# 12 18 D46
12 GND
(15,26) WLAN_LED# 13 13 2
14 1
14
15 3 1 2
15 R1456 1K_0402_5%
16
16 DAN202UT106_SC70-3 noncharge@
ACES_85201-1605N noncharge@

CONN@

+3VS
+RTCBATT1
5

U29

1
@
2 B
P

(21) CARD_LED# JBATT1

+
2 4 MEDIA_LED# 2
SATA_LED# Y
(12) SATA_LED# 1
A
G

NC7SZ08P5X_NL_SC70-5
3

Add U29 5/14

-
SUYIN_060003HA002G202ZL

2
20100503 add

3 3

SATA HDD Conn.


JHDD1
1 GND
SATA_ITX_C_DRX_P0 2
(12) SATA_ITX_C_DRX_P0 A+
SATA_ITX_C_DRX_N0 3
(12) SATA_ITX_C_DRX_N0 A-
4
SATA_DTX_C_IRX_N0 SATA_DTX_IRX_N0 GND
1 2 C380 5 B-
(12) SATA_DTX_C_IRX_N0 0.01U_0402_16V7K 6
SATA_DTX_C_IRX_P0 SATA_DTX_IRX_P0 B+
1 2 7
(12) SATA_DTX_C_IRX_P0 GND
C383
0.01U_0402_16V7K 8
+3VS V33
9
V33
10
V33
11
GND
+5VS 12
GND
13
GND
+5VS 14
0.1U_0402_16V4Z V5
15
V5
16
1 1 1 1 V5
17
C423 C426 GND
18
C422 C419 Reserved
19 24
1U_0402_6.3V6K 10U_0603_6.3V6M GND GND
2 2 2 2 20
V12
21 V12 GND 23
22 V12
1000P_0402_50V7K
4 4
SUYIN_127043FR022G263ZR_NR

CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
SATA CONN./LED/B CONN./BATT CONN.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, June 03, 2010 Sheet 16 of 39
A B C D E F G H
+3VALW Change R1292 to 0 ohm for BRD ID R01 (EVT) 2010/03/25
+EC_AVCC
L16
1 1 1 1 1 1 Change R1292 to 8.2K ohm for BRD ID R02 (DVT) 2010/05/03

0.1U_0402_16V4Z
C514

0.1U_0402_16V4Z
C515

0.1U_0402_16V4Z
C516

0.1U_0402_16V4Z
C517

1000P_0402_50V7K
C521

1000P_0402_50V7K
C519
+3VALW 1 2 +EC_AVCC
MBK1608121YZF_0603 2 1
C518 +3VALW
C520 2 2 2 2 2 2
@

111
125
0.1U_0402_16V4Z 1000P_0402_50V7K U6 Ra

22
33
96

67
9

2
1 ECAGND 2
2 1
R1288 R1291

VCC
VCC
VCC
VCC
VCC
VCC

AVCC
0_0402_5% 100K_0402_5%
10K_0402_5%
Change to R_0402 05/14 +3VS 2 R41 1

1
1 21 PWR_PWM_LED#
(12) GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F BEEP# PWR_PWM_LED# BRD_ID
(12) KB_RST# 2 23 BEEP# (19)
KBRST#/GPIO01 BEEP#/PWM2/GPIO10
(12,27) SERIRQ 3 SERIRQ# FANPWM1/GPIO12 26

2
4 27 ACOFF
(13,27) LPC_FRAME# LPC_AD3 LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF (32)
5 R1292
(13,27) LPC_AD3 LPC_AD2 LAD3
(13,27) LPC_AD2 7 LAD2 PWM Output 33K +-5% 0402
LPC_AD1 8 63 BATT_TEMP
(13,27) LPC_AD1 LPC_AD0 LAD1 BATT_TEMP/AD0/GPIO38 BATT_OVP BATT_TEMP (31)
C522
(13,27) LPC_AD0 10
LAD0 LPC & MISC
64 BATT_OVP Rb

1
BATT_OVP/AD1/GPIO39
2 1 2 1 65 ADP_I (32)
ADP_I/AD2/GPIO3A BRD_ID
R1289 @ 10_0402_5% 12 AD Input 66
@ 22P_0402_50V8J
1 2
(8) CLK_PCI_LPC
(4,5,13,15,25,26,27) PLTRST# EC_RST#
13
37
PCICLK
PCIRST#/GPIO05
AD3/GPIO3B
AD4/GPIO42 75
76
1
0_0402_5%
2
R1389
+0.89V_PG (35) BOARD ID Table
+3VALW ECRST# SELIO2#/AD5/GPIO43
R1290 47K_0402_5% EC_SCI# 20 @
(13) EC_SCI# SCI#/GPIO0E
2 38
CLKRUN#/GPIO1D VCC 3.3V
C523 68
DAC_BRIG/DA0/GPIO3C EN_FAN1
EN_DFAN1/DA1/GPIO3D 70
IREF
EN_FAN1 (4) Ra 100K
0.1U_0402_16V4Z
1
DA Output IREF/DA2/GPIO3E
71 IREF (32)
PLTRST# KSI0
KSI1
55
56
KSI0/GPIO30
KSI1/GPIO31
DA3/GPIO3F
72 CALIBRATE# (32) ID BRD ID Rb Vab-Min Vab-Typ Vab-Max
KSI2 57 KSI2/GPIO32
1

C1159 KSI3 0 R01 (EVT)


KSI4
58
59
KSI3/GPIO33 PSCLK1/GPIO4A
83
84 USB_ON#
EC_MUTE# (22,23) 0 0V 0V 0V
KSI5 KSI4/GPIO34 PSDAT1/GPIO4B USB_ON# (20)
220P_0402_50V7K 1 R02 (DVT)
60 85 8.2K 0.216V 0.250V 0.289V
2

KSI6 KSI5/GPIO35 PSCLK2/GPIO4C


61
KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D
86 PWR_LED1# (18) PAV50
KSO[0..15] KSI7 TP_CLK 2 R03 (PVT)
(19) KSO[0..15] KSO0
62
39
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E
87
88 TP_DATA
TP_CLK (19) 18K 0.436V 0.503V 0.538V
KSI[0..7] KSO1 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA (19)
For ESD 40 KSO1/GPIO21 3 R10A (MP) 33K 0.712V 0.819V 0.875V
(19) KSI[0..7] KSO2 41
KSO3 KSO2/GPIO22
KSO4
42 KSO3/GPIO23 SDICS#/GPXOA00 97 4 R01 (EVT) 56K 1.036V 1.185V 1.264V
43 98
KSO5 KSO4/GPIO24 SDICLK/GPXOA01
KSO5/GPIO25 Int. K/B 5 R02 (DVT) 100K 1.453V 1.650V 1.759V
44 99
KSO6 SDIDO/GPXOA02 LID_SW#
KSO7
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW# (18) NAV60
KSO1 KSI1 KSI5 GPIO15 46 KSO7/GPIO27 SPI Device Interface 2 1 +3VALW 6 R03 (PVT) 200K 1.935V 2.200V 2.341V
KSO8 47 47K_0402_5% R1293
KSO9 KSO8/GPIO28 FRD#SPI_SO
KSO10
48
KSO9/GPIO29 SPIDI/RD#
119
FWR#SPI_SI
7 R10A (MP) NC 2.500V 3.3V 3.3V
WLAN_OFF# v v High KSO11
49 KSO10/GPIO2A SPIDO/WR# 120
SPI_CLK
50
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
126
KSO12 51 128 FSEL#SPICS#
KSO13 KSO12/GPIO2C SPICS# +3VALW
WXMIT_OFF# v v High KSO14
52
KSO13/GPIO2D
53 KSO14/GPIO2E
WXMIT_OFF# KSO15 54 73
KSO15/GPIO2F CIR_RX/GPIO40 WWAN_WAKEUP# (15)

2
v v Low 81 74 EC_ID
KSO16/GPIO48 CIR_RLC_TX/GPIO41 R328 @
Swap to WLAN 82
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50
89
BATT_GRN_LED# FSTCHG (32)
90 R1446 100K_0402_5%
BATT_CHGI_LED#/GPIO52 BATT_GRN_LED# (16)
91 1 2 LIGHT_SENSOR_INT# (27)
EC_SMB_CK1 CAPS_LED#/GPIO53 BATT_AMB_LED#
(31) EC_SMB_CK1 77 GPIO 92 0_0402_5%
BATT_AMB_LED# (16)
@

1
EC_SMB_DA1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 PWR_LED# EC_ID
(31) EC_SMB_DA1 78 93 PWR_LED# (16)
Add for Light-sensor interrupt 2010/03/11
EC_SMB_CK2 SDA1/GPIO45 SUSP_LED#/GPIO55 SYSON
KSO1 (5,27) EC_SMB_CK2 79 SCL2/GPIO46 SM Bus SYSON/GPIO56 95 SYSON (7,29,34)
EC_SMB_DA2 80 121
(5,27) EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON (36)

2
KSI1 WL_BTN# AC_IN/GPIO59
127 ACIN (13,32)
R327
KSI5 3G_BTN# 0_0402_5% R1309 Add 0 ohm R1309 06/08 100K_0402_5%
PM_SLP_S3# 6 100 1 2
(13) PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# (13) @
PM_SLP_S5# 14 101 EC_LID_OUT#
(13) PM_SLP_S5# EC_LID_OUT# (13)

1
EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_ON RB751V-40TE17_SOD323-2 Del R1294 06/08
(13) EC_SMI# 15 EC_SMI#/GPIO08 EC_ON/GPXO05 102 EC_ON (18)
16 103 D29 @
LID_SW#/GPIO0A EC_SWI#/GPXO06 ICH_POK_EC
17 104 1 2 PCH_POK PCH_POK (5,13)
SUSP#/GPIO0B ICH_PWROK/GPXO06
Change INVT_PWM from Pin21 to Pin25 06/24 18
PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08
105 BKOFF# (9) R1295
0_0402_5% R67 19 GPIO 106 1 2 1 2
EC_PME#/GPIO0D WL_OFF#/GPXO09 WL_OFF# (26) +3VS
INVT_PWM2 1 25 107 R1296 10K_0402_5% @
(5,9) INVT_PWM EC_THERM#/GPIO11 GPXO10 WXMIT_OFF# (15) 0_0402_5%
FAN_SPEED1 28 108 @
(4) FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11 BT_ON# (15,26)
29 D30
EC_TX_P80_DATA FANFB2/GPIO15 PCH_POK
(26) EC_TX_P80_DATA 30
EC_TX/GPIO16
Change BT_ON# from Pin98 to Pin108 06/24 2 1 VGATE (5,8,13,36)
EC_RX_P80_CLK 31 110
(26) EC_RX_P80_CLK EC_RX/GPIO17 PM_SLP_S4#/GPXID1 PM_SLP_S4# (7,13)
32 112 RB751V-40TE17_SOD323-2
(18) ON/OFF# PWR_SUSP_LED# ON_OFF/GPIO18 ENBKL/GPXID2 GMCH_ENBKL (5)
(16) PWR_SUSP_LED# 34 114 EAPD (22)
PWR_LED#/GPIO19 GPXID3 EC_THERM#
36
NUMLED#/GPIO1A GPI GPXID4
115 EC_THERM# (13)
116 SUSP#
GPXID5 PBTN_OUT# SUSP# (29,34,35)
117 PBTN_OUT# (13)
GPXID6 +3VALW
118
XCLKI GPXID7 LAN_WAKE# (25) U75
122 XCLK1
XCLKO 123 124 1 R320 2 +3VALW SPI_CS# 1 8
XCLK0 V18R CS# VCC SPI_CLK_R
@ 20mil 1 1 +3VALW 3
WP# SCLK
6
AGND

+3VALW 2 1 C1178 100K_0402_5% 7 5 SPI_SI


GND
GND
GND
GND
GND

(13) EC_CLK HOLD# SI


0_0402_5% R1459 C524 4 2 SPI_SO
GND SO
2

470P_0402_50V7K
1 2 EC_SMB_CK1 1 @ @
2 2

4.7U_0603_6.3V6K
R1297 2.2K_0402_5% R1460 C1222 KB926QFE0_LQFP128_14X14 MX25L512AMC-12G_SO8
11
24
35
94
113

69

1 2 EC_SMB_DA1 @
100K_0402_5%

R1298 2.2K_0402_5% @
2
ECAGND

1 2 KSO1
22P 50V J NPO 0402
1

R1299 47K_0402_5%
1 2 KSO2 +3VALW
R1300 47K_0402_5% Reserve EC_CLK for KBC 2010/06/01
8M SPI ROM
1
XCLKI XCLKO C526 20mils U76
1 8 4
C527 C525 0.1U_0402_16V4Z VCC VSS
1
EC DEBUG PORT 2 3 W
1

27P_0402_50V8J Add JP23 2010/03/25


27P_0402_50V8J 2 +5VS 7
OSC

OSC

2 HOLD
Del JP23 2010/06/07
TP_CLK 1 2 FSEL#SPICS# 2 1 SPI_CS# 1
R1301 4.7K_0402_5% R1302 22_0402_5% S
TP_DATA SPI_CLK SPI_CLK_R
NC

NC

1 2 2 1 6
R1303 4.7K_0402_5% R1304 22_0402_5% C
X1 FWR#SPI_SI 2 1 SPI_SI 5 2 SPI_SO 2 1 FRD#SPI_SO
2

R1305 22_0402_5% D Q R1306 22_0402_5%


32.768KHZ_12.5PF_Q13MC14610002
16M W25Q16BVSSIG SOIC 8P
+3VS
Change X1 to SJ132P7KW10 2010/04/06 C528
1 2 EC_SMB_CK2 3G@
R1307 2.2K_0402_5% 2 1 SPI_CLK_R
1 2 EC_SMB_DA2 BATT_OVP R1392 1 2 1K_0402_5% 10P_0402_50V8J
R1308 2.2K_0402_5%
BATT_TEMP C530 1 2 3G@
100P_0402_50V8J Security Classification Compal Secret Data Compal Electronics, Inc.
ACIN 3G@ C531 1 2 2006/08/04 2007/8/18 Title
Issued Date Deciphered Date
100P_0402_50V8J
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB926/BIOS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Monday, June 28, 2010 Sheet 17 of 39
Add For NAV50 07/06
09/03 Change +5VS to +3VS
ON/OFF Button
+3VS
SW1
3 4
(BLUE) TOP Side
ON/OFFBTN#
@ +3VALW
R186 2

1
1
0_0805_5%
1 2
50@ 51 +-5% 0402

2
R1403 EVQPLMA15 SPST PANASONIC H1.5
@ R1347
2
R194 2 1
0_0805_5% 100K_0402_5%
2

1
D14
LED2 Bottom Side ON/OFF#
50@ 2 ON/OFF# (17)
HT-191NB5-DT BLUE 0603
FOR EMI ON/OFFBTN# 1
3 51ON#
51ON# (30)
1

DAN202U_SC70
PWR_LED1# C1169 1 2 @ 100P_0402_50V8J

1
PWR_LED1# <BOM Structure> 2
PWR_LED1# (17) ON/OFFBTN# C1170 1 C4 D1 @
2 @ 100P_0402_50V8J
10mil 1000P_0402_50V7K
1
RLZ20A_LL34

2
PWR_LED1#

1
D
ON/OFFBTN# EC_ON 2 Q1
(17) EC_ON
G 2N7002W-T/R7_SOT323-3

2
S <BOM Structure>

3
R3
3

D42
10K_0402_5%
PJSOT24C_3P_C/A_SOT-23

1
1

Add For PAV70 2010/04/09 Add For PAV70 2010/04/09


LID Switch

+3VS +3VS
Del R103 05/12
+3VALW
(BLUE) (BLUE)

2
1

VDD
@ 70@
51 +-5% 0402 51 +-5% 0402
R1454 R1455 3
1 OUTPUT LID_SW# (17)
C155
2

10P_0402_50V8J
0.1U_0402_16V4Z 1

GND
2

2 C150
@ LED3 70@ LED4 U5

1
2
HT-191NB5-DT BLUE 0603 HT-191NB5-DT BLUE 0603

APX9132ATI-TRL SOT-23 3P
1

PWR_LED1# PWR_LED1#
PWR_LED1# (17) PWR_LED1# (17)

10mil 10mil

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
ON/OFF / PWR SW/ LID SW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, June 03, 2010 Sheet 18 of 39
5 4 3 2 1

To TP/B Conn.
D D

KSI[0..7]
KSI[0..7] (17) INT_KBD Conn. 1
JP11

KSO[0..15] +5VS 1
KSO[0..15] (17) 2 2
JKB1 TP_CLK 3
(17) TP_CLK 3
26 TP_DATA 4
G2 (17) TP_DATA 4
25 G1 5 5 GND 8

3
KSI0 24 6 7
KSI1 24 6 GND
23 23
KSI0 C136 1 2 100P_0402_50V8J KSO4 C104 1 2 100P_0402_50V8J KSI2 22
KSO0 22 ACES_85201-0605N
21 21
KSI1 C135 1 2 100P_0402_50V8J KSO5 C103 1 2 100P_0402_50V8J KSO1 20 D22
KSO2 20 @
19 19 CONN@
KSI2 C134 1 2 100P_0402_50V8J KSO6 C102 1 2 100P_0402_50V8J KSI3 18
KSO3 18
17 17
KSI3 C133 1 2 100P_0402_50V8J KSO7 C101 1 2 100P_0402_50V8J KSO4 16

1
KSO5 16 PJDLC05C_SOT23-3
15 15
KSI4 C132 1 2 100P_0402_50V8J KSO8 C100 1 2 100P_0402_50V8J KSO6 14
KSO7 14
13 13
KSI5 C131 1 2 100P_0402_50V8J KSO9 C99 1 2 100P_0402_50V8J KSO8 12
KSI4 12
11 11
KSI6 C127 1 2 100P_0402_50V8J KSO10 C98 1 2 100P_0402_50V8J KSO9 10
KSI5 10
9 9
KSI7 C126 1 2 100P_0402_50V8J KSO11 C97 1 2 100P_0402_50V8J KSI6 8 8
KSO10 7 7
Chage JP11 Pin define & Add D22 05/14
KSO0 C125 1 2 100P_0402_50V8J KSO12 C96 1 2 100P_0402_50V8J KSO11 6
KSI7 6
5 5
KSO1 C124 1 100P_0402_50V8J KSO13 C95 100P_0402_50V8J KSO12
C 2 1 2
KSO13
4
3
4 Update TP/B Conn 05/04 C

KSO2 C114 1 100P_0402_50V8J KSO14 C93 100P_0402_50V8J KSO14 3


2 1 2 2 2
KSO15 1
KSO3 C113 1 100P_0402_50V8J KSO15 C92 100P_0402_50V8J 1
2 1 2
ACES_85202-24051
CONN@

+VCC_4IN1

6/26 Add circuit


2

@ 1 C1220 C1020
R1447 0.1U_0402_6.3V4Z
B 100K_0402_5% 10U_0805_10V4Z R1326 B
(17) BEEP# 1 2 1 2 MONO_IN (22,24)
1

2 47K_0402_5% 2
C123
JREAD2 100P_0402_50V8J
R1327 1
(21) CARD_D3 1 D3 (13) SB_SPKR 1 2
(21) SMBSYZ_SDCMD 2 CMD
3 47K_0402_5%
VSS1
4 VDD 2

1
(21) SMALE_CLK 5 CLK
6 R1324 C1009
VSS2
10K_0402_5% 1
(21) CARD_D0 7 D0
8 0.1U_0402_6.3V4Z
(21) CARD_D1

2
D1
(21) CARD_D2 9 D2
(21) PIN3 10 WP
(21) SDCDZ 11 CD

Modify MONO_IN schematic,move some parts to I/O Board , Add the MONO_IN_R on M/B 06/25
12 GND1
13 GND2

A
TAITW _PSDBTC09GLBS1N14N0 A
CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB Conn/TP/CR Conn
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 19 of 39
5 4 3 2 1
A B C D E

+5VALW

+USB_VCCC
U13
C244 1 8
0.1U_0402_16V4Z GND VOUT
2 VIN VOUT 7
2 1 3 6
VIN VOUT
4 EN FLG 5 USB_OC#0_1 (13)

2
R224 APL3510BKI-TRG SOP 8P PWR SWITCH
1 100K_0402_5% 1

1
C245

1
(17) USB_ON# USB_ON# @ 1000P_0402_50V7K
2

Change JUSB1 JUSB2 to NEW P/N SP010906181 06/23 USB CONN.2


USB CONN.1
+USB_VCCC +USB_VCCC

+USB_VCCC
W=40mils +USB_VCCC
W=40mils

1 1 1 1
C316 C318
C315 + C317 +
470P_0402_50V7K 470P_0402_50V7K
150U 6.3V M B LESR45M T520 H1.9 2 150U 6.3V M B LESR45M T520 H1.9 2
2 2
JUSB1 JUSB2
1 VCC 1 VCC
(13) USB20_N0 2 (13) USB20_N1 2
D- D-
(13) USB20_P0 3 D+ (13) USB20_P1 3 D+
4 4
GND GND

2
3

2
5 GND1 5 GND1
6 GND2 6 GND2
7 7
GND3 D23 GND3
8 8
2 D21 GND4 GND4 2
SUYIN_020133GB004M25MZL SUYIN_020133GB004M25MZL

CONN@ PJDLC05C_SOT23-3 CONN@

1
PJDLC05C_SOT23-3

1
+5VALW +USB_VCCC1

W=80mils W=80mils
U78
1 8 R1
GND VOUT 0_0402_5%
2 7
VIN VOUT
3 6 1 2
VIN VOUT
(17) USB_ON# 4 5 USB_OC#2 (13)
3 EN FLG 3

1 APL3510BKI-TRG SOP 8P PWR SWITCH


L31 @
C1 +USB_VCCC1 1 2 USB20_N2_1
1 (13) USB20_N2 1 2
0.1U_0402_16V4Z C2
2 @ 1000P_0402_50V7K
W=80mils 4 3 USB20_P2_1
2 (13) USB20_P2 4 3
1
1
USB CONN. 3 WCM2012F2S-900T04_0805

C10 + C8
1 2
150U 6.3V M B LESR45M T520 H1.9 470P_0402_50V7K R2
2 2 0_0402_5%

JUSB3
1
USB20_N2_1 VCC
2
USB20_P2_1 D-
3
D+
4
GND
5
GND1
6 GND2
7
GND3
8
GND4
D4 @ SUYIN_020133GB004M25MZL
USB20_N2_1 6 3 CONN@
CH3 CH2

4 4
+USB_VCCC1 5 2
Vp Vn

4 1 USB20_P2_1
CH4 CH1
CM1293-04SO_SOT23-6
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB PORTS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, June 03, 2010 Sheet 20 of 39
A B C D E
5 4 3 2 1

、R33
J14
U28 +3VS 2 1
2 1
@ JUMP_43X39
U1 close to JREAD1
08/06 Add R32
VCC33
U28 6252@
J13
2 1 +3VS_READER 28 15 6252@
+3VALW 2 1 +VCC_4IN1 CrdVcc VddA
6250@ +3VS_READER 29 10 R1344
@ JUMP_43X39 SysVcc VccA 100_0402_1%
VCC33 30 Vcc33O
31 7 SMCEZ 1 2 SMCEZ_C
VCC18 Vcc18O xDCeZ
33 23 SMCLE
Thermo Pad xDCle SMALE_CLK
(19) CARD_D3 24
xDAle SMBSYZ_SDCMD 6252@
(19) SMBSYZ_SDCMD xDBsyZ 22
D R1345 R1346 D
1 1 (13) USB20_P4 14 D+
12K_0402_1% 13 3 PIN3 100_0402_1%
C1054 (13) USB20_N4 REXT 12 D- xDWeZ SMREZ SMREZ_C
C1055 1 2 25 1 2
(19) SMALE_CLK 10U 6.3V M X5R 0603 H0.8 Rref xDReZ
0.1U_0402_25V4K XTLI 8 32 SMWPZ
2 2 @ EClkin xDWpZ SDCDZ
Clock from M/B SdCdZ
26
27 SMCDZ_MSINSZ
(19) CARD_D0 xDCdZ
(19) CARD_D1 CARD_D0 CARD_LED_R#
(19) CARD_D2 17 xDData0 LedZ 1
CARD_D1 18
(19) PIN3 xDData1
CARD_D2 20 2 1 2 VCC33
(19) SDCDZ CARD_D3 xDData2 ResetZ
21 xDData3
CARD_D4 19 R1357
CARD_D5 xDData4 4.7K_0402_5%

、R1348
4 xDData5 VssA 16
CARD_D6 5 11 @
CARD_D7 xDData6 GndA XTLO
6 9
xDData7 NC
08/06 Add R1347
UB6252NF A2-110 QFN 32P

HW TRAP JUMPER 0: NC, 1: Short


If use external crystal(Y4),
C1048 、C1049 close to U1 R1394 6252@
470_0402_5%
U1 will change UB6252
+VCC_4IN1 20mils VCC18 20mils SMCEZ 1 2 VCC33
VCC33

R1395 6252@ +VCC_4IN1 +3VS


1 1 1 1 470_0402_5%
@ @ SMREZ 1 2 VCC33
VCC33

1
C C1056 C1057 C1058 C1059 C

1
、R1348 is NC
10P 50V J NPO 0402 10U 6.3V M X5R 0603 H0.8 0.1U_0402_25V4K 4.7U_0603_6.3V6K
2 2 2 2 0_0402_5% R1354

1
when you use UB6250 ,R1347 @ @ R1359 10K_0402_5%

1
R1360 R1353 @

2
10K_0402_5% 10K_0402_5% @ R1358

2
R1361 0_0402_5%
0_0402_5% 1 2

2
2
G
R1344 R1346
D31
VCC33 20mils CARD_LED_R# 3 1 1 2 CARD_LED# (16)

D
Q37
2N7002W-T/R7_SOT323-3 RB751V_SOD323
2 1 1
@ 6250@ 6250@
C1060 C1061 C1062
0.01U_0402_16V7K 0.1U_0402_25V4K 4.7U_0603_6.3V6K 1 2
1 2 2
0_0402_5%
R1355
@
07/02 Update JREADER1
07/02 Revised C1053 to 0.01u ByPass Capacitors
Card Reader Connector
B B
JREAD1
+VCC_4IN1 22 11 +VCC_4IN1
XD-VCC SD4-VDD
MS9-VCC 18
CARD_D0 30
CARD_D1 XD10-D0 SMALE_CLK C1063 1
29 9 2 10P 50V J NPO 0402
CARD_D2 XD11-D1 SD5-CLK CARD_D0
4/30 Add CLK_SD_48M CARD_D3
28
27
XD12-D2
XD13-D3
SD7-DAT0
SD8-DAT1
4
3 CARD_D1
CARD_D4 26 21 CARD_D2
CARD_D5 XD14-D4 SD9-DAT2 CARD_D3
25 XD15-D5 SD1-DAT3 19
CARD_D6 24 16 SMBSYZ_SDCMD
6250@ CARD_D7 XD16-D6 SD2-CMD SDCDZ
23 1
XD17-D7 SD-CD PIN3
CLK_48M_CR 1 2 SD-WP 2
R1396 0_0402_5% PIN3 33
SMWPZ XD07-WE
32 XD08-WP SD6-VSS 6
SMALE_CLK 34 13
XTLI SMCDZ_MSINSZ XD06-ALE SD3-VSS
1 2 39
SMBSYZ_SDCMD XD01-CD
38
XD02-R/B
1

C1065 SMREZ_C 37 @ C1064


SMCEZ_C XD03-RE SMALE_CLK SMCDZ_MSINSZ
R1397 18P 50V J NPO 0402 Change Y6 to SJ100005900 2010/04/06 36
XD04-CE MS8-SCLK
17 1 2 10P_0402_25V8K
@ 33_0402_5% 6252@ SMCLE 35 10 CARD_D0
XD05-CLE MS4-DATA0
1

Y6 8 CARD_D1
12MHZ_16PF_7A12000026~D Only UB6252 31
MS3-DATA1
12 CARD_D2
2

XD GND MS5-DATA2 CARD_D3


1 6252@ need to use XTLI and XTLO 40 XD GND MS7-DATA3 15 1
14 SMCDZ_MSINSZ
2

@ C1066 MS6-INS PIN3 C1067


7
22P_0402_50V8J MS2-BS 0.1U_0402_25V4K
MS1-VSS 5
2 41 20 2
XTLO SD CD/WP GND MS10-VSS
1 2 42
SD CD/WP GND
C1068 T-SOL_144-1300302600_NR
EMI 18P 50V J NPO 0402 CONN@
A 6252@ A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/01/22 Deciphered Date 2009/11/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Card reader
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, June 03, 2010 Sheet 21 of 39
5 4 3 2 1
5 4 3 2 1

HDA_SDIN0_AUDIO
HDA_SDIN0_AUDIO (24)
N18123167 PVDD1_AUDIO
(24) N18123167 PVDD1_AUDIO (24)
N18123190
N18123190 (24) +3VS
(24) MIC1_C_L MIC1_C_L N18123238
N18123238 (24)
N17000325 JP4
MIC1_C_R N18123244 N17000325 (24)
1
(24) MIC1_C_R N18123244 (24) CODEC_VREF
CODEC_VREF (24)
DMIC_CLK1 8mil 2
1
2
N17000410 PVDD2_AUDIO DMIC_DATA1 3 5
(24) N17000410 PVDD2_AUDIO (24) 3 G1
(24) N18130106 N18130106 N16999452 4 6
N16999452 (24) 4 G2
N18123239
SENSE_A N18123239 (24)
ACES_88266-04001
(24) SENSE_A SENSE_B N18123242 CONN@
(24) SENSE_B N18123242 (24)
1 1

3
N16999461 MIC@ MIC@ MIC@
D (24) N16999461 D
D20 C604 C603
N18122593 PJDLC05C_SOT23-3
(24) N18122593 2 2
22P 50V J NPO 0402 22P 50V J NPO 0402
For ESD 12/22
Change U26 to SA00001N000 2010/04/06
J8
2 1

1
2 1
@ JUMP_43X39

U26 @

L21 1 2
40mil
1
(output = 300 mA)
+5VS IN
FBMA-L11-201209-221LMA30T_0805
OUT
5 +VDDA 4.75V +3VS_DVDD
1 1 2 40mil C1180
GND
C1179 C458 3 4 1 2 L23
0.1U_0402_16V4Z 0.1U_0402_16V4Z SHDN BYP MBK1608121YZF_0603
2 2 APL5151-475BC-TRL_SOT23-5 @ +3VS_DVDD 1 2
2.2U_0603_6.3V6K +3VS

1 1 1

HD Audio Codec C468


0.1U_0402_16V4Z
C1181
0.1U_0402_16V4Z
C465
10U 6.3V M X5R 0603 H0.8
2 2 2 L29 271@
+AVDD_HDA MBK1608121YZF_0603
L24 PVDD1_AUDIO 1 2 +5VS
MBK1608121YZF_0603
1 2
40mil
+VDDA
20mil 20mil 1 1 1 1
C 271@ 271@ 271@ 271@ C
1 1 1
C1044 C1045 C1046 C1047
C1182 C466 C467 0.1U_0402_16V4Z 10U 6.3V M X5R 0603 H0.8 0.1U_0402_16V4Z 10U 6.3V M X5R 0603 H0.8

25

38

9
10U 6.3V M X5R 0603 H0.8 0.1U_0402_16V4Z 0.1U_0402_16V4Z U27 2 2 2 2
2 2 2

DVDD_IO
AVDD1

AVDD2

DVDD
AMP_LEFT (23,24)

(9) DMIC_CLK
14 NC LINE_OUT_L 35
L30 271@
15 36 MBK1608121YZF_0603
NC LINE_OUT_R AMP_RIGHT (23,24)
PVDD2_AUDIO 1 2
SPKL- (23) +5VS
16 39 PVDD1_AUDIO 20mil
MIC2_L HP_OUT_L
SPKR+ (23)
17 41 271@ 1 0_0402_5%
2 R1398 20mil
MIC2_R HP_OUT_R
1 1 1 1
23 45 271@ 10_0402_5%2 R1399 271@ 271@ 271@ 271@
LINE1_L NC DMIC_CLK1
1 MIC@ 2 C1051 C1048 C1049
24 46 PVDD2_AUDIO FBMA-11-100505-401T1 0402 2 R442 0.1U_0402_16V4Z 10U 6.3V M X5R 0603 H0.8 0.1U_0402_16V4Z
LINE1_R DMIC_CLK DMIC_CLK (9) 2 2 2 2
FBMA-11-100505-401T 0402 CMIC@R441
18 43 271@ 1 2 R1400 0_0402_5%
CD_L NC
20
CD_R NC
44 20mil 271@ 1 2 R1329 0_0402_5%
SPKR- (23)
271@ C1050
R1330 2 1 20K_0402_1% 19 R1401 1 2 22_0402_5% 1 2 C470 22P_0402_50V8J 10U 6.3V M X5R 0603 H0.8
CD_GND
6 HDA_BITCLK_AUDIO (13,24)
MIC1_L MIC1_C_L 21 BIT_CLK
20mil
(23) MIC1_L
C471
1 2
4.7U_0603_6.3V6K MIC1_L
MIC1_R MIC1_C_R 22 HDA_SDIN0_AUDIO
20mil
(23) MIC1_R
C472
1 2
4.7U_0603_6.3V6K MIC1_R SDATA_IN
8 1
R1402
2
33_0402_5%
HDA_SDIN0 (13)
12 37 1 2 272@
(19,24) MONO_IN PCBEEP MONO_OUT
10mil R1331 0_0402_5% 271@ C490 2.2U_0402_6.3VM
B 7/04 Add C23 C23 @
LINE1_VREFO 29
MIC1_VREFO_L
1 2 B
10P_0402_50V8J 11 R1352 1 2 0_0402_5% @
(13,24) HDA_RST_AUDIO# RESET#
2 1 31 1 2
GPIO1 271@ C1052 1
(13,24) HDA_SYNC_AUDIO 10 SYNC 2 10U 6.3V M X5R 0603 H0.8
28 10mil C491
MIC1_VREFO_L MIC1_VREFO
(13,24) HDA_SDOUT_AUDIO 5 2.2U_0402_6.3VM
CMIC@ SDATA_OUT HP_RIGHT 272@
(9) DMIC_DATA MIC1_VREFO_R
32 20mil HP_RIGHT (23,24)
1 R438 2 FBMA-11-100505-401T 0402 2
39.2K +-1% 0402 2 R1332 DMIC_DATA1 GPIO0
(23) HP_PLUG# 1 271@ MIC@ 1 R439 2 FBMA-11-100505-401T 0402 3 30 10mil MIC1_VREFO_R
20K_0402_1% SENSE_A GPIO3 MIC2_VREFO
(23) MIC_PLUG# 2 R376 1 13 SENSE A
5.11K_0402_1% 2 R1404 1 272@ SENSE_B 34 27 CODEC_VREF
(23) HP_PLUG# SENSE B VREF
2 1
1 2 47 EAPD JDREF 40 1 2 SPKL+ (23)
C1053 271@ (17) EAPD R377 0_0402_5% R1333 1
2.2U_0402_6.3VM 1 2 48 33 HP_LEFT 0_0402_5% 20mil 1
(17,23) EC_MUTE# SPDIFO NC HP_LEFT (23,24)
R1334 0_0402_5% 271@ 20mil 271@ C474
1 2 4 26 C473 0.1U_0402_16V4Z
DVSS1 AVSS1

1
R1335 0_0402_5% 272@ 7 42 2
DVSS2 AVSS2 4.7U_0603_6.3V6K
272@ 2
ALC272-GR_LQFP48_9X9
20K_0402_1% R378
Sense Pin Impedance Codec Signals DGND AGND Follow Vendor ckeck change to 4.7uF 2010/05/24

2
2 1
R380 0_0603_5%
39.2K PORT-A (PIN 39, 41)
Change to SA00002CI20 ALC272-VA2-GR 2 1 2 1
20K PORT-B (PIN 21, 22) R382 0_0402_5% R379 0_0603_5%
SENSE A
10K PORT-C (PIN 23, 24) 2 1 2 1
R384 0_0402_5% R381 0_0603_5%
A A

5.1K PORT-D (PIN 35, 36)

39.2K PORT-E (PIN 14, 15) GND GNDA GND GNDA

20K PORT-F (PIN 16, 17) Compal Electronics, Inc.


SENSE B
Title
10K PORT-G (PIN 43, 44) <Title>
HD Audio Codec ALC272
Size Document Number Rev
5.1K PORT-H (PIN 45, 46) CustomLA-6421P 0.1
LA-6222P
Date: Thursday, June 03, 2010 Sheet 22 of 39
5 4 3 2 1
5 4 3 2 1

+5VAMP_J

1 1
272@ 272@
J12
C384 C385
+5VS 2 1 +5VAMP_J 10U 6.3V M X5R 0603 H0.8 0.1U_0402_16V4Z
2 1 2 2
@ JUMP_43X39
D D

+5VAMP_J Int. Speaker Conn.

1
272@
20mil

16
15
6
U79 @ R1405 @ R1406 JP20
100K_0402_5% 100K_0402_5% R1336 1 2 0_0603_5% SPK_L+ 1

PVDD1
PVDD2
VDD
272@ (22) SPKL+ R1338 1 0_0603_5% SPK_L- 1
2 2 2
C1183 (22) SPKL- R1337 1 0_0603_5% SPK_R+
2 3 5

2
0.47U_0603_10V7K (22) SPKR+ R1339 1 0_0603_5% SPK_R- 3 G1
2 4 6
GAIN0 (22) SPKR- 4 G2
1 2 7 RIN+ GAIN0 2
ACES_88266-04001
3 GAIN1 CONN@
272@ 272@ GAIN1

1
1 2 1 2 AMP_C_RIGHT 17 272@ 272@
(22,24) AMP_RIGHT C1184 R94 0_0402_5% RIN- SPKR+ R1407 R319
18
0.47U_0603_10V7K ROUT+ 100K_0402_5% 100K_0402_5%

272@ 14 SPKR-

2
C1185 1 ROUT- SPK_R- SPK_R+ SPK_L- SPK_L+
2 0.47U_0603_10V7K 9
LIN+
4 SPKL+
LOUT+

3
272@ 272@
1 2 1 2 AMP_C_LEFT 5
(22,24) AMP_LEFT C397 R83 0_0402_5% LIN- SPKL-
8
0.47U_0603_10V7K LOUT- D44 D45
PJDLC05C_SOT23-3 PJDLC05C_SOT23-3
20081029 Update to 6dB

NC 12

1
10 Keep 10 mil width
C EC_MUTE# BYPASS C
19 SHUTDOWN
(17,22) EC_MUTE# @ @
2
272@
GND5
GND1
GND2
GND3
GND4
C398
0.47U_0603_10V7K
1
21
20
13
11
1

TPA6017A2_TSSOP20

Headphone JACK
JHP1

272@
20mil 3

(22,24) HP_LEFT HP_LEFT 1 2 HPOUT_L_1 1 2 HPOUT_L_2 1


R1393 56.2_0402_1% L26 FBM-11-160808-700T_0603
(22,24) HP_RIGHT HP_RIGHT 1 2 HPOUT_R_1 1 2 HPOUT_R_2 2
R1408 56.2_0402_1% L25 FBM-11-160808-700T_0603 5
272@ 20mil HP_PLUG#
(22) HP_PLUG# 6
B
1 1 B
C485 C486 4 SHLD1
330P_0402_50V7K 330P_0402_50V7K
2 2
SINGA_2SJ2285-112252
CONN@
MIC1_VREFO MIC1_VREFO
6/19 Update Headphone connector
2

272@ 272@
D26 D27
RB751V-40TE17_SOD323-2 RB751V-40TE17_SOD323-2
1

1
1

R1409 R1410 MIC JACK


4.7K_0402_5% 4.7K_0402_5%
JMIC1
2

20mil L28 3
FBM-11-160808-700T_0603
1 2 MIC2_L_1 1 2 MIC2_L_2 1
(22) MIC1_L
R1411 1K_0603_1%
1 2 MIC2_R_1 1 2 MIC2_R_2 2
(22) MIC1_R
R404 1K_0603_1% L27 5
20mil FBM-11-160808-700T_0603
A MIC_PLUG# 6 A
(22) MIC_PLUG#
1 1
C488 C489 4 SHLD1
220P_0402_50V8J 220P_0402_50V8J
2 2
SINGA_2SJ2285-112252
CONN@ Compal Electronics, Inc.
Title
<Title>
6/19 Update MIC connector Amplifier & Audio Jack
Size Document Number Rev
CustomLA-6421P 0.1
LA-6222P
Date: Tuesday, June 22, 2010 Sheet 23 of 39
5 4 3 2 1
5 4 3 2 1

D D

HD Audio Codec
+3VS_DVDD

+AVDD_HDA
+3VS_DVDD

+AVDD_HDA 40mil
20mil 20mil

271@

25

38

9
U80

DVDD_IO
AVDD1

AVDD2

DVDD
14 35 AMP_LEFT (22,23)
NC LINE_OUT_L
15 NC LINE_OUT_R 36 AMP_RIGHT (22,23)
16 39 PVDD1_AUDIO
C MIC2_L HP_OUT_L PVDD1_AUDIO (22) C
17 41 N18123238 20mil
MIC2_R HP_OUT_R N18123238 (22)
23 45 N18123244 20mil
LINE1_L NC N18123244 (22)
24 46 PVDD2_AUDIO
LINE1_R DMIC_CLK PVDD2_AUDIO (22)
18 43 N18123239
CD_L NC N18123239 (22)
20 44 20mil N18123242
CD_R NC N18123242 (22)
N18123167 19
(22) N18123167 CD_GND
BIT_CLK 6 HDA_BITCLK_AUDIO (13,22)
MIC1_C_L 21
(22) MIC1_C_L MIC1_L
MIC1_C_R 22 8 HDA_SDIN0_AUDIO
(22) MIC1_C_R MIC1_R SDATA_IN HDA_SDIN0_AUDIO (22)
12 37 N18123190
(19,22) MONO_IN PCBEEP MONO_OUT N18123190 (22)
29 N17000325
LINE1_VREFO N17000325 (22)
(13,22) HDA_RST_AUDIO# 11
RESET#
GPIO1
31 10mil MIC1_VREFO_L
(13,22) HDA_SYNC_AUDIO 10
SYNC
MIC1_VREFO_L
28 10mil MIC1_VREFO
(13,22) HDA_SDOUT_AUDIO 5
SDATA_OUT HP_RIGHT
MIC1_VREFO_R
32 20mil HP_RIGHT (22,23)
N17000410 2
(22) N17000410 GPIO0
N18130106 3 30 10mil
N18130106 GPIO3 MIC2_VREFO MIC1_VREFO_R
SENSE_A 13
(22) SENSE_A SENSE_B SENSE A CODEC_VREF
(22) SENSE_B 34 27 CODEC_VREF (22)
SENSE B VREF
N16999461 47 40 N16999452
B (22) N16999461 EAPD JDREF N16999452 (22) B
48 33 HP_LEFT
SPDIFO NC HP_LEFT (22,23)
20mil
N18122593 4 26
(22) N18122593 DVSS1 AVSS1
7 42
DVSS2 AVSS2
ALC271X-GR QFN 48P CODEC

DGND AGND

Sense Pin Impedance Codec Signals


39.2K PORT-A (PIN 39, 41)

20K PORT-B (PIN 21, 22)


SENSE A
10K PORT-C (PIN 23, 24)
A A

5.1K PORT-D (PIN 35, 36)

39.2K PORT-E (PIN 14, 15)

20K PORT-F (PIN 16, 17) Compal Electronics, Inc.


SENSE B
Title
10K PORT-G (PIN 43, 44) <Title>
HD Audio Codec ALC271
Size Document Number Rev
5.1K PORT-H (PIN 45, 46) CustomLA-6421P 0.1
LA-6222P
Date: Thursday, June 03, 2010 Sheet 24 of 39
5 4 3 2 1
5 4 3 2 1

Change LAN chip to AR8152-L for NAV70/80 DDR3 2010/01/22


U14

2 1 PCIE_C_RXP1 30 38 LAN_ACTIVITY#
(13) PCIE_DTX_C_IRX_P1 TX_P LED_ACT#
C845 0.1U_0402_16V7K
2 1 PCIE_CRXN1 29 39 LAN_SK_LAN_LINK#
(13) PCIE_DTX_C_IRX_N1 TX_N LED_LINK10_100#
C851 0.1U_0402_16V7K
35 11 LAN_MDI0+ R629 1 2 49.9_0402_1%
(13) PCIE_ITX_C_DRX_P1 RX_P TRXP0 LAN_MDI0-
12 R630 1 2 49.9_0402_1% 1 2 C838 0.1U_0402_16V4Z
TRXN0 LAN_MDI1+ R631 49.9_0402_1%
(13) PCIE_ITX_C_DRX_N1 36 RX_N TRXP1 14 1 2
15 LAN_MDI1- R632 1 2 49.9_0402_1% 1 2 C839 0.1U_0402_16V4Z
CLK_PCIE_LAN TRXN1 R635 2.37K_0402_1%
(8) CLK_PCIE_LAN 33 REFCLK_P
D CLK_PCIE_LAN# D
(8) CLK_PCIE_LAN# 32 REFCLK_N RBIAS 10 2 1 close to Lan chip
R1428 0_0402_5%
(8) LAN_CLKREQ# 1 2 LAN_CLKREQ#_R 23 CLKREQ# W=40mils R635 keep away other singal (25mil)
1 +3V_LAN
PLTRST# VDD33
(4,5,13,15,17,26,27) PLTRST# 2
PERST# LX
LAN_WAKE# LX 40 W=40mils
(17) LAN_WAKE# 3
WAKE#
If SWR mode applied,
25 SMCLK W=40mils Mount L10, C881, C861, C393, C860, C877. No mount R680, C876. Place L10 close to Pin40.
26 5 +VDDCT
SMDATA VDDCT VDDCT_REG
VDDCT_REG 4
Change Y5 to SJ100003300 2010/04/06 28
TEST_RST
If LDO mode applied,
27 TESTMODE
Y5 41 24 +DVDDL W=30mils
LAN_X1 LAN_X2 GND DVDDL Mount C881, C393, R680, C876, C877. No mount L10, C861, C860.
1 2 37
LAN_X1 DVDDL_REG
7
25MHZ_20PF_7A25000012 LAN_X2 XTLO
8 XTLI
2 2 22 +AVDDH W=30mils
AVDDH
16 NC AVDDH_REG 9
C852 C853 17 LX 1 2 +VDDCT 1 2 VDDCT_REG
27P_0402_50V8J 27P_0402_50V8J NC L10
18
1 1 NC +AVDDL

0.1U_0402_16V4Z
19 31 W=30mils 4.7UH_1008HC-472EJFS-A_5%_1008 1000P_0402_50V7K 10U_0603_6.3V6M R680
NC AVDDL

0.1U_0402_16V4Z
20 34 SWR@ 1 1 1 0.1U_0402_16V4Z
1 0_0603_5% 1 C876 1
NC AVDDL C861 LDO@
21 NC AVDDL_REG 6

1U_0402_6.3V6K
13 C881 C399 C860 C877
NC
2 2 2 2 LDO@ 2 2
AR8152-AL1E SWR@ SWR@

AR8152L PN:SA00003JW10
C
close to Lan pin5 close to Lan pin40 C
close to Lan pin4
LAN Power circuit refer NAU00

W=40mils Change C865,C870,C873,C876 to SE000000K80 2010/04/06

+AVDDL +AVDDH +DVDDL


+3V_LAN

1U_0402_6.3V6K
1A C873 C870 C865

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
+3VALW R1429 1 2 0_0603_5% 1 1 1 1 1 1 1 1 1 1
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1U_0402_6.3V6K

1U_0402_6.3V6K
C856 C868 C863 C871 C872 C866 C867
1000P_0402_50V7K C847
2 2 2 2 2 2 2 2 2 2
1 1 1 1 1
C841 C848
1U_0402_6.3V6K

C340 C1205
2 2 2 2 2 close to Lan pin37 close to Lan pin24
close to Lan pin6 close to Lan pin31 close to Lan pin9
0.1U_0402_16V4Z close to Lan pin22

close to Lan pin34


close to Pin 1

Change C847 to SE000000K80 2010/04/06 close to JRJ45


@
2 1
C879
B 470P_0402_50V7K B

JRJ45
LAN_ACTIVITY# 2 1 11
R644 511_0402_1% Yellow LED+
T1 12
Yellow LED-
15
LAN_MDI1+ RJ45_MIDI1+ SHLD1
1 16 2 1 8
L32 LAN_MDI1- RD+ RX+ RJ45_MIDI1- R640 75_0402_5% PR4-
2 15 13
+VDDCT RD- RX- RJ45_CT0 R645 DETECT PIN1
2 1 3 CT CT 14 1 2 7 PR4+
MURATA_BLM18AG601SN1D_0603 4 13 5.1K_0402_5%
NC NC R639 75_0402_5% RJ45_MIDI1-
5 12 6
NC NC RJ45_CT1 PR2-
6 CT CT 11 1 2
LAN_MDI0+ 7 10 RJ45_MIDI0+ 5
LAN_MDI0- TD+ TX+ RJ45_MIDI0- PR3-
8 TD- TX- 9
1000P_0402_50V7K

1000P_0402_50V7K

1 For EMI. 4
PR3+
close to L2 C862
C875

350uH_NS0013LF 1000P_1206_2KV7K @ RJ45_MIDI1+ 3


PR2+
C1206

C1207
1U_0402_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 1 1 1 1 2 1
2 C883 RJ45_MIDI0- 2
PR1-
C882

C880

470P_0402_50V7K
@ @ RJ45_MIDI0+ 1
2 2 2 2 2 PR1+
14
SHLD1
+3V_LAN 2 1 R643 9 Green LED+
511_0402_1%
LAN_SK_LAN_LINK# 10
Green LED-
close to T1 @ SANTA_130452-3
2 1
C884
470P_0402_50V7K
Change C875 to SE000000K80 2010/04/06
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/7/7 Deciphered Date 2010/7/7 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN AR8152
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-6421P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, June 03, 2010 Sheet 25 of 39

5 4 3 2 1
5 4 3 2 1

Mini-Express Card for WWAN


D R402 0_0402_5% D
EC_TX_P80_DATA 1 2 EC_TX_P80_DATA_R
(17) EC_TX_P80_DATA EC_RX_P80_CLK
(17) EC_RX_P80_CLK 1 2 EC_TX_P80_CLK_R
R403 0_0402_5%

Mini-Express Card for WLAN

+3VS_WLAN +1.5VS

1 1 1 1 1 1
C195 C1189 C1043 C1069 C1070 C1071
4.7U_0603_6.3V6K 0.1U_0402_16V4Z 47P_0402_50V8J 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 47P_0402_50V8J
2 2 2 2 2 2

C C

J9
JUMP_43X79
JMINI2 @
1 2 +3VS_WLAN 1 1
(13,15) ICH_PCIE_WAKE# 1 2 2 2 +3VS
3 4
3 4
(15,17) BT_ON# 2 R1453 1 5 5 6 6 +1.5VS
(8) WLAN_CLKREQ# @ 0_0402_5% 7 8
7 8
9 10
9 10
(8) CLK_PCIE_WLAN# 11 12
11 12
(8) CLK_PCIE_WLAN 13 14
13 14
15 16
15 16

17 18
17 18
19 20 WL_OFF# (17)
19 20
21 22 PLTRST# (4,5,13,15,17,25,27)
21 22
(13) PCIE_DTX_C_IRX_N2 23 24
23 24
25 26
(13) PCIE_DTX_C_IRX_P2 25 26
27 28
27 28
29 29 30 30 MINI_SMBCLK (15)
(13) PCIE_ITX_C_DRX_N2 31 32 MINI_SMBDATA (15)
31 32
(13) PCIE_ITX_C_DRX_P2 33 34
33 34 USB20_N7_R 0_0402_5%1 R326 2 NON3G@
35 36
35 36 USB20_P7_R 0_0402_5%1 R325 NON3G@ USB20_N7 (13)
37 38 2
+3VS_WLAN 37 38 USB20_P7 (13)
39 40
B 39 40 B
41 41 42 42 1 R1356 2 WWAN_LED# (15,16)
43 44 0_0402_5%
43 44

2
1 45 46 @
45 46
47 47 48 48 R1362 12/09
C1072 EC_TX_P80_DATA_R 49 50
10U_0603_6.3V6M EC_TX_P80_CLK_R 49 50 0_0402_5%
2
51
53
51 52
52
55
(9~16mA)

1
G1 G3
1

54 56
R1325 G2 G4
100K_0402_5% BELLW_80052-1021 WLAN_LED# (15,16)
CONN@
2

5/12
6/1
6/12
、 、 、 、
Update WLAN connector(the same as KAV60)
Revised 37 39 41 42 43 to NC
Update connector to DC040006S00
6/26 Update JMINI1 footprint
7/01 update pin 23,25,31,33

A A

Compal Electronics, Inc.


Title
<Title>
WLAN
Size Document Number Rev
CustomLA-6421P 0.1
LA-6222P
Date: Monday, June 07, 2010 Sheet 26 of 39
5 4 3 2 1
5 4 3 2 1

TPM1.2 on board
R1457
+3VS 1 2 0_0603_5%
TPM@
Change Y7 to SJ132P7KW10 2010/04/06
D D
TPM@ +3VALW
1 2 TPM_XTALI
C1208 22P_0402_50V8J

Y7

1
TPM@
R1431
2 NC OSC 1 1 1 1 1

0.1U_0402_16V4Z
C1209 TPM@

0.1U_0402_16V4Z
C1210 TPM@

0.1U_0402_16V4Z
C1211 TPM@

0.1U_0402_16V4Z
C1212
10M_0402_5%
3 4 TPM@
NC OSC TPM@ ALS (Ambient Light Sensor)

2
32.768KHZ_12.5PF_Q13MC14610002 2 2 2 2

1 2 TPM_XTALO
C1213 22P_0402_50V8J
TPM@

24
19
10

5
Place closed to EC U81 TPM@

VSB
VDD
VDD
VDD
TPM@1 R1450 2 0_0402_5% 26
(13,17) LPC_AD0 LAD0
TPM@
TPM@1 R1451 2 0_0402_5% 23
(13,17) LPC_AD1 LAD1
TPM@1 R1448 2 0_0402_5% 20 JP22
(13,17) LPC_AD2 LAD2 TPM_GPIO +3VS
TPM@1 R1449 2 0_0402_5% 17 6 TPC12 T86 +3VS 1
(13,17) LPC_AD3 LAD3 GPIO TPM_GPIO2 1
TPM@1 R1452 2 0_0402_5% 22 2 TPC12 T87 2
(13,17) LPC_FRAME# LFRAME# GPIO2 (5,17) EC_SMB_CK2 2
TPM@ R1432
(4,5,13,15,17,25,26) PLTRST# 16 LRESET#
Base I/O Address (5,17) EC_SMB_DA2 3 3

1
1 2 LPC_PD# 28 0 = 02Eh 4
+3VS LPCPD# (17) LIGHT_SENSOR_INT# 4
4.7K_0402_5%
(12,17) SERIRQ 27
SERIRQ
1 =* 04Eh R1433 5
5
8/31 HP
(8) CLK_PCI_TPM CLK_PCI_TPM 21 4.7K_0402_5% 6
LCLK GND1
7
@ 1 2 2 1 SLB 9635 TT 1.2 R1434 R1436 GND2

2
+3VS 10P_0402_50V8J C1214 R1435 10_0402_5% 15 8 1 2 1 2
C @ CLKRUN# TEST1 0_0402_5% 4.7K_0402_5% ACES_88266-05001 C
TESTB1/BADD 9
@ TPM@
1

7 TPM@
R1437 PP
@ 4.7K_0402_5% 3
TPM_XTALO NC
14 12
XTALO NC
1
2

TPM_XTALI NC
13
XTALI/32K IN
1

GND
GND
GND
GND
R1438
0_0402_5%
SLB 9635 TT 1.2_TSSOP28

25
18
11
4
2

6/30 HP
R1438 mount 2010/05/06

ST LIS33DE(G-Sensor)
B B

C1215 C1216 R1458


1 2 0_0603_5% +3VS
GSEN@
GSEN@

10U_0603_6.3V6M

GSEN@

0.1U_0402_16V4Z

1 1

2 2

U82 GSEN@
14
VDD G_SENSOR_INT#
11 G_SENSOR_INT (11)
INT_1
1
GSEN@ VDD_IO
9
R1439 1 INT_2
+3VS 2 3.4K_0402_1% 8
CS
2 1 I2C_DATA_GS 6
(7,8,15) CLK_SMBDATA SDA/SDI/SDO
R1440 GSEN@ 0_0402_5% 7
I2C_CLK_GS SDO/SA0
(7,8,15) CLK_SMBCLK 1 2 4
R1441 GSEN@ 0_0402_5% SCL/SPC
2 NC_1
3 5
NC_2 GND_1
Add R1440, R1441 1/13 GND_2
12
10 13
RSVD_1 GND_3
15 16
RSVD_2 GND_4
A A
LIS331DLTR_LGA16_3X3

P/N SA00003VT00

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2009/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TPM/G-Sensor/Light sensor
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-6421P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, June 03, 2010 Sheet 27 of 39
5 4 3 2 1
Modify Hole location by (ME Drawing 06/12) 0615

H8 H2 H23 H4
H H_2P8 H_2P8 H_2P8
H_3P2X3P7N H_2P8
@
1

1
H16 H9 H1
H H H
H_2P6
@ @ @
H5
1

H_3P2N H_3P2N

1
H7 H17
H H

@ @
1

H22
H_3P2x3P5N
H_3P2X3P5N
09/03 Del H12
1

H18 H19
H H

H_3P2 @ @
1

H24
H_3P4X3P2N H_3P4X3P2N
1

H3
H
H_3P2
@
1

FM2 FM4 FM3 FM1

@ @ @ @ FIDUCIAL_C40M80

1
H11
H
H_3P3N
@
1

H20
H
Security Classification Compal Secret Data Compal Electronics, Inc.
H_3P4X3P2N Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Screw
1

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, March 25, 2010 Sheet 28 of 39
A B C D E

Change R51 R57 R70 R63 R317 R114 R190 to 0402 SIZE 04/30
Change C221 C218 C223 C 191 C201 C170 C392 C393 C394 to 0603 SIZE 04/30

+5VALW TO +5VS +3VALW TO +3VS


1 1
+5VALW +5VS +3VALW +3VS

SI4800BDY-T1-E3_SO8 Q19 SI4800BDY-T1-E3_SO8 Q15


8 1 8 1
7 2 7 2

2
1U_0603_10V6K
C176
6 3 1 1 6 3 1 1
470_0402_5% 470_0402_5%

1U_0603_10V6K
1 1 5 C223 C219 1 1 5 C170
C221 C218 C191 C201
10U_0603_6.3V6M R190 10U_0603_6.3V6M R114

4
10U_0603_6.3V6M 2 2 10U_0603_6.3V6M 10U_0603_6.3V6M 2 2

3 1
2 2 2 2
10U_0603_6.3V6M

3
Q12B
+VSB 1 2 5VS_GATE Q17B R139 2N7002DW-T/R7_SOT363-6 5 SUSP
R187 2N7002DW-T/R7_SOT363-6 5 SUSP 1 2
+VSB
22K +-5% 0402 1 33K +-5% 0402

4
6

C208 @ 1

4
2

6
300K_0402_5%

C179

2
300K_0402_5%
Q17A R109 0.1U 25V K X5R 0402
2

R111
SUSP 2 @ Q12A 0.1U 25V K X5R 0402
SUSP 2 2
2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
1

1
+5VALW

2
R141
Change Q12,Q14,Q17,Q28 to SB00000DH00 2010/04/06 100K_0402_5%
2 2
+1.5V to +1.5VS

1
Change C176,C219,C395 to SE080105K80 2010/04/06
+1.5V +1.5VS
SYSON#
SI4800BDY-T1-E3_SO8 Q27
8 1
7 2 1 1
2

6 3 C394 C395

6
5 470_0402_5%
1 1
1U_0603_10V6K

C392 C393 10U_0603_6.3V6M ADD +5VS +VCCP +0.89V Cap for EMI
10U_0603_6.3V6M

2 2 R317
10U_0603_6.3V6M

Q14A
4

SYSON 2
(7,17,34) SYSON
1

2 2 2N7002DW-T/R7_SOT363-6

1
3

+VCCP +0.89V +1.5V


+5VS +1.5V
Q28B
2N7002DW-T/R7_SOT363-6 5 SUSP 1 1 1
+VSB 1 @ C1173 @ C1174 @ C1175 1
R318 @ C1172 @ C1176
4

0.01U_0402_25V7K

0.01U_0402_25V7K

0.01U_0402_25V7K
47K +-5% 0402 1 2 2 2
R112 300K_0402_5%

0.01U_0402_25V7K

0.01U_0402_25V7K
C396
6

2 2
0.1U 25V K X5R 0402
Q28A @ 2
SUSP 2
2N7002DW-T/R7_SOT363-6 +0.75VS
1
1

3 3

+3VLP
VL

2
R172 R173
100K_0402_5% 100K_0402_5%
@

1
+1.8VS +VCCP +0.75VS +1.5V SUSP
(35) SUSP
2

3
470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5%

R51 R57 R70 R63 Q14B


(17,34,35) SUSP# 5
2N7002DW-T/R7_SOT363-6
1

4
3

Q6B Q6A Q8B Q8A


2N7002DW-T/R7_SOT363-6 5 SUSP 2 SUSP 5 SUSP 2 SYSON#
@ @
@ @ 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
4

4 4
Change Q6,Q8 to SB00000DH00 2010/04/06

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Thursday, June 03, 2010 Sheet 29 of 39
A B C D E
A B C D

1 1

VIN
PL1
HCB2012KF-121T50_0805
DC_IN_S1 1 2

SP02000GC00
PJP1

1
6 GND 4 4
5 3 PC3 PC4 PC5 PC6
GND 3 1000P_0402_50V7K 100P_0402_50V8J 100P_0402_50V8J 1000P_0402_50V7K
2

2
2
1 1

ACES 88266-04001
CONN@

2 2

- PBJ1 + +RTCBATT
2 1 +RTCBATT

ML1220T13RE
45@

PJ1 PJ2
VIN +3VALWP 2 2 1 1 +3VALW +5VALWP 2 2 1 1 +5VALW
JUMP_43X118 JUMP_43X118

.1U_0402_16V7K

.1U_0402_16V7K
1

1
2

PC194

PC193
PD2

2
RLS4148_LL34-2
1
1

3 3

PR10 PR11
68_1206_5% 68_1206_5% PJ4
PD3 PJ3 +VCCPP 2 1
RLS4148_LL34-2 PQ1 2 1 +VCCP
+1.5VP 2 1 +1.5V
2

2 1 JUMP_43X118

.1U_0402_16V7K

1
BATT+ N1 JUMP_43X118

.1U_0402_16V7K
2 1 3 1
VS

PC196
PC195

2
1

2
1

PR13 PC13
100K_0402_1% 0.22U_0603_25V7K PC14
0.1U_0402_25V6
2

PR14 TP0610K-T1-E3_SOT23-3
2

22K_0402_1%
1 2
(18) 51ON# PJ5 PJ9

+0.89VP 2 2 1 1 +0.89V +1.8VP 2 2 1 1 +1.8VS


1 330U_B2_2.5VM_R15M JUMP_43X79 JUMP_43X79

.1U_0402_16V7K

.1U_0402_16V7K
1

1
+
PC276

PC197

PC198
@

2
2
PR16 PR17
560_0603_5% 560_0603_5%
1 2 1 2 +3VLP
+CHGRTC
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN & DETECTOR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 30 of 39
A B C D
A B C D

PH1 under CPU botten side :


CPU thermal protection at 92 degree C
Recovery at 72 degree C

VMB VL
1
PJP2 PL2 1

1 HCB2012KF-121T50_0805
1
2 2 BATT_S1 1 2 BATT+
3 B/I
3 TS
4 4

1
5 EC_SMCA
5 EC_SMDA PC21 PC22 PC23 PR28 PR29
6 6
7 1000P_0402_50V7K 0.01U_0402_25V7K 0.1U_0603_25V7K VL 10K_0402_1% 22.1K_0402_1%

2
7
8 8
9

2
GND

2
10 PU3
GND @ PR23 1 VCC TMSNS1 8
SUYIN_200275MR008G15QZR 100K_0402_1%
2 GND RHYST1 7 2 1
2

1
3 6 PR31
OT1 TMSNS2
PR21 PR22 (33) MAINPWON 15K_0402_1%
100_0402_1% 100_0402_1% 4 5 2 1
OT2 RHYST2
1

G718TM1U_SOT23-8 @ PR169
1

PR25 47K_0402_1%
PR220 6.49K_0402_1%
1K_0402_5% 2 1 +3VALW P

1
PH2 @ PH1
2

100K_0402_1%_NCP15W F104F03RC 100K_0402_1%_NCP15W F104F03RC


PR27

2
1K_0402_1%
2

2 2

BATT_TEMP (17)

EC_SMB_CK1 (17)

EC_SMB_DA1 (17)

@ PR236
0_0805_5%
1 2

PQ3

B+ 3 1 +VSB
1

PR30
100K_0402_1% PC200
TP0610K-T1-E3_SOT23-3 0.1U_0402_25V6
2

VL
2

PR32
22K_0402_1%
2

3 3

PR34
1

100K_0402_1%
1

D
1

2 PQ4
(33) SPOK G 2N7002W -T/R7_SOT323-3
S
3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 31 of 39
A B C D
A B C D

B+

P2 SI7121DN-T1-GE3_POW ERPAK8-5 P3 B+ CHG_B+ SI7121DN-T1-GE3_POW ERPAK8-5


PD9 PQ10 PR57 0.05_1206_1% PJ8 PQ11
VIN 2 1 1 1 4 2 2 1 1 1
2 2
B340A_SMA2 3 5 2 3 JUMP_43X118 CSIN 3 5

0.1U_0603_25V7K
CSIP PR58

5600P_0402_25V7K

2200P_0402_25V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K
4

4
PC165
47K_0402_1%

1
1 1

PQ12

0.1U_0603_25V7K
1 2
VIN VIN
1

PC52

PC50

PC53

PC54
DTA144EUA_SC70-3

PC51
PR60 @ PD10

191K_0402_1%
1

2
PR59 2 200K_0402_1% 1SS355TE-17_SOD323-2

1
47K_0402_1% PR62 1 2 ACOFF

2
6251VDD 10K_0402_1%
2

PR221
PR64 @

1 1
PD1 200K_0402_1%
1

2
1
ACSETIN RB751V-40_SOD323-2 ACSETIN

1000P_0402_25V8J
1 2 VIN
1

@ PD12 PC55

1 1

1
1SS355TE-17_SOD323-2 2.2U_0603_6.3V6K @ PD13

14.3K_0402_1%
2

1
PC209
10_1206_5%
1 2 PQ16 1SS355TE-17_SOD323-2

PR222

PR223
DTC115EUA_SC70-3 2 1 2
Vin1 2 PR65

2
PQ15 10K_0402_5%

2
DTC115EUA_SC70-3 2 1 PU5

2
(17) FSTCHG @

0.1U_0603_25V7K
3
1

1
D DCIN D
1 2 1 24 2 1
3

VDD DCIN
1

1
PC58
2 PACIN

100K_0402_1%
2
G @ PC56 PC57 G

PR67
S PQ17 PR66 .1U_0402_16V7K 2 23 ACPRN 0.22U_0603_25V7K S @ PQ18
3

3
2N7002W -T/R7_SOT323-3 150K_0402_1% ACSET ACPRN PR68 2N7002W -T/R7_SOT323-3
20_0402_5% PR84
2

2
6251_EN 3 22 1 2 CSON 0_0402_5%
EN CSON

5
PC59 Vin1 1 2
0.047U_0402_16V7K
4 21 1 2 CSOP

1
CELLS CSOP PR69
PC60 6800P_0402_25V7K 20_0402_5% PQ19
1 2 5 20 2 1 4 AON7408L_DFN8-5
ICOMP CSIN
1

2
2
PQ20 D PR70 2

2 PC61 PR71 6.81K_0402_1% PC62 20_0402_5%


G 2N7002W -T/R7_SOT323-3 1 2 1 2 6 19 0.1U_0603_25V7K1 2

1
PR73 VCOMP CSIP PR72 PL5
S
3

3
2
1
0.01U_0402_25V7K 1 2 100_0402_1% 2_0402_5% 8.2UH_FDV0630-8R2M=P3_3.7A_20% PR74 0.05_1206_1% BATT+
PC63 1 2 7 18 LX_CHG 1 2 CHG 1 4
PR75 @ 100P_0402_50V8J ICM PHASE

4.7_1206_5%
5

1
22K_0402_5% (17) ADP_I 2 3

PR76
PACIN 1 2 PC64 6251VREF 8 17 DH_CHG

AON7408L_DFN8-5
PACIN VREF UGATE
PR77 1 2 PR78 PC65
62K_0402_1% 0_0603_5% 0.1U_0603_25V7K

10U_1206_25V6M

10U_1206_25V6M
PQ21
2 1 .1U_0402_16V7K 9 16 BST_CHG 1 2 BST_CHGA 2 1

2
(17) IREF CHLIM BOOT
1

1
PQ22 PR79 4

1
PC67

PC68
DTC115EUA_SC70-3 38.3K_0402_1% PD14
0.01U_0402_25V7K

1
6251VREF 1 6251aclim 6251VDDP RB751V-40TE17_SOD323-2

680P_0402_50V7K
2 10 ACLIM VDDP 15
1

PC66

2
1

1
PC69

ACOFF 2 PR80 1 26251VDD


(17) ACOFF

3
2
1

2
100K_0402_1% PR81 11 14 DL_CHG
VADJ LGATE

2
20K_0402_1% PR82
2

4.7_0603_5%
2

12 13 PC70
3

1
GND PGND 4.7U_0603_6.3V6K

ISL6251AHAZ-T_QSOP24

3 Iada=0~1.58A(30W) CP = 85%*Iada ; CP = 1.343A 3

PR83
15.4K_0402_1%
CP mode 1 2 Vth,rise(typical) = ((191K/14.3K)+1)*1.26
Vaclim=2.39*(20K/(20K+38.3K))=0.8199V (17) CALIBRATE#
2

= 18.89V
Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05) PR85
where Vaclm=0.8199V, Iinput=1.343A 31.6K_0402_1% Vth,fall(typical) = ((191K/14.3K)+1)*1.26 -3.4uA*191K
= 17.43V
1

CC=0.3~1.76A 6251VDD

IREF=1.62*Icharge PR224
10K_0402_1%
IREF=0.486V~2.85V
1

1 2 ACIN (13,17)
PR225
3.24V==>2A 100K_0402_1% PR226
10K_0402_1%
PACIN
2

1 2

D
Charging Voltage
1

ACPRN 2
BATT Type CV mode PR227
(0x15) G
S PQ32 20K_0402_1%
3

SSM3K7002FU_SC70-3
2

4
Normal 3S LI-ON Cells 4

12600mV 12.60V

VADJ-->VREF-->4.41V
-
Security Classification Compal Secret Data Compal Electronics, Inc.
VADJ--->Ground--->3.99V Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

Vcell=(0.175*VADJ+3.99) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 32 of 39
A B C D
5 4 3 2 1

2VREF_51125

0.22U_0603_10V7K
D D

1
PC202

2
PR41 PR42
13K_0402_1% 30K_0402_1%
1 2 1 2

PR43 PR44
B++ 20K_0402_1% 19.6K_0402_1%
1 2 1 2 B++
PL11
HCB2012KF-121T50_0805
B+ 1 2 +3VLP

4.7U_0805_25V6-K @
ENTRIP2

ENTRIP1
@

PR228 PR229
2200P_0402_50V7K

2200P_0402_50V7K
0.1U_0603_25V7K

0.1U_0603_25V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
143K_0402_1% 158K_0402_1%
PC163

PC164
1 2 1 2

4.7U_0805_10V6K
1

1
PC29

PC30

PC31

PC32

PC33

PC34
2

2
5

5
PU4

PC203

1
C C

ENTRIP2

VFB2

TONSEL

VFB1

ENTRIP1
VREF
PQ5 25
AON7408L_DFN8-5 P PAD

2
PQ6
4 7 24 4 AON7408L_DFN8-5
VO2 VO1 SPOK (31)
8 23 PR40 PC41
PR39 VREG3 PGOOD 0_0603_5% .1U_0402_16V7K
1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2
1
2
3

3
2
1
0_0603_5% VBST2 VBST1
PL3 PC40 UG_3V 10
VFB=2.0V 21 UG_5V PL4
8.2UH_FDV0630-8R2M=P3_3.7A_20% .1U_0402_16V7K DRVH2 DRVH1 8.2UH_FDV0630-8R2M=P3_3.7A_20%
1 2 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP LL2 LL1
1

1
LG_3V LG_5V
4.7_1206_5%

12 19

4.7_1206_5%
DRVL2 DRVL1
PR37

PR38
SKIPSEL

VREG5
150U_B2_6.3VM_R45M

VCLK
1 1

GND

150U_B2_6.3VM_R45M
EN0

VIN
2

2
+ +
PC39

PC44
2 2
TPS51125RGER_QFN24_4X4

13

14

15

16

17

18
1

1
PR230
680P_0402_50V7K

680P_0402_50V7K
2 499K_0402_1% 2
PC42

PC43
PQ7 1 2 PQ8
2

2
AON7702L_DFN8-5 AON7702L_DFN8-5
B+

1
100K_0402_1%
1 2

1U_0603_10V6K
VL

1
PC204

1
PR231
PR232

PC205
4.7U_0805_10V6K
B @ 0_0402_5% B

2
2

2
B++

1
ENTRIP1 ENTRIP2

0.1U_0603_25V7K
2
PC206
2VREF_51125

PQ33 D D
1

PQ34
2 2
2N7002W -T/R7_SOT323-3 G G 2N7002W -T/R7_SOT323-3
S S
3

+3.3VALWP Ipeak=5.731A Imax=4.012A +5VALWP Ipeak=7.0A Imax=4.9A


Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical) Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
VL 2 1 Vtrip=(10E-06 * 130K)/9-24mV=134.9mV Vtrip=(10E-06 * 147K)/9-24mV=151mV
PR233
Ilimit=134.9mV/17.9m ~134.9mV/14.5m x 1.2 Ilimit=151mV/17.9m ~151mV/14.5m x 1.2
100K_0402_1% =7.536A ~ 7.752A =8.467A ~ 8.710A
Iocp=Ilimit+Delta I/2 Iocp=Ilimit+Delta I/2
=8.081A ~ 8.297A =9.384A ~ 9.627A
1

A (31) MAINPWON Delta I=1.090A (Freq=305KHz) Delta I=1.834A (Freq=245KHz) A

1 2 2
VS
PR234
40.2K_0402_1%

0.01U_0402_16V7K
1

100K_0402_1% PQ35
Security Classification Compal Secret Data Compal Electronics, Inc.
1

DTC115EUA_SC70-3
PR235

@ PC207

Issued Date 2007/11/12 Deciphered Date 2008/11/12 Title


+5V/+3V
2
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 33 of 39
5 4 3 2 1
A B C D

PL12
HCB2012KF-121T50_0805
1.5V_B+ 1 2 B+

0.1U_0603_25V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K
2200P_0402_50V7K

PC75 @

PC166
1

1
PC74
PC73
5

2
PR89
300K_0402_5% 4
1 1 2 1

PR90 PR91 PQ23


1K_0402_1% 0_0603_5% AON7408L_DFN8-5
1 2 BST_1.5V 1 2
(7,17,29) SYSON

3
2
1
1

1
PR92 PL6

15

14
1
30K_0402_5% PC77 PU6 PC76 2.2U_FDV0630-2R2M-P3_7.2A_20%
1U_0402_6.3V6K BST_1.5V-1 1 2 1 2

EN/DEM

NC

BOOT
+1.5VP

2
2
2 13 DH_1.5V 0.1U_0603_25V7K
TON UGATE

4.7_1206_5%
PR94 3 12 LX_1.5V
VOUT PHASE

PR93
100_0603_1% 1
1 2 4 11 1 2 +5VALW

220U_B2_2.5VM_R35
AON7702L_DFN8-5
+5VALW VDD CS +

PC78
PR95

2
5 10 8.66K_0402_1%
FB VDDP

1
DL_1.5V 2

680P_0603_50V7K
6 PGOOD LGATE 9 2

PGND
(7) +1.5V_PG

PQ24

PC80
PC79

GND
1

10K_0402_5%
4.7U_0603_6.3V6K

2
1
PR216
RT8209BGQW _W QFN14_3P5X3P5 PC82

1
4.7U_0805_10V6K

2
<Vo=1.5V> VFB=0.75V

2
Vo=VFB*(1+PR96/PR97)=0.75*(1+3.48K/3.48K)=1.5V
Fsw=328KHz +1.5V
PR96
Cout ESR=15m ohm 3.48K_0402_1%
1 2
Rdson(max)=17.9m Rdson(typical)=14.5m
2
Ipeak=4.97A, Imax=3.479A, Iocp=5.964A 2
1

Delta I=((19-1.8)*(1.8/19))/(2.2u*328K)=2.259A
=>1/2DeltaI=1.129A PR97
3.48K_0402_1%
Vtrip=Rtrip*10uA=8.66K*10uA=0.0866V
2

Iocpmin=Vtrip/(Rdsonmax)+1.129 PL13
=0.0866/(0.0179)+1.129=5.967A HCB2012KF-121T50_0805
+VCCP_B+ 1 2 B+
Iocpmax=(0.0866/(0.0145*1.2))+1.129A=6.106A
Iocp=5.967A~6.106A

2200P_0402_50V7K

0.1U_0603_25V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K
PC85 @

PC167
1

1
PC84
PC83
5

2
PR98
300K_0402_5% 4
1 2
PR99 PR100 PQ25
4.7K_0402_1% 0_0603_5% AON7408L_DFN8-5
1 2 BST_1.05V 1 2
17,22,36 SUSP#

3
2
1
1

PR101 PC87 PL7


15

14
1

100K_0402_5% PC86 PU7 0.1U_0603_25V7K 1UH_FDV0630-1R0M-P3_10.3A_20%


1U_0402_6.3V6K BST_1.05V-1 1 2 1 2
EN/DEM

NC

BOOT

+VCCPP
2
2

DH_1.05V

4.7_1206_5%
2 TON UGATE 13

1
3 3

PR102
PR103 LX_1.05V

220U_B2_2.5VM_R15M
3 VOUT PHASE 12 1

3
100_0603_1%
+

PC88
1 2 4 11 1 2 +5VALW

AON7702L_DFN8-5
+5VALW VDD CS PR104

2
5 10 14K_0402_1%
FB VDDP 2
1

1
DL_1.05V

680P_0603_50V7K
6 PGOOD LGATE 9 2
PGND

PQ26

PC90
PC89
GND

4.7U_0603_6.3V6K
2

2
RT8209BGQW _W QFN14_3P5X3P5 1 PC92
7

1
4.7U_0805_10V6K
2

PR105
3.48K_0402_1%
1 2
1

PR106
8.25K_0402_1%
<Vo=1.05V> VFB=0.75V
2

Vo=VFB*(1+PR105/PR106)=0.75*(1+3.48K/8.25K)=1.05V
Fsw=280KHz

Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m


4 Ipeak=3.124A, Imax=2.187A, Iocp=3.749A 4

Delta I=((19-1.05)*(1.05/19))/(1.5u*280K)=3.549A
=>1/2DeltaI=1.774A
Vtrip=Rtrip*10uA=14K*10uA=0.14V
Iocpmin=Vtrip/(Rdsonmax)+1.774 Security Classification Compal Secret Data Compal Electronics, Inc.
=0.14/(0.0179)+1.774=9.596A Issued Date 2007/09/20 2008/09/20 Title
Deciphered Date
Iocpmax=(0.14/(0.0145*1.2))+1.774A=9.820A 1.5VP / +VCCPP
Iocp=9.596A~9.820A THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 34 of 39

A B C D
5 4 3 2 1

(17) +0.89V_PG

+3VALW 2 1

@ PR215
D
100K_0402_1% D

PU8 PL8 <Vo=0.89V> VFB=0.6V


PJ6

4
1UH_FDV0630-1R0M-P3_10.3A_20%
2 1 10 2 LX_SY8033B 1 2
Vo=VFB*(1+PR114/PR115)=0.6*(1+30.1K/61.9)=0.89V
+5VALW

PG
2 1 PVIN LX +0.89VP
JUMP_43X79 Ipeak=2.64A, Imax=1.848A

68P_0402_50V8J
9 PVIN LX 3

1
4.7_1206_5%
1

1
PC100
PC99 8 SVIN

PR107
22U_0805_6.3VAM PR114
2 6 30.1K_0402_1%

2
FB @

22U_0805_6.3VAM

22U_0805_6.3VAM
5

2
EN

1
NC

NC
TP

PC98

PC208
FB_SY8033B
(17,29,34) SUSP#

11

2
1 2 EN_SY8033B

1
SY8033BDBC_DFN10_3X3

LX_SY8033B

1
PR108 200K_0402_5%

680P_0603_50V7K
0.1U_0402_10V7K
2

PC96

PC81
PR115

1
PR125 61.9K_0402_1%

2
@ 47K_0402_5%

2
2
1

C C
PU10 PL14
PJ7
4
1.1UH_LFA915AY-H-1R1M=P3_4.07A_20%
2 1 10 2 LX_1.8V 1 2
+3VALW 2 1 PVIN PG LX +1.8VP <Vo=1.8V> VFB=0.6V
JUMP_43X79

22P_0402_50V8J
9 3
PVIN LX Vo=VFB*(1+PR118/PR120)=0.6*(1+124K/61.9)=1.8V

1
4.7_1206_5%
1

1
PC107
PC106 8 SVIN Ipeak=0.318A, Imax=0.223A

PR110
22U_0805_6.3VAM PR118
6 124K_0402_1%
2

2
FB @

22U_0805_6.3VAM

22U_0805_6.3VAM
5

2
EN

1
NC

NC
TP

PC108

PC210
FB_1.8V
(17,29,34) SUSP#
11

2
1 2 EN_1.8V

1
1
PR117 158K_0402_1%

680P_0603_50V7K
0.1U_0402_10V7K
2

PC109

PC91
SY8033BDBC_DFN10_3X3 PR120
1

PR119 61.9K_0402_1%

2
@ 47K_0402_5%

2
2
1

B
+1.5V B

PU11
1 6
VIN VCNTL
+3VALW
2 GND NC 5

1
PC111

1
PC110 3 7 1U_0603_6.3V6M
4.7U_0805_6.3V6K PR121 VREF NC

2
1K_0402_1% 4 8
VOUT NC
9

2
TP
APL5336KAI-TRL SOP

PR122

.1U_0402_16V7K
+0.75VS

1
0_0402_5% PQ29 D

(29) SUSP

PC112
PR123

10U_0805_6.3V6M

.1U_0402_16V7K
1 2 2

1
PC199
G 1K_0402_1% Ipeak=1A, Imax=0.7A

2
1

PC114
S

3
PC113 2N7002W -T/R7_SOT323-3

2
.1U_0402_16V7K
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+0.89VP/+1.8VP/+0.75VS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 35 of 39
5 4 3 2 1
A B C D E F G H

1 1

(5)

(5)

(5)

(5)

(5)

(5)

(5)
VR_ON (17)

CPU_VID0

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID4

CPU_VID5

CPU_VID6
+3VS

1 PR194

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%
4.7K_0402_1% +5VS

+CPU_B+ PL9
2

HCB2012KF-121T50_0805

2
PR195
0_0402_5%

PR196

PR197

PR198

PR199

PR201

PR202

PR203

PR204
1 2 B+
2 13211_PWRGD PR200

2200P_0402_50V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K
(5,8,13,17) VGATE
10_0603_1%

0.1U_0402_25V6
1

1
PC121

PC116

PC147

PC148
3211_EN

VID0

VID1

VID2

VID3

VID4

VID5

VID6

2
2 2

1
3211_VCC

5
+3VS PU12 PC182
1U_0805_25V6K
32

31

30

29

28

27

26

25

2
VID0

VID1

VID2

VID3

VID4

VID5

VID6
EN
1

24 PR206 PC183 4
PR205 VCC 0_0603_5% 0.22U_0603_25V7K PQ30
1
PWRGD
10K_0402_1% 23 CPU_BOOST 1 2CPU_BOOST-1
1 2 AON7408L_DFN8-5
BST
1

2
2

PC184 IMON 3211_DRVH PL10


22

3
2
1
1000P_0402_50V7K DRVH 2.2U_FDV0630-2R2M-P3_7.2A_20%
(8) CLK_ENABLE# 3
2

CLKEN# 3211_SW +CPU_COREP


21 1 2
4
SW +CPU_CORE
FBRTN

1
ADP3211AMNR2G_QFN32_5X5 20 +5VS
PVCC

3
1 2 3211_FB 5
FB 3211_DRVL PR124
19 2 1
DRVL
1

PC185 PC187 3211_COMP 6 4.7_1206_5%


390P_0402_50V7K 47P_0402_50V8J COMP PC186
18 LL=5.9m ohm

2
PGND 2.2U_0603_10V6K
7
2

1 2 1 23211_COMP-1
1 2
GPU
17 2 OCP=7.85A
AGND

1
3211_ILIM 8 VID:0.75V~1.1V
CSCOMP

PR208 PC188 PR207 ILIM PC115


33
CSREF

AGND Io(max)=6.04A
RAMP

LLINE

CSFB

1K_0402_1% 470P_0402_50V8J 28K_0402_1% 680P_0603_50V7K


IREF

RPM

2
PQ31
RT

1
AON7702L_DFN8-5
9

10

11

12

13

14

15

16
2

N4XX@
PR209
2.37K_0402_1%
3211_IREF

3211_RAMP

3211_CSCOMP

3211_CSFB

3211_CSCOMP
3211_RT
2 3211_RPM

PH4
3211_CSCOMP 1

N550@ 100K_0402_1%_NCP15WF104F03RC
PR209
1 2
80.6K_0402_1%

200K_0402_1%

274K_0402_1%
2

Avoid high dV/dt


PR210

3 3
PR211

PR212

Place RTH1 close to inductor


PR213
3.57K_0402_1% 35.7K_0402_1% on the same layer
1

2 1
499K_0402_1%
1

1
2

PR214

PR150 PR158
1

0_0402_5% 0_0402_5% PC190


220P_0402_50V7K PR217
2

PC189 75K_0402_1%
1

1000P_0402_50V7K
2

PR219 2 1
1K_0402_1%
+CPU_B+ 2 1 3211_RAMP-1 PR218
309K_0402_1%
(6) VSSSENSE

(6)VCCSENSE

Connect to input caps


1

PC191 PC192
1000P_0402_50V7K 1000P_0402_50V7K
2

Shortest the
net trace

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 36 of 39
A B C D E F G H
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1 for PWR

Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

D Change PU7 from SA000031D00(S IC RT8209BGQW WQFN 14P D


Change power solution For design change 0.1 34 PWM) to SA00003RU00(S IC SY8033BDBC DFN 10P SINGLE BUCK) 2010.5.03 DVT
1
Change PU8 SY8033B Pin1 net For design change 0.1 34 Change PU8 SY8033B Pin1 connect Pin2 & Pin3 2010.5.03 DVT
2
Change PC100 to SE071680J80 (S CER CAP 68P 50V J
Change PC100 For design change 0.1 34 NPO 0402) 2010.5.03 DVT
3
Change PR105 from SD034100200(S RES 1/16W 10K +-1% 0402 )
4 Change PR105 For design change 0.1 32 to SD034100280 (S RES 1/16W 10K +-1% 0402 ) 2010.5.13 DVT

Change PC30 & PC32 to non-pop For cost down plan 0.1 33 2010.6.2 PVT
5
Change PL3,PL4,PL5 from SH00000JI00 to SH00000BS00
Change PL6,PL10 from SH00000FD10 to SH000000700
Change PL3,PL4,PL5,PL6,PL7,PL8, For TMP choke shortage issue 0.1 2010.6.2 PVT
6 PL10,PL14 Change PL7,PL8 from SH00000J300 to SH000007N00
Change PL14 from SH00000IS00 to SH00000HY00
Change PU7 fromSA00003RU00(S IC SY8033BDBC DFN 10P SINGLE
Change power solution For design change 0.1 34 BUCK) to SA000031D00(S IC RT8209BGQW WQFN 14P PWM) 2010.6.8 PVT
C 7 C

Change PD10.PD13.PC58.PR64.
PQ18 to non-pop For cost down plan 2010.6.10
8 0.1 33 PVT
Change PR84 to pop

Add PR209 = SD034357180


Modify CPU CORE OCP for N550 Design change for N550 CPU (3.57K_0402_1%) @N550 2010.6.10
9 0.1 32 PR209 = SD034357180 PVT
(2.37K_0402_1%) @N4XX series

10

11

12
B B

13

14

15

16

17

18

19
A A

20

21 Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title
PIR (PWR)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 37 of 39
5 4 3 2 1
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1 for PWR

Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

D D

3
4

C 8 C

10

11

12

13

14

15
B B

16

17

18

19

20

21

22
A A

23

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title
PIR (PWR)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6421P
Date: Tuesday, June 22, 2010 Sheet 38 of 39
5 4 3 2 1
5 4 3 2 1

<2010/03/25>
. P06 - Add C1217, C1218 for +0.89V <2010/06/28>
. P08 - Add R1442, R1443 . P04 - Change C239 BOM structure to 3G@
. P09 - Add R1444, R1445 for DMIC . P17 - Change C528, C530, C531 BOM structure to 3G@
. P10 - L12, L14, L15 change to SM010000200
. P23 - Add JP24 for cardreader connector

D D
<2010/03/26>
. P27 - Add R1448, R1449, R1450,R1451,R1452
JP22 change to SP02000H500

<2010/04/06>
. P10 - Change L12. L14, L15 to SM01000C600
. P26 - Add R1453
. P21 - Change Y6 to SJ100005900
. P25 - Change Y5 to SJ100003300
Change C847,C865,C870,C873,C875,C876 SE000000K80
. P13 - Change X1,Y3,Y7 to SJ132P7KW10
. P22 - Change U26 to SA00001N000
. P29 - Change Q6,Q8,Q10,Q12,Q14,Q17,Q24,Q28 to SB00000DH00
Change C176,C219,C230,C395 to SE080105K80
. P07 - Change C116,C141 to SE076104K80

<2010/04/14>
. P06 - Del C1218 2010/04/14
. P08 - Del C1219, R1442 change Y1 to SJ100009H00
. P27 - Add TPM@ GSEN@ for PAV70
C C

<2010/05/03>
. P04 - R354, R347, R348 nu-mount
. P13 - Change R152 to SD034226A80(22.6ohm_0402)
. P13 - Change R241 to SD028100280(10Kohm_0402)
. P13 - R1376, R1377 nu-mount
. P16 - Add JBATT1 CONN.
. P17 - Change U76 to SA00001V400
. P17 - Change R1292 to SD028820180

<2010/05/04>
. P16 - Change JBATT1 NET to +RTCBATT1
. P27 - Add J15, J16

<2010/05/06>
. P10 - Change L12, L14 and L15 footprint
. P27 - Del J15, J16 ; Add R1457, R1458
. P27 - U81.15 connect to GND

<2010/05/24>
B . P04 - Change U71 to SA00003WBA0(N475@) and SA00003WAB0(N455@) B
. P08 - Change C161, C164 to SE071330J80(33P 50V J NPO 0402)
. P08 - Change C388 to SE071100J80(10P 50V J NPO 0402)
. P22 - Change C473 to SE107475K80(4.7U 6.3V K X5R 0603)

<2010/06/01>
. P13 - Add NET: EC_CLK
. P17 - Add R1459, R1460 for Reserve EC_CLK
. P17 - Change U6.36 NET to PWR_LED1#
. P18 - Change NET from PWR_LED# to PWR_LED1#

<2010/06/07>
. P06 - Change C239 footprint to 0805 size
. P17 - Del JP23
. P26 - Change R1325 to 100k-ohm

<2010/06/25>
. P04 - Change C311 BOM configure to un-mount
. P09 - Change C1109, C1111, C1112, C1156 BOM configure to 3G@
. P15 - Change C1163~C1166, C504~C508, C850 BOM configure to MCP@
A . P17 - Change C528, C530, C531 BOM configure to un-mount A
. P10 - Change D17, D18 BOM configure to un-mount
. P22 - Change D22 BOM configure to un-mount
. P23 - Change D44, D45 BOM configure to un-mount

Title
<Title>

Size Document Number Rev


CustomLA-6421P 0.1

Date: Monday, June 28, 2010 Sheet 39 of 39


5 4 3 2 1

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