Dell Inspiron 1545 Wistron Dr1 Roberts Uma 48 4aq01 031 08212 3 PDF

5 4 3 2 1
D D
DR1(Roberts) Schematics Document

uFCPGA Mobile Penryn
C
Intel Cantiga-GM + ICH9M C
2009-08-03
REV : -3
B B
DY : Nopop Component
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size Document Number

Cover Page Rev
Custom -3
Roberts
Date: Monday, August 03, 2009 Sheet 1 of 59
5 4 3 2 1
5 4 3 2 1
CPU DC/DC
Roberts Block Diagram INPUTS
ISL6266A
OUTPUTS
28,29
+PWR_SRC +VCC_CORE
SYSTEM DC/DC
D
Clock Generator Intel Mobile CPU Project code : 91.4AQ01.001 TPS51117 30 D
SLG8SP513VTR 4 Penryn PCB P/N : 48.4AQ01.031 INPUTS OUTPUTS
Socket P 5,6,7
Revision : 08212-3 +PWR_SRC +1.05V_VCCP
SYSTEM DC/DC
MAX17020 27
FSB
INPUTS OUTPUTS
800/1066MHz +5V_ALW2
+3.3V_RTC_LDO
+PWR_SRC +5V_ALW
+3.3V_ALW
Intel
DDRII Slot 0 CRT SYSTEM DC/DC
667/800 14
DDRII 667/800 Channel A Cantiga-GML RGB CRT
(on I/O board)
TPS51116 31
Power SW
AGTL+ CPU I/F 41 INPUTS OUTPUTS
G577BR91U
DDRII Slot 1 DDR Memory I/F LVDS(Dual Channel) LCD +1.8V_SUS
C DDR II 667/800 Channel B 35 +PWR_SRC +0.9V_DDR_VTT C
15
667/800 External Graphics +V_DDR_MCH_REF
8,9,10,11,12,13
PCIE x 1 & USB 2.0 x 1 New Card SYSTEM DC/DC

41
APL5912 32
INPUTS OUTPUTS
DMIx4 C-LINK PCIE x 1 10/100 NIC RJ45
I/O Board
Connector
20
Marvell 88E8040 CONN +1.8V_SUS +1.5V_RUN
SYSTEM DC/DC
Left Side: LDO 34
USB 2.0 x 2
CardReader Intel PCIE 41 USB x 2
INPUTS OUTPUTS
SD/MMC +5V_ALW +5V_RUN
MS/MS Pro/xD
Realtek USB2.0 ICH9-M PCIE x 1 Mini-Card +3.3V_ALW +3.3V_RUN
37
37 RTS5159 802.11a/b/g
USB 2.0/1.1 ports (12)
21
PCI Express ports (6) MAXIM CHARGER
High Definition Audio USB 2.0 USB 2.0 x 1 CAMERA MAX8731A 26
B
CAMERA Module 41
B
(Option)
SATA ports (4) INPUTS OUTPUTS
Digital Mic Array Azalia LPC I/F +DC_IN
AZALIA +PWR_SRC
USB 2.0 x 1 +PBATT
CODEC ACPI 1.1 Bluetooth 41
MIC IN PCI/PCI BRIDGE
IDT
92HD71B7 16,17,18,19
LPC Bus
Right Side:
PCB LAYER
USB 2.0 x 1
Internal Analog MIC 22 USB x 1 43
L1: Top
L2: VCC
KBC L3: Signal
SATA
SATA
HP1 OP AMP SPI WINBOND

24 L4: Signal
WPCE773L
MAX9789A
23 L5: GND
L6: Bottom
A A
<Core Design>
2CH SPEAKER Thermal & Fan
Flash ROM Touch Int.
HDD ODD
2MB PAD KB EMC2102
Wistron Corporation
36 36 25 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
42 44 44 Taipei Hsien 221, Taiwan, R.O.C.
40
Title
Block Diagram
Size Document Number Rev
Custom -3
Roberts
Date: Thursday, August 27, 2009 Sheet 2 of 59
5 4 3 2 1
A B C D E
ICH9 Integrated pull-up Cantiga chipset and ICH9M I/O controller
ICH9M Functional Strap Definitions
and pull-down Resistors Hub strapping configuration
ICH9 EDS 642879 Rev.1.5 ICH9 EDS 642879 Rev.1.5 Montevina Platform Design guide 22339 Rev.0.5
Signal Usage/When Sampled Comment SIGNAL Resistor Type/Value Pin Name Strap Description Configuration
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 CL_CLK[1:0] PULL-UP 20K CFG[2:0] FSB Frequency Select 000 = FSB1067
PCIE Port Config1 bit1, pulled low. When TP3 not pulled low at rising edge 011 = FSB667
Rising Edge of PWROK. of PWROK, sets bit1 of RPC.PC (Cofig Registers: CL_DATA[1:0] PULL-UP 20K 010 = FSB800
others = Reserved
offset 224h). This signal has weak internal CL_RST0# PULL-UP 20K
4 pull-down. CFG[4:3] Reserved 4
DPRSLPVR/GPIO16 PULL-DOWN 20K CFG8
CFG[15:14]
HDA_SYNC PCIE config1 bit0, This signal has a weak internal pull-down. ENERGY_DETECT PULL-UP 20K CFG[18:17]
Rising Edge of PWROK. Sets bit0 of PRC.PC (Config Registers: Offset
224h). HDA_BIT_CLK PULL-DOWN 20K CFG5 DMI x2 Select 0 = DMI x2
1 = DMI x4 (Default)
HDA_DOCK_EN#/GPIO33 PULL-UP 20K
GNT2#/ PCIE config2 bit2, This signal has a weak internal pull-up. CFG6 iTPM Host Interface 0 = The iTPM Host Interface is enabled (Note 2)
GPIO53 Rising Edge of PWROK. Sets bit2 of PRC.PC2 (Config Registers: Offset HDA_RST# PULL-DOWN 20K 1 = The iTPM Host Interface is disabled (default)
224h). HDA_SDIN[3:0] PULL-DOWN 20K CFG7 Intel Management 0 = Transport Layer Security (TLS) cipher
engine crypto strap suite with no confidentiality
GPIO20 Reserved. This signal should not be pulled high. HDA_SDOUT PULL-DOWN 20K 1 = TLS cipher suite with confidentiality(Default)
GNT1#/ ESI Strap (Server Only) ESI compatible mode is for server platforms only. HDA_SYNC PULL-DOWN 20K CFG9 PCIE Graphics Lane 0 = Reserved Lanes, 15->0, 14->1 ect..
GPIO51 Rising Edge of PWROK. This signal should not be pulled low for desktop 1 = Normal operation (Default): Lane Numbered in
and mobile. GLAN_DOCK# The pull-up or pull-down Order
active when configured
for native GLAN_DOCK# CFG10 PCIE Loopback enable 0 = Enable (Note 3)
GNT3#/ Top-Block Swap Sampled low: Top-Block Swap mode (inverts A16 for 1 = Disable (Default)
GPIO55 override. Rising Edge all cycles targeting FWH BIOS space). functionality and determined
of PWROK. Note: Software will not be able to clear the by LAN controller. CFG[13:12] XOR/ALL 00 = Reserve
10 = XOR mode Enabled
Top-Swap bit until the system is rebooted 01 = ALLZ mode Enable (Note 3)
without GNT3# being pulled down. GNT[3:0]#/GPIO[55,53,51] PULL-UP 20K 11 = Disabled (Default)
GPIO20 PULL-DOWN 20K CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
GNT0#: Boot BIOS Destination Controllable via Boot BIOS Destination bit 1 = Dynamic ODT Enabled (Default)
SPI_CS1#/ Selection 0:1. (Config Registers: Offset 3410h:bit 11:10). GPIO49 PULL-UP 20K
3 GPIO58 Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC CFG19 DMI Lane Reversal 0 = Normal operation (Default): Lane Numbered in 3
LDA[3:0]#/FHW[3:0]# PULL-UP 20K Order
1 = Reverse Lanes
SPI_MOSI Integrated TPM Enable, Sample low: the Integrated TPM will be disable. LAN_RXD[2:0] PULL-UP 20K DMI x4 mode [MCH->ICH]: (3->0, 2->1, 1->2 and 0->3)
Rising Edge of CLPWROK. Sample high: the MCH TPM enable strap is sampled DMI x2 mode [MCH->ICH]: (3->0, 2->1)
low and the TPM Disable bit is clear, the LDRQ[0] PULL-UP 20K
CFG20 Digital Display Port 0 = Only Digital Display Port or PCIE is
Integrated TPM will be enable. LDRQ[1]/GPIO23 PULL-UP 20K (SDVO/DP/iHDMI) operational (Default)
GPIO49 DMI Termination The signal is required to be low for desktop PME# PULL-UP 20K Concurrent with PCIe 1 = Digital display Port and PCIe are operating
simulataneously via the PEG port
Voltage. Rising Edge applications and required to be high for mobile
of CLPWROK. applications. PWRBTN# PULL-UP 20K SDVO SDVO Present 0 = No SDVO Card Present (Default)
_CTRLDATA 1 = SDVO Card Present
SATALED# PULL-UP 15K
SATALED# PCI Express Lane Signal has weak internal pull-up. Sets bit 27 L_DDC_DATA Local Flat Panel 0 = LFP Disabled (Default)
Reversal. Rising Edge of MPC.LR (Device 28: Function 0:Offset D8). SPI_CS1#/GPIO58/CLGPIO6 PULL-UP 20K (LFP) Present 1 = LFP Card Present; PCIE disabled
of PWROK. SPI_MOSI PULL-DOWN 20K
NOTE:
No Reboot. If sampled high, the system is strapped to the SPI_MISO PULL-UP 20K
SPKR Rising Edge of PWROK. "No Reboot" mode (ICH9 will disable the TCO Timer 1. All strap signals are sampled with respect to the leading edge of the (G)MCH
system reboot feature). The status is readable SPKR PULL-DOWN 20K Power OK (PWROK) signal.
via the NO REBOOT bit. TACH_[3:0] PULL-UP 20K 2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of
the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6.
XOR Chain Entrance. This signal should not be pull low unless using TP[3] PULL-UP 20K Only one of the CFG10/CFG12/CFG13 straps can be enabled at any time.
TP3 Rising Edge of PWROK. XOR Chain testing.
USB[11:0][P,N] PULL-DOWN 15K
GPIO33/ Flash Descriptor Sampled low: the Flash Descriptor Security will be
HDA_DOCK Security Override overridden. If high, the security measures will be
2 _EN# Strap. Rising Edge of in effect. This should only be enabled in 2
PWROK. manufacturing environments using an external
pull-up resister.
PCIE Routing USB Table

USB
Pair Device
LANE2 MiniCard WLAN 0 USB1
1 USB2
LANE3 LAN 2 USB3
LANE5 New Card 3 RESERVED
4 MINI CARD
5 RESERVED
1 6 BLUETOOTH <Core Design> 1
7 NEW CARD
8 RESERVED Wistron Corporation
9 RESERVED
Title
10 Card Reader
11 CAMERA Size Document Number
Table of Content Rev
Custom -3
Roberts
Date: Monday, May 18, 2009 Sheet 3 of 59
5 4 3 2 1
SSID = CLOCK NEWCARD_CLKREQ#

MINI1_CLKREQ#
R193 1
R195 1
2 10KR2J-3-GP
2 10KR2J-3-GP
+3.3V_RUN
NEWCARD_CLKREQ#
CLK_PCIE_NEW
3D3V_S0_CK505 3D3V_S0_CK505_IO CLK_PCIE_NEW#
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
+3.3V_RUN
SC22P50V2JN-4GP
3D3V_S0_CK505_IO CLK_XTAL_IN
1
C463
C464
EC57
X3
1 R204 CLK_XTAL_OUT
D
2 1 2
DY DY D
SC1U10V3KX-3GP
0R0603-PAD
SC10U6D3V5MX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
X-14D31818M-37GP
1
1
C229
C226
C210
C239
C209
C215
C237
16
46
62
23
19
27
43
52
33
56
4
9
C462 C461 U54
DY SC12P50V2JN-3GP SC12P50V2JN-3GP
VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
VDDSRC
VDDCPU
VDDREF
VDDPCI
VDD48
VDDPLL3
2
2
A00.08/0910
CPUT0 61 CLK_CPU_BCLK
CPUC0 60 CLK_CPU_BCLK#
3 X1 CPUT1_F 58 CLK_MCH_BCLK
2 X2 CPUC1_F 57 CLK_MCH_BCLK#
CLK_48M_CARD R217 1 2 22R2J-2-GP
CPUT2_ITP/SRCT8 54 CLK_CPU_ITP
R216 53 CLK_CPU_ITP#
FSA CPUC2_ITP/SRCC8
CLK_48M_ICH 1 2 17 USB_48MHZ/FSLA
+3.3V_RUN 3D3V_S0_CK505 22R2J-2-GP
C245 DY 2SC4D7P50V2CN-1GP
1 SRCT7/CR#_F 51
50
CLK_PCIE_LAN
CLK_PCIE_LAN#
SRCC7/CR#_E
1 R200 2 H_STP_PCI# 45 PCI_STOP#
SC1U10V3KX-3GP
0R0603-PAD
SC10U6D3V5MX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
H_STP_CPU# 44 CPU_STOP# SRCT6 48
SRCC6 47
1
1
C233
C211
C218
C238
C207
C225
C234
7
ICS9LPRS355BKLFT-GP-USRCT10 41
42
CLK_PCIE_NEW
CLK_PCIE_NEW#
2
2
ICH_SMBCLK SCLK SRCC10
ICH_SMBDATA 6 SDATA
SRCT11/CR#_H 40 NEWCARD_CLKREQ#
CK_PWRGD 63 CK_PWRGD/PD# SRCC11/CR#_G 39 MINI1_CLKREQ#
C SRCT9 37 CLK_PCIE_MINI1 C
SRCC9 38 CLK_PCIE_MINI1#
CLKSATAREQ# 8 PCI0/CR#_A
R178 1 2 475R2F-L1-GP CLKREQ#_1 10 34 CLK_MCH_3GPLL
CLKREQ#_B R196 1 PCI2_TME PCI1/CR#_B SRCT4
2 33R2J-2-GP
PCLK_FWH
A00.08/0922 DY 11
12
PCI2/TME SRCC4 35 CLK_MCH_3GPLL#
R207 1 PCI3
PCLK_KBC 2 33R2J-2-GP 27_SEL 13 PCI4/27_SELECT SRCT3/CR#_C 31 CLK_PCIE_ICH
CLK_PCI_ICH R212 1 2 33R2J-2-GP ITP_EN 14 32 CLK_PCIE_ICH#
PCI_F5/ITP_EN SRCC3/CR#_D
SRCT2/SATAT 28 CLK_PCIE_SATA
SRCC2/SATAC 29 CLK_PCIE_SATA#
FSB 64
R190 1 FSLB/TEST_MODE
CLK_14M_ICH 2 33R2J-2-GP FSC 5 REF0/FSLC/TEST_SEL
24
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
27MHZ_NONSS/SRCT1/SE1 MCH_SSCDREFCLK
55 NC#55 27MHZ_SS/SRCC1/SE2 25 MCH_SSCDREFCLK#
20
GNDSRC
GNDSRC
GNDSRC
GNDCPU
CLK_MCH_DREFCLK
GNDREF
SRCT0/DOTT_96
1
GNDPCI
C236
C243
C224
21
GND48
SRCC0/DOTC_96 CLK_MCH_DREFCLK#
DY DY DY
GND
GND
GND
A00.08/0910
2
18
15
1
22
30
36
49
59
26
65
Main source: 71.08513.003 (SLG8SP513VTR)
2nd source: 71.00875.C03 (RTM875N-606-VD-GRT)
3rd source:
Co-layout Ref: 71.09355.B03 (ICS9LPRS355BKLFT)

B B
3D3V_S0_CK505 3D3V_S0_CK505 27_SEL CLK_MCH_DREFCLK CLK_MCH_DREFCLK#
1
1
R206 EC140 EC139

R209 ITP_EN Output R198 10KR2J-3-GP DY SC47P50V2JN-3GP DY SC47P50V2JN-3GP
2
10KR2J-3-GP 10KR2J-3-GP
PCI2_TME Output
2
0 SRC8
2
ITP_EN 1 CPU_ITP PCI2_TME

0 Overclocking of CPU and SRC allowed
1
R218 R202 27_SEL PIN 20 PIN 21

DY 10KR2J-3-GP 10KR2J-3-GP 1 Overclocking of CPU and SRC not allowed
DY
0 DOT96T DOT96C GM45
2
1 SRCT0 SRCC0 PM45
SEL2 SEL1 SEL0

A CPU FSB R186 1 2 10KR2J-3-GP FSC <Core Design>
A
FSC FSB FSA CPU_BSEL2
SB
1 R412 2 FSB
CPU_BSEL1 0R0402-PAD
1 0 1 100M X
CPU_BSEL0
R214 1 2 2K2R2J-2-GP FSA Wistron Corporation
0 0 1 133M 533M Taipei Hsien 221, Taiwan, R.O.C.
R215 1 2 1KR2J-1-GP
0 1 1 166M 667M MCH_CLKSEL0 Title
R411 1 2 1KR2J-1-GP
0 1 0 200M 800M MCH_CLKSEL1
Clock Generator SLG8SP513VTR
R181 1 2 1KR2J-1-GP Size Document Number Rev
0 0 0 266M 1067M MCH_CLKSEL2 Custom -3
Roberts
Date: Tuesday, August 11, 2009 Sheet 4 of 59
5 4 3 2 1
5 4 3 2 1
SSID = CPU
U41A 1 OF 4
H_A#[35..3]
H_A#[35..3]
H_A#3 J4 H1 H_ADS#
H_A#4 A3# ADS#
L5 A4# BNR# E2 H_BNR#
H_A#5 L4 G5 H_BPRI#
A5# BPRI#
ADDR GROUP 0
H_A#6 K5
D H_A#7 M3
A6#
A7# DEFER# H5 H_DEFER#
D
H_A#8 N2 F21
CONTROL
A8# DRDY# H_DRDY#
H_A#9 J1 E1 H_DBSY#
H_A#10 A9# DBSY#
N3 A10#
H_A#11 P5 F1 H_BREQ#0
H_A#12 A11# BR0#
P2 A12#
H_A#13 L2 D20 CPU_IERR# R47 1 2 56R2J-4-GP +1.05V_VCCP
H_A#14 A13# IERR#
P4 A14# INIT# B3 H_INIT#
H_A#15 P1
H_A#16 A15#
R1 A16# LOCK# H4 H_LOCK#
H_ADSTB#0 M1 ADSTB0# H_CPURST#
C1 H_CPURST# H_RS#[2..0]
H_REQ#[4..0] RESET#
H_REQ#0 K3 F3 H_RS#0
H_REQ#1 H2 REQ0# RS0# H_RS#1
REQ1# RS1# F4
H_REQ#2 K2 G3 H_RS#2
H_REQ#3 J3 REQ2# RS2#
REQ3# TRDY# G2 H_TRDY#
H_REQ#4 L1
REQ4#
HIT# G6 H_HIT#
H_A#17 Y2 E4 H_HITM#
H_A#18 A17# HITM#
U5 A18#
H_A#19 R3 AD4 ITP_BPM#0 ITP_BPM#0
H_A#20 A19# BPM0# ITP_BPM#1
W6 AD3
XDP/ITP SIGNALS
A20# BPM1# ITP_BPM#1
ADDR GROUP 1
H_A#21 U4 AD1 ITP_BPM#2 ITP_BPM#2
H_A#22 A21# BPM2# ITP_BPM#3
Y5 A22# BPM3# AC4 ITP_BPM#3
H_A#23 U1 AC2 ITP_BPM#4 ITP_BPM#4
H_A#24 A23# PRDY# ITP_BPM#5
R4 A24# PREQ# AC1 ITP_BPM#5
H_A#25 T5 AC5 ITP_TCK ITP_TCK
H_A#26 A25# TCK ITP_TDI
T3 A26# TDI AA6 ITP_TDI
H_A#27 W2 AB3 ITP_TDO ITP_TDO
H_A#28 A27# TDO ITP_TMS
W5 AB5 ITP_TMS
C H_A#29
H_A#30
Y4
A28#
A29#
TMS
TRST# AB6 ITP_TRST#
ITP_DBRESET#
ITP_TRST# C
U2 A30# DBR# C20 ITP_DBRESET#
H_A#31 V4
H_A#32 A31# R50 2 0R2J-2-GP
H_A#33
W3
AA4
A32#
THERMAL
1
DY CPU_PROCHOT#
H_A#34 A33# R51 H_THERMDA
AB2 A34# 1 2 56R2J-4-GP +1.05V_VCCP
H_A#35 AA3 D21
A35# PROCHOT#
1
H_ADSTB#1 V1 ADSTB1# THRMDA A24 H_THERMDA H_THERMDA, H_THERMDC routing together,
C49
H_A20M# A6
THRMDC B25 H_THERMDC Trace width / Spacing = 10 / 10 mil DY SC2200P50V2KX-2GP
2
A20M# H_THERMDC
H_FERR# A5 FERR# THERMTRIP# C7 H_THRMTRIP#
ICH
H_IGNNE# C4 IGNNE#
H_THRMTRIP# should connect to
R76 1 2 56R2J-4-GP
D5
DY +1.05V_VCCP ICH9 and MCH without T-ing.
H_STPCLK# STPCLK# A00.08/0903
H_INTR C6 LINT0 HCLK BCLK0 A22 CLK_CPU_BCLK
H_NMI B4 LINT1 BCLK1 A21 CLK_CPU_BCLK#
H_SMI# A3 SMI#
1 RSVD_CPU_1 M4
TP30 RSVD_CPU_2 RSVD#M4
1 N5 RSVD#N5
TP31 1 RSVD_CPU_3 T2
RESERVED
TP13 RSVD_CPU_4 RSVD#T2

1 V3 RSVD#V3
TP23 1 RSVD_CPU_5 B2
TP21 RSVD_CPU_6 RSVD#B2
1 C3 RSVD#C3 TEST7
TP24 1 RSVD_CPU_7 D2
TP19 RSVD_CPU_8 RSVD#D2
1 D22 RSVD#D22
TP55 1 RSVD_CPU_9 D3
TP25 RSVD_CPU_10 RSVD#D3
1 F6 RSVD#F6
TP34
1 RSVD_CPU_11 B1 KEY_NC
B TP12
BGA479-SKT6-GPU7
B
62.10040.221
A <Core Design> A
Wistron Corporation
Title

CPU-FSB(1/3) Rev
Custom -3
Roberts
5 4 3 2 1
SSID = CPU
D D
H_DINV#[3..0]
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_DSTBP#[3..0]
H_D#[63..0]
H_D#[63..0]
U41B 2 OF 4
H_D#0 E22 Y22 H_D#32

H_D#1 D0# D32# H_D#33
F24 D1# D33# AB24
H_D#2 E26 V24 H_D#34
H_D#3 D2# D34# H_D#35
G22 D3# D35# V26
H_D#4 F23 V23 H_D#36
D4# D36#
DATA GRP0
DATA GRP2
H_D#5 G25 T22 H_D#37
H_D#6 D5# D37# H_D#38
E25 D6# D38# U25
H_D#7 E23 U23 H_D#39
H_D#8 D7# D39# H_D#40
K24 D8# D40# Y25
H_D#9 G24 W22 H_D#41
H_D#10 D9# D41# H_D#42
J24 D10# D42# Y23
H_D#11 J23 W24 H_D#43
H_D#12 D11# D43# H_D#44
H22 D12# D44# W25
H_D#13 F26 AA23 H_D#45
H_D#14 D13# D45# H_D#46
K22 D14# D46# AA24
H_D#15 H23 AB25 H_D#47
C H_DSTBN#0 J26
D15#
DSTBN0#
D47#
DSTBN2# Y26 H_DSTBN#2 C
H_DSTBP#0 H26 DSTBP0# DSTBP2# AA26 H_DSTBP#2
H_DINV#0 H25 DINV0# DINV2# U22 H_DINV#2
H_D#16 N22 AE24 H_D#48

H_D#17 D16# D48# H_D#49
K25 D17# D49# AD24
H_D#18 P26 AA21 H_D#50
H_D#19 D18# D50# H_D#51
R23 D19# D51# AB22
H_D#20 L23 AB21 H_D#52
H_D#21 D20# D52# H_D#53
M24 D21# D53# AC26
DATA GRP3
DATA GRP1
H_D#22 L22 AD20 H_D#54
H_D#23 D22# D54# H_D#55
M23 D23# D55# AE22
Layout notes H_D#24 P25 AF23 H_D#56
H_D#25 D24# D56# H_D#57
P23 AC25
Z= 55 Ohm 0.5" MAX for CPU_GTLREF0 H_D#26 P22
D25# D57#
AE21 H_D#58
H_D#27 D26# D58# H_D#59
T24 D27# D59# AD21
+1.05V_VCCP H_D#28 R24 AC22 H_D#60
H_D#29 D28# D60# H_D#61
L25 D29# D61# AD23
H_D#30 T25 AF22 H_D#62
D30# D62#
2
H_D#31 N25 AC23 H_D#63

R357 D31# D63#
H_DSTBN#1 L26 DSTBN1# DSTBN3# AE25 H_DSTBN#3
1KR2F-3-GP M26 AF24 H_DSTBP#3
H_DSTBP#1 DSTBP1# DSTBP3#
H_DINV#1 N24 DINV1# DINV3# AC20 H_DINV#3
Layout Note:
1
CPU_GTLREF0 AD26 R26 COMP0 R350 1 2 27D4R2F-L1-GP

R53 2 1KR2J-1-GP TEST1 GTLREF
MISC COMP0 COMP1 R349 54D9R2F-L1-GP Comp0, 2 connect with Zo=27.4 ohm, make
1
DY C23 TEST1 COMP1 U26 1 2
1
R60 1 2 1KR2J-1-GP TEST2 COMP2 R14 27D4R2F-L1-GP trace length shorter than 0.5".
R354 C376 R58 DY 2 1KR2J-1-GP CPU_TEST3
D25 TEST2 COMP2 AA1
COMP3 R13
1 2
54D9R2F-L1-GP
2KR2F-3-GP DY SC1KP50V2KX-1GP
1
DY C24
AF26
TEST3 COMP3 Y1 1 2 Comp1, 3 connect with Zo=55 ohm, make
2
TEST4
B R7 1
DY 2 1KR2J-1-GP CPU_TEST5 AF1
A26
TEST5 DPRSTP# E5
B5
H_DPRSTP#
trace length shorter than 0.5". B
H_DPSLP#
2
TEST6 DPSLP#
DPWR# D24 H_DPWR#
CPU_BSEL0 B22 BSEL0 PWRGOOD D6 H_PWRGOOD
CPU_BSEL1 B23 BSEL1 SLP# D7 H_CPUSLP#
CPU_BSEL2 C21 BSEL2 PSI# AE6 PSI#
BGA479-SKT6-GPU7
62.10040.221
Route the CPU_TEST3 and CPU_TEST5 signals

through a ground referenced Zo = 55-ohm trace
that ends in a via that is near a GND via
and is accessible through an oscilloscope connection.
A <Core Design> A
Wistron Corporation
Title

CPU-FSB(2/3) Rev
Custom -3
Roberts
5 4 3 2 1
SSID = CPU
+VCC_CORE
U41D 4 OF 4
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
A4 VSS VSS P6
1
C5
C6
C3
C25
C36
C31
C11
C370
C365
C366
A8 VSS VSS P21
C10
DY DY DY DY DY DY DY DY DY SC22U6D3V5MX-2GP
A11
A14
VSS VSS P24
R2
2
VSS VSS
A16 VSS VSS R5
A19 VSS VSS R22
D D
A23 VSS VSS R25
+VCC_CORE +VCC_CORE AF2 T1
VSS VSS
B6 VSS VSS T4
B8 VSS VSS T23
U41C 3 OF 4 B11 T26
+VCC_CORE VSS VSS
B13 VSS VSS U3
A7 VCC VCC AB20 B16 VSS VSS U6
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
A9 VCC VCC AB7 B19 VSS VSS U21
A10 VCC VCC AC7 B21 VSS VSS U24
A12 VCC VCC AC9 B24 VSS VSS V2
1
C14
C15
C26
C35
C13
C352
C338
C367
C357
C363
A13 VCC VCC AC12 C5 VSS VSS V5
A15 AC13 C24
A17
VCC VCC
AC15
DY DY DY DY DY DY SC22U6D3V5MX-2GP
C8
C11
VSS VSS V22
V25
2
VCC VCC VSS VSS
A18 VCC VCC AC17 C14 VSS VSS W1
A20 VCC VCC AC18 C16 VSS VSS W4
B7 VCC VCC AD7 C19 VSS VSS W23
B9 VCC VCC AD9 C2 VSS VSS W26
B10 VCC VCC AD10 C22 VSS VSS Y3
B12 VCC VCC AD12 C25 VSS VSS Y6
B14 AD14 +VCC_CORE D1 Y21
VCC VCC VSS VSS
B15 VCC VCC AD15 D4 VSS VSS Y24
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
B17 VCC VCC AD17 D8 VSS VSS AA2
B18 VCC VCC AD18 D11 VSS VSS AA5
B20 VCC VCC AE9 D13 VSS VSS AA8
1
C12
C17
C32
C30
C29
C340
C344
C347
C368
C9 VCC VCC AE10 D16 VSS VSS AA11
C336
C10
C12
VCC VCC AE12
AE13
DY SC22U6D3V5MX-2GP
D19
D23
VSS VSS AA14
AA16
2
VCC VCC VSS VSS
C13 VCC VCC AE15 D26 VSS VSS AA19
C15 VCC VCC AE17 E3 VSS VSS AA22
C C17 VCC VCC AE18 E6 VSS VSS AA25 C
C18 VCC VCC AE20 E8 VSS VSS AB1
D9 VCC VCC AF9 E11 VSS VSS AB4
D18 VCC VCC AF18 F5 VSS VSS AB23
E7 AF20 +1.05V_VCCP F8 AB26
VCC VCC VSS VSS
ST220U2D5VBM-LGP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
E9 VCC F11 VSS VSS AC3
E10 VCC VCCP G21 F13 VSS VSS AC6
E12 VCC VCCP V6 F16 VSS VSS AC8
1
1
TC17
C9
C7
C44
C43
C45
E13 VCC VCCP J6 F19 VSS VSS AC11
E15 K6 C8
E17
VCC VCCP
M6
DY SCD1U10V2KX-4GP
F2
F22
VSS VSS AC14
AC16
2
2
VCC VCCP VSS VSS
E18 VCC VCCP J21 F25 VSS VSS AC19
E20 VCC VCCP K21 G4 VSS VSS AC21
F7 VCC VCCP M21 G1 VSS VSS AC24
F9 VCC VCCP N21 G23 VSS VSS AD2
F10 VCC VCCP N6 G26 VSS VSS AD5
F12 VCC VCCP R21 H3 VSS VSS AD8
F14 VCC VCCP R6 H6 VSS VSS AD11
F15 VCC VCCP T21 H21 VSS VSS AD13
F17 VCC VCCP T6 layout note: "+1.5V_VCCA" H24 VSS VSS AD16
F18 VCC VCCP V21
as short as possible +1.5V_VCCA +1.5V_RUN
J2 VSS VSS AD19 NCTF
F20 VCC VCCP W21 J5 VSS VSS AD22 PIN
AA7 VCC J22 VSS VSS AD25
AA9 VCC VCCA B26 1 R356 2 J25 VSS VSS AE1 CPU_GND11
AA10 C26 0R0603-PAD K1 AE4 TP10
VCC VCCA VSS VSS
B AA12 VCC CPU_VID[6..0] K4 VSS VSS AE8 B
AA13 AD6 CPU_VID0 K23 AE11
VCC VID0 VSS VSS
1
AA15 AF5 CPU_VID1 Layout Note: K26 AE14

VCC VID1 CPU_VID2 C374 C377 VSS VSS
AA17 AE5 L3 AE16
AA18
VCC VID2
AF4 CPU_VID3 SCD01U16V2KX-3GP SC10U6D3V5MX-3GP Place as close as possible L6
VSS VSS
AE19
2
VCC VID3 CPU_VID4 to the CPU VCCA pin. VSS VSS

AA20 VCC VID4 AE3 L21 VSS VSS AE23
AB9 AF3 CPU_VID5 L24 AE26 CPU_GND21
VCC VID5 CPU_VID6 VSS VSS CPU_GND31 TP224
AC10 VCC VID6 AE2 M2 VSS VSS A2
AB10 R311 1 2 100R2F-L1-GP-U +VCC_CORE M5 AF6 TP20
VCC VSS VSS
AB12 VCC M22 VSS VSS AF8
AB14 VCC VCCSENSE AF7 VCC_SENSE M25 VSS VSS AF11
AB15 VCC VCC_SENSE and VSS_SENSE lines N1 VSS VSS AF13
AB17 N4 AF16
AB18
VCC
AE7
should be of equal length. N23
VSS VSS
AF19
VCC VSSSENSE VSS_SENSE VSS VSS
N26 VSS VSS AF21
R302 1 2 100R2F-L1-GP-U P3 A25 CPU_GND41
BGA479-SKT6-GPU7 VSS VSS TP56
VSS AF25
62.10040.221
BGA479-SKT6-GPU7
62.10040.221
A A
<Core Design>
Wistron Corporation
Title

CPU-Power(3/3) Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = MCH
U52A 1 OF 10 H_A#[35..3]
H_A#[35..3]
H_D#[63..0] A14 H_A#3
D H_D#[63..0]
H_D#0 F2 H_D#_0
H_A#_3
H_A#_4 C15 H_A#4 D
H_D#1 G8 F16 H_A#5
H_D#2 H_D#_1 H_A#_5 H_A#6
F8 H_D#_2 H_A#_6 H13
H_D#3 E6 C18 H_A#7
H_D#4 H_D#_3 H_A#_7 H_A#8
G2 H_D#_4 H_A#_8 M16
H_D#5 H6 J13 H_A#9
H_D#6 H_D#_5 H_A#_9 H_A#10
H2 H_D#_6 H_A#_10 P16
H_D#7 F6 R16 H_A#11
H_D#8 H_D#_7 H_A#_11 H_A#12
D4 H_D#_8 H_A#_12 N17
H_D#9 H3 M13 H_A#13
H_D#10 H_D#_9 H_A#_13 H_A#14
M9 H_D#_10 H_A#_14 E17
H_D#11 M11 P17 H_A#15
H_D#12 H_D#_11 H_A#_15 H_A#16
J1 H_D#_12 H_A#_16 F17
H_D#13 J2 G20 H_A#17
H_D#14 H_D#_13 H_A#_17 H_A#18
N12 H_D#_14 H_A#_18 B19
H_D#15 J6 J16 H_A#19
H_D#16 H_D#_15 H_A#_19 H_A#20
P2 H_D#_16 H_A#_20 E20
H_D#17 L2 H16 H_A#21
H_D#18 H_D#_17 H_A#_21 H_A#22
R2 H_D#_18 H_A#_22 J20
H_D#19 N9 L17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
L6 H_D#_20 H_A#_24 A17
H_D#21 M5 B17 H_A#25
H_D#22 H_D#_21 H_A#_25 H_A#26
J3 H_D#_22 H_A#_26 L16
H_D#23 N2 C21 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
R1 H_D#_24 H_A#_28 J17
H_D#25 N5 H20 H_A#29
H_D#26 H_D#_25 H_A#_29 H_A#30
N6 H_D#_26 H_A#_30 B18
H_D#27 P13 K17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
N8 H_D#_28 H_A#_32 B20
H_D#29 L7 F21 H_A#33
C +1.05V_VCCP H_D#30
H_D#31
N10
H_D#_29
H_D#_30
H_A#_33
H_A#_34 K21 H_A#34
H_A#35
C
H_SWING routing Trace width and M3 H_D#_31 H_A#_35 L20
H_D#32 Y3
Spacing use 10 / 20 mil H_D#_32
1
H_D#33 AD14 H12 H_ADS#

R368 H_D#34 H_D#_33 H_ADS#
Y6 H_D#_34 H_ADSTB#_0 B16 H_ADSTB#0
221R2F-2-GP H_D#35 Y10 G17 H_ADSTB#1
H_D#36 H_D#_35 H_ADSTB#_1
H_SWING Resistors and Y12 H_D#_36 H_BNR# A9 H_BNR#
H_D#37 Y14 F11 H_BPRI#
2
Capacitors close MCH H_D#38 Y7

H_D#_37 H_BPRI#
G12
HOST
H_D#_38 H_BREQ# H_BREQ#0
500 mil ( MAX ) H_SWING H_D#39 W2 E9 H_DEFER#
H_D#40 H_D#_39 H_DEFER#
AA8 H_D#_40 H_DBSY# B10 H_DBSY#
1
H_D#41 Y9 AH7 CLK_MCH_BCLK

H_D#_41 HPLL_CLK
1
C399 R367 H_D#42 AA13 AH6 CLK_MCH_BCLK#

SCD1U10V2KX-4GP 100R2F-L1-GP-U H_D#43 H_D#_42 HPLL_CLK#
AA9 H_D#_43 H_DPWR# J11 H_DPWR#
H_D#44 AA11 F9 H_DRDY#
2
H_D#45 H_D#_44 H_DRDY#

AD11 H9 H_HIT#
2
H_D#46 H_D#_45 H_HIT#

AD10 H_D#_46 H_HITM# E12 H_HITM#
H_D#47 AD13 H11 H_LOCK#
H_D#48 H_D#_47 H_LOCK#
AE12 H_D#_48 H_TRDY# C9 H_TRDY#
H_D#49 AE9
H_D#50 H_D#_49
AA2 H_D#_50
H_D#51 AD8
H_D#52 H_D#_51 H_DINV#[3..0]
AA3 H_D#_52 H_DINV#[3..0]
H_RCOMP routing Trace width and H_D#53 AD3 J8 H_DINV#0
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1
AD7 L3
Spacing use 10 / 20 mil H_D#55 AE14
H_D#_54 H_DINV#_1
Y13 H_DINV#2
H_D#56 H_D#_55 H_DINV#_2 H_DINV#3
AF3 H_D#_56 H_DINV#_3 Y1
H_D#57 AC1 H_DSTBN#[3..0]
H_D#_57 H_DSTBN#[3..0]
1 2 H_RCOMP H_D#58 AE3 H_D#_58 H_DSTBN#_0 L10 H_DSTBN#0
R361 24D9R2F-L-GP H_D#59 AC3 M7 H_DSTBN#1
H_D#_59 H_DSTBN#_1
B H_D#60
H_D#61
AE11
AE8
H_D#_60 H_DSTBN#_2 AA5
AE6
H_DSTBN#2
H_DSTBN#3
B
H_D#62 H_D#_61 H_DSTBN#_3 H_DSTBP#[3..0]
Place R51 near to the chip ( < 0.5") AG2 H_D#_62 H_DSTBP#[3..0]
H_D#63 AD6 L9 H_DSTBP#0
H_D#_63 H_DSTBP#_0 H_DSTBP#1
H_DSTBP#_1 M8
AA6 H_DSTBP#2
H_DSTBP#_2 H_DSTBP#3
H_DSTBP#_3 AE5
H_REQ#[4..0]
H_REQ#[4..0]
B15 H_REQ#0
+1.05V_VCCP H_SWING H_REQ#_0 H_REQ#1
C5 H_SWING H_REQ#_1 K13
H_RCOMP E3 F13 H_REQ#2
H_RCOMP H_REQ#_2 H_REQ#3
H_REQ#_3 B13
2
H_CPURST# C12 B14 H_REQ#4

R369 H_CPURST# H_REQ#_4 H_RS#[2..0]
H_CPUSLP# E11 H_CPUSLP# H_RS#[2..0]
1KR2F-3-GP B6 H_RS#0
H_RS#_0 H_RS#1
H_RS#_1 F12
A11 C8 H_RS#2
1
H_AVREF H_AVREF H_RS#_2

B11 H_DVREF
CANTIGA-GM-GP-U-NF
1
R372 C403
2KR2F-3-GP DY SCD1U16V2KX-3GP
2
2
A <Core Design> A
Wistron Corporation
Title
Cantiga-HOST(1/6)
Custom -3
Roberts
5 4 3 2 1
U52B 2 OF 10
SSID = MCH M36 RESERVED#M36
DDR CLK/ CONTROL/COMPENSATION

N36 RESERVED#N36 SA_CK_0 AP24 M_CLK_DDR0
R33 RESERVED#R33 SA_CK_1 AT21 M_CLK_DDR1
T33 AV24
* is current setting AH9
AH10
RESERVED#T33
RESERVED#AH9
RESERVED#AH10
SB_CK_0
SB_CK_1 AU20
M_CLK_DDR2
M_CLK_DDR3
CFG Strap Low High AH12 RESERVED#AH12 SA_CK#_0 AR24 M_CLK_DDR#0

AH13 RESERVED#AH13 SA_CK#_1 AR21 M_CLK_DDR#1
CFG 5 DMI X 2 DMI X 4
* K12
AL34
RESERVED#K12
RESERVED#AL34
SB_CK#_0
SB_CK#_1
AU24
AV20
M_CLK_DDR#2
M_CLK_DDR#3 +1.8V_SUS
D
CFG 6 ITPM enable ITPM disable
* AK34
AN35
RESERVED#AK34
RESERVED#AN35 SA_CKE_0 BC28 M_CKE0
D
TLS cipher suite with TLS cipher suite with
* AM35 RESERVED#AM35 SA_CKE_1 AY28 M_CKE1
1
CFG 7 no confidentiality confidentiality T24 RESERVED#T24 SB_CKE_0 AY36 M_CKE2
BB36 M_CKE3 R380
SB_CKE_1
RSVD
80D6R2F-L-GP
CFG 9 PCIE GFX lane reversed
PCIE GFX lane
numbered in oder * B31
B2
M1
RESERVED#B31
RESERVED#B2 SA_CS#_0 BA17
AY16
M_CS0#
M_CS1#
+1.8V_SUS
2
RESERVED#M1 SA_CS#_1
SB_CS#_0 AV16 M_CS2#
CFG 10 PCIE loopback enable PCIE loopback disable
* SB_CS#_1 AR13 M_CS3#
2
AY21 RESERVED#AY21
1
R122
CFG 12 ALLZ mode enable ALLZ mode disable
* SA_ODT_0
SA_ODT_1
BD17
AY17
M_ODT0
M_ODT1 R377
80D6R2F-L-GP
1KR2F-3-GP
CFG 13 XOR mode enable XOR mode disable
* BG23
SB_ODT_0 BF15
AY13
M_ODT2
M_ODT3
1
RESERVED#BG23 SB_ODT_1
FSB dynamic ODT disable FSB Dynamic ODT enable
CFG 16
* BF23
2
RESERVED#BF23 M_RCOMPP SM_RCOMP_VOH
BH18 RESERVED#BH18 SM_RCOMP BG22
CFG 19 BF18 BH21 M_RCOMPN
RESERVED#BF18 SM_RCOMP#
1
C162
DMI Lane Reserved
CFG 20
* PCIE and SDVO are
Normal operation Reverse DMI lanes
SM_RCOMP_VOH BF28
BH28
SM_RCOMP_VOH
SM_RCOMP_VOL +V_DDR_MCH_REF +1.8V_SUS
C159
SC2D2U10V3KX-1GP
SCD01U16V2KX-3GP R116
3K01R2F-3-GP
2
SM_RCOMP_VOL
SDVO concurrent Only PCIE or SDVO
* operatiing simultaneously AV42 1
DY 2
2
with PCIE is operational via the PEG port SM_VREF
AR36
SM_PWROK SM_REXT R374 1 SM_RCOMP_VOL
SM_REXT BF17 2 499R2F-2-GP R142
1
10KR2J-3-GP
SDVO_CTRLDATA SDVO interface disable
* SDVOLFPinterface enable SM_DRAMRST# BC36
2
1
1
CLK_MCH_DREFCLK R145 C151 R119
L_DDC_DATA LFP disable
* card present DPLL_REF_CLK
DPLL_REF_CLK#
B38
A38 CLK_MCH_DREFCLK#
MCH_SSCDREFCLK
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#
DY 10KR2J-3-GP C145
SC2D2U10V3KX-1GP
SCD01U16V2KX-3GP 1KR2F-3-GP
interface disabled *
DDPC_CTRLDATA SDVO/iHDMI/DP SDVO/iHDMI/DP E41
2
DPLL_REF_SSCLK MCH_SSCDREFCLK# MCH_SSCDREFCLK
F41
1
interface enabled DPLL_REF_SSCLK# MCH_SSCDREFCLK#
C PEG_CLK F43 CLK_MCH_3GPLL
CLK_MCH_3GPLL# CLK_MCH_3GPLL
C
CLK
PEG_CLK# E43 CLK_MCH_3GPLL#
+3.3V_RUN
AE41 DMI_TXN0
R104 1 DMI_RXN_0 DMI_TXN0
2 2K21R2F-GP CFG11 DMI_TXN1
DY DMI_RXN_1 AE37
AE47 DMI_TXN2 DMI_TXN1
R128 1 DMI_RXN_2 DMI_TXN2
2 2K21R2F-GP CFG18 DMI_TXN3
DY FSB setting
DMI_RXN_3 AH39 DMI_TXN3
R117 1 2 4K02R2F-GP CFG19 DMI_TXP0
DY MCH_CLKSEL0 T25
DMI_RXP_0 AE40
AE38 DMI_TXP1 DMI_TXP0
CFG_0 DMI_RXP_1 DMI_TXP1
R121 1 2 4K02R2F-GP CFG20 DMI_TXP2
DY MCH_CLKSEL1
MCH_CLKSEL2
R25
P25
CFG_1 DMI_RXP_2 AE48
AH40 DMI_TXP3 DMI_TXP2
RN20 CFG3 CFG_2 DMI_RXP_3 DMI_TXP3
1 P20 CFG_3 +1.05V_VCCP +3.3V_RUN
DMI
4 1 PM_EXTTS#0 TP86 1 CFG4 P24 AE35 DMI_RXN0
PM_EXTTS#1 TP88 CFG5 CFG_4 DMI_TXN_0 DMI_RXN1 DMI_RXN0
3 2 C25 CFG_5 DMI_TXN_1 AE43 DMI_RXN1
CFG6 N24 AE46 DMI_RXN2
SRN10KJ-5-GP CFG7 CFG_6 DMI_TXN_2 DMI_RXN3 DMI_RXN2
M24 CFG_7 DMI_TXN_3 AH42 DMI_RXN3
1
CFG
CFG8 E21
CFG9 CFG_8 DMI_RXP0 R370 R371
C23 AD35
R383 1 2 2K21R2F-GP CFG5 CFG10 CFG_9 DMI_TXP_0 DMI_RXP1 DMI_RXP0 56R2J-4-GP DY 10KR2J-3-GP
DY CFG11
C24
N21
CFG_10 DMI_TXP_1 AE44
AF46 DMI_RXP2 DMI_RXP1
R112 1 CFG_11 DMI_TXP_2 DMI_RXP2
2 2K21R2F-GP CFG6 CFG12 DMI_RXP3
DY P21 AH43
2
CFG13 CFG_12 DMI_TXP_3 DMI_RXP3
T21 CFG_13
R111 1 2 2K21R2F-GP CFG7 CFG14 TSATN#_KBC
DY TP84
1
1 CFG15
R20
M20
CFG_14 TSATN#_KBC
C
CFG_15
R102 1 2 2K21R2F-GP CFG8 TP85 CFG16
DY L21 CFG_16
GRAPHICS VID
CFG17 TSATN# Q19
R382 1 2 4K02R2F-GP CFG9 TP87
1
CFG18
H21 CFG_17 B
DY MMBT3904WT1G-GP
B DY CFG19
P29
R28
CFG_18
B
E
R375 1 CFG_19
2 2K21R2F-GP CFG10 CFG20
DY T28 CFG_20 GFX_VID_0 B33
B32
R101 1 GFX_VID_1
2 2K21R2F-GP CFG12
DY GFX_VID_2 G33
F33
GFX_VID_3
R105 1 2 2K21R2F-GP CFG13
DY PM_SYNC#
H_DPRSTP#
R29
B7
PM_SYNC# GFX_VID_4 E33
PM_DPRSTP#
R103 1 2 2K21R2F-GP CFG16
DY PM_EXTTS#0
PM_EXTTS#1
N33
P32
PM_EXT_TS#_0
PM_EXT_TS#_1
PM
AT40 PWROK GFX_VR_EN C34

RSTIN# AT11 +1.05V_VCCP
RSTIN#
PM_PWROK T20 THERMTRIP#
2
R32 DPRSLPVR R126
2009/07/27 AH37 1KR2F-3-GP
R94 CL_CLK CL_CLK0
CL_DATA AH36 CL_DATA0
PLT_RST# 1 2 BG48 AN36 M_PWROK
ME
1
NC#BG48 CL_PWROK
BF48 NC#BF48 CL_RST# AJ35 CL_RST#0
100R2J-2-GP MCH_CLVREF
SCD1U10V2KX-4GP
BD48 AH34
-3 NC#BD48 CL_VREF
1
BC48 +3.3V_RUN
NC#BC48
1
C94 MCH_CLVREF ~= 0.35V
DY BH47 NC#BH47
C175
SC100P50V2JN-3GP BG47 R130 R131
2
NC#BG47 499R2F-2-GP CLKREQ#_B

BE47 NC#BE47 DDPC_CTRLCLK N28 1 2
BH46 M28
2
NC#BH46 DDPC_CTRLDATA 10KR2J-3-GP
BF46 G36
2
NC#BF46 SDVO_CTRLCLK
NC
BG45 E36 1 TP271

NC#BG45
MISC
SDVO_CTRLDATA
H_THRMTRIP# BH44 NC#BH44 CLKREQ# K36 CLKREQ#_B
DPRSLPVR BH43 NC#BH43 ICH_SYNC# H36 MCH_ICH_SYNC#
BH6 NC#BH6
BH5 NC#BH5
A BG4
BH3
NC#BG4 TSATN# B12 TSATN# <Core Design> A
NC#BH3
BF3 NC#BF3
BH2
BG2
NC#BH2
NC#BG2 HDA_BCLK B28 Wistron Corporation
BE2 B30 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
NC#BE2 HDA_RST# Taipei Hsien 221, Taiwan, R.O.C.
BG1 NC#BG1 HDA_SDI B29
BF1 NC#BF1 HDA_SDO C29
Title
HDA
BD1 NC#BD1 HDA_SYNC A28

BC1
F1
NC#BC1
NC#F1
Cantiga-DMI/CFG(2/6)
A47 Size Document Number Rev
NC#A47 Custom
Roberts -3
CANTIGA-GM-GP-U-NF
5 4 3 2 1
SSID = MCH
M_A_DQ[63..0] U52D 4 OF 10 M_B_DQ[63..0] U52E 5 OF 10

M_A_DQ[63..0] M_B_DQ[63..0]
M_A_DQ0 AJ38 BD21 M_B_DQ0 AK47 BC16
D M_A_DQ1 AJ41
SA_DQ_0
SA_DQ_1
SA_BS_0
SA_BS_1 BG18
M_A_BS#0
M_A_BS#1 M_B_DQ1 AH46
SB_DQ_0
SB_DQ_1
SB_BS_0
SB_BS_1 BB17
M_B_BS#0
M_B_BS#1
D
M_A_DQ2 AN38 AT25 M_A_BS#2 M_B_DQ2 AP47 BB33 M_B_BS#2
M_A_DQ3 SA_DQ_2 SA_BS_2 M_B_DQ3 SB_DQ_2 SB_BS_2
AM38 SA_DQ_3 AP46 SB_DQ_3
M_A_DQ4 AJ36 BB20 M_A_RAS# M_B_DQ4 AJ46
M_A_DQ5 SA_DQ_4 SA_RAS# M_B_DQ5 SB_DQ_4
AJ40 SA_DQ_5 SA_CAS# BD20 M_A_CAS# AJ48 SB_DQ_5 SB_RAS# AU17 M_B_RAS#
M_A_DQ6 AM44 AY20 M_A_WE# M_B_DQ6 AM48 BG16 M_B_CAS#
M_A_DQ7 SA_DQ_6 SA_WE# M_B_DQ7 SB_DQ_6 SB_CAS#
AM42 SA_DQ_7 AP48 SB_DQ_7 SB_WE# BF14 M_B_WE#
M_A_DQ8 AN43 M_B_DQ8 AU47
M_A_DQ9 SA_DQ_8 M_B_DQ9 SB_DQ_8
AN44 SA_DQ_9 AU46 SB_DQ_9
M_A_DQ10 AU40 M_A_DM[7..0] M_B_DQ10 BA48
SA_DQ_10 M_A_DM[7..0] SB_DQ_10
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ11 AY48 M_B_DM[7..0]
SA_DQ_11 SA_DM_0 SB_DQ_11 M_B_DM[7..0]
M_A_DQ12 AN41 AT41 M_A_DM1 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ13 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ14 AU44 AU39 M_A_DM3 M_B_DQ14 BA47 BD40 M_B_DM2
AU42 SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
M_A_DQ16 AV39 AY6 M_A_DM5 M_B_DQ16 BC46 BG11 M_B_DM4
AY44 SA_DQ_17 SA_DM_6 AT7 BC44 SB_DQ_17 SB_DM_5 BA3
A
M_A_DQ18 BA40 AJ5 M_A_DM7 M_B_DQ18 BG43 AP1 M_B_DM6
B
M_A_DQ19 SA_DQ_18 SA_DM_7 M_A_DQS[7..0] M_B_DQ19 SB_DQ_18 SB_DM_6 M_B_DM7
BD43 SA_DQ_19 M_A_DQS[7..0] BF43 SB_DQ_19 SB_DM_7 AK2
M_A_DQ20 AV41 AJ44 M_A_DQS0 M_B_DQ20 BE45 M_B_DQS[7..0]
SA_DQ_20 SA_DQS_0 SB_DQ_20 M_B_DQS[7..0]
M_A_DQ21 AY43 AT44 M_A_DQS1 M_B_DQ21 BC41 AL47 M_B_DQS0
M_A_DQ22 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
BB41 BA43 BF40 AV48
MEMORY
MEMORY
BC40 SA_DQ_23 SA_DQS_3 BC37 BF41 SB_DQ_23 SB_DQS_2 BG41
M_A_DQ24 AY37 AW12 M_A_DQS4 M_B_DQ24 BG38 BG37 M_B_DQS3
BD38 SA_DQ_25 SA_DQS_5 BC8 BF38 SB_DQ_25 SB_DQS_4 BH9
M_A_DQ26 AV37 AU8 M_A_DQS6 M_B_DQ26 BH35 BB2 M_B_DQS5
M_A_DQ27 SA_DQ_26 SA_DQS_6 M_A_DQS7 M_A_DQS#[7..0] M_B_DQ27 SB_DQ_26 SB_DQS_5 M_B_DQS6
AT36 SA_DQ_27 SA_DQS_7 AM7 M_A_DQS#[7..0] BG35 SB_DQ_27 SB_DQS_6 AU1
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ28 BH40 AN6 M_B_DQS7 M_B_DQS#[7..0]
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 M_B_DQS#[7..0]
M_A_DQ29 BB38 AT43 M_A_DQS#1 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ30 SA_DQ_29 SA_DQS#_1 M_A_DQS#2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
AV36 BA44 BG34 AV47
C M_A_DQ31
M_A_DQ32
AW36
SA_DQ_30
SA_DQ_31
SA_DQS#_2
SA_DQS#_3 BD37 M_A_DQS#3
M_A_DQS#4
M_B_DQ31
M_B_DQ32
BH34
SB_DQ_30
SB_DQ_31
SB_DQS#_1
SB_DQS#_2 BH41 M_B_DQS#2
M_B_DQS#3
C
BD13 SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37
M_A_DQ33 AU11 BD8 M_A_DQS#5 M_B_DQ33 BG12 BG9 M_B_DQS#4
M_A_DQ34 SA_DQ_33 SA_DQS#_5 M_A_DQS#6 M_B_DQ34 SB_DQ_33 SB_DQS#_4 M_B_DQS#5
BC11 SA_DQ_34 SA_DQS#_6 AU9 BH11 SB_DQ_34 SB_DQS#_5 BC2
M_A_DQ35 BA12 AM8 M_A_DQS#7 M_B_DQ35 BG8 AT2 M_B_DQS#6
SYSTEM
M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_A_A[14..0] M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7
SYSTEM
AU13 SA_DQ_36 M_A_A[14..0] BH12 SB_DQ_36 SB_DQS#_7 AN5
M_A_DQ37 AV13 BA21 M_A_A0 M_B_DQ37 BF11 M_B_A[14..0]
SA_DQ_37 SA_MA_0 SB_DQ_37 M_B_A[14..0]
M_A_DQ38 BD12 BC24 M_A_A1 M_B_DQ38 BF8 AV17 M_B_A0
M_A_DQ39 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BC12 SA_DQ_39 SA_MA_2 BG24 BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ40 BB9 BH24 M_A_A3 M_B_DQ40 BC5 BC25 M_B_A2
BA9 SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ42 AU10 BA24 M_A_A5 M_B_DQ42 AY3 AW25 M_B_A4
AV9 SA_DQ_43 SA_MA_6 BD24 AY1 SB_DQ_43 SB_MA_5 BB28
M_A_DQ44 BA11 BG27 M_A_A7 M_B_DQ44 BF6 AU28 M_B_A6
BD9 SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW28
M_A_DQ46 AY8 AW24 M_A_A9 M_B_DQ46 BA1 AT33 M_B_A8
BA6 SA_DQ_47 SA_MA_10 BC21 BD3 SB_DQ_47 SB_MA_9 BD33
M_A_DQ48 M_A_A11 M_B_DQ48 M_B_A10
DDR
AV5 SA_DQ_48 SA_MA_11 BG26 AV2 SB_DQ_48 SB_MA_10 BB16
DDR
M_A_DQ49 AV7 BH26 M_A_A12 M_B_DQ49 AU3 AW33 M_B_A11
AT9 SA_DQ_50 SA_MA_13 BH17 AR3 SB_DQ_50 SB_MA_12 AY33
M_A_DQ51 AN8 AY25 M_A_A14 M_B_DQ51 AN2 BH15 M_B_A13
M_A_DQ52 SA_DQ_51 SA_MA_14 M_B_DQ52 SB_DQ_51 SB_MA_13 M_B_A14
AU5 SA_DQ_52 AY2 SB_DQ_52 SB_MA_14 AU33
M_A_DQ53 AU6 M_B_DQ53 AV1
AT5 SA_DQ_54 AP3 SB_DQ_54
M_A_DQ55 AN10 M_B_DQ55 AR1
AM11 SA_DQ_56 AL1 SB_DQ_56
M_A_DQ57 AM5 M_B_DQ57 AL2
AJ9 SA_DQ_58 AJ1 SB_DQ_58
M_A_DQ59 AJ8 M_B_DQ59 AH1
AN12 SA_DQ_60 AM2 SB_DQ_60
B M_A_DQ61
M_A_DQ62
AM13
AJ11
SA_DQ_61
M_B_DQ61
M_B_DQ62
AM3
AH3
SB_DQ_61 B
AJ12 SA_DQ_63 AJ3 SB_DQ_63
CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF
A <Core Design> A
Wistron Corporation
Title
Cantiga-DDR(3/6)
Custom -3
Roberts
5 4 3 2 1
SSID = MCH FOR VCC CORE U52F 6 OF 10
+1.05V_VCCP
U52G 7 OF 10 +1.05V_VCCP Place on the Edge

+1.8V_SUS AG34 VCC
SC22U6D3V5MX-2GP
SCD22U10V2KX-1GP
SCD1U16V2KX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AC34 VCC
SC10U6D3V5MX-3GP
AP33 VCC_SM VCC_AXG_NCTF W28 AB34 VCC
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
AN33 VCC_SM VCC_AXG_NCTF V28 AA34 VCC
1
C390
C91
C84
C98
C80
BH32 VCC_SM VCC_AXG_NCTF W26 Y34 VCC
1
C108
C110
C173
C383
BG32
BF32
VCC_SM VCC_AXG_NCTF V26
W25
DY V34
U34
VCC
D D
2
VCC_SM VCC_AXG_NCTF VCC
BD32 V25 AM33
2
BC32 VCC_SM VCC_AXG_NCTF W24 AK33 VCC
BB32 VCC_SM VCC_AXG_NCTF V24 AJ33 VCC
BA32 VCC_SM VCC_AXG_NCTF W23 AG33 VCC
AY32 VCC_SM VCC_AXG_NCTF V23 AF33 VCC
AW32 VCC_SM VCC_AXG_NCTF AM21
2898.52mA
AV32 VCC_SM VCC_AXG_NCTF AL21 Coupling CAP 370 mils from the Edge AE33 VCC
VCC CORE
AU32 VCC_SM VCC_AXG_NCTF AK21 AC33 VCC
AT32 VCC_SM VCC_AXG_NCTF W21 AA33 VCC
AR32 VCC_SM VCC_AXG_NCTF V21 Y33 VCC
3000mA
POWER
AP32 VCC_SM VCC_AXG_NCTF U21 Coupling CAP W33 VCC
SC10U6D3V5MX-3GP
AN32 VCC_SM VCC_AXG_NCTF AM20 V33 VCC
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD22U10V2KX-1GP
BH31 VCC_SM VCC_AXG_NCTF AK20 U33 VCC
ST220U2D5VBM-2GP
SC22U6D3V5MX-2GP
SCD47U6D3V2KX-GP
BG31 VCC_SM VCC_AXG_NCTF W20 AH28 VCC
1
C111
C113
C166
C156
SC1U10V3KX-3GP
BF31 VCC_SM VCC_AXG_NCTF U20 AF28 VCC
TC19
SCD1U10V2KX-4GP
BG30 VCC_SM VCC_AXG_NCTF AM19 AC28 VCC
1
C161
C170
C142
C164
BH29 AL19 1 AA28
2
BG29 VCC_SM VCC_AXG_NCTF AK19 AJ26 VCC
BF29 AJ19 2 AG26
2
BD29 VCC_SM VCC_AXG_NCTF AH19 AE26 VCC
VCC SM
BC29 VCC_SM VCC_AXG_NCTF AG19 AC26 VCC

BB29 VCC_SM VCC_AXG_NCTF AF19 AH25 VCC
BA29 VCC_SM VCC_AXG_NCTF AE19 AG25 VCC
AY29 VCC_SM VCC_AXG_NCTF AB19 Coupling CAP AF25 VCC
AW29 VCC_SM VCC_AXG_NCTF AA19 AG24 VCC
POWER
AV29 VCC_SM VCC_AXG_NCTF Y19 AJ23 VCC
AU29 W19 AH23 +1.05V_VCCP
AT29 VCC_SM VCC_AXG_NCTF V19 AF23 VCC
AR29 VCC_SM VCC_AXG_NCTF U19 VCC_NCTF AM32
AP29 AM17 1 R125 2 VCC_GMCH_35 T32 AL32
C VCC_SM VCC_AXG_NCTF
VCC_AXG_NCTF AK17 0R0402-PAD VCC VCC_NCTF
VCC_NCTF AK32 C
BA36 VCC_SM/NC VCC_AXG_NCTF AH17 SB VCC_NCTF AJ32
BB24 VCC_SM/NC VCC_AXG_NCTF AG17 VCC_NCTF AH32
BD16 AF17 Supply Signal Group Imax AG32
VCC GFX NCTF
VCC_SM/NC VCC_AXG_NCTF VCC_NCTF

BB21 VCC_SM/NC VCC_AXG_NCTF AE17 VCC_NCTF AE32
AW16 VCC_SM/NC VCC_AXG_NCTF AC17 +1.05V_VCCP VCC 2898.52mA VCC_NCTF AC32
AW13 VCC_SM/NC VCC_AXG_NCTF AB17 VCC_NCTF AA32
AT13 VCC_SM/NC VCC_AXG_NCTF Y17 +1.05V_VCCP VCC_AXG 8700mA VCC_NCTF Y32
VCC_AXG_NCTF W17 VCC_NCTF W32
+1.05V_VCCP
VCC_AXG_NCTF V17 +1.05V_VCCP VTT 852mA VCC_NCTF U32
VCC_AXG_NCTF AM16 VCC_NCTF AM30
Y26 VCC_AXG VCC_AXG_NCTF AL16 FOR VCC SM +1.05V_VCCP VCC_PEG 1782mA VCC_NCTF AL30
AE25 VCC_AXG VCC_AXG_NCTF AK16 Place CAP where VCC_NCTF AK30
AB25 VCC_AXG VCC_AXG_NCTF AJ16 LVDS and DDR2 taps +1.05V_VCCP VCC_DMI 456mA VCC_NCTF AH30
AA25 VCC_AXG VCC_AXG_NCTF AH16 VCC_NCTF AG30
AE24 VCC_AXG VCC_AXG_NCTF AG16
+1.8V_SUS
+1.05V_VCCP VCCA_SM 720mA VCC_NCTF AF30
AC24 VCC_AXG VCC_AXG_NCTF AF16 VCC_NCTF AE30
ST220U2D5VBM-2GP
AA24 VCC_AXG VCC_AXG_NCTF AE16 +1.05V_VCCP VCCA_SM_CK 26mA VCC_NCTF AC30
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
Y24 VCC_AXG VCC_AXG_NCTF AC16 VCC_NCTF AB30
TC21
AE23 VCC_AXG VCC_AXG_NCTF AB16 +1.05V_VCCP VCCA_HPLL 24mA VCC_NCTF AA30
1
1
C431
C426
C435
AC23 VCC_AXG VCC_AXG_NCTF AA16 VCC_NCTF Y30
AB23 VCC_AXG VCC_AXG_NCTF Y16
DY +1.05V_VCCP VCCA_MPLL 139.2mA VCC_NCTF W30
VCC NCTF
AA23 W16 V30
2
2
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AJ21 VCC_AXG VCC_AXG_NCTF V16 +1.05V_VCCP VCCD_HPLL 157.2mA VCC_NCTF U30
AG21 VCC_AXG VCC_AXG_NCTF U16 VCC_NCTF AL29
AE21 VCC_AXG +1.05V_VCCP VCCA_PEG_PLL 50mA VCC_NCTF AK29
AC21 VCC_AXG VCC_NCTF AJ29
AA21 VCC_AXG +1.05V_VCCP VCCD_PEG_PLL 50mA VCC_NCTF AH29
Y21 VCC_AXG
Place on the Edge VCC_NCTF AG29
AH20 VCC_AXG +1.05V_VCCP VCC_AXF 321.35mA VCC_NCTF AE29
B B
8700mA
AF20 VCC_AXG VCC_NCTF AC29

AE20 VCC_AXG +1.5V_RUN VCC_HDA 50mA VCC_NCTF AA29
AC20 VCC_AXG VCC_NCTF Y29
AB20 VCC_AXG +1.5V_RUN VCCD_TVDAC 35mA VCC_NCTF W29
AA20 VCC_AXG VCC_NCTF V29
T17 VCC_AXG +1.8V_SUS VCCD_LVDS 60.31mA VCC_NCTF AL28
T16 VCC_AXG VCC_NCTF AK28
AM15 VCC_AXG +1.8V_SUS VCC_SM 3000mA VCC_NCTF AL26
AL15 VCC_AXG VCC_NCTF AK26
AE15 VCC_AXG +1.8V_SUS VCC_SM_CK 124mA VCC_NCTF AK25
AJ15 VCC_AXG VCC_NCTF AK24
AH15 VCC_AXG +3.3V_RUN VCCA_PEG_BG 414uA VCC_NCTF AK23
AG15 VCC_AXG
AF15 VCC_AXG +3.3V_RUN VCC_HV 105.3mA
AB15 VCC_AXG
AA15 CANTIGA-GM-GP-U-NF
VCC_AXG
VCC GFX
Y15 VCC_AXG
V15 VCC_AXG
U15 VCC_AXG
AN14 VCC_AXG
AM14 VCC_AXG
U14 VCC_AXG VCC_SM_LF AV44 SM_LF1_GMCH
VCC SM LF
T14 VCC_AXG VCC_SM_LF BA37 SM_LF2_GMCH

VCC_SM_LF AM40 SM_LF3_GMCH
VCC_SM_LF AV21 SM_LF4_GMCH
VCC_SM_LF AY5 SM_LF5_GMCH
VCC_SM_LF AM10 SM_LF6_GMCH
BB13 SM_LF7_GMCH
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD47U6D3V2KX-GP
VCC_SM_LF
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1
C99
C92
C81
C134
C182
C178
C186
1
<Core Design>
A TP83
1VCC_AXG_SENSE
1VSS_AXG_SENSE
AJ14
AH14
VCC_AXG_SENSE 2
A
2
TP82 VSS_AXG_SENSE
Wistron Corporation
CANTIGA-GM-GP-U-NF Taipei Hsien 221, Taiwan, R.O.C.
Title
Cantiga-Power(4/6)
Custom -3
Roberts
Date: Monday, July 27, 2009 Sheet 11 of 59
5 4 3 2 1
+1.05V_VCCP
SSID = MCH
1 R152 2 M_VCCA_DPLLA
0R0603-PAD
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U10V2KX-4GP
1
1
C189
C188
C187
+3.3V_CRT_LDO
DY
SCD01U16V2KX-3GP
SCD1U10V2KX-4GP
2
2
1 R394 2 3D3V_CRTDAC_S0 +1.05V_VCCP
0R0603-PAD
1
C434
C433
U52H 8 OF 10
ST220U2D5VBM-LGP
SCD1U25V3KX-GP
SC2D2U10V3KX-1GP
SCD47U6D3V2KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
U13
D D
2
VTT
TC3
C143
C135
C123
C128
EC48
T13 1
VTT
1 R408 M_VCCA_DPLLB
73mA
2
0R0603-PAD
B27 VCCA_CRT_DAC VTT U12
DY
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U10V2KX-4GP
A26 T12 2
2
VCCA_CRT_DAC VTT
1
1
+3.3V_CRT_LDO
C448
C444
C439
VTT U11
SCD01U16V2KX-3GP
SCD1U10V2KX-4GP
DY 1 R390 2 M_VCCA_DAC_BG A25
VTT T11
U10
CRT
5mA
2
2 0R0603-PAD VCCA_DAC_BG VTT

B25 VSSA_DAC_BG VTT T10
1
C427
C423
VTT U9
T9
852mA
VTT
U8
2
+1.05V_VCCP VTT
64.8mA
M_VCCA_DPLLA F47 T8
VCCA_DPLLA VTT +1.05V_VCCP
SB U7
VTT
M_VCCA_DPLLB VTT +3.3V_RUN +3.3V_VCC_HV
L48 T7 D22
VCCA_DPLLB VTT
2
VTT U6 1
R351 +1.8V_SUS M_VCCA_HPLL AD1 T6 R396
PLL
VCCA_HPLL 24mA VTT
0R0603-PAD VTT U5 2 2 1 1 R398 2
1 R403 2 M_VCCA_MPLL AE1 VCCA_MPLL 139.2mA VTT T5 0R0402-PAD
1
L12 0R0402-PAD V3 3 10R2J-2-GP
1
VTT
1
1 2 M_VCCA_HPLL U3 C437
FCM1608KF-1-GP C441 1D8V_TXLVDS VTT BAT54-7-F-GP SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
J48 13.2mA V2
2
VCCA_LVDS VTT
1
1
C393
C387
120ohm 100MHz SC1KP50V2KX-1GP U2
A LVDS
2
VTT
J47 VSSA_LVDS VTT T2
V1
2
VTT
VTT U1
+1.5V_RUN
1 R402 2 VCCA_PEG_BG AD48 +1.05V_VCCP
0R0402-PAD VCCA_PEG_BG
1
414uA 1D05V_VCC_AXF 1 R373 2
SC1U10V3KX-3GP
L11 C442 0R0603-PAD
A PEG
1 2 M_VCCA_MPLL SCD1U10V2KX-4GP
C C
1
C408
FCM1608KF-1-GP 1D05V_RUN_PEGPLL
SCD1U10V2KX-4GP
AA48 VCCA_PEG_PLL 50mA

1
+1.05V_VCCP
C391
C384
C407
SC10U6D3V5MX-3GP
120ohm 100MHz DY SC10U6D3V5MX-3GP

DY
2
AR20
2
VCCA_SM
SC1U10V3KX-3GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC4D7U6D3V3KX-GP
AP20 VCCA_SM
AN20
1 VCCA_SM
POWER
1
1
C127
C126
C130
C129
AR17
720mA
VCCA_SM
DY AP17
AN17
VCCA_SM +1.8V_SUS
2
2
+1.05V_VCCP VCCA_SM
AT16 VCCA_SM
AR16 1 R97 2
A SM
L16 VCCA_SM 0R0805-PAD
AP16 VCCA_SM
2
1 2 1D05V_RUN_PEGPLL
BLM18BB221SN1D-GP +1.05V_VCCP R100
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1
C450
C443
SC10U6D3V5MX-3GP
220ohm 100MHz 1R3F-GP
C133
1 R120 1D05V_SM_CK
SC22U6D3V5MX-2GP
SC2D2U10V3KX-1GP
2
0R0603-PAD
SCD1U10V2KX-4GP
2
2 1
1
1
C140
C144
C157
2
DY AP28
321.35mA
VCCA_SM_CK C137
AN28 B22
2
VCCA_SM_CK VCC_AXF
26mA
AP25 B21 SC10U6D3V5MX-3GP
AXF
1
VCCA_SM_CK VCC_AXF
AN25 VCCA_SM_CK VCC_AXF A21
AN24 VCCA_SM_CK
+1.5V_RUN AM28 VCCA_SM_CK_NCTF +1.8V_SUS
AM26
A CK
VCCA_SM_CK_NCTF
AM25 VCCA_SM_CK_NCTF
+3.3V_CRT_LDO +3.3V_TV_DAC
SC1KP50V2KX-1GP
1 R115 2 1D5VRUN_TVDAC AL25 VCCA_SM_CK_NCTF VCC_SM_CK BF21 1D8V_TXLVDS_S3 1 R405 2
0R0603-PAD 0R0603-PAD
SCD1U10V2KX-4GP
SCD01U16V2KX-3GP
AM24 BH20
124mA
SM CK
VCCA_SM_CK_NCTF VCC_SM_CK
1
1
C153
C152
1 R378
SCD1U10V2KX-4GP
SCD01U16V2KX-3GP
2 AL24 VCCA_SM_CK_NCTF VCC_SM_CK BG20
1
C440
A00.08/0903 0R0402-PAD AM23 BF20
VCCA_SM_CK_NCTF VCC_SM_CK
1
B B
C417
C416
AL23 C449
2
VCCA_SM_CK_NCTF SC22U6D3V5MX-2GP
DY DY
2
2
K47 +3.3V_VCC_HV
118.8mA VCC_TX_LVDS
79mA
B24 VCCA_TV_DAC
105.3mA
A24 C35
TV
L3 VCCA_TV_DAC VCC_HV
B35
HV
1D5VRUN_QDAC VCC_HV
1 2 VCC_HV A35
HCB1608K-181T20GP +1.05V_VCCP
SCD1U10V2KX-4GP
SCD01U16V2KX-3GP
1
1
C154
C158
180ohm 100MHz 1 R395 2 VCC_HDA A32 VCC_HDA 50mA HDA

0R0402-PAD V48
VCC_PEG
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC4D7U6D3V3KX-GP
U48
1782mA
2
VCC_PEG
V47
PEG
VCC_PEG
1
C447
C191
C445
U47
D TV/CRT
1D5VRUN_TVDAC VCC_PEG C446
M25 VCCD_TVDAC 35mA VCC_PEG U46
SC10U6D3V5MX-3GP
2
+1.05V_VCCP 1D5VRUN_QDAC L28 VCCD_QDAC 2mA
VCC_DMI AH48
1 R360 2 1D05V_RUN_HPLL AF1
456mA
AF48
DMI
0R0603-PAD VCCD_HPLL 157.2mA VCC_DMI
VCC_DMI AH47
+5V_RUN 1D05V_RUN_PEGPLL +1.05V_VCCP
SCD1U10V2KX-4GP
AA47 VCCD_PEG_PLL 50mA VCC_DMI AG47

1
1
C385
C438 M38
VTTLF
VCCD_LVDS
LVDS
SCD1U10V2KX-4GP L37 A8 VTTLF1

2
VCCD_LVDS VTTLF
1
1
L1 VTTLF2
C436 VTTLF VTTLF3 C185
60.31mA VTTLF AB2
SC1U10V3KX-3GP U53 SCD1U10V2KX-4GP
2
2
1 EN +1.8V_SUS
A CANTIGA-GM-GP-U-NF
A
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
2 GND <Core Design>
3 VIN
C395
C394
C90
4 1 R140 2 1D8V_SUS_DLVDS 1 1 1
+3.3V_CRT_LDO VOUT 0R0603-PAD
5 NC#5 2 2 2 Wistron Corporation
1

C419 G9091-330T12U-GP C181 Taipei Hsien 221, Taiwan, R.O.C.
SC10U6D3V5MX-3GP Main source: SCD1U10V2KX-4GP
2
Title
74.09091.H3F
2nd source:
74.09198.07F Size Document Number
Cantiga-Power/Filter(5/6) Rev
Custom -3
Reserved for TV ripple Roberts
5 4 3 2 1
+1.05V_VCCP
SSID = MCH
2
U52I 9 OF 10 U52J 10 OF 10 U52C 3 OF 10 R133
LBKLT_CTL
BG21 AH8 GMCH_BL_ON 49D9R2F-GP
VSS VSS
AU48 VSS VSS AM36 L12 VSS VSS Y8
AR48 AE36 AW21 L8
1
VSS VSS VSS VSS RN41
AL48 VSS VSS P36 AU21 VSS VSS E8 L32 L_BKLT_CTRL
BB47 L36 AP21 B8 +3.3V_RUN 4 1 L_CTRL_DATA G32 T37 PEG_CMP
VSS VSS VSS VSS L_CTRL_CLK L_BKLT_EN PEG_COMPI
AW47 VSS VSS J36 AN21 VSS VSS AY7 3 2 M32 L_CTRL_CLK PEG_COMPO T36
AN47 F36 AH21 AU7 +3.3V_RUN
VSS VSS VSS VSS SRN10KJ-5-GP
AJ47 VSS VSS B36 AF21 VSS VSS AN7 RN19 M33 L_CTRL_DATA Place R105
AF47 AH35 AB21 AJ7 1 4 LDDC_CLK K33 H44
D AD47
VSS
VSS
VSS
VSS AA35 R21
VSS
VSS
VSS
VSS AE7 2 3 LDDC_DATA
LDDC_CLK
LDDC_DATA J33
L_DDC_CLK
L_DDC_DATA
PEG_RX#_0
PEG_RX#_1 J46 close to D
AB47 VSS VSS Y35 M21 VSS VSS AA7 LCDVDD_EN PEG_RX#_2 L44 MCH within
Y47 U35 J21 N7 L40
T47
VSS VSS
T35 G21
VSS VSS
J7 SRN2K2J-1-GP M29
PEG_RX#_3
N41
500 mils.
VSS VSS VSS VSS R144 2 L_VDD_EN PEG_RX#_4
N47 VSS VSS BF34 BC20 VSS VSS BG6 1 2K37R2F-GP LIBG C44 LVDS_IBG PEG_RX#_5 P48
L47 AM34 BA20 BD6 1 LVDS_VBG B43 N44
VSS VSS VSS VSS TP225 LVDS_VBG PEG_RX#_6
G47 VSS VSS AJ34 AW20 VSS VSS AV6 E37 LVDS_VREFH PEG_RX#_7 T43
BD46 VSS VSS AF34 AT20 VSS VSS AT6 E38 LVDS_VREFL PEG_RX#_8 U43
BA46 VSS VSS AE34 AJ20 VSS VSS AM6 VGA_TXACLK- C41 LVDSA_CLK# PEG_RX#_9 Y43
AY46 VSS VSS W34 AG20 VSS VSS M6 VGA_TXACLK+ C40 LVDSA_CLK PEG_RX#_10 Y48
AV46 VSS VSS B34 Y20 VSS VSS C6 VGA_TXBCLK- B37 LVDSB_CLK# PEG_RX#_11 Y36
AR46 VSS VSS A34 N20 VSS VSS BA5 VGA_TXBCLK+ A37 LVDSB_CLK PEG_RX#_12 AA43
LVDS
AM46 VSS VSS BG33 K20 VSS VSS AH5 PEG_RX#_13 AD37
V46 VSS VSS BC33 F20 VSS VSS AD5 VGA_TXAOUT0- H47 LVDSA_DATA#_0 PEG_RX#_14 AC47
R46 VSS VSS BA33 C20 VSS VSS Y5 VGA_TXAOUT1- E46 LVDSA_DATA#_1 PEG_RX#_15 AD39
P46 VSS VSS AV33 A20 VSS VSS L5 VGA_TXAOUT2- G40 LVDSA_DATA#_2
H46 VSS VSS AR33 BG19 VSS VSS J5 A40 LVDSA_DATA#_3 PEG_RX_0 H43
GRAPHICS
F46 VSS VSS AL33 A18 VSS VSS H5 PEG_RX_1 J44
BF44 VSS VSS AH33 BG17 VSS VSS F5 VGA_TXAOUT0+ H48 LVDSA_DATA_0 PEG_RX_2 L43
AH44 VSS VSS AB33 BC17 VSS VSS BE4 VGA_TXAOUT1+ D45 LVDSA_DATA_1 PEG_RX_3 L41
AD44 VSS VSS P33 AW17 VSS VGA_TXAOUT2+ F40 LVDSA_DATA_2 PEG_RX_4 N40
AA44 L33 AT17 BC3 B40 P47
Y44
U44
VSS
VSS
VSS
VSS
VSS
VSS
H33
N32
R17
M17
VSS
VSS
VSS
VSS VSS
VSS
VSS
AV3
AL3 VGA_TXBOUT0- A41
LVDSA_DATA_3
LVDSB_DATA#_0
PEG_RX_5
PEG_RX_6
PEG_RX_7
N43
T42
T44 K32 H17 R3 H38 U42
M44
F44
VSS
VSS
VSS
VSS VSS
VSS
VSS
F32
C32
C17
VSS
VSS
VSS
VSS
VSS
P3
F3
VGA_TXBOUT1-
VGA_TXBOUT2- G37
J37
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
PEG_RX_8
PEG_RX_9
PEG_RX_10
Y42
W47
BC43 VSS VSS A31 BA16 VSS VSS BA2 PEG_RX_11 Y37
AV43 VSS VSS AN29 VSS AW2 VGA_TXBOUT0+ B42 LVDSB_DATA_0 PEG_RX_12 AA42
AU43 T29 AU16 AU2 VGA_TXBOUT1+ G38 AD36
C AM43
VSS
VSS
VSS
VSS N29 AN16
VSS
VSS
VSS
VSS AR2 VGA_TXBOUT2+ F37
LVDSB_DATA_1
LVDSB_DATA_2
PEG_RX_13
PEG_RX_14 AC48 C
PCI-EXPRESS
J43 VSS VSS K29 N16 VSS VSS AP2 K37 LVDSB_DATA_3 PEG_RX_15 AD40
C43 VSS VSS H29 K16 VSS VSS AJ2
BG42 VSS VSS F29 G16 VSS VSS AH2 PEG_TX#_0 J41
AY42 VSS VSS A29 E16 VSS VSS AF2 PEG_TX#_1 M46
AT42 BG28 BG15 AE2 R389 1 2 75R2F-2-GP TV_DACA F25 M47
VSS VSS VSS VSS R386 1 TVA_DAC PEG_TX#_2
AN42 VSS VSS BD28 AC15 VSS VSS AD2 2 75R2F-2-GP TV_DACB H25 TVB_DAC PEG_TX#_3 M40
AJ42 BA28 W15 AC2 R385 1 2 75R2F-2-GP TV_DACC K25 M42
VSS VSS VSS VSS TVC_DAC PEG_TX#_4
AE42 VSS VSS AV28 A15 VSS VSS Y2 PEG_TX#_5 R48
N42 VSS VSS AT28 BG14 VSS VSS M2 H24 TV_RTN PEG_TX#_6 N38
TV
L42 VSS VSS AR28 AA14 VSS VSS K2 PEG_TX#_7 T40
BD41 VSS VSS AJ28 C14 VSS VSS AM1 PEG_TX#_8 U37
AU41 VSS VSS AG28 BG13 VSS VSS AA1 PEG_TX#_9 U40
AM41 VSS VSS AE28 BC13 VSS VSS P1 C31 TV_DCONSEL_0 PEG_TX#_10 Y40
AH41 VSS VSS AB28 BA13 VSS VSS H1 E32 TV_DCONSEL_1 PEG_TX#_11 AA46
AD41 VSS VSS Y28 PEG_TX#_12 AA37
AA41 VSS VSS P28 VSS U24 PEG_TX#_13 AA40
Y41 VSS VSS K28 AN13 VSS VSS U28 PEG_TX#_14 AD43
U41 VSS VSS H28 AJ13 VSS VSS U25 PEG_TX#_15 AC46
T41 VSS VSS F28 AE13 VSS VSS U29
M41 C28 N13 M_BLUE M_BLUE E28 J42
VSS VSS VSS R376 1 CRT_BLUE PEG_TX_0
G41 VSS VSS BF26 L13 VSS 2 150R2F-1-GP PEG_TX_1 L46
B41 AH26 G13 AF32 M_GREEN M_GREEN G28 M48
VSS VSS VSS VSS_NCTF R379 1 CRT_GREEN PEG_TX_2
BG40 VSS VSS AF26 E13 VSS VSS_NCTF AB32 2 150R2F-1-GP PEG_TX_3 M39
BB40 AB26 BF12 V32 M_RED M_RED J28 M43
VSS VSS VSS VSS_NCTF R381 1 150R2F-1-GP CRT_RED PEG_TX_4
AV40 VSS VSS AA26 AV12 VSS VSS_NCTF AJ30 2 PEG_TX_5 R47
VGA
AN40 VSS VSS C26 AT12 VSS VSS_NCTF AM29 G29 CRT_IRTN PEG_TX_6 N37
H40 VSS VSS B26 AM12 VSS VSS_NCTF AF29 PEG_TX_7 T39
E40 BH25 AA12 AB29 GMCH_DDCCLK H32 U36
VSS NCTF
VSS VSS VSS VSS_NCTF GMCH_DDCDATA CRT_DDC_CLK PEG_TX_8

AT39 VSS VSS BD25 J12 VSS VSS_NCTF U26 J32 CRT_DDC_DATA PEG_TX_9 U39
B AM39
AJ39
VSS VSS BB25
AV25
A12
BD11
VSS VSS_NCTF U23
AL20
GMCH_HSYNC 1
R123
2 GMCH_HS
33R2J-2-GP
J29
E29
CRT_HSYNC PEG_TX_10 Y39
Y46
B
VSS VSS VSS VSS_NCTF CRT_TVO_IREF PEG_TX_11
AE39 VSS VSS AR25 BB11 VSS VSS_NCTF V20 L29 CRT_VSYNC PEG_TX_12 AA36
N39 VSS VSS AJ25 AY11 VSS VSS_NCTF AC19 CRT_IREF PEG_TX_13 AA39
L39 AC25 AN11 AL17 1 2 CRT_IREF AD42
B39
VSS VSS
Y25 AH11
VSS VSS_NCTF
AJ17 routing Trace R124 1K02R2F-1-GP PEG_TX_14
AD46
VSS VSS VSS VSS_NCTF PEG_TX_15
BH38 VSS VSS N25 VSS_NCTF AA17 width use 20 mil.
BC38 VSS VSS L25 Y11 VSS VSS_NCTF U17
BA38 J25 N11 GMCH_VSYNC 1 2 GMCH_VS CANTIGA-GM-GP-U-NF
VSS VSS VSS R392 33R2J-2-GP
AU38 VSS VSS G25 G11 VSS
AH38 E25 C11 BH48 GMCH_GND11
VSS SCB
VSS VSS VSS VSS_SCB GMCH_GND21 TP103

AD38 VSS VSS BF24 BG10 VSS VSS_SCB BH1 NCTF
AA38 AD12 AV10 A48 GMCH_GND31 TP80
Y38
VSS VSS
AY24 AT10
VSS VSS_SCB
C1 GMCH_GND41 TP226 PIN +3.3V_RUN
VSS VSS VSS VSS_SCB TP78 RN2
U38 VSS VSS AT24 AJ10 VSS VSS_SCB A3
T38 VSS VSS AJ24 AE10 VSS 3 2
J38 VSS VSS AH24 AA10 VSS NC#E1 E1 4 1
F38 AF24 M10 D2 +3.3V_RUN
VSS VSS VSS NC#D2 SRN2K2J-1-GP
C38 VSS VSS AB24 BF9 VSS NC#C3 C3
BF37 VSS VSS R24 BC9 VSS NC#B4 B4
BB37 VSS VSS L24 AN9 VSS NC#A5 A5
AW37 K24 AM9 A6 U4
VSS VSS VSS NC#A6
AT37 VSS VSS J24 AD9 VSS NC#A43 A43
AN37 G24 G9 A44 GMCH_DDCDATA 4 3 DDC_DATA_CON
VSS VSS VSS NC#A44 DDC_DATA_CON
AJ37 F24 B9 B45
NC
VSS VSS VSS NC#B45

H37 VSS VSS E24 BH8 VSS NC#C46 C46 5 2
C37 VSS VSS BH23 BB8 VSS NC#D47 D47
BG36 AG23 AV8 B47 DDC_CLK_CON 6 1 GMCH_DDCCLK
VSS VSS VSS NC#B47 DDC_CLK_CON
BD36 VSS VSS Y23 AT8 VSS NC#A46 A46
AK15 VSS VSS B23 NC#F48 F48 5V @ ext. CRT side
A AU36 VSS VSS A23
AJ6
NC#E48 E48
C48
2N7002SPT <Core Design> A
VSS NC#C48
NC#B48 B48
CANTIGA-GM-GP-U-NF Wistron Corporation

CANTIGA-GM-GP-U-NF 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size
Cantiga-GND/LVDS/VGA(6/6)
Document Number Rev
Custom -3
Roberts
5 4 3 2 1
DM2
M_A_A0 102 108

SSID = MEMORY M_A_A1
M_A_A2
101
100
A0
A1
A2
RAS#
WE#
CAS#
109
113
M_A_RAS#
M_A_WE#
M_A_CAS#
put near connector
M_A_A3 99 M_CLK_DDR0
M_A_A4 A3 M_CLK_DDR#0
98 A4 CS0# 110 M_CS0#
M_A_A5 97 115 M_CS1# M_CLK_DDR1
M_A_A6 A5 CS1# M_CLK_DDR#1
94 A6
M_A_A7 92 79 M_CKE0
M_A_A8 A7 CKE0
93 A8 CKE1 80 M_CKE1
M_A_A9 91
M_A_DQS#[7..0] A9
M_A_A10 105 30 M_CLK_DDR0 M_CLK_DDR0
A10/AP CK0
1
M_A_A11 90 32 M_CLK_DDR#0 M_CLK_DDR#0
M_A_DQ[63..0] A11 CK0#
M_A_A12
DUMMY-C2
DUMMY-C2
DUMMY-C2
DUMMY-C2
89 A12
D D
C72
C74
C192
C195
M_A_A13 116 164 M_CLK_DDR1 M_CLK_DDR1
M_A_DM[7..0] A13 CK1
M_A_A14 86 166 M_CLK_DDR#1 M_CLK_DDR#1
A14 CK1#
M_A_DQS[7..0] 84 A15
M_A_BS#2 85 10 M_A_DM0
2
M_A_BS#2 A16/BA2 DM0 M_A_DM1
M_A_A[14..0] DM1 26
M_A_BS#0 107 52 M_A_DM2
M_A_BS#0 M_A_BS#1 BA0 DM2 M_A_DM3
M_A_BS#1 106 BA1 DM3 67
130 M_A_DM4
DM4 M_A_DM5
DM5 147
M_A_DQ0 5 170 M_A_DM6
M_A_DQ1 DQ0 DM6 M_A_DM7
7 DQ1 DM7 185
M_A_DQ2 17
M_A_DQ3
M_A_DQ4
M_A_DQ5
19
4
DQ2
DQ3
DQ4 SDA 195 ICH_SMBDATA
ICH_SMBCLK
-1
ICH_SMBDATA
6 DQ5 SCL 197 ICH_SMBCLK
M_A_DQ6 14
M_A_DQ7 DQ6
16 DQ7 VDDSPD 199 +3.3V_RUN
M_A_DQ8 23 +3.3V_RUN
M_A_DQ9 DQ8
25 DQ9 SA0 198 1 R55 2 0R0402-PAD
M_A_DQ10 35 200 1 R56 2 0R0402-PAD
M_A_DQ11 DQ10 SA1
SCD1U16V2KX-3GP
SC2D2U10V3KX-1GP
37 DQ11
M_A_DQ12 20 50 PM_EXTTS#0
DQ12 NC#50
1
C54
C53
Layout Note: M_A_DQ13 22 69
+1.8V_SUS M_A_DQ14 DQ13 NC#69
36 83
Place near DM1 M_A_DQ15 38
DQ14 NC#83
120
DY
2
M_A_DQ16 DQ15 NC#120
43 DQ16 NC#163/TEST 163
M_A_DQ17 +1.8V_SUS
ST220U2D5VBM-LGP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
45 DQ17
M_A_DQ18
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
55 DQ18
M_A_DQ19 57 81
DQ19 VDD
1
TC8
C93
C132
C122
C160
C138
C116
C109
C100
C106
C
M_A_DQ20 44 82 C
M_A_DQ21 DQ20 VDD
DY DY DY DY M_A_DQ22
46
56
DQ21 VDD 87
88
2
2
M_A_DQ23 DQ22 VDD
58 DQ23 VDD 95
M_A_DQ24 61 96
M_A_DQ25 DQ24 VDD
63 DQ25 VDD 103
M_A_DQ26 73 104
M_A_DQ27 DQ26 VDD
75 DQ27 VDD 111 Layout Note:
M_A_DQ28 62 112
M_A_DQ29 DQ28 VDD Place these resistors close to DM1,
64 DQ29 VDD 117
M_A_DQ30 74 118 all trace length Max=1.5".
M_A_DQ31 DQ30 VDD
76 DQ31
M_A_DQ32 123 3
M_A_DQ33 DQ32 VSS +0.9V_DDR_VTT
125 DQ33 VSS 8
M_A_DQ34 135 9
M_A_DQ35 DQ34 VSS RN37 RN6
137 DQ35 VSS 12
M_A_DQ36 124 15 M_A_A9 1 4 4 1
M_A_DQ37 DQ36 VSS M_A_A12 M_A_A13
126 DQ37 VSS 18 2 3 3 2
Layout Note: M_A_DQ38 134 21
M_A_DQ39 DQ38 VSS SRN56J-4-GP SRN56J-4-GP
Place one cap close to every 2 pullup 136 DQ39 VSS 24
M_A_DQ40 141 27
resistors terminated to +0.9V_DDR_VTT. M_A_DQ41 DQ40 VSS RN31 RN35
143 DQ41 VSS 28
+0.9V_DDR_VTT M_A_DQ42 151 33 M_A_A10 4 1 4 1 M_A_A5
M_A_DQ43 DQ42 VSS M_A_BS#0 M_A_A8
153 DQ43 VSS 34 3 2 3 2
M_A_DQ44 140 39
142 DQ45 VSS 40
M_A_DQ46
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
152 DQ46 VSS 41
M_A_DQ47 154 42 RN4 RN10
DQ47 VSS
1
1
C96
C83
C87
C101
C409
C103
C432
C114
C118
C119
C115
C428
C420
M_A_DQ48 157 47 M_ODT0 4 1 4 1 M_A_A6

M_A_DQ49 DQ48 VSS M_CS0# M_A_A2
B
DY DY DY DY DY DY M_A_DQ50
159
173
DQ49 VSS 48
53
3 2 3 2
B
2

175 DQ51 VSS 54
M_A_DQ52 158 59
160 DQ53 VSS 60
M_A_DQ54 174 65 M_CKE1 4 1 4 1 M_A_A1
M_A_DQ55 DQ54 VSS M_A_A14 M_A_A3
176 DQ55 VSS 66 3 2 3 2
M_A_DQ56 179 71
181 DQ57 VSS 72
M_A_DQ58 189 77
191 DQ59 VSS 78
M_A_DQ60 180 121 M_A_WE# 4 1 1 4 M_CKE0
M_A_DQ61 DQ60 VSS M_A_CAS# M_A_BS#2
182 DQ61 VSS 122 3 2 2 3
M_A_DQ62 192 127
194 DQ63 VSS 128
VSS 132
M_A_DQS#0 11 133 RN28 RN8
M_A_DQS#1 DQS0# VSS M_CS1# M_A_BS#1
29 DQS1# VSS 138 4 1 4 1
M_A_DQS#2 49 139 M_ODT1 3 2 3 2 M_A_RAS#
M_A_DQS#3 DQS2# VSS
68 DQS3# VSS 144
M_A_DQS#4 129 145 SRN56J-4-GP SRN56J-4-GP
M_A_DQS#5 DQS4# VSS
146 DQS5# VSS 149
M_A_DQS#6 167 150 RN11 RN17
M_A_DQS#7 DQS6# VSS M_A_A11 M_A_A0
186 DQS7# VSS 155 4 1 4 1
156 M_A_A7 3 2 3 2 M_A_A4
M_A_DQS0 VSS
13 DQS0 VSS 161
M_A_DQS1 31 162 SRN56J-4-GP SRN56J-4-GP
M_A_DQS2 DQS1 VSS
51 DQS2 VSS 165
M_A_DQS3 70 168
M_A_DQS4 DQS3 VSS
131 DQS4 VSS 171
M_A_DQS5 148 172
A M_A_DQS6 DQS5 VSS A
169 DQS6 VSS 177 <Core Design>
M_A_DQS7 188 178
DQS7 VSS
VSS 183
M_ODT0
+V_DDR_MCH_REF
M_ODT0
M_ODT1 M_ODT1
114
119
OTD0
OTD1
VSS
VSS
184
187 Wistron Corporation
190 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS Taipei Hsien 221, Taiwan, R.O.C.
1 VREF VSS 193
2 VSS VSS 196
1
Title
C203 C202
SCD1U16V2KX-3GP DY SC2D2U10V3KX-1GP
202 GND GND 201
DDRII-SODIMM SLOT1
2
MH1 MH2 Size Document Number Rev

MH1 MH2 Custom
Roberts -3
SKT-SODIMM200-37GP 62.10017.E21 Date: Tuesday, August 11, 2009 Sheet 14 of 59
5 4 3 2 1
5 4 3 2 1
DM1
MH1 MH2
SSID = MEMORY M_B_A0 102
MH1
A0
MH2
DQS0 13 M_B_DQS0
put near connector
M_B_A1 101 31 M_B_DQS1 M_CLK_DDR2
M_B_A2 A1 DQS1 M_B_DQS2 M_CLK_DDR#2
100 A2 DQS2 51
M_B_A3 99 70 M_B_DQS3 M_CLK_DDR3
M_B_A4 A3 DQS3 M_B_DQS4 M_CLK_DDR#3
98 A4 DQS4 131
M_B_A5 97 148 M_B_DQS5
M_B_A6 A5 DQS5 M_B_DQS6
94 A6 DQS6 169
M_B_A7 92 188 M_B_DQS7
M_B_A8 A7 DQS7 M_B_DQS#0
M_B_DQS#[7..0] 93 A8 DQS0# 11
1
M_B_A9 91 29 M_B_DQS#1
M_B_A10 A9 DQS1# M_B_DQS#2
DUMMY-C2
DUMMY-C2
DUMMY-C2
DUMMY-C2
M_B_DQ[63..0] 105 A10/AP DQS2# 49
D D
C71
C75
C193
C197
M_B_A11 90 68 M_B_DQS#3
M_B_DM[7..0] 89 A12 DQS4# 129
M_B_A13 116 146 M_B_DQS#5
M_B_DQS[7..0] 86 167
2
A14 DQS6# M_B_DQS#7
84 A15 DQS7# 186
M_B_BS#2 85
M_B_A[14..0] M_B_BS#2 A16_BA2
10 M_B_DM0
M_B_BS#0 DM0 M_B_DM1
M_B_BS#0 107 BA0 DM1 26
M_B_BS#1 106 52 M_B_DM2
M_B_BS#1 BA1 DM2 M_B_DM3
DM3 67
M_B_DQ0 5 130 M_B_DM4
M_B_DQ1 DQ0 DM4 M_B_DM5
7 DQ1 DM5 147
M_B_DQ2 17 170 M_B_DM6
M_B_DQ3
M_B_DQ4
M_B_DQ5
19
4
DQ2
DQ3
DQ4
DM6
DM7 185 M_B_DM7
M_CLK_DDR2
-1 +3.3V_RUN
6 DQ5 CK0 30 M_CLK_DDR2
M_B_DQ6 14 32 M_CLK_DDR#2 M_CLK_DDR#2
M_B_DQ7 DQ6 CK0# M_CLK_DDR3
16 DQ7 CK1 164 M_CLK_DDR3
M_B_DQ8 M_CLK_DDR#3
SCD1U16V2KX-3GP
SC2D2U10V3KX-1GP
23 DQ8 CK1# 166 M_CLK_DDR#3
M_B_DQ9 25 DQ9
1
C52
C56
M_B_DQ10 35 198 1 R57 2 0R0402-PAD
M_B_DQ11 DQ10 SA0
Layout Note: 1 R54 2 0R0402-PAD
+1.8V_SUS M_B_DQ12
37
20
DQ11 SA1 200 +3.3V_RUN DY
Place near DM2
2
M_B_DQ13 DQ12
22 DQ13 VDD_SPD 199 +3.3V_RUN
1
M_B_DQ14 36
M_B_DQ15 DQ14 +1.8V_SUS
ST220U2D5VBM-LGP
EC12
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
38 DQ15
M_B_DQ16 43 81 SCD1U25V3KX-GP
2
M_B_DQ17 DQ16 VDD
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
45 DQ17 VDD 82
C
M_B_DQ18 55 87 C
DQ18 VDD
1
TC4
C97
C136
C107
C112
C105
C124
C150
C104
C131
M_B_DQ19 57 88
M_B_DQ20 DQ19 VDD
DY DY DY M_B_DQ21
44
46
DQ20 VDD 95
96
2
2
M_B_DQ22 DQ21 VDD
56 DQ22 VDD 103
M_B_DQ23 58 104
M_B_DQ24 DQ23 VDD
61 DQ24 VDD 111 Layout Note:
M_B_DQ25 63 112
M_B_DQ26 DQ25 VDD Place these resistors close to DM2,
73 DQ26 VDD 117
M_B_DQ27 75 118 all trace length Max=1.5".
M_B_DQ28 DQ27 VDD
62 DQ28
M_B_DQ29 64 2
M_B_DQ30 DQ29 VSS +0.9V_DDR_VTT
74 DQ30 VSS 3
M_B_DQ31 76 8
M_B_DQ32 DQ31 VSS RN7 RN27
123 DQ32 VSS 9
M_B_DQ33 125 12 M_B_WE# 4 1 4 1 M_ODT2
M_B_DQ34 DQ33 VSS M_B_CAS# M_B_A13
135 DQ34 VSS 15 3 2 3 2
M_B_DQ35 137 18
M_B_DQ36 DQ35 VSS SRN56J-4-GP SRN56J-4-GP
124 DQ36 VSS 21
Layout Note: M_B_DQ37 126 24
Place one cap close to every 2 pullup 134 DQ38 VSS 27
M_B_DQ39 136 28 M_B_BS#2 4 1 4 1 M_B_A14
+0.9V_DDR_VTT resistors terminated to +0.9V_DDR_VTT. M_B_DQ40 DQ39 VSS M_CKE2 M_B_A11
141 DQ40 VSS 33 3 2 3 2
M_B_DQ41 143 34
M_B_DQ42 DQ41 VSS SRN56J-4-GP SRN56J-4-GP
151 DQ42 VSS 39
M_B_DQ43 153 40
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
140 DQ44 VSS 41
M_B_DQ45 142 42 M_B_A5 4 1 4 1 M_B_A7
DQ45 VSS
1
1
C95
C88
C430
C415
C425
C418
C414
C406
C405
C410
C117
C404
C102
M_B_DQ46 152 47 M_B_A8 3 2 3 2 M_B_A6

M_B_DQ47 DQ46 VSS
B
DY DY DY DY M_B_DQ48
154
157
DQ47 VSS 48
53 SRN56J-4-GP SRN56J-4-GP B
2
M_B_DQ49 DQ48 VSS

159 DQ49 VSS 54
M_B_DQ50 173 59 RN32 RN34
M_B_DQ51 DQ50 VSS M_B_BS#1 M_B_A4
175 DQ51 VSS 60 4 1 4 1
M_B_DQ52 158 65 M_B_A0 3 2 3 2 M_B_A2
M_B_DQ53 DQ52 VSS
160 DQ53 VSS 66
M_B_DQ54 174 71 SRN56J-4-GP SRN56J-4-GP
M_B_DQ55 DQ54 VSS
176 DQ55 VSS 72
M_B_DQ56 179 77 RN15 RN9
M_B_DQ57 DQ56 VSS M_B_A1 M_B_A10
181 DQ57 VSS 78 4 1 4 1
M_B_DQ58 189 121 M_B_A3 3 2 3 2 M_B_BS#0
M_B_DQ59 DQ58 VSS
191 DQ59 VSS 122
M_B_DQ60 180 127 SRN56J-4-GP SRN56J-4-GP
M_B_DQ61 DQ60 VSS
182 DQ61 VSS 128
M_B_DQ62 192 132 RN5 RN30
M_B_DQ63 DQ62 VSS M_ODT3 M_B_RAS#
194 DQ63 VSS 133 4 1 4 1
138 M_CS3# 3 2 3 2 M_CS2#
VSS
PM_EXTTS#1 50 NC#50 VSS 139
69 144 SRN56J-4-GP SRN56J-4-GP
NC#69 VSS
83 NC#83 VSS 145
120 149 RN40 RN14
NC#120 VSS M_CKE3 M_B_A12
163 NC#163/TEST VSS 150 4 1 4 1
155 3 2 3 2 M_B_A9
VSS
M_CS2# 110 CS0# VSS 156
M_CS3# 115 161 SRN56J-4-GP SRN56J-4-GP
CS1# VSS
M_CKE2 79 CKE0 VSS 162
M_CKE3 80 CKE1 VSS 165
M_B_RAS# 108 RAS# VSS 168
M_B_CAS# 113 CAS# VSS 171
M_B_WE# 109 WE# VSS 172
A A
VSS 177 <Core Design>
ICH_SMBCLK 197 178
ICH_SMBCLK SCL VSS
ICH_SMBDATA 195 183
ICH_SMBDATA SDA VSS
M_ODT2 M_ODT2 114 ODT0

VSS
VSS
184
+V_DDR_MCH_REF M_ODT3 119 190 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
M_ODT3 ODT1 VSS Taipei Hsien 221, Taiwan, R.O.C.
VSS 193
1 VREF VSS 196
Title
1
201 202
C200 C201 GND GND
Size
DDRII-SODIMM SLOT2
Document Number Rev
SCD1U16V2KX-3GP SC2D2U10V3KX-1GP
2
SKT-SODIMM200-38GP Custom -3
62.10017.E31
Roberts
5 4 3 2 1
5 4 3 2 1
2 OF 6 +3.3V_RUN
SSID = ICH +3.3V_RUN
D11
U25B
AD0 REQ0# F1 PCI_REQ0# RN57
PCI_GNT0# PCI_PIRQF#
5 OF 6
C8
D9
AD1 PCI GNT0# G4
B6 PCI_REQ1# PCI_TRDY#
8
7
1
2
U25E U32 AD2 REQ1#/GPIO50 PCI_GNT1# PCI_REQ3#
E12 AD3 GNT1#/GPIO51 A7 1 6 3
AA26 H5 1 E9 F13 PCI_REQ2# TP179 PCI_PIRQD# 5 4
VSS VSS B AD4 REQ2#/GPIO52 PCI_GNT2#
AA27 VSS VSS J23 5 VCC C9 AD5 GNT2#/GPIO53 F12 1
PCI_PLTRST# PCI_REQ3# TP261 SRN8K2J-4-GP
AA3
AA6
VSS VSS J26
J27 PLT_RST# PLT_RST# 4
DY A 2 E10
B7
AD6 REQ3#/GPIO54 E6
F6 PCI_GNT3#
VSS VSS Y AD7 GNT3#/GPIO55 RN25
AB1 VSS VSS AC22 GND 3 C7 AD8
AA23 K28 C5 D8 PCI_PIRQB# 8 1
VSS VSS 74LVC1G08GW-1-GP AD9 C/BE0# PCI_PIRQG#
AB28 VSS VSS K29 G11 AD10 C/BE1# B4 7 2
D PCI_REQ0# D
AB29 VSS VSS L13 F8 AD11 C/BE2# D6 6 3
AB4 L15 1 R262 2 F11 A5 PCI_PIRQH# 5 4
VSS VSS 0R0402-PAD AD12 C/BE3#
AB5 VSS VSS L2 E7 AD13
AC17 L26 A3 D3 PCI_IRDY# SRN8K2J-4-GP
VSS VSS AD14 IRDY#
AC26 VSS VSS L27 D2 AD15 PAR E3
AC27 L5 F10 R1 PCIRST1# 1 RN26
VSS VSS AD16 PCIRST# PCI_DEVSEL# TP135 PCI_STOP#
AC3 VSS VSS L7 D5 AD17 DEVSEL# C6 8 1
AD1 M12 D10 E4 PCI_PERR# PCI_PLOCK# 7 2
VSS VSS AD18 PERR# PCI_PLOCK# PCI_IRDY#
AD10 VSS VSS M13 B3 AD19 PLOCK# C2 6 3
AD12 M14 F7 J4 PCI_SERR# PCI_PERR# 5 4
VSS VSS +3.3V_RUN AD20 SERR# PCI_STOP#
AD13 VSS VSS M15 C3 AD21 STOP# A4
AD14 M16 R245 F3 F5 PCI_TRDY# SRN8K2J-4-GP
VSS VSS AD22 TRDY# PCI_FRAME#
AD17
AD18
VSS VSS M17
M23
1
DY 2 F4
C1
AD23 FRAME# D7
RN58
VSS VSS AD24
1
AD21 M28 10KR2J-3-GP G7 C14 PCI_PLTRST# PCI_DEVSEL# 8 1
VSS VSS R240 C315 AD25 PLTRST# PCI_REQ1#
AD28
AD29
VSS VSS M29
N11 10KR2J-3-GP DY DY SCD1U16V2KX-3GP
H7
D1
AD26 PCICLK D4
R2 ICH_PME# 1
CLK_PCI_ICH
PCI_FRAME#
7
6
2
3
2
VSS VSS U27 AD27 PME# TP138 PCI_REQ2#
AD4 VSS VSS N12 G5 AD28 5 4
AD5 N13 H6
2
VSS VSS SPI_MOSI AD29 SRN8K2J-4-GP
AD6 VSS VSS N14 4 GND SI 5 G1 AD30
AD7 N15 SPI_WP# 3 6 SPI_CLK H3
AD9
VSS VSS
N16 SPI_MOSO 2
WP# DY
SCLK
7 SPI_HOLD# AD31
VSS VSS SPI_CS#0 SO HOLD# RN56
AE12
AE13
VSS VSS N17
N18
1 CS# VCC 8
PCI_PIRQA# J5
Interrupt I/F H4 PCI_PIRQE# PCI_SERR# 8 1
VSS VSS PCI_PIRQB# PIRQA# PIRQE#/GPIO2 PCI_PIRQF# PCI_PIRQE#
AE14 VSS VSS N26 E1 PIRQB# PIRQF#/GPIO3 K6 7 2
AE16 N27 MX25L512MC-12G-GP PCI_PIRQC# J6 F2 PCI_PIRQG# PCI_PIRQA# 6 3
VSS VSS PCI_PIRQD# PIRQC# PIRQG#/GPIO4 PCI_PIRQH# PCI_PIRQC#
AE17 VSS VSS P12 C4 PIRQD# PIRQH#/GPIO5 G2 5 4
AE2 VSS VSS P13
AE20 P14 ICH9M-GP-NF SRN8K2J-4-GP
VSS VSS
C AE24 VSS VSS P15 C
AE3 VSS VSS P16
AE4 VSS VSS P17
PCI_GNT0#
AE6
AE9
VSS VSS P2
P23 R442
1
DY 2
1KR2J-1-GP
VSS VSS SPI_CS#1
AF13
AF16
VSS VSS P28
P29 R443
1
DY 2
1KR2J-1-GP
VSS VSS RP1 RN55 PCI_GNT3#
AF18 P4 1 2
AF22
VSS
VSS
VSS
VSS P7 USB_OC#7 1 10 +3.3V_ALW +3.3V_ALW 8 1 USB_OC#9 R441 DY 1KR2J-1-GP
AH26 R11 USB_OC#11 2 9 USB_OC#0 7 2 USB_OC#8
VSS VSS USB_OC#5 USB_OC#1 USB_OC#10
AF26 VSS VSS R12 3 8 6 3
AF27 R13 USB_OC#4 4 7 USB_OC#6 5 4 USB_OC#3
VSS VSS USB_OC#2
AF5 VSS VSS R14 +3.3V_ALW 5 6
AF7 R15 SRN8K2J-4-GP BOOT BIOS Strap
VSS VSS SRN10KJ-L3-GP
AF9 VSS VSS R16
AG13 VSS VSS R17 PCI_GNT#0 SPI_CS#1 BOOT BIOS Location
AG16 R18 4 OF 6
VSS VSS U25D
AG18 VSS VSS R28 0 1 SPI
AG20 VSS VSS T12 N29 PERN1 DMI0RXN V27 DMI_RXN0
Direct Media Interface

AG23 VSS VSS T13 N28 PERP1 DMI0RXP V26 DMI_RXP0 1 0 PCI
AG3 VSS VSS T14 P27 PETN1 DMI0TXN U29 DMI_TXN0
AG6 VSS VSS T15 P26 PETP1 DMI0TXP U28 DMI_TXP0 1 1 LPC(Default)
AG9 VSS VSS T16
AH12 VSS VSS T17 PCIE_RXN2 L29 PERN2 DMI1RXN Y27 DMI_RXN1 A16 swap override strap
AH14 VSS VSS T23 PCIE_RXP2 L28 PERP2 DMI1RXP Y26 DMI_RXP1
C500 2 1 SCD1U16V2KX-3GP PCIE_C_TXN2 low = A16 swap override enable
AH17
AH19
VSS VSS B26
U12
Mini Card PCIE_TXN2
C497 2 1 SCD1U16V2KX-3GP PCIE_C_TXP2
M27
M26
PETN2 DMI1TXN W29
W28
DMI_TXN1
PCI_GNT#3
VSS VSS PCIE_TXP2 PETP2 DMI1TXP DMI_TXP1 high = default
AH2 VSS VSS U13
AH22 VSS VSS U14 PCIE_RXN3 J29 PERN3 DMI2RXN AB27 DMI_RXN2
AH25 U15 J28 AB26
PCI-Express
VSS VSS PCIE_RXP3 PERP3 DMI2RXP DMI_RXP2
C506 2 1 SCD1U16V2KX-3GP PCIE_C_TXN3
B AH28
AH5
VSS VSS U16
U17
LAN PCIE_TXN3
K27
K26
PETN3 DMI2TXN AA29
AA28
DMI_TXN2 B
VSS VSS PCIE_TXP3 PETP3 DMI2TXP DMI_TXP2

AH8 VSS VSS AD23
AJ12 VSS VSS U26 G29 PERN4 DMI3RXN AD27 DMI_RXN3 +1.5V_RUN
USB
AJ14 VSS VSS U27 G28 PERP4 DMI3RXP AD26 DMI_RXP3 Pair Device
AJ17 VSS VSS U3 H27 PETN4 DMI3TXN AC29 DMI_TXN3
AJ8 VSS VSS V1 H26 PETP4 DMI3TXP AC28 DMI_TXP3 0 USB1
2
B11 VSS VSS V13
B14 V15 PCIE_RXN5 E29 T26 CLK_PCIE_ICH# R429 1 USB2
VSS VSS PERN5 DMI_CLKN 24D9R2F-L-GP
B17 VSS VSS V23 PCIE_RXP5 E28 PERP5 DMI_CLKP T25 CLK_PCIE_ICH
C518 2 1 SCD1U16V2KX-3GP PCIE_C_TXN5 2 USB3
B2
B20
VSS VSS V28
V29
New Card PCIE_TXN5
F27
F26
PETN5
AF29
PCIE_TXP5
1
VSS VSS PETP5 DMI_ZCOMP DMI_IRCOMP_R
B23 VSS VSS V4 DMI_IRCOMP AF28 3 RESERVED
B5 VSS VSS V5 C29 PERN6/GLAN_RXN
B8 VSS VSS W26 C28 PERP6/GLAN_RXP USBP0N AC5 USB_PN0 4 MINI CARD
C26
C27
VSS VSS W27
W3
D27
D26
PETN6/GLAN_TXN USBP0P AC4
AD3
USB_PP0 USB1 5 RESERVED
VSS VSS PETP6/GLAN_TXP USBP1N USB_PN1
E11 VSS VSS Y1
SPI_CLK R233 1 2 15R2J-GP SPI_CLK_R USBP1P AD2 USB_PP1 USB2 6 BLUETOOTH
E14 VSS VSS Y28
SPI_CS#0 R241 1 DY 2 15R2J-GP SPI_CS#0_R
D23 SPI_CLK USBP2N AC1 USB_PN2
E18
E2
VSS VSS Y29
Y4
DY SPI_CS#1
D24
F23
SPI_CS0# USBP2P AC2
AA5 USB_PN3 1
USB_PP2 USB3 7 NEW CARD
VSS VSS SPI_CS1#/GPIO58/CLGPIO6 USBP3N TP246
E21 Y5 AA4 USB_PP3 1 TP247
VSS VSS SPI_MOSI R230 1 SPI_MOSI_R USBP3P
E24 AG28 2 15R2J-GP 8 RESERVED
VSS VSS DY D25 SPI_MOSI USBP4N AB2 USB_PN4
SPI
SPI_MOSO R237 1 2 15R2J-GP SPI_MOSO_R

E5
E8
VSS VSS AH6
AF2
DY E23 SPI_MISO USBP4P AB3
AA1 USB_PN5 1
USB_PP4
TP250 9 RESERVED
VSS VSS USB_OC#0 USBP5N USB_PP5 1
F16 VSS VSS B25 USB_OC#0 N4 OC0#/GPIO59 USBP5P AA2 TP251
F28 USB_OC#1 USB_OC#1 N5 W5 10 Card Reader
VSS OC1#/GPIO40 USBP6N USB_PN6
ICH_GND1 USB_OC#2
F29
G12
VSS VSS A1
A2
1
TP177
USB_OC#2
USB_OC#3
N6
P6
OC2#/GPIO41 USB USBP6P W4
Y3
USB_PP6 BlUETOOTH 11 CAMERA
VSS VSS OC3#/GPIO42 USBP7N USB_PN7
USB_OC#4
A
G14
G18
VSS VSS A28
A29 ICH_GND2
1 USB_OC#5
M1
N2
OC4#/GPIO43 USBP7P Y2
W1 USB_PN8 1
USB_PP7 New Card <Core Design>
A
VSS VSS OC5#/GPIO29 USBP8N TP248
G21 AH1 TP178 USB_OC#6 M4 W2 USB_PP8 1 TP249
VSS VSS USB_OC#7 OC6#/GPIO30 USBP8P USB_PN9 1
G24 VSS VSS AH29 NCTF PIN M3 OC7#/GPIO31 USBP9N V2 TP252
ICH_GND3 USB_OC#8 USB_PP9 1
G26
G27
VSS
VSS
VSS
VSS
AJ1
AJ2
1
TP125 USB_OC#9
N3
N1
OC8#/GPIO44
OC9#/GPIO45
USBP9P
USBP10N
V3
U5 USB_PN10
TP253
USB_PN10
Wistron Corporation
USB_OC#10 USB_PP10 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
G8
H2
VSS VSS AJ28
AJ29 ICH_GND4
1 USB_OC#11
P5
P3
OC10#/GPIO46 USBP10P U4
U1
USB_PP10 Card Reader Taipei Hsien 221, Taiwan, R.O.C.
VSS VSS OC11#/GPIO47 USBP11N USB_PN11
TP127
H23
H28
VSS VSS B1
B29 R208 USB_RBIAS_PN AG2 USBP11P U2 USB_PP11 CAMERA Title
VSS VSS USBRBIAS
H29 1 2 AG1
VSS USBRBIAS#
Size
ICH9-PCI/PCIE/DMI/USB/GND(1/4)
Document Number Rev
ICH9M-GP-NF 22R2F-1-GP ICH9M-GP-NF
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = ICH
ICH_RTCX1
R445 1 2 10MR2J-L-GP ICH_RTCX2
X4
4 1
1
D C522 C520 D
SC12P50V2JN-3GP 3 2 SC12P50V2JN-3GP
2
X-32D768KHZ-38GPU
1 OF 6 LPC_LAD[0..3]
+RTC_CELL LPC_LAD[0..3]
U25A
R456 C23 K5 LPC_LAD0
ICH_RTCRST# RTCX1 FWH0/LAD0 LPC_LAD1
1 2 C24 RTCX2 FWH1/LAD1 K4
L6 LPC_LAD2
FWH2/LAD2
2
20KR2F-L-GP ICH_RTCRST# A25 K2 LPC_LAD3
RTCRST# FWH3/LAD3
RTC
LPC
C307 SRTCRST# F20
SC1U10V3KX-3GP G49 SM_INTRUDER# SRTCRST# +3.3V_RUN
C22 K3 LPC_LFRAME#
2
GAP-OPEN INTRUDER# FWH4/LFRAME# R438
ICH_INTVRMEN B22 J3 1
DY 2
1
LAN100_SLP INTVRMEN LDRQ0#
A22 LAN100_SLP LDRQ1#/GPIO23 J1
10KR2J-3-GP
+RTC_CELL E25 N7
GLAN_CLK A20GATE KA20GATE +1.05V_VCCP
A20M# AJ27 H_A20M#
R461 C13 R163
LAN_RSTSYNC H_DPRSTP#
1 2 DPRSTP# AJ25 H_DPRSTP# 1 2
LAN / GLAN
F14 LAN_RXD0 DPSLP# AE23 H_DPSLP#
1
20KR2F-L-GP G13 56R2J-4-GP
C526 LAN_RXD1 H_FERR#_R
D14 LAN_RXD2 FERR# AJ26 1 2 H_FERR#
SC1U10V3KX-3GP R166 56R2J-4-GP
2
D13 LAN_TXD0 CPUPWRGD AD22 H_PWRGOOD
D12 +3.3V_RUN
C LAN_TXD1 C
E13 AF25 H_IGNNE# R242
LAN_TXD2 IGNNE#
CPU
R506 1
+1.5V_RUN
Place within 500 mil of SB. 2GPIO56
DY 2
1
DY B10 GLAN_DOCK#/GPIO56 INIT# AE22
AG25
H_INIT#
H_INTR 10KR2J-3-GP
R444 1 INTR
2 24D9R2F-L-GP 10KR2J-3-GP GLAN_COMP B28 GLAN_COMPI RCIN# L3 KBRCIN#
B27 GLAN_COMPO
AF23 H_NMI +1.05V_VCCP
R201 33R2J-2-GP ACZ_BIT_CLK NMI R164
ICH_AZ_CODEC_BITCLK 1 2 AF6 HDA_BIT_CLK SMI# AF24 H_SMI#
ICH_AZ_CODEC_SYNC R197 1 2 33R2J-2-GP ACZ_SYNC_R AH4 1 2
R205 33R2J-2-GP HDA_SYNC 56R2J-4-GP
ICH_AZ_CODEC_RST# 1 2 STPCLK# AH27 H_STPCLK#
ICH_SDOUT_CODEC R194 1 2 33R2J-2-GP ACZ_RST#_R AE7 HDA_RST# H_THERMTRIP_R
THRMTRIP# AG26 1 2 H_THERMTRIP_1 1 R167 2 H_THRMTRIP#
ICH_SDIN_CODEC AF4 R165 54D9R2F-L1-GP 0R0402-PAD
HDA_SDIN0
AG4 HDA_SDIN1 PECI AG27 Placed Within 2" from SB. SB
1
IHDA
AH3 HDA_SDIN2 A00.08/0903
C227 C230
SC4D7P50V2CN-1GP DY DY SC4D7P50V2CN-1GP
AE5 HDA_SDIN3
AH11
2
ACZ_SDATAOUT_R SATA4RXN
AG5 HDA_SDOUT SATA4RXP AJ11
SATA4TXN AG12
AG7 HDA_DOCK_EN#/GPIO33 SATA4TXP AF12
AE8 HDA_DOCK_RST#/GPIO34
SATA5RXN AH9
1 SATA_LED# AG8 AJ9
TP235 SATALED# SATA5RXP
SATA5TXN AE10
SATA_RXN0_C AJ16 SATA0RXN SATA5TXP AF10
AH16
HDD
SATA
SATA_RXP0_C SATA0RXP
SATA_TXN0 C473 1 2 SCD01U50V2KX-1GP SATA_TXN0_C AF17 AH18 CLK_PCIE_SATA#
C474 1 SATA0TXN SATA_CLKN
SATA_TXP0 2 SCD01U50V2KX-1GP SATA_TXP0_C AG17 SATA0TXP SATA_CLKP AJ18 CLK_PCIE_SATA
B SATA_RXN1_C AH13 AJ7 SATARBIAS B
SATA1RXN SATARBIAS#
AJ13 AH7 1 2
ODD SATA_RXP1_C
SATA_TXN1 C475 1 2 SCD01U50V2KX-1GP SATA_TXN1_C AG14
SATA1RXP
SATA1TXN
SATARBIAS R187 24D9R2F-L-GP
SATA_TXP1 C476 1 2 SCD01U50V2KX-1GP SATA_TXP1_C AF14 Place within 500 mils from SB.
SATA1TXP
ICH9M-GP-NF
+RTC_CELL
R448
2 1 ICH_INTVRMEN integrated VccSus1_05,VccSus1_5,VccCL1_5
330KR2F-L-GP INTVRMEN High=Enable Low=Disable
A A
<Core Design>
integrated VccLan1_05VccCL1_05
R271
LAN100_SLP LAN100_SLP
2 1 High=Enable Low=Disable Wistron Corporation
330KR2F-L-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R264 Title
2 1 SM_INTRUDER#
Size
ICH9-LAN/HDA/SATA/LPC(2/4)
Document Number Rev
1MR2J-1-GP
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = ICH +3.3V_RUN

3 OF 6
U25C RN49
+3.3V_ALW G16 AH23 SATA0GP SATA2GP 8 1
SMB_CLK SMBCLK SATA0GP/GPIO21
A13 AF19 SATA1GP SATA3GP 7 2
SMB_DATA SMBDATA SATA1GP/GPIO19
LINKALERT# E17 AE21 SATA2GP SATA1GP 6 3
SATA
LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36
GPIO
SMB
RN60 ME_EC_CLK1 C17 AD20 SATA3GP SATA0GP 5 4
SMB_DATA ME_EC_DATA1 SMLINK0 SATA5GP/GPIO37
4 1 B18 SMLINK1
3 2 SMB_CLK H1 CLK_14M_ICH SRN10KJ-6-GP
ICH_RI# CLK14
F19 AF3 CLK_48M_ICH
Clocks
SRN2K2J-1-GP RI# CLK48
D TP257 SUS_STAT# ICH_SUSCLK D
1 R4 SUS_STAT#/LPCPD# SUSCLK P1 ICH_SUSCLK
ITP_DBRESET#_1 ITP_DBRESET#_1 G19
R267 1 SYS_RESET#
2 10KR2J-3-GP LINKALERT#
SLP_S3# C16 SB_SLP_S3# PM_PWROK R440 1 2 10KR2J-3-GP
M6 E16 DPRSLPVR R232 1 100KR2J-1-GP
PM_SYNC# PMSYNC#/GPIO0 SLP_S4#
G17 PM_SLP_S5# 1
PM_SLP_S4#
LAN_RST#1 R266 1
DY 2
2 0R0402-PAD
RN59 SMB_ALERT# SLP_S5# TP259 RSMRST#_KBC R447 10KR2J-3-GP
1 A17 SMBALERT#/GPIO11 1 2
4 1 ME_EC_DATA1 TP186 C10 GPIO26 1
ME_EC_CLK1 H_STP_PCI# S4_STATE#/GPIO26 TP182
3 2 H_STP_PCI# A14 STP_PCI#
H_STP_CPU# PM_PWROK
SYS GPIO
H_STP_CPU# E19 STP_CPU# PWROK G20
SRN10KJ-5-GP
PM_CLKRUN# L4 CLKRUN# DPRSLPVR/GPIO16 M2 DPRSLPVR
Power MGT
R455 1 2 10KR2J-3-GP PCIE_WAKE# PCIE_WAKE# PM_BATLOW#_R GPIO10 R501 10KR2J-3-GP
PCIE_WAKE#
INT_SERIRQ
E20
M5
WAKE# BATLOW# B13
GPIO13 R502
1
1
DY 2
10KR2J-3-GP
INT_SERIRQ SERIRQ GPIO14 R503 DY 2
10KR2J-3-GP
RN61
THERM_SCI# AJ23 THRM# PWRBTN# R3 PM_PWRBTN#
GPIO17 R504
1
DY 2
10KR2J-3-GP
8 1 SMB_ALERT# VGATE_PWRGD D21 D20 LAN_RST#1 GPIO48 R505
1
1
DY 2
10KR2J-3-GP
7 2 PM_BATLOW#_R
VGATE_PWRGD VRMPWRGD LAN_RST# DY 2
6 3 ITP_DBRESET#_1 R263 1 2 0R2J-2-GP ICH_TP7 A20 D22

5 4 ICH_RI# DY SST RSMRST# RSMRST#_KBC
ECSCI# ECSCI# AG19 R5 CK_PWRGD

SRN8K2J-4-GP TACH1/GPIO1 CK_PWRGD
AH21 TACH2/GPIO6
ECSWI# ECSWI# AG21 R6 M_PWROK M_PWROK M_PWROK 1 R439 2 PM_PWROK
ECSMI# TACH3/GPIO7 CLPWROK 0R0402-PAD
ECSMI# A21 GPIO8
R451 1 2 10KR2J-3-GP ECSMI# 1 GPIO12 C12 B16 PM_SLP_M# 1
TP181 GPIO13 LAN_PHY_PWR_CTRL/GPIO12 SLP_M# TP183
C21 ENERGY_DETECT/GPIO13
GPIO17 AE18 F24
TACH0/GPIO17 CL_CLK0 CL_CLK0
TP168 1 GPIO18 K1 B19
TP236 GPIO20 GPIO18 CL_CLK1
1 AF8 GPIO20
C TP123 1 GPIO22 AJ22 F22 C
SCLOCK/GPIO22 CL_DATA0 CL_DATA0
Controller Link
TP184 1 GPIO27 A9 C19
GPIO
GPIO28 GPIO27 CL_DATA1
TP262 1 D19 GPIO28
+3.3V_RUN L1 C25 CL_VREF0_ICH
CLKSATAREQ# SATACLKREQ#/GPIO35 CL_VREF0
CLK_SEL0 AE19 A19 CL_VREF1_ICH
RN63 CLK_SEL1 SLOAD/GPIO38 CL_VREF1
AG22 SDATAOUT0/GPIO39
4 1 H_STP_CPU# GPIO48 AF21 F21 CL_RST#0
H_STP_PCI# SDATAOUT1/GPIO48 CL_RST0#
3
DY 2
TP124
1
iTPM_EN
AH24
A8
GPIO49 CL_RST1# D18
SRN10KJ-5-GP GPIO57/CLGPIO5 GPIO24 +3.3V_ALW +3.3V_RUN

GPIO24/MEM_LED A16 1
SB_SPKR M7 C18 GPIO10 TP180
SPKR GPIO10/SUS_PWR_ACK
1
MCH_ICH_SYNC# AJ24 C11 GPIO14
R235 8K2R2J-3-GP PM_CLKRUN# ICH_TP3 MCH_SYNC# GPIO14/AC_PRESENT
1 2 1 B21 TP3 GPIO9/WOL_EN C20
MISC
R244 8K2R2J-3-GP INT_SERIRQ TP263 R268 R454
R247
1
2
2
1 10KR2J-3-GP GPIO18
AH20
AJ20
PWM0 3K24R2F-GP DY 3K24R2F-GP
R421 10KR2J-3-GP ECSCI# PWM1
2 1 AJ21
2
R424 10KR2J-3-GP ECSWI# PWM2
2 1
R180 8K2R2J-3-GP GPIO22 ICH9M-GP-NF
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
DY 1
1
R238 10KR2J-3-GP CLKSATAREQ#
453R2F-1-GP
453R2F-1-GP
2 1
1
C309
R261
C523
R450
DY DY
2
2
2
+3.3V_RUN
+3.3V_RUN
iTPM CLK Gen

1
R449 Select R179 R423 Select

CLK Gen
100KR2J-1-GP 10KR2J-3-GP 10KR2J-3-GP
B
DY DY DY B
iTPM_EN
select
2
iTPM_EN CLK_SEL0
CLK_SEL1 CLK_SEL0 CLL_SEL1
1
R446 0 = Disable Disable X X

1
Seligo 1 1
100KR2J-1-GP
+3.3V_ALW
1 = Enable
R185 R427
Realtek 1 0
DY DY
2
ICS 0 1
2
U29
1 B
VCC 5
SB_SLP_S3# 2 A DY 4 PM_SLP_S3# PM_SLP_S3#
Y
3 GND
74LVC1G08GW-1-GP
+3.3V_RUN
1 R265 2
0R0402-PAD
RN62
4 1
3 2
SRN2K2J-1-GP
A A
<Core Design>
U56
SMB_DATA
ICH_SMBDATA 1 6
Wistron Corporation
2 5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SMB_CLK 3 4 ICH_SMBCLK Title
2N7002SPT
ICH9-GPIO/PM/CL(3/4) Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
+RTC_CELL 6 OF 6 +1.05V_VCCP
U25F
SSID = ICH A23 VCCRTC VCC1_05 A15
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCC1_05 B15
V5REF_S0 A6 C15
V5REF 2mA VCC1_05
1
C524
C525
C496
C501
C495
C492
C503
VCC1_05 D15
V5REF_S5 AE1 V5REF_SUS 2mA VCC1_05 E15
F15
DY DY DY
2
VCC1_05
AA24 VCC1_5_B VCC1_05 L11
AA25 VCC1_5_B VCC1_05 L12
AB24 VCC1_5_B VCC1_05 L14
AB25 VCC1_5_B VCC1_05 L16
AC24 VCC1_5_B VCC1_05 L17
1634mA
D
*Within a given well, 5VREF needs to AC25 VCC1_5_B VCC1_05 L18
D
AD24 M11 1D5V_DMIPLL_ICH_S0 +1.5V_RUN
be up before the corresponding 3.3V rail VCC1_5_B VCC1_05
AD25 M18 L5
VCC1_5_B VCC1_05 1D5V_DMIPLL_ICH_S0
SC10U6D3V5MX-3GP
SCD01U16V2KX-3GP
AE25 VCC1_5_B VCC1_05 P11 2 1
AE26 P18 IND-1D2UH-5-GP
+3.3V_RUN +5V_RUN +3.3V_ALW +5V_ALW VCC1_5_B VCC1_05
AE27 VCC1_5_B VCC1_05 T11
1
C263
C265
AE28 VCC1_5_B VCC1_05 T18
CH751H-40PT
CH751H-40PT
AE29 VCC1_5_B VCC1_05 U11
2
2
F25 U18
CORE
2
VCC1_5_B VCC1_05
D15
D14
R274 R213 G25 V11
10R2J-2-GP 10R2J-2-GP VCC1_5_B VCC1_05
H24 VCC1_5_B VCC1_05 V12
H25 VCC1_5_B VCC1_05 V14
J24 V16 +1.05V_VCCP
1
1
V5REF_S0 V5REF_S5 VCC1_5_B VCC1_05
J25 VCC1_5_B VCC1_05 V17
VCCDMI
SC10U6D3V5MX-3GP
1 R434
SC4D7U6D3V3KX-GP
K24 VCC1_5_B VCC1_05 V18 2
1
1
0R0603-PAD
SCD1U10V2KX-4GP
K25 VCC1_5_B
C304 C242 L23 R29
VCC1_5_B 23mA VCCDMIPLL
1
SCD1U16V2KX-3GP
C488
C252
C253
646mA
SC1U10V3KX-3GP L24
2
2
VCC1_5_B +1.05V_VCCP
L25 VCC1_5_B W23
M24 50mA VCCDMI Y23
2
VCC1_5_B VCCDMI
M25 VCC1_5_B
N23 AB23 SB_V_CPU_IO 1 R431 2
VCC1_5_B 2mA V_CPU_IO SB_V_CPU_IO 0R0603-PAD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
N24 VCC1_5_B V_CPU_IO AC23
N25 VCC1_5_B
1
+1.5V_RUN
C478
C479
C231
P24 VCC1_5_B VCC3_3 AG29
+3.3V_RUN
P25 VCC1_5_B DY
VCCA3GP
R24 AJ6 SB_VCC_3_3_C
2
VCC1_5_B VCC3_3
R25 VCC1_5_B 1 R430 2
ST220U2D5VBM-LGP 3D3V_VCCPCORE_ICH_S0 0R0603-PAD
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC2D2U10V3KX-1GP
R26 VCC1_5_B VCC3_3 AC10
R27 VCC1_5_B
1
1
TC9
C489
C512
C246
C244
C251
C T24 VCC1_5_B VCC3_3 AD19 C
C477
DY DY DY T27
T28
VCC1_5_B VCC3_3 AF20
AG24 SCD1U10V2KX-4GP
2
2
VCC1_5_B VCC3_3 +3.3V_RUN
T29 AC20
VCCP_CORE
VCC1_5_B VCC3_3
308mA
U24 VCC1_5_B
U25 B9 PCI_VCCP_CORE_S0 1 R437 2
VCC1_5_B VCC3_3 0R0603-PAD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
V24 VCC1_5_B VCC3_3 F9
V25 VCC1_5_B VCC3_3 G3
1
C507
C509
C516
U23 VCC1_5_B VCC3_3 G6
+1.5V_RUN +VCCSATAPLL W24 J2 +3.3V_RUN
VCC1_5_B VCC3_3
W25 J7
2
+3.3V_RUN L4 VCC1_5_B VCC3_3 SB_VCC_3_3_C
K23 K7 1 R177 2
PCI
VCC1_5_B VCC3_3
SC1U10V3KX-3GP
0R0603-PAD
SCD1U25V3KX-GP
SCD1U10V2KX-4GP
1 2 Y24 VCC1_5_B
L-10UH-11-GP SC1U10V3KX-3GP SB_VCCHDA +3.3V_ALW
SC10U6D3V5MX-3GP
Y25 VCC1_5_B 11mA VCCHDA AJ4
1
C232
EC56
C223
1 R269 2 SB_VCCLAN3_3
1
1
C213
C219
0R0603-PAD 1 R191
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AJ19 VCCSATAPLL47mA 11mA VCCSUSHDA AJ3 2
0R0402-PAD
2
1
1
C306
C301
AC16 AC8 VCCSUS1_05[1] 1 TP243

2
VCC1_5_A VCCSUS1_05
C217
VCCSUS1_05[2]
DY AD15
AD16
VCC1_5_A VCCSUS1_05 F17 1 TP260
R172
2
2
VCC1_5_A
ARX
VCCSUS1_5[1]
AE15
AF15
VCC1_5_A VCCSUS1_5 AD8 1
DY 2 +1.5V_RUN
+1.5V_RUN VCC1_5_A VCCSUS1_5[2] 0R3J-0-U-GP
AG15 VCC1_5_A VCCSUS1_5 F18
AH15 VCC1_5_A
AJ15 VCC1_5_A
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SCD1U10V2KX-4GP
VCCSUS3_3 A18
C515
AC11 VCC1_5_A VCCSUS3_3 D16
1
+1.5V_RUN
C481
C220
VCCPSUS
AD11 VCC1_5_A VCCSUS3_3 D17
AE11 E22
1
VCC1_5_A VCCSUS3_3
ATX
L7 AF11
2
VCC1_5_A
B 2 1 VCC_GLAN_PLL AG10 VCC1_5_A
B
IND-1D2UH-5-GP
SC10U6D3V5MX-3GP
SC2D2U10V3KX-1GP
AG11 VCC1_5_A VCCSUS3_3 AF1

1342mA
AH10 VCC1_5_A
1
+1.5V_RUN +3.3V_RUN
C303
C312
AJ10 VCC1_5_A VCCSUS3_3 T1

T2 +3.3V_ALW
VCCSUS3_3 SB_VCCHDA
AC9 T3 1 R188 2
2
VCC1_5_A VCCSUS3_3 SB_VCCSUS3_3 1 R270 0R0402-PAD

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCCSUS3_3 T4 2
0R0603-PAD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AC18 VCC1_5_A VCCSUS3_3 T5
1
1
C480
C485
AC19 VCC1_5_A VCCSUS3_3 T6
1
C308
C313
C302
212mA
VCCSUS3_3 U6
AC21 U7
DY DY
2
VCC1_5_A VCCSUS3_3
V6
VCCPUSB
2
VCCSUS3_3
G10 VCC1_5_A VCCSUS3_3 V7
1
G9 VCC1_5_A VCCSUS3_3 W6
+1.5V_RUN W7 C221
VCCSUS3_3 +3.3V_ALW SCD1U10V2KX-4GP
AC12 Y6
2
VCC1_5_A VCCSUS3_3
1 R183 2 1D5V_USB_S0 AC13 VCC1_5_A VCCSUS3_3 Y7
0R0603-PAD 1 R436
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AC14 VCC1_5_A VCCSUS3_3 T7 2

0R0603-PAD
SCD1U10V2KX-4GP
SCD1U16V2KX-3GP
SCD022U16V2KX-3GP
1
1
C222
C482
C483
AJ5 VCCUSBPLL 11mA VCCCL1_05 G22
1
C493
C491
C490
DY AA7 G23
2
VCC1_5_A VCCCL1_5
USB CORE
AB6
2
VCC1_5_A
AB7 A24
73mA
VCC1_5_A VCCCL3_3
AC6 VCC1_5_A VCCCL3_3 B24
AC7 VCC1_5_A
VCCLAN1D05 A10 VCCLAN1_05
A11 VCCLAN1_05
1
A00.08/0909 VCCSUS1_05[3]
A C521 A
SCD1U10V2KX-4GP DY SB_VCCLAN3_3
A12
B12
VCCLAN3_3 78mA
A00.08/0909
<Core Design>
2
VCCLAN3_3 VCCSUS1_5[3]
+1.5V_RUN
SC1U10V3KX-3GP
VCC_GLAN_PLL
Wistron Corporation
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
A27 VCCGLANPLL 23mA
SCD1U10V2KX-4GP
1
GLAN POWER
C513
C511
C514
D28 VCCGLAN1_5 Taipei Hsien 221, Taiwan, R.O.C.
80mA
D29 VCCGLAN1_5 DY
1
+3.3V_RUN
C279
E26
2
2
C276 +3.3V_RUN VCCGLAN1_5 Title
DY SB E27 VCCGLAN1_5
SC4D7U6D3V3KX-GP SB_VCCCL3_3 1 R452 2
ICH9-POWER(4/4)
2
1 R453 2 3D3V_GLAN_S0 A26 VCCGLAN3_3 1mA

0R0603-PAD
0R0603-PAD Size Document Number Rev
ICH9M-GP-NF Custom -3
A00.08/0909 Roberts
5 4 3 2 1
5 4 3 2 1
SSID = LOM
+2.5V_LOM +3.3V_LAN +1.2V_LOM
1
TP270 1
D TP269 D
57
52
51
32
28
22
19
40
45
61
64
23
33
39
44
48
58
13
1
8
2
7
U26
AVDD
AVDD
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
VDD25
AVDDL
+3.3V_LAN
R229 34 6 PCIE_WAKE#
NC#34 WAKE#
2 1 35 NC#35 PERST# 5 PLT_RST#
REFCLKP 55 CLK_PCIE_LAN
4K7R2J-2-GP 36 56 CLK_PCIE_LAN#
NC#36 REFCLKN
37 NC#37
50 LAN_RXN3 C285 1 2 SCD1U10V2KX-4GP PCIE_RXN3
PCIE_TXN LAN_RXP3 C284 1
PCIE_TXP 49 2 SCD1U10V2KX-4GP PCIE_RXP3
+3.3V_LAN 88E8040-A0-NNC1C000-GP 53 PCIE_TXN3
LOM_DISABLE# PCIE_RXN
10 LOM_DISABLE# PCIE_RXP 54 PCIE_TXP3
12 VAUX_AVLBL
TP145 1 A00.08/0903 LANSC 11
LANPWR SWITCH_VCC
+3.3V_RUN 1 R246 2 47 VMAIN_AVLBL LED_LINK# 63
TP147 1 0R0402-PAD LANSV 9 62
R221 1 LANRSET SWITCH_VAUX NC#62
2 2KR2F-3-GP 16 RSET LED_SPEED# 60
R243 1 2 10KR2J-3-GP CTRL12
+3.3V_LAN
R239 1 DY 2 10KR2J-3-GP CTRL25
3 PD_12 LED_ACT# 59
DY 4 PD_25
PU_VDDO_TTL#42
PU_VDDO_TTL#43
1 LANHP 24 15 LANX1 R228
TP136 LANHN HSDACP XTALI LANX2
1 25 14 2 1
TP139 HSDACN XTALO DY
TESTMODE
VPD_DATA
C C
10MR2J-L-GP
VPD_CLK
TSTPT
NC#27
NC#31
NC#26
NC#30
+3.3V_LAN
GND
RXN
RXP
TXN
TXP
X2
LANX2 1 2 LANX1
C268 1 2 SC1KP50V2KX-1GP
18
21
27
31
17
20
26
30
41
38
29
46
42
43
65
1
XTAL-25MHZ-96GP
+3.3V_LAN C259 C260 C283 1 2 SC1U10V3KX-3GP
MDI0- SC12P50V2JN-3GP SC12P50V2JN-3GP
MDI0-
2
2VPD_DATA
MDI1- MDI1- R236 C281 1 2 SC1U10V3KX-3GP
1 2
MDI0+ MDI0+ 4K7R2J-2-GP

MDI1+ MDI1+
R231 R234 +2.5V_LOM

DY0R2J-2-GP 1 2
4K7R2J-2-GP C257 1 2 SCD1U10V2KX-4GP

1
SC4D7U6D3V5KX-3GP
C288 1 2 SC1U10V3KX-3GP
C291 1 2
B B
+1.2V_LOM
+3.3V_LAN C264 1 2 SC1U10V3KX-3GP
1
+3.3V_RUN
R507 DY 2
0R3J-0-U-GP C282 1 2 SC1U10V3KX-3GP
1 C270 1 2 SC1KP50V2KX-1GP
R248 DY 2
0R3J-0-U-GP
C292 1 2 SC1U10V3KX-3GP
Q14
+3.3V_ALW S
D C278 1 2 SC4D7U6D3V5KX-3GP
1
D
G
R257 MDI0+ MDIS0_LAN

10KR2J-3-GP AO3403-GP
1
R222 DY 2
49D9R2F-GP
1
C247 DY2
SCD01U16V2KX-3GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
G
1
C269
C266
C290
C271
C286
MDI0- 1
DY 2
1
C296
R223 49D9R2F-GP
2
MDI1+ 1 2 MDIS1_LAN
DY 1
DY2SCD01U16V2KX-3GP
2
R225 49D9R2F-GP C248

2
MDI1- 1
R224 DY 2
49D9R2F-GP
D
Q15
A 2N7002-7F-GP A
<Core Design>
PM_LAN_ENABLE G
Wistron Corporation
S

Title
Size
LAN Marvell-88E8040
Document Number Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = SDIO
Please close to pin8.
+3.3V_PHY
+3.3V_PHY +3.3V_RUN
D VREG D
1 R259
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
1
C319
C310
0R0603-PAD
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC4D7U6D3V3KX-GP
1
1
C298
C297
C300
C320
2
2
+3.3V_PHY
Please close to pin11 and pin33. MODE_SEL
2
SD_CMD SD_CMD R284
+3.3V_RUN_CARD R260 100KR2J-1-GP
CARD_RREF 1 2
DY
R282 R510
1
CARD_RST# 6K2R2F-GP 1 2CARD_RST#_R 1 2 PLT_RST#
1
BLM18BD601SN1D-GP 2K2R2J-2-GP
1
A00.08/1002 R283 C318
C299 499KR2F-1-GP DY SC1U10V2KX-1GP C568
10
33
11
45
36
14
44
DY
2
9
2
SCD1U16V2KX-3GP U34 SC1U10V2KX-1GP
2
VREG
3V3_IN
SD_CMD
CARD_3V3
AV_PLL
D3V3
D3V3
MODE_SEL
GPIO0
RREF
RST#
2
A00.08/0902
XD_CD# XD_CD# 19 5 USB_PP10
SD_WP SP1 DP USB_PN10
SD_WP 20 SP2 DM 4
SD_CD# SD_CD# 21 A00.08/1002
XD_D4/SD_DAT1 SP3
XD_D4/SD_DAT1 23 SP4
C XD_D5/MS_BS XD_D5/MS_BS 25 13 XTAL_CTR R272 1 2 10KR2J-3-GP +3.3V_PHY C
XD_D3/MS_D1 SP5 XTAL_CTR
XD_D3/MS_D1 26 SP6
SD_DAT0/XD_D6/MS_D0 SD_DAT0/XD_D6/MS_D0 27
XD_D2/MS_D2 SP7
XD_D2/MS_D2 28 SP8 XTLO 47
MS_INS# MS_INS# 29 48
XD_D7/MS_D3 SP9 XTLI CLK_48M_CARD
XD_D7/MS_D3 31 SP10
SD_CLK/XD_D1/MS_CLK
SD_CLK/XD_D1/MS_CLK
XD_D0 XD_D0
34
35
SP11 RTS5158E-GRT-GP
XD_WP# SP12
XD_WP# 37 SP13
XD_RDY XD_RDY 38 17 CARD_EESK
SD_DAT3/XD_WE# SP14 EESK CARD_EECS
SD_DAT3/XD_WE# 39 SP15 EECS 16
SD_DAT2/XD_RE# SD_DAT2/XD_RE# 40
XD_ALE SP16
XD_ALE 41 SP17
XD_CE# XD_CE# 42 15 CARD_EEDO
XD_CLE SP18 EEDO CARD_EEDI
XD_CLE 43 SP19 EEDI 18
MS_D5
MS_D4
NC#30
NC#7
NC#3
GND
GND
GND
GND
24
22
30
7
3
6
12
32
46
USB_PN10
2
L6
USB_PN10 DLW21SN900SQ2LUGP
MS_CLK 1 R250 2 USB_PP10
B
MS_CLK
0R0402-PAD DY B
SD_CLK/XD_D1/MS_CLK
3
SD_CLK SD_CLK 1 R249 2 USB_PP10
0R0402-PAD
1
C273 C280
SC15P50V2JN-2-GP DY DY SC15P50V2JN-2-GP
2
Power mode select

+3.3V_PHY
No staff R and C for power saving mode.
U33
CARD_EECS 1 8 MODE_SEL
A CARD_EESK CS VCC A
2 SK DC 7 <Core Design>
1
CARD_EEDO 3 DI DY ORG 6
1
CARD_EEDI 4 5 C311
DO GND DY
1
SCD1U16V2KX-3GP
Wistron Corporation
2
R280 C317
AT93C46DN-SH-B-GP 10KR2J-3-GP DY DY SC47P50V2JN-3GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

2
Title
Reserve for changing USB VID/PID.
RTS5158E Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO
+3.3V_RUN
Place C914 close to pin1
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Place C915 close to pin9
1
C537
C530
C533
D D
2
+VDDA
SC1U10V3KX-3GP
+3.3V_RUN
SCD1U10V2KX-4GP
+VDDA +VDDA
1
C550
C555
1 R467 2
0R0402-PAD
1
2
2
2
U61 R487 R479
C529 20KR2F-L-GP 5K1R2F-2-GP
SCD1U10V2KX-4GP 1 25
1
DVDD_CORE AVDD1
9 38
2
DVDD_CORE AVDD2 R473
40 NC#40/OTP 2 1 39K2R2F-L-GP AUD_HP1_JD#
3 DVDD_IO
13 AUD_SENSE_A R478 2 1 20KR2F-L-GP
SENSE_A AUD_SENSE_B EXT_MIC_JD#
SENSE_B/NC#34 34
R463 2 1 22R2J-2-GP ICH_AZ_CODEC_BITCLK_R 6
ICH_AZ_CODEC_BITCLK BITCLK AUD_HP1_OUT_L
PORTA_L 39 AUD_HP1_OUT_L
R465 2 1 33R2J-2-GP SB_AZ_CODEC_SDIN0_R 8 41 AUD_HP1_OUT_R AUD_HP1_OUT_R
ICH_SDIN_CODEC SDI_CODEC PORTA_R
NC#37 37
ICH_SDOUT_CODEC 5 SDO
21 AUD_EXT_MIC_L
PORTB_L AUD_EXT_MIC_L
C 10 22 AUD_EXT_MIC_R C
ICH_AZ_CODEC_SYNC SYNC PORTB_R AUD_EXT_MIC_R
28 AUD_VREFOUT_B AUD_VREFOUT_B
VREFOUT_B
ICH_AZ_CODEC_RST# 11 RESET#
23 AUD_INT_MIC_L C547 1 2 SC1U10V3KX-3GP
PORTC_L INT_MIC_L_R
1
24 AUD_INT_MIC_R C549 1 2 SC1U10V3KX-3GP

C532 PORTC_R AUD_VREFOUT_C R292 1 2 4K7R2J-2-GP
DY SC4D7P50V2CN-1GP VREFOUT_C 29
2
35 AUD_LINE_OUT_L C560 1 2 SC1U6D3V2KX-GP

PORTD_L AUD_LINE_OUT_R
PORTD_R 36 Port A---> HP
AUD_LINE_OUT_L Port B---> Ext Mic
PORTE_L 14 AUD_LINE_OUT_R
AUD_DMIC_CLK 46 15 Port C---> Int Mic
AUD_DMIC_IN0 DMIC_CLK PORTE_R
2 31
AUD_DMIC_IN0
4
VOL_UP/DMIC_0/GPIO1 VREFOUT_E/GPIO4 Port D---> Speaker
VOL_DN/DMIC_1/GPIO2
PORTF_L 16
PORTF_R 17
30
AUD_PC_BEEP
GPIO3
Trace width>15 mils
NC#18 18
47
48
EAPD/GPIO0/SPDIF_OUT0OR1
SPDIF_OUT0
NC#19
NC#20
19
20 PC R464 From SB
499KR2F-1-GP
PCBEEP 12 BEEP
AUD_PC_BEEP C531 2 1 SCD1U10V2KX-4GP SB_SPKR_R 1 2 SB_SPKR
MONO_OUT 32
43 GPIO5
44 33 AUD_CAP2
GPIO6 CAP2 AUD_VREFFLT
45 GPIO7/SPDIF_OUT1 VREFFILT 27
2
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1
1
C558
C561
B R468 B
AVSS1 26 DUMMY-C2
7 42
2
DVSS AVSS2
49 GND
1
92HD71B7A5NLGXB3X8-GP
Azalia I/F EMI

ICH_SDOUT_CODEC
+3.3V_RUN
1
U59
R466 5 1
47R2J-2-GP VCC OE#
DY 4
DY A 2
3
AUD_DMIC_CLK_G Y GND
2
74LVC1G125DC-GP
EC154
ICH_AZ_CODEC_SDOUT1
SC22P50V2JN-4GP
2
R477 2 1 22R2J-2-GP AUD_DMIC_CLK
A A
<Core Design>
Wistron Corporation
1
C528 Title
DY SCD1U10V2KX-4GP
AUDIO CODEC 92HD71B7
2

Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO
Signal inverter for speaker shutdown
+5V_RUN +5V_SPK_AMP
Close to U24.8 Close to U24.18 +5V_SPK_AMP +5V_SPK_AMP
L18
1 2
1
SC1U10V3KX-3GP
+5V_SPK_AMP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
1
1
C538
C545
C563
BLM21PG600SN-1GP C546
1
C552
C548
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
2
D D
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
60ohm 100MHz
2
3000mA 0.05ohm DC
1
+5V_SPK_AMP
C553
C554
C562
Close to Pin9
1
R485
18
17
30
8
9
U62 100KR2J-1-GP
PVDD
PVDD
CPVDD
HPVDD
VDD
U36
2
AUD_SPK_L1 6 2 AUD_LIN_R C544 1 2 SCD033U16V3KX-GP
AUD_SPK_L1 OUTL+ SPKR_INR AUD_LINE_OUT_R
AUD_SPK_L2 7 3 AUD_LIN_L C543 1 2 SCD033U16V3KX-GP 4 3 AUD_HP1_JD
AUD_SPK_L2 OUTL- SPKR_INL AUD_LINE_OUT_L
AUD_SPK_R2 19
AUD_SPK_R2 AUD_SPK_R1 OUTR- AUD_HP1_JD# AMP_MUTE#
AUD_SPK_R1 20 OUTR+ AUD_HP1_JD# 5 2
R486 2 1 100KR2J-1-GP
6040 +5V_SPK_AMP
AUD_HP1_JD 6 1 AUD_HP1_EN
AUD_HP1_JACK_R 15 23 AUD_SPK_ENABLE# From EC
AUD_HP1_JACK_R HPR SPKR_EN#
1
AUD_HP1_JACK_L AMP_MUTE#_R R483 2 1 0R2J-2-GP
AUD_HP1_JACK_L 16 HPL MUTE# 25
22 AUD_HP1_EN 9789 R286
AMP_MUTE#
2N7002SPT R489
HP_EN AMP_REGEN 10MR2J-L-GP
AUD_AMP_GAIN1 31
REGEN 4
10 AMP_C1P C321 1 2 SC1U10V3KX-3GP
2
97891 +5V_RUN
AUD_AMP_GAIN2 GAIN1 C1P AMP_C1N 100KR2J-1-GP
32 12
2
SC10U6D3V5MX-3GP 2K2R2J-2-GP GAIN2 C1N
VOUT 29 +VDDA
C564 R490 24 AUD_BIAS
BIAS
2 AUD_HP1_OUT_R1 1 2 AUD_HP1_OUT_R2 AUD_SET
AUD_HP1_OUT_R 6040B
1
2 AUD_HP1_OUT_L1 1 2 AUD_HP1_OUT_L2
26 HP_INR SET 1
CPGND
6040B
1 27
CPVSS
AUD_HP1_OUT_L HP_INL
1
PGND
PGND
PVSS
R469
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
0R2J-2-GP
GND
GND
1
C565
C322
C556
C557 R488
SC10U6D3V5MX-3GP 2K2R2J-2-GP
C
MAX9789A-GP 9789 6040 C
21
5
28
33
11
13
14
2
2
C551
2 1AUD_CPVSS
SC1U10V3KX-3GP +VDDA +5V_SPK_AMP +5V_SPK_AMP
1
R293 R285 R287
100KR2J-1-GP 100KR2J-1-GP 100KR2J-1-GP
2
R472 D17 U35
AMP_REGEN C535 2 1 SCD033U16V3KX-GP KBC_BEEP_R 1
6040 2 KBC_BEEP
AUD_HP1_JD# 2 4 3 AUD_SPK_ENABLE#
AUD_SET C566 2 1 SCD033U16V3KX-GP 10KR2J-3-GP From EC
6040
1
3AUD_SPK_ENABLE 5 2 AMP_MUTE#
AUD_BIAS C567 1 SCD1U10V2KX-4GP
9789
2 1KR2J-1-GP
1 NB_SPK_EN# 6 1
R484
GAIN SETTING
2
BAW56-2-GP 2N7002SPT
+5V_SPK_AMP
B B
1
R290 R288
DY Main Second
2
AUD_AMP_GAIN1 AUD_AMP_GAIN2 source source

1
TPA6040A MAX9789A
R291 R289 (74.06040.013) (74.09789.013)
DY G80
R486 100K No ASM 1 2
2
A00.08/0922
GAP-OPEN-PWR
R483 No ASM 0 Ohm G79
1 2
R469 No ASM 0 Ohm GAP-OPEN-PWR

GAIN1 GAIN2 GAIN G77
1 2
0 0 6dB R286 No ASM 100K
GAP-OPEN-PWR
0 1 10dB G78
C535 0.033uF No ASM 1 2
1 0 15.6dB
GAP-OPEN-PWR
1 1 21.6dB C566 0.033uF No ASM
A C565 1uF No ASM A

<Core Design>
C567 No ASM 0.1uF

Wistron Corporation
C564 10uF 2.2uF Taipei Hsien 221, Taiwan, R.O.C.
Title
C557 10uF 2.2uF
AUDIO AMP/SPEAKER Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 +3.3V_RUN 1
+3.3V_RTC_LDO +3.3V_RUN
CAP close to VCC-GND pin pair SSID = KBC
L17 2 BLM18AG601SN-3GP VBAT
1
R416
1
R415 DY 2
0R2J-2-GP
2
C194 C196
CAP_SDA 1
DY 2
U22
SCD1U10V2KX-4GP DY SC10U6D3V5MX-3GP 0R2J-2-GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
4 3 KBC_SDA1
THERM_SDA
1
1
C466
C465
C456
C451
C457
C458
C459
C460
DY 5 2
2
115
102
KBC_SCL1
88
76
46
19
80
6 1 THERM_SCL
4
U20A 1 OF 2
D BAT_IN#
R418 D
VCC
VCC
VCC
VCC
VCC
AVCC
VDD
GPIO41
2N7002SPT 1
DY 2 CAP_SCL +3.3V_RUN
0R2J-2-GP
104 124
1
R417 DY 2
0R2J-2-GP
VREF GPIO10/LPCPD# PLT_RST1#_1
LRESET# 7
+1.05V_VCCP E51_RxD
AD_IA 97
98
GPI90/AD0 A/D LCLK 2
3
PCLK_KBC
R147
1
DY 2
10KR2J-3-GP
CAPA_INT# GPI91/AD1 LFRAME# LPC_LFRAME#
99 126 LPC_LAD0
GPI92/AD2 LAD0
1
100 127 LPC_LAD1 LPC_LAD[0..3] RN21
GPI93/AD3 LAD1 LPC_LAD2 R162 KA20GATE
108 GPIO05 LAD2 128 4 1
KBC_THERMTRIP# LPC_LAD3 2K2R2J-2-GP KBRCIN#
96 GPIO04 LPC LAD3 1
125
3
DY 2
SERIRQ INT_SERIRQ
8 PM_CLKRUN# C199 SRN10KJ-5-GP
2
GPIO11/CLKRUN#
KBRST# 122 KBRCIN# 2 1
PCB_VER0 101 121 +3.3V_RTC_LDO
KA20GATE
B
PCB_VER1 GPI94 GA20 ECSCI#_KBC SCD1U16V2KX-3GP RN47
105 GPI95 ECSCI#/GPIO54 29
PCB_VER2 KBC_SCL1
106
107
GPI96 D/A GPIO65/SMI# 9
123 ECSWI#_KBC
GMCH_BL_ON
E C KBC_THERMTRIP# KBC_SDA1
4
3
1
2
CAMERA_DET# GPI97 GPIO67/PWUREQ# H_THRMTRIP#
SCD1U16V2KX-3GP
2 1
R157 10KR2J-3-GP Q9 SRN4K7J-8-GP
EC132
CH3904PT-GP RN46
64 68 KBC_SDA1 BAT_SDA 4 1
PM_SLP_S3# GPIO01/TB2 GPIO74/SDA2 KBC_SCL1 BAT_SCL DY
KBC_PWRBTN# 95 SMB 67 3 2
2
GPIO03 GPIO73/SCL2
AC_IN# 93 69 BAT_SDA D13
GPIO06 GPIO22/SDA1 SRN4K7J-8-GP
LID_CLOSE# 94 GPIO07 GPIO17/SCL1 70 BAT_SCL ECSWI# 1
VGATE_PWRGD 119 GPIO23
A00.08/0902 BIOS_ID 6 3 ECSWI#_KBC KBC_PWRBTN# 1 2
GPIO24 BAS16-1-GP R425 100KR2J-1-GP
EC_SPI_WP#_R 109 GPIO30
R182 RUNPWROK_R LID_CLOSE#
C RUNPWROK 1 2
0R0402-PAD
120
65
GPIO31 SP GPIO66/G_PWM 81 2
R422
1
DY 2
10KR2J-3-GP C
PWRLED GPIO32/D_PWM
A00.08/0903 66 LCD_CBL_DET# 1 2
GPIO33/H_PWM D11 R409 100KR2J-1-GP
16 GPIO40/F_PWM KB_DET#
AD_OFF 17 GPIO42/TCK GPIO77 84
KBC_GPIO76
BLUETOOTH_EN ECSCI# 1
R406
1
DY 2
100KR2J-1-GP
RSMRST#_KBC 20 GPIO43/TMS SPI GPIO76/SHBM 83
ECSCI#_KBC CAMERA_DET#
PM_SLP_S4# 21
22
GPIO44/TDI GPIO GPIO75 82
91
WIFI_RF_EN
BAS16-1-GP
3
R401
1 2
100KR2J-1-GP
A00.08/0903 GPIO45/E_PWM GPIO81 KBC_THERMTRIP#
3V_5V_POK 23 GPIO46/TRST# 2 1 2
PM_PWROK R158 1 2 PM_PWROK_R 24 R404 100KR2J-1-GP
0R0402-PAD GPIO47
PSID_DISABLE# 25 GPIO50/TDO
HDD_5V_EN 26 111 E51_TxD E51_TxD D12 S5_ENABLE 1 2
GPIO51 GPO83/SOUT_CR/BADDR1 E51_RxD R407 10KR2J-3-GP
BLON_OUT 27 GPIO52/RDY# GPIO87/SIN_CR 113 E51_RxD ECSMI# 1
R159 1 2 CPUCORE_ON_R 28 112 KCOL0 1
CPUCORE_ON
0R0402-PADECSMI#_KBC 73
GPIO53 GPO84/BADDR0 BAS16-1-GP 3 ECSMI#_KBC R400 DY 2
10KR2J-3-GP
GPIO70 KBC_GPIO76
A00.08/0903 74 GPIO71 GPIO16 114 PM_LAN_ENABLE 1 2
75 14 TSATN#_KBC 2 R420 10KR2J-3-GP
GPIO72 GPIO34 TSATN#_KBC BIOS_ID
USB_PWR_EN# 110 GPO82/TRIS# GPIO36 15 S5_ENABLE
R509
1
DY
2
10KR2J-3-GP
SER/IR BIOS_ID: Pull High for Discrete
KBC internal Pull Low for UMA
44 KBC_VCORF
VCORF U20B 2 OF 2 A00.08/0902
KCOL[0..16]
1
AGND
+3.3V_RUN
GND
GND
GND
GND
GND
GND
C204 KBC_XI 77 53 KCOL0

32KX1/32KCLKIN KBSOUT0/JENK#
MB
SC1U10V3KX-3GP 52 KCOL1
2
WPCE773LA0DG-GP KBSOUT1/TCK KCOL2
51
116
89
78
45
18
5
103
KBSOUT2/TMS KCOL3
VERSION ID KBSOUT3/TDI 50
1
KBC_XO KCOL4
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
79 32KX2 KBSOUT4/JEN0# 49
MB
R138
R151
AMP_MUTE# 30 48 KCOL5
GPIO55/CLKOUT KBSOUT5/TDO
2
B B
R146
KCOL6
DY DY R413 PS_ID_EC 63
KBSOUT6/RDY# 47
43 KCOL7
VERSION ID
GPIO14/TB1 KBSOUT7
VER2 VER1 VER0 0R0402-PAD PM_PWRBTN# 117 KBC 42 KCOL8
2
GPIO20/TA2 KBSOUT8 KCOL9

LCD_TST_EN 31 GPIO56/TA1 KBSOUT9 41
X00 0 0 0
PCB_VER2 SB KBC_BEEP 32 40 KCOL10
1
PCB_VER1 GPIO15/A_PWM KBSOUT10 KCOL11

BATLOW_LED 118 GPIO21/B_PWM KBSOUT11 39
X01 0 0 1
PCB_VER0 BRIGHTNESS 62 38 KCOL12
GPIO13/C_PWM KBSOUT12/GPIO64 KCOL13
KBSOUT13/GPIO63 37
1
X02 0 1 0
R156 KCOL14
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
KBSOUT14/GPIO62 36
R143
RUNPWROK CPUCORE_ON KCOL15

2
DY 1 KBSOUT15/GPIO61/XOR_OUT 35
-1 0 1 1
R141
R150
KCOL16
DY 0R2J-2-GP
KB_DET#
LCD_CBL_DET#
13
12
GPIO12/PSDAT3 GPIO60/KBSOUT16 34
33 KCOL17 1 TP122
GPIO25/PSCLK3 GPIO57/KBSOUT17
-2 0 1 1 11 KROW[0..7]
2
GPIO27/PSDAT2
LCD_TST 10 GPIO26/PSCLK2
-3 1 0 0 TPDATA 71 54 KROW0
PLT_RST1#_1 GPIO35/PSDAT1 KBSIN0 KROW1
1 R153 2 PLT_RST# TPCLK 72 GPIO37/PSCLK1 PS/2 KBSIN1 55
-3.09/0803 0R0402-PAD 56 KROW2
KBSIN2 KROW3
KBSIN3 57
1
58 KROW4
C190 EC_SPI_DI KBSIN4 KROW5
DY EC_SPI_DI 86 F_SDI KBSIN5 59
KBC
SC470P50V2KX-3GP EC_SPI_DO 87 60 KROW6
EC_SPI_DO
2
EC_SPI_CS# F_SDO KBSIN6 KROW7

+3.3V_RUN EC_SPI_CS#
EC_SPI_CLK 1 R192
90
EC_SPI_CLK_C 92 F_CS0# FIU KBSIN7 61
CLK EMI EC_SPI_CLK 2 F_SCK

PCLK_KBC
2
C228 0R2J-2-GP 85 ECRST#

-1 VCC_POR#
1
2 1 KBC_XI
R148 R410
DY 0R2J-2-GP SC15P50V2JN-2-GP
DY 10KR2J-3-GP
WPCE773LA0DG-GP
1
PCLK_KBC_RC
2
A E51_TxD X1 ECRST# <Core Design> A

2
X-32D768KHZ-38GPU
2
R199 +3.3V_RTC_LDO
R149 20MR3-GP 10KR2J-3-GP Wistron Corporation
1
4K7R2J-2-GP R173 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
E
2
1 2 C214 Taipei Hsien 221, Taiwan, R.O.C.

1
4
2
PURE_HW_SHUTDOWN# 1 2 ECRST#_C B SC1U10V3KX-3GP
2
Title
DY C453
SC4D7P50V2CN-1GP C240 R203 A00.08/0903 R170 Q10
C KBC Winbond WPC773L
1
2 1 X3_1 1 2 KBC_XO 0R0402-PAD CH3906PT-GP

SC15P50V2JN-2-GP 33KR3-GP Custom -3
Roberts
5 4 3 2 1
+5V_RUN +3.3V_RUN +5V_RUN

SSID = Thermal
1
R66
1
R63
C386 C389
1
DY 2
R348
SC4D7U6D3V5KX-3GP SCD1U16V2KX-3GP
10KR2J-3-GP
0R2J-2-GP DY 10KR2J-3-GP
2
D6
EMC2102_FAN_TACH A K EMC2102_FAN_TACH_1 EMC2102_FAN_TACH_1
D D
RB551V30-GP
EMC2102_FAN_DRIVE EMC2102_FAN_DRIVE
+3.3V_RTC_LDO RN3
R346 3 2 +3.3V_RUN
2
DY 1 4 1
49D9R2F-GP SRN4K7J-8-GP
THERM_SCL
THERM_SDA
+3.3V_RUN
R340
EMC2102_VDD_3D3
29
28
27
26
25
24
23
22
2 1
U8
49D9R2F-GP
GND
TACH
SMCLK
SMDATA
VDD_5Va
FANa
FANb
VDD_5Vb
2
+3.3V_RUN
1.For CPU Sensor C60
SCD1U16V2KX-3GP
2
Layout notice :
H_THERMDC
Both H_THERMDA and THERMDC routing 1 21 R89
VDD_3V NC#21
1
10 mil trace width and 10 mil spacing. 8K2R2J-3-GP

C50 2 20
SC470P50V3JN-2GP DN1 GND
2
1
3 19 ALERT# R87 2 1 0R2J-2-GP
H_THERMDA
Layout notice : DP1 ALERT# DY THERM_SCI#
Both DN2 and DP2 routing 10 mil EMC2102_DN2 4 EMC2102 18 CLK_32K
trace width and 10 mil spacing. DN2 CLK_IN
C GND = Internal Oscillator Selected C
EMC2102_DP2 5 17 EMC2102_CLK_SEL R88 2 1 10KR2J-3-GP
C388 must be near Q18 DP2 CLK_SEL +3.3V = External 32.768kHz Clock Selected
EMC2102_DN3 6 16 EM2102_RESET#
DN3 RESET#
1
EMC2102_DP3 7 15
E
C388 C61 DP3 NC#15

DY
THERMTRIP#
POWER_OK#
SYS_SHDN#
Q18 B SC470P50V3JN-2GP SC470P50V3JN-2GP
FAN_MODE
SHDN_SEL
2
TRIP_SET
MMBT3904-3-GP C61 must be
near EMC2102
C
NC#8
2.System Sensor, Put between CPU and NB.
GND = Channel 1
EMC2102-DZK-GP
10
11
12
13
14
C37 must be near Q1 Layout notice : OPEN = Channel 3
Both DN3 and DP3 routing 10 mil +3.3V = Disabled
trace width and 10 mil spacing. R85 2 1 +3.3V_RUN
R67 R84 2 110KR2J-3-GP
E
EMC2102_SHDN 10KR2J-3-GP
Q1 B C37 C63
2
DY 1 +3.3V_RUN +3.3V_RTC_LDO
MMBT3904-3-GP DY SC470P50V3JN-2GP SC470P50V3JN-2GP 10KR2J-3-GP
1
C63 must be
C
1
+3.3V_RUN +3.3V_RUN
near EMC2102
R68 R362 R347
3.HW T8 sensor 2 EMC2102_FAN_mode
DY 1 10KR2J-3-GP 10KR2J-3-GP
10KR2J-3-GP A00.08/0922
1
R71
1
Q17 C78 R82
G
B 2 1 2N7002-7F-GP SCD1U16V2KX-3GP 10KR2F-2-GP B
2
TP223 1 EMC2102_FAN_TACH_1 S D PURE_HW_SHUTDOWN#
2
TP72 EMC2102_FAN_DRIVE 10KR2J-3-GP
1 GND = Fan is OFF
OPEN = Fan is at 60% full-scale TRIP_SET Pin Voltage
V_DEGREE
+3.3V = Fan is at 75% full-scale V_DEGREE=(((Degree-75)/21)
1
1
C70 R78
SCD1U16V2KX-3GP 2K37R2F-GP
2
T8 shutdown is set 88 deg-C.
32K suspend clock output

+3.3V_ALW
U10
R219 EM2102_RESET# 1 C82
CLK_32K_R CLK_32K B
ICH_SUSCLK D S 1 2
2
VCC 5
DY 1
2
Q13 10R2J-2-GP
PM_SLP_S3# A DY 4 SCD1U16V2KX-3GP PM_PWROK
Y
1
2N7002-7F-GP 3
G
A C249 GND A
DY SC4D7P50V2CN-1GP 74LVC1G08GW-1-GP
<Core Design>
2
RUN_POWER_ON
Wistron Corporation
Title
Size
Thermal/Fan Controllor EMC2102 Rev
Document Number
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = Charger
MAX8731_LDO
1
R339 +PBATT
10KR2F-2-GP
2
ACAV_IN
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
D D
EC77
EC76
EC80
EC79
1
1
R341
15K4R2F-GP
2
2
+3.3V_RTC_LDO
Id=-8A
Qg=17~24nC
Adaptor In Soft-Start Circuit
1
Rdson=15~20mohm
R72
100KR2J-1-GP Layout Trace 250mil
+DC_IN_SS Layout Trace 300mil Layout Trace 300mil
2
U47
AC_IN# +SDC_IN +PWR_SRC +PBATT
SC1U10V3KX-3GP
8 D S 1
7 D S 2 R338 U37
1
C67
6 D S 3 1 2 1 S D 8
D
5 D G 4 2 S D 7
Q4 D01R2512F-4-GP 3 S D 6
2
AO4407A-GP +DC_IN_SS 4 G D 5
G ACAV_IN R59
AO4407A-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
10KR2J-3-GP
2N7002-7F-GP
S
1
1
G57
G56
DC_IN_D R295
R64
C
R62 470KR2J-2-GP C
DCIN_GATE1 1 2 DCIN_GATE2 1 2
D
2
Q2 100KR2J-1-GP
2N7002-7F-GP
D 49K9R2F-L-GP
G
Q3
2N7002-7F-GP
S
1
ACAV_IN G C47
1
SCD1U25V3KX-GP C41
S
MAX8731_CSSN
MAX8731_CSSP
+DC_IN_SS SCD1U25V3KX-GP
2
A00.08/0903
1 R46 2
CHG_AGNDCHG_AGND CHG_AGND
1
0R0402-PAD
1
SC10U25V0KX-3GP
SC10U25V0KX-3GP
1
R52 C39 U7 C38
SCD1U25V3KX-GP
1
SC1U25V5KX-1GP
C369
C371
365KR3F-GP SC1U10V3KX-3GP
ASNS
2
C40
MAX8731_DCIN 22 28 R49
2
DCIN CSSP
5
6
7
8
33R2J-2-GP
MAX8731_ACIN DY
D
D
D
D
2
2
ACIN CHG_AGND U45
SCD01U50V2KX-1GP
27
2
CSSN
1
+3.3V_RTC_LDO 11 26 MAX8731_VCC SI4800BDY-T1

VDD VCC
1
C46
R45
1
R48 0R3J-0-U-GP D5 C48

49K9R2F-L-GP C64 25 MAX8731_BST 1 2MAX8731_BST1 K A 1 2
2
G
S
S
S
SCD1U25V3KX-GP BST MAX8731_LDO
21
2
4
3
2
1
ACAV_IN LDO BAS516-1-GP SC1U10V3KX-3GP
13 ACOK
B CHG_AGND 24 MAX8731_DHI +PBATT B
CHG_AGND BAT_SCL DHI C34 SCD1U25V3KX-GP CHG_PWR
BAT_SCL 10 SCL R44 L9
1 2 R306 Layout Trace 300mil
23 MAX8731_LX 1 1R3F-GP2 MAX8731_LX1 1 2 1 2
LX
1 2
BAT_SDA C42 SC220P50V2KX-3GP D01R2512F-4-GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
SC10U25V6KX-1GP
BAT_SDA 9 SDA IND-5D8UH-GP
20 MAX8731_DLO
DLO
5
6
7
8
1
C331
C329
C323
D
D
D
D
14 19 U44
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
BATSEL PGND SI4800BDY-T1 DY
2
2
2
18 MAX8731_CSIP
CSIP
G51
G50
CHG_AGND
17 MAX8731_CSIN
G
S
S
S
CSIN
8
4
3
2
1
1
AD_IA INP
A00.08/0909
R61 1 2 10KR2F-2-GP MAX8731_CCV 6 CCV
1MAX8731_CCV1
MAX8731_CCI 5 16
MAX8731_CCS CCI FBSB
4 CCS
MAX8731_REF 3 REF R335
MAX8731_DAC 7
DAC BAT_SENSE BATT_SENSE
12 15 1 2
GND
GND FBSA BATT_SENSE

SC1U10V3KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
1
100R2F-L1-GP-U
1
1
C62
C58
C57
C55
C51
C59
10KR2F-2-GP
MAX8731AETI-GP
29
R65
C372
SCD01U50V2KX-1GP
2
A A
<Core Design>
2
1 2
G11
GAP-CLOSE-PWR Wistron Corporation
CHG_AGND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title

CHARGER MAX8731 Rev
Custom -3
Roberts
5 4 3 2 1
A B C D E
+PWR_SRC PWR_SRC_17020
SSID = PWR.Plane.Regulator_3p3v5v 2
G17
1
GAP-CLOSE-PWR
G23
2 1
GAP-CLOSE-PWR
+PWR_SRC PWR_SRC_17020 G63
No Install for ISL6236 2 1
G19
Install 10 ohm for MAX8778 GAP-CLOSE-PWR
1 2
G70
GAP-CLOSE-PWR 2 1
G72
1 2 GAP-CLOSE-PWR
4 G68 4
GAP-CLOSE-PWR 2 1
G33 +5V_ALW2 +5V_VCC1
1 2 R393 GAP-CLOSE-PWR
1 2 G66
GAP-CLOSE-PWR 2 1
1
G21 10R3F-GP
1 2 0.1uF for ISL6236, C177 GAP-CLOSE-PWR
SC4D7U6D3V5KX-3GP G64
Install with 1uF for
2
GAP-CLOSE-PWR 2 1
G36 Max8778
1 2 PWR_SRC_17020 GAP-CLOSE-PWR
GAP-CLOSE-PWR
+3.3V_RTC +2.0V_REF_3V5VREG
1
R399 R397 +5V_VCC1
0R0805-PAD0R0805-PAD C165 +5V_VCC1
1 2
1
0R2J-2-GP
2
R113
SB SC1U25V3KX-1-GP R384 PWR_SRC_17020
SC1U25V3KX-1-GP
3V/5V_VIN
DY 0R0402-PAD
1
A00.08/0902
SC2200P50V2KX-2GP
C155
R387
DY
2
0R2J-2-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
PWR_SRC_17020 C169
SCD1U50V3KX-GP
1
C85
C401
C86
C402
R114
3V/5V_TON 2
1 2
DY DY
2
SC1KP50V2KX-1GP
0R2J-2-GP
0R2J-2-GP
2
5
6
7
8
R107
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
CLOSE TO PIN 10 +3.3V_RTC MAX8778_3/5V_AGND C146

1
D
D
D
D
C421
C147
C148
C422
U12
1 R391 2 LDO_EN
1 2
DY IRF8707PBF-GP
0R0402-PAD SC1U25V3KX-1-GP 3V_ALW +/- 5%
2
1
A00.08/0903 Design Current: 5.4A
8
7
6
5
U15
Peak current 7.8A
D
D
D
D
G
S
S
S
MAX8778_3/5V_AGND
8
7
6
5
4
3
2
1
8.58<OCP<10.92A
IRF8707PBF-GP
U18 NEC 220uF
4
3
2
1
5V_ALW +/- 5% MAX8778_3/5V_AGND
LDOREFIN
LDO
IN
RTC
ONLDO
VCC
TON
REF
Design Current: 6A
6D3V, V Size
C183 ESR=25mohm +3.3V_ALWP +3.3V_ALW
Peak current 8.5A CLOSE TO PIN 30 L13
NEC 220uF S R108 G30
S
S
G
MAX8778_3/5V_AGND 2 1 33 GND
3 9.35<OCP<12A 1 2 1 2 +3.3V_ALWP 1 2 3
1
2
3
4
6D3V, V Size SCD1U25V3KX-GP 32 17020_REFIN2 IND-3D3UH-57GP
REFIN2
1
ESR=25mohm 17020_ILIM2 237KR2F-GP MAX8778_3/5V_AGND GAP-CLOSE-PWR
GAP-CLOSE-PWR-3-GP
9 BYP ILIM2 31
+5V_ALW +5V_ALWP 17020_OUT2
ST220U6D3VDM-15GP
10 MAX17020ETJ-GP 30 A00.08/0903 G32
L15 OUT1 OUT2
SCD1U10V2KX-4GP
G44 17020_FB 17020_SKIP# R106 1 2 0R0402-PAD R86
11 FB1 SKIP# 29
DY 1 2
5
6
7
8
C397
+5V_ALWP 1 R136 2 17020_ILIM1 3V_5V_POK C139 2D2R5F-2-GP
1 2 1 2 12 ILIM1 PGOOD2 28 2
DY 1 +5V_VCC1
1
D
D
D
D
G18
TC2
AO4712-GP
U11
SCD1U10V2KX-4GP
IND-3D3UH-57GP 270KR2F-GP 3V_5V_POK 13 27 3V_EN SCD1U25V3KX-GP GAP-CLOSE-PWR
2
PGOOD1 ON2
1
1
C424
GAP-CLOSE-PWR TC7 TC20 5V_EN 17020_UGATE2 PR19 0R2J-2-GP G31

2D2R5F-2-GP
14 ON1 DH2 26
1
G45 MAX8778_3/5V_AGND MAX8778_3/5V_AGND MAX8778_3/5V_AGND
18778_PHASE2_Sn
15 25 1 2
2
DH1 LX2
1
ST220U6D3VDM-15GP
ST150U6D3VBM-1-GP
R129
1 2 DY 17020_PHASE1 16 17020_PHASE2
2
LX1
SCD1U25V3KX-GP
G41 GAP-CLOSE-PWR
DY
SECFB
8
7
6
5
AGND
PGND
G
S
S
S
15V_PHASE1_Sn
GAP-CLOSE-PWR GAP-CLOSE-PWR-3-GP G27
BST1
BST2
VDD
1
DL1
DL2
D
D
D
D
U17
AO4712-GP
C179
G43 1 2
2
4
3
2
1
1
1 2 C149
SC330P50V2KX-3GP
SCD1U25V3KX-GP GAP-CLOSE-PWR
2
17
18
19
20
21
22
23
24
8778_FB1_1
GAP-CLOSE-PWR G26
2
G48 1 2
R135 17020_BOOT2 1 2 8778_BOOT2_1 C79
S
S
S
G
1 2
DY
8778_SECFB
C176
8778_BOOT1_1 1 217020_BOOT1 R118 SC330P50V2KX-3GP GAP-CLOSE-PWR

1
2
3
4
2
GAP-CLOSE-PWR 8778_LGATE2 0R3J-0-U-GP G29
G47 DY 0R3J-0-U-GP17020_LGATE1 1 2
2
1
1 2
R132 1 2 GAP-CLOSE-PWR
GAP-CLOSE-PWR 0R2J-2-GP +5V_ALW2 G42 G25
G46 DY GAP-CLOSE-PWR 1 2
2
1 2
2
C172 GAP-CLOSE-PWR
GAP-CLOSE-PWR SC1U25V3KX-1-GP MAX8778_3/5V_AGND G28
1
1
1 2
R137
0R0402-PAD Vout2 = Vref(Rrefin_top/Rrefin_bottom + 1) GAP-CLOSE-PWR
Vout1 = 0.7(Rtop/Rbottom + 1)
A00.08/0903
2
+5V_ALW2
MAX8778_3/5V_AGND R127
1 2 0R0402-PAD I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 3.3UH PCMC063T3R3MN CYNTEC DCR 28~30mohm Isat =13.5Arms 68.3R310.20A
A00.08/0903
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
2 4/14 modify. O/P cap: 150U 6.3V PSLB20J157M(45) 45mOhm 1.374rms NEC_TOKIN/77.C1571.09L 2
Add RC circuit for power sequence. H/S: IRF8707 SO-8/ 14.2mohm/17.5mOhm@4.5Vgs/ 84.08707.037
L/S: FDS4712 SO-8/ 15mohm/18mOhm@4.5Vgs/ 84.04712.037
A00.08/0903
3V_5V_EN R110 1 2 0R0402-PAD 3V_EN
R134 1 2 0R0402-PAD 5V_EN +3.3V_RTC_LDO
A00.08/0903
1
1
C141 C180 R109
SCD1U10V2KX-4GP DYDY SCD1U10V2KX-4GP 100KR2J-1-GP
2
2
3V_5V_POK
3V_5V_POK
+3.3V_RTC_LDO
+5V_ALW2
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L U19

Inductor: 3.3UH PCMC063T3R3MN CYNTEC DCR 28~30mohm Isat =13.5Arms 68.3R310.20A
SC1U10V3KX-3GP
1 VIN VOUT 5
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L High 2 GND
1
C171
SC1U10V3KX-3GP
O/P cap: 150U 6.3V PSLB20J157M(45) 45mOhm 1.374rms NEC_TOKIN/77.C1571.09L SKIPSEL GND Open/REF (2V) (VCC or 3.3V) 3 EN NC#4 4
H/S: IRF8707 SO-8/ 14.2mohm/17.5mOhm@4.5Vgs/ 84.08707.037
C184
Operating pulse-skipping ultrasonic
2
L/S: FDS4712 SO-8/ 15mohm/18mOhm@4.5Vgs/ 84.04712.037 Mode mode mode forced-PWM G9091-330T11U-GP
operation
2
Open High
TONSEL GND (REF) (VCC)
CH1 Freq 400kHz 400kHz 200kHz
1
CH2 Freq 500kHz 300kHz 300kHz 1
VLDOREFIN
LDOREFIN GND VCC = 0.5V
Operating <Core Design>
Mode 4.90/5.0/5.10 3.23/3.3/3.37 0.96/1.0/1.04
Wistron Corporation
RTC Taipei Hsien 221, Taiwan, R.O.C.
FB1 GND VCC REFIN2 5V (3.3V)
Title
Operating Operating
Mode 4.925/5.00/5.075 1.482/1.50/1.518 Mode 3.255/3.30/3.345 1.038/1.050 /1.062 DC to DC 3.3V/5V
A2 -3
Roberts
A B C D E
5 4 3 2 1
SSID = CPU.Regulator DPRSLPVR
H_DPRSTP#
R297 1 2 10KR2J-3-GP
CPUCORE_ON
+3.3V_RUN PR11 1 DY 2 10KR2J-3-GP CPU_VID[6..0]
TP22 1 CLK_EN#
CPU_VID6
CPU_VID5
CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
+3.3V_RUN
D D
0R0402-PAD
0R0402-PAD
499R2F-2-GP
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
1
R305
10R3F-GP
2
A00.08/0903 A00.08/0903
R169
1
1
R29
R307
R308
R309
R303
R304
R298
R301
R310
R313
C337
SCD1U10V2KX-4GP
6266A_DPRSLPVR
6266A_DPRSTP#
6266A_CLK_EN#
6266A_VRON
6266A_3V3
6266A_D6
6266A_D5
6266A_D4
6266A_D3
6266A_D2
6266A_D1
6266A_D0
+3.3V_RUN
49
48
47
46
45
44
43
42
41
40
39
38
37
R312 U40
+1.05V_VCCP 1K91R2F-1-GP
GND
DPRSLPVR
VR_ON
3V3
CLK_EN#
DPRSTP#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
R314
2
C339
1 36 1 2 2 1 6266A_PHASE1
VGATE_PWRGD A00.08/0903 PGOOD BOOT1 6266A_PHASE1
1
C C
R36 R35 2 6266A_PSI# 1R3F-GP SCD22U25V3KX-GP 6266A_UGATE1
68R2F-GP DY PSI# 1
0R0402-PAD
2 PSI# UGATE1 35 6266A_UGATE1
1 2 6266A_PMON 3 PMON PHASE1 34 6266A_PHASE1
C341 R315 4K99R2F-L-GP
2
1 2 1 2 6266A_RBIAS 4 RBIAS PGND1 33

R316 147KR2F-GP
SCD1U16V2KX-3GP 5 32 6266A_ LGATE1
CPU_PROCHOT# VR_TT# LGATE1 C345 6266A_ LGATE1
+5V_RUN
R37 1 2 4K02R2F-GP R299 1 2 NTC-470K-1-GP 6266A_NTC
DY DY C346
6 NTC PVCC 31 1 2
C343 1 2 SCD01U50V2KX-1GP 26266A_SOFT 7 SC2D2U10V3KX-1GP 6266A_LGATE2

DY 1
SCD015U50V3KX-GP SOFT ISL6266AHRZ-GP LGATE2 30 6266A_LGATE2
Place close to 6266A_VO 1 2 6266A_OCSET 8 74.06266.073 29
R38 12K1R2F-L1-GP OCSET PGND2
1st phase choke C350 1 2 SC1KP50V2KX-1GP 6266A_VW 9 28 6266A_PHASE2
VW PHASE2
6266A_COMP 10 27 6266A_UGATE2
COMP UGATE2 R319 6266A_UGATE2
C351
R317 6266A_FB 11 26 6266A_BOOT2 1 2 1 2 6266A_PHASE2
FB BOOT2 6266A_PHASE2
1 2
6266A_FB2 12 25 1R3F-GP SCD22U25V3KX-GP
C349 8K25R2F-1-GP FB2 NC#25
DROOP
1 2
VDIFF
ISEN2
ISEN1
VSUM
VSEN
GND
VDD
RTN
DFB
VIN
SC100P50V2JN-3GP
VO
R318 C348
1 2 1 2
13
14
15
16266A_DROOP 16
17
18
19
20
21
22
23
24
1
97K6R2F-GP SC270P50V2KX-1GP R322

1KR2F-3-GP 6266A_ISEN1
3K92R2F-GP
1 1KR2F-3-GP
6266A_VDIFF
6266A_VSUM
6266A_ISEN2
6266A_VSEN
B B
6266A_VDD
6266A_ISEN1
6266A_RTN
6266A_DFB
C356
6266A_VIN
6266A_VO
2
R320 C18
2
1 2 1 2 SCD22U10V2KX-1GP
1
100R2F-L1-GP-U SC2200P50V2KX-2GP 6266A_VO
6266A_VO
2
R323
R321 PWR_SRC_CPU C19 6266A_VSUM

6266A_VSUM
1 2 SCD22U10V2KX-1GP
1
10R3F-GP
1 SCD01U50V2KX-1GP
6266A_ISEN2
2
R327 2
1KR2F-3-GP R332
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
1
6266A_SOFT 2K61R2F-1-GP
11KR2F-L-GP
SCD047U10V2KX-2GP
1
DY 2
R328
PR12 1KR2J-1-GP
1
1
C364
C358
C360
1 2
C361 +5V_RUN
2
2
R331
SC330P50V2KX-3GP R41
2
2
R300
SC180P50V2JN-1GP
1 2
NTC-10K-9-GP
10R3F-GP
1
2
VCC_SENSE 1 R329 2 C28 6266A_VO
0R0402-PAD SC1U10V3KX-3GP
2
C20 2
2
1
Place close to 1st Choke

C27
C359
SC330P50V2KX-3GP
2
VSS_SENSE 1 R330 2
0R0402-PAD
1
SB R324
A C362 A
1 2 <Core Design>
SCD01U50V2KX-1GP
2
0R0402-PAD
Wistron Corporation
6266AGND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size
CPU VCORE POWER(1/2)
Document Number Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = CPU.Regulator
PWR_SRC_CPU
+PWR_SRC
+PWR_SRC PWR_SRC_CPU
G10
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
D GAP-CLOSE-PWR D
SCD1U25V3KX-GP
5
6
7
8
5
6
7
8
1
C1
C2
C21
C333
C354
C335
G5
1
D
D
D
D
D
D
D
D
C4
AOL1426-GP
1 2 TC10 PTC3
U3
U39 DY SE100U25VM-14GP DY SE100U25VM-14GP
2
GAP-CLOSE-PWR AOL1426-GP
2
G2
1 2
G
S
S
S
G
S
S
S
CPU noise
GAP-CLOSE-PWR
4
3
2
1
4
3
2
1
G1
1 2
GAP-CLOSE-PWR +VCC_CORE
G4 6266A_UGATE1
6266A_UGATE1
1 2
GAP-CLOSE-PWR L8
G3 6266A_PHASE1 1 2
6266A_PHASE1
1 2 IND-D36UH-9-GP
68.R3610.20C
1
GAP-CLOSE-PWR
5
6
7
8
5
6
7
8
G9 TC14 TC1 TC16
D
D
D
D
D
D
D
D
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
1 2 DY
2
U38 U2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR AOL1412-GP AOL1412-GP
GAP-CLOSE-PWR-3-GP
G8
1
1 2
G53
G
S
S
S
G
S
S
S
G52
GAP-CLOSE-PWR
4
3
2
1
4
3
2
1
C
G7 C
2
1 2 6266A_ LGATE1
6266A_ LGATE1
2
GAP-CLOSE-PWR
G6
1 2
GAP-CLOSE-PWR
6266A_VSUM R42 1 2 3K65R2F-1-GP

6266A_VSUM
6266A_ISEN1 R39 1 2 10KR2F-2-GP
6266A_ISEN1
6266A_VO R43 1 2 1R2F-GP

6266A_VO
6266A_ISEN2 R40 1 2 10KR2F-2-GP
6266A_ISEN2
PWR_SRC_CPU
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
1
1
C22
C23
C355
C334
C353
5
6
7
8
5
6
7
8
D
D
D
D
D
D
D
D
2
U42 U5
AOL1426-GP AOL1426-GP
G
S
S
S
G
S
S
S
B B
4
3
2
1
4
3
2
1
+VCC_CORE
6266A_UGATE2
6266A_UGATE2
L10
6266A_PHASE2 1 2
6266A_PHASE2
IND-D36UH-9-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
TC15
TC13
5
6
7
8
5
6
7
8
1
68.R3610.20C
D
D
D
D
D
D
D
D
U6 U43
2
AOL1412-GP AOL1412-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
G
S
S
S
G
S
S
S
1
4
3
2
1
4
3
2
1
G54
G55
2
2
6266A_LGATE2
6266A_LGATE2
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L 6266A_VSUM R333 1 2 3K65R2F-1-GP
A Inductor: 0.36UH PCMC104T-R36MN1R05J CYNTEC DCR 1.05(+5%~-5%)mohm 6266A_ISEN2 R325 1 2 10KR2F-2-GP A
<Core Design>
Isat =60Arms 68.R3610.20C
O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3.0Arms Panasonic/79.33719.L01 6266A_VO R334 1 2 1R2F-GP
H/S: AOL1426 PowerPAK/ 10.2mohm/12.5mOhm@4.5Vgs/84.01426.037 Wistron Corporation
L/S: AOL1412 PowerPAK/ 3.8mohm/4.65mOhm@4.5Vgs/ 84.01412.037 6266A_ISEN1 R326 1 2 10KR2F-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size
CPU VCORE POWER(2/2)
Document Number Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
+1.05V_RUNP +1.05V_VCCP +1.05V_RUNP +1.05V_VCCP

SSID = PWR.Plane.Regulator_1p05v 2
G67
1 1
G69
2
GAP-CLOSE-PWR GAP-CLOSE-PWR
G74 G73
2 1 1 2
G71 G76
2 1 1 2
D +PWR_SRC +1.05V_PWR_SRC +PWR_SRC +1.05V_PWR_SRC GAP-CLOSE-PWR GAP-CLOSE-PWR D
G75 G24
G15 G60 2 1 1 2
1 2 1 2
GAP-CLOSE-PWR GAP-CLOSE-PWR G20 G34
G14 G59 2 1 1 2
1 2 1 2
G13 G61 2 1 1 2
1 2 1 2
G12 G62 2 1 1 2
1 2 1 2
G16 G58 2 1 1 2
1 2 1 2
H/S: IRF8707 SO-8/ +1.05V_PWR_SRC

+5V_ALW 14.2mohm/17.5mOhm@4.5Vgs
84.08707.037
SC2200P50V2KX-2GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
C C
1
C412
C125
C411
C120
C121
1
DY
1
R364
2
C400 300R3-GP
5
6
7
8
5
6
7
8
SC1U10V3KX-3GP
2
D
D
D
D
D
D
D
D
U13
IRF8707PBF-GP
2
U50
IRF8707PBF-GP
1
R365 C398 +1.05V_SUSP+/- 5%

+5V_ALW C396 2 1 +1.05V_LL1 1 2 Design Current: 14.3A
SC1U10V3KX-3GP
G
S
S
S
G
S
S
S
2
0R3J-0-U-GP SCD1U25V3KX-GP Peak current 20.4A
4
3
2
1
4
3
2
1
1
22.44<OCP<28.5
U49
D21 +1.05V_V5FILT 4 13 +1.05V_DRVH +1.05V_RUNP
V5FILT DRVH L14
CH551H-30PT-GP 10 V5DRV +1.05V_LL
12 1 2
2
+1.05V_VBST LL COIL-1UH-33-GP
ST330U2D5VDM-13GP
ST330U2D5VDM-13GP
14
GAP-CLOSE-PWR-3-GP
VBST
1
2 CH751H-40PT +1.05V_VFB +1.05V_DRVL
SCD1U10V2KX-4GP
1 5 VFB DRVL 9
5
6
7
8
5
6
7
8
D23 3 +1.05V_VOUT G35
VOUT
1
C413
R355 1 2 100KR2J-1-GP +1.05V_EN R388 TC6 TC5
FDS8672S-GP
D
D
D
D
D
D
D
D
1 6
PM_SLP_S3# EN_PSV PGOOD RUNPWROK DY
U16
U51 2D2R5F-2-GP
R363 1 2 200KR2J-L1-GP +1.05V_TON 2 7 R358 FDS8672S-GP
2
+1.05V_TRIP 11 TON GND
8 1 2 +3.3V_RUN
2
TRIP PGND
+1.05V_PWR_SRC
SCD01U50V2KX-1GP
6K19R2D-1-GP
1
G
S
S
S
G
S
S
S
PR13 TPS51117PWR-GP 100KR2J-1-GP
1
1
C378
1
DY 2
4
3
2
1
4
3
2
1
R366
RT: Non_ASM PR15 C429

TI: ASM 1M1R2J-GP
B DY 17K4R3F-GP D19
DY SC330P50V3KX-GP B
2
2
2 +5V_RUN
Vout=0.75V*(R1+R2)/R2
2
+1.05V_LL 3
+1.05V_VOUT
1 PM_SLP_S3#
1
BAW56-2-GP R353
12KR2F-L-GP C382
L/S: FDS8672S SO-8 DY SC18P50V2JN-1-GP
2
RT: Non_ASM TI: Non_ASM
2
TI: ASM RT :ASM 5.3mOhm/7.0mohm@4.5Vgs +1.05V_VFB
TI: Non_ASM 84.08672.A37
1
RT :ASM
R352
30KR2F-GP
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 1.0UH PCMC104T1R0MN Cyntec DCR:3.0 ~3.5mohm Isat =40Arms 68.1R01A.20A
2
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L
H/S: IRF8707 SO-8/14.2mohm/17.5mOhm@4.5Vgs/ 84.08707.037
L/S: FDS8672S SO-8/ 5.3mOhm/7.0mohm@4.5Vgs/ 84.08672.A37
Switching freq-->350KHz
A A
<Core Design>
Wistron Corporation
Title

DC to DC 1.05V Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p8v0p9v
TI TPS51116 for 1.8V and 0.9V +5V_ALW
4/14 modify.
1
D PR4 D
5D1R3J-GP Add RC circuit for power sequence.
PR2 +5V_ALW
2
RT: Non_ASM 1 251116_VDD
TI: ASM
+5V_ALW
SC1U10V3KX-3GP
SC1U10V3KX-3GP
9K31R2F-GP
A00.08/0903
1
PC9
1 2 PR9 1 2 0R0402-PAD 0D9V_EN
PM_SLP_S3#
1
1
PC16
PC7 PR8 1 2 0R2J-2-GP
DY
2
PM_SLP_S4#
1
+5116_PWR_SRC +3.3V_ALW PD1
DY
SC1KP50V2KX-1GP CH551H-30PT-GP C89
DY
2
SCD1U10V2KX-4GP
2
2
16
14
15
PR6 PU1
DY 20KR2F-L-GP
ILIM
VDDP
VDDP
PR1
22 TPS51116_VBST1 1 2 TPS51116_VBST
1
BST
RUNPWROK 13 PGD 0R3J-0-U-GP
PR7 1 2 619KR2F-GP 21 TPS51116_UGT
RT 12 NC#12 DH
PM_SLP_S4# 11 EN/PSV
0D9V_EN 10 20 TPS51116_PHS
VTTEN LX
1ST 2ND
+PWR_SRC +5116_PWR_SRC
SC1U10V3KX-3GP
C TI RT +1.8V_SUS_P 23 VTTIN C
PG6
1
PC2
PR7 Non_ASM ASM DL 19 TPS51116_LGT 2 1

7 +1.8V_SUS_P +1.8V_SUS
+5V_ALW NC#7 GAP-CLOSE-PWR PG8
2
PR16 1 1M1R2J-GP TPS51116RGER-GP-U PG4

DY 2 1 18 2 1
1 2
+1.8V_SUS_P PGND2 PGND1 GAP-CLOSE-PWR
PGND1 17
PR14 1 2 0R0402-PAD 4 GAP-CLOSE-PWR PG10
TON TPS51116_VDDQSNS PG7
VDDQS 8 1 2
2
A00.08/0903 2 1
PC17 51116_VDDQSET GAP-CLOSE-PWR
SC1KP50V2KX-1GP DY 24 VTT FB 9
GAP-CLOSE-PWR PG14
1
+0D9V_DDR_P 2 +5V_ALW PG5 1 2

VTTS
VCCA 6 1 PR17 2 +5116_PWR_SRC 2 1
VSSA
0R0402-PAD GAP-CLOSE-PWR
GND
REF
SB GAP-CLOSE-PWR PG13
1
PG3 1 2
DY PC10 2 1
25
+V_DDR_MCH_REF SC1U10V3KX-3GP GAP-CLOSE-PWR
2
GAP-CLOSE-PWR
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PG12
SCD1U50V3KX-GP
SC4D7U25V5KX-GP
PC12
PC19
PC18
PC20
1 PR3 2 1 2
1
0R0603-PAD
1
GAP-CLOSE-PWR
5
6
7
8
PC8 PG11
2
D
D
D
D
SCD033U16V3KX-GP 1 2
2
PU2 +1.8V_SUS +/- 5%

FDS8880-NL-GP Design Current: 9.7A GAP-CLOSE-PWR
PG9
Peak current 13.9A
1 2
+0D9V_DDR_P 15.29<OCP<19.46A
G
S
S
S
B B
GAP-CLOSE-PWR
4
3
2
1
PG15
+0D9V_DDR_P +0.9V_DDR_VTT +1.8V_SUS_P
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
1 2
PC3
PG2 TPS51116_UGT
PL1
1
1
PC5
PC4
PC6
1 2 GAP-CLOSE-PWR
TPS51116_VBST 1 2 TPS51116_PHS 1 2 PG16
GAP-CLOSE-PWR IND-1D5UH-23-GP 1 2
2
PG1 PC1
ST330U2D5VDM-13GP
ST330U2D5VDM-13GP
SC4D7U6D3V5KX-3GP
1
SCD1U25V3KX-GP GAP-CLOSE-PWR
SCD1U10V2KX-4GP
1 2
PTC2
PTC1
PC14
PC15
PG17
5
6
7
8
1
GAP-CLOSE-PWR PR10
DY 1 2
PG18
2D2R5F-2-GP
D
D
D
D
U14 DY GAP-CLOSE-PWR
GAP-CLOSE-PWR-3-GP
2
2
FDS8672S-GP
1
TPS51116_PHS_SET
1
G
S
S
S
4
DY PC13
3
2
1
SC330P50V3KX-GP
2
State S3 S5 VDDR VTTREF VTT
TPS51116_LGT
S0 Hi Hi On On On TPS51116_VDDQSNS
1
DY
1
S3 Lo Hi On On Off(Hi-Z)
PR5 PC11
S4/S5 Lo Lo Off Off Off 42K2R2F-L-GP DY SC18P50V2JN-1-GP
2
2
51116_VDDQSET
1
A A
<Core Design>
VDDQSET VDDQ (V) VTTREF and VTT NOTE Close to VFB Pin (pin5) PR18
30KR2F-GP DY
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Wistron Corporation
2
GND 2.5 VVDDQSNS/2 DDR 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Inductor: 1.5UHPCMC063T-1R5MN Cyntec DCR:14~15mohm Isat =18Arms 68.1R510.10K Taipei Hsien 221, Taiwan, R.O.C.
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L
V5IN 1.8 VVDDQSNS/2 DDR2 Title
H/S: FDS8880 SO-8/9.6mohm/ 12mOhm@4.5Vgs/ 84.08880.037
L/S: FDS8672S SO-8/ 5.3mOhm/7.0mohm@4.5Vgs/ 84.08672.A37
DC to DC 1.8V/0.9V Rev
FB Resistors Adjustable VVDDQSNS/2 1.5 V < VVDDQ < 3 V Switching freq-->400KHz Custom
Roberts -3
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p5v
D D
Change from +5V_RUN to +5V_ALW,

please confrim it is okay.
+5V_ALW +1.8V_SUS
1D5V_SB
1
C208 C205 C206
SC1U10V3KX-3GP SC10U6D3V5MX-3GP DY SC10U6D3V5MX-3GP
2
+1.5V_RUN +/- 5%
Design Current: 2.5A
Peak current 3.5A
6
U21
VCNTL
C RUNPWROK 7 5 +1.5V_RUN C
POK VIN
VIN 9
PM_SLP_S3# 1 2 1D5V_EN 8 3
EN VOUT
TC22
TC23
R189 2K2R2J-2-GP
ST100U6D3VBM-5GP
ST100U6D3VBM-5GP
SCD01U16V2KX-3GP
VOUT 4
Vo=0.8*(1+(R1/R2))
1
C212
1KR2F-3-GP
R176
C216
DY 2
DY
GND
SC4700P50V2KX-1GP FB
2
APL5912-KAC-GP
2
SO-8-P
1
R184
1K13R2F-1-GP
NEC_TOKIN
2
100uF, 6.3V, B2 Size
Iripple=1.374A, ESR=45mohm
B B
A A
<Core Design>
Wistron Corporation
Title

DC to DC 1.5V Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title

VGA Power Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = Reset.Suspend
H_THRMTRIP#
D D
E
R161
H_PWRGD_R
H_PWRGOOD 1
DY 2 B
DY Q8
1
1KR2J-1-GP CHT2222APT-GP
C
C198
SCD1U10V2KX-4GP DY
2
2
D10
BAS16-1-GP 3 PURE_HW_SHUTDOWN#
3V_5V_EN 1
1
1 2 S5_ENABLE
R160
R168 1KR2J-1-GP
200KR2J-L1-GP
DY
2
C C
Run Power
+5V_RUN +5V_ALW
U30
1 S D 8
C534 2 S D 7
2 S D
B
DY1 R275 1 2 10KR2J-3-GP
3
4 G D
6
5 B
+PWR_SRC SCD1U25V3KX-GP
Q22 RUN_POWER_ON AO4468-GP
1
1 2 Z_12V S D C314
R460 10KR2J-3-GP SC6800P25V2KX-1GP
K
2
1
NDS0610-NL-GP R281
100KR2J-1-GP
84.S0610.B31 D16
G
DY BZX384-C9V1-GP
2 1 Z_12V_G3
A
2
R458 330KR2F-L-GP
1
R459
100KR2J-1-GP
+3.3V_RUN +3.3V_ALW
Z_12V_D3 2
U31
1 S D 8
D
2 S D 7
3 S D 6
R273 1 2 10KR2J-3-GP 4 G D 5
G Q23
2N7002-7F-GP AO4468-GP
1
S
C316
D
SCD01U50V2KX-1GP
2
G Q21
A PM_SLP_S3# 2N7002-7F-GP A
<Core Design>
S
Wistron Corporation
Title
Size
Power Plane Enable
Document Number Rev
Custom -3
Roberts
5 4 3 2 1
SSID = VIDEO SSID = Inverter
LVDS CONNECTOR
GFX_PWR_SRC +LCDVDD
INVERTER POWER
SC1U10V3KX-3GP
LCD1
SCD1U10V2KX-4GP
49
1
+3.3V_RUN
C76
EC22
47 51
40
39
1
38 GFX_PWR_SRC +PWR_SRC
37
36
DYR75
10KR2J-3-GP F1
35 2 1
46 34 +3.3V_RUN D7
2
LCD_BRIGHTNESS_R FUSE-3A32V-7-GP
33
32 D25
K
DY A LBKLT_CTL
C68 C69
31 LCD_CBL_DET#_D K A RB551V30-GP SC1KP50V2KX-1GP SCD1U50V3KX-GP
-3
1
LCD_CBL_DET# R81
30 R3502 1 2 BRIGHTNESS
29
45
28
27 LCD_TST_R R3503
RB551V30-GP
1 2100R2J-2-GP
BLON_OUT_R
LCD_TST
1 2 100R2J-2-GP
-3 BLON_OUT
26
25
LDDC_CLK
LDDC_DATA
LCD_DET_G
LDDC_CLK
LDDC_DATA -3 R73
100R2J-2-GP
-3
24 1 2 place D25
-3
1
23 VGA_TXBOUT0- VGA_TXBOUT0-
22 VGA_TXBOUT0+ VGA_TXBOUT0+ 100R2J-2-GP R3501 R3502 R3503
44
21
20 VGA_TXBOUT1-
2009/07/29 10KR2J-3-GP
cloce to LCD1
VGA_TXBOUT1-
19 VGA_TXBOUT1+ VGA_TXBOUT1+
2
18
17 VGA_TXBOUT2- VGA_TXBOUT2-
16 VGA_TXBOUT2+ VGA_TXBOUT2+
15
14 VGA_TXBCLK- VGA_TXBCLK-
43 13 VGA_TXBCLK+ VGA_TXBCLK+
12
11 VGA_TXAOUT0-
20090309
VGA_TXAOUT0-
10 VGA_TXAOUT0+ VGA_TXAOUT0+
9 LCD_BRIGHTNESS_R
8 VGA_TXAOUT1- VGA_TXAOUT1-
7 VGA_TXAOUT1+ VGA_TXAOUT1+ LCD_TST
SSID = VIDEO
SC33P50V2JN-3GP
SC33P50V2JN-3GP
42 6
5 VGA_TXAOUT2- VGA_TXAOUT2-
1
EC87
EC19
4 VGA_TXAOUT2+ VGA_TXAOUT2+
3
2 VGA_TXACLK- VGA_TXACLK- VGA_TXBOUT0- 1 AFTP1
DY DY
2
VGA_TXBOUT0+ 1 AFTP3
1 VGA_TXACLK+ VGA_TXACLK+ VGA_TXBOUT1- 1 AFTP2
41 50 1 AFTP5 VGA_TXBOUT1+ 1 AFTP4
VGA_TXBOUT2- 1
48 VGA_TXBOUT2+ 1
AFTP7
AFTP6 LCD POWER
VGA_TXBCLK- 1 AFTP9 For EMI request
IPEX-CONN40-2R-GP VGA_TXBCLK+ 1 AFTP8
20.F1093.040
+LCDVDD +3.3V_RUN
VGA_TXBCLK- U48
VGA_TXBCLK+ D20
LCDVDD_EN 1 R508 1 IN#1 GND 9
VGA_TXAOUT0- 2 8
VGA_TXAOUT0+ ENVDD_D 1 ENVDD OUT IN#8
3 2 3 EN IN#7 7
4 GND IN#6 6
SC1U10V3KX-3GP
VGA_TXAOUT1- 49K9R2F-L-GP
SCD1U16V2KX-3GP
LCD_TST_EN 2 IN#5 5
1
VGA_TXAOUT1+
49K9R2F-L-GP
C73
C392
BAT54CPT-GP
R359
VGA_TXAOUT2- G5281RC1U-GP
VGA_TXAOUT2+
2
2
VGA_TXACLK-
VGA_TXACLK+
VGA_TXBOUT0-
VGA_TXBOUT0+
VGA_TXBOUT1-
VGA_TXBOUT1+
VGA_TXBOUT2-
VGA_TXBOUT2+
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
EC30
EC29
EC36
EC35
EC39
EC40
EC26
EC25
EC24
EC23
EC28
EC27
EC21
EC20
EC38
EC37
1
<Core Design>
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
2
Wistron Corporation
Title
For EMI request
Size
LCD/Inverter Connector
Document Number Rev
Custom -3
Roberts
SSID = SATA SATA HDD Connector
HDD1
1 16
AFTP10 NP1
1 S1
AFTP11
S2
S3
RUN_POWER_ON +5V_RUN +5V_HDD +5V_RUN S4
+5V_ALW S5
S6
G81 +5V_HDD S7
1
1
2 1 S8
1
R462 R457 S9
100KR2J-1-GP 100KR2J-1-GP Q20 GAP-CLOSE-PWR C289 C277
DY DY SC10U6D3V5MX-3GP SCD1U16V2KX-3GP
S10
S11
2
U57 1 6 G82 S12
2
2
2 1 +3.3V_RUN S13
HDD_5V_EN_R 6 1 S14
1
2 5 GAP-CLOSE-PWR S15
C508 C498
5 2 HDD_5V_EN SC10U6D3V5MX-3GP DY DY SCD1U16V2KX-3GP P1
2
HDD_PWR_EN SC3900P50V2KX-2GP 1 2 C254 SATA_RXP0
4 3 3
DY 4 SATA_RXP0_C
SC3900P50V2KX-2GP 1 2 C250 SATA_RXN0
P2
DY SATA_RXN0_C P3
1
P4
2N7002SPT C527 FDC655BN-GP
DY SCD1U25V3KX-GP
SATA_TXN0
SATA_TXP0
P5
P6
2
P7
NP2
17
SKT-SATA7P+15P-23-GP
1 +3.3V_RUN 22.10300.431
AFTP12 1 +5V_HDD
AFTP14 1 SATA_RXP0
AFTP13 1 SATA_RXN0
AFTP16 1 SATA_TXN0
AFTP15 1 SATA_TXP0
AFTP17
SSID = SATA
RUN_POWER_ON +5V_RUN +5V_MOD +5V_RUN
ODD Connector
+5V_MOD
ODD1
+5V_ALW G83 2 1 GAP-CLOSE-PWR 9
NP2
1
G84 2 1 GAP-CLOSE-PWR P6
1
C455 C452 P5
R251 R252 G85 2 1 GAP-CLOSE-PWR SC10U6D3V5MX-3GP SCD1U10V2KX-4GP 1ODD_MD P4
2
100KR2J-1-GP 100KR2J-1-GP AFTP19
DY DY U58 G86 2 1 GAP-CLOSE-PWR
P3
P2
U28 8 1 1 P1
2
D S
7 D S 2 AFTP18
ODD_5V_EN_R 6 1 6 D S 3 S7
C467 2 1 SCD01U50V2KX-1GP SATA_RX1+_C
5 2
5 D DY G 4 SATA_RXP1_C
SATA_RXN1_C C469 2 1 SCD01U50V2KX-1GP SATA_RX1-_C
S6
S5
HDD_5V_EN SI4800BDY-T1 S4
4 3 ODD_PWR_EN SATA_TXN1 S3
+5V_MOD
DY SATA_TXP1 S2 1
1
SATA_TXN1 1 AFTP20
1
2N7002SPT R255 S1 SATA_TXP1 1 AFTP21

C295 C293 100KR2J-1-GP SATA_RX1-_C AFTP22
DY SCD1U25V3KX-GP DY SC4700P50V2KX-1GP DY SATA_RX- and SATA_RX+ Trace
NP1
8 SATA_RX1+_C
1
1 AFTP24
2
AFTP23
2
Length match within 20 mil SKT-SATA7P+6P-62-GP

22.10300.421
SSID = Thermal Fan Connector

FAN1
4
3 1
EMC2102_FAN_TACH_1 EMC2102_FAN_TACH_1 3 <Core Design>
AFTP25 1 2
*Layout* 15 mil
EMC2102_FAN_DRIVE
EMC2102_FAN_DRIVE 1
Wistron Corporation
K
5 Taipei Hsien 221, Taiwan, R.O.C.

1
C16 D4 MLX-CON3-6-GP-U Title

SC22U6D3V5MX-2GP RB551V30-GP 20.F0700.003 AFTP26 1 EMC2102_FAN_TACH_1
HDD/ODD/FAN
2
AFTP27 1 EMC2102_FAN_DRIVE Size Document Number Rev

Custom -3
Roberts
5 4 3 2 1
SSID = Wireless SSID = SDIO SD/XD/MS Card Reader

Mini Card Connector(802.11a/b/g) SD_DAT0/XD_D6/MS_D0
XD_D4/SD_DAT1
SD_DAT2/XD_RE#
SD_DAT3/XD_WE#
AFTP29
AFTP28
1
1
1
SD_CMD
SD_CD#
SD_WP
MINI1 +1.5V_RUN +3.3V_RUN +3.3V_RUN_CARD SD_CMD AFTP30 1 MS_INS#
53 SD_CLK AFTP42 1 XD_D0
SD_CD# AFTP41 1 XD_RDY
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SD_WP AFTP32 XD_CE#
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC2D2U10V3KX-1GP
NP1 1
1 MINI_2_WAKE# 1 AFTP31 1 XD_CLE
1
D D
C272
C275
C287
C274
EC74
EC75
EC142
EC145
EC147
EC146
EC144
EC143
AFTP43 AFTP34 1 XD_ALE
2 AFTP33 XD_WP#
WLAN_ACT 3
DY DY DY DY DY DY DY DY DY DY AFTP45
1
1 XD_CD#
2
4 AFTP44 1 SD_CLK
BT_ACT 5 AFTP36 1 MS_CLK
AFTP35 SD_CLK/XD_D1/MS_CLK
7
6
R493
For EMI AFTP46
1
MINI1_CLKREQ#
LPC_LFRAME#_IN1 0R2J-2-GP
9
8
R494 DY 2 LPC_LFRAME# +3.3V_RUN_CARD CARD1
LPC_LAD3_IN 0R2J-2-GP LPC_LAD3
CLK_PCIE_MINI1# 11
10 1
R495 DY 2 23 25 SD_DAT0/XD_D6/MS_D0 1
LPC_LAD2_IN 0R2J-2-GP LPC_LAD2 SD_VCC SD_DAT0 XD_D4/SD_DAT1 AFTP37
12 1
CLK_PCIE_MINI1 13 R496 DY 2 1
14
33
MS_VCC SD_DAT1 29
10 SD_DAT2/XD_RE#
1
1 AFTP40
LPC_LAD1_IN 0R2J-2-GP LPC_LAD1 AFTP39 XD_VCC SD_DAT2 SD_DAT3/XD_WE# AFTP38
14 1
R498 1 2 0R2J-2-GP R497 DY 2 SD_DAT3 11 1
AFTP47
PLT_RST# DY 15
LPC_LAD0_IN 0R2J-2-GP LPC_LAD0 XD_D0 SD_CMD
R499 1 2 0R2J-2-GP
16 1
DY 2 XD_D0
SD_CLK/XD_D1/MS_CLK
8 XD_D0 SD_CMD 12
SD_CLK
SD_CMD
PCLK_FWH DY LPC_LAD[0..3]
SD_CLK/XD_D1/MS_CLK
XD_D2/MS_D2 XD_D2/MS_D2
9
26
XD_D1 SD_CLK 24
36 SD_CD#
SD_CLK
SD_CD#
R211 1 E51_RXD_R XD_D3/MS_D1 XD_D2 SD_CD_SW SD_WP
2 0R2J-2-GP
E51_RXD DY 17
18
XD_D3/MS_D1
XD_D4/SD_DAT1 XD_D4/SD_DAT1
27
28
XD_D3 SD_WP_SW 35 SD_WP
R210 1 XD_D4
2 0R2J-2-GP E51_TXD_R XD_D5/MS_BS
E51_TXD DY 19
20 WIFI_RF_EN
XD_D5/MS_BS
SD_DAT0/XD_D6/MS_D0 SD_DAT0/XD_D6/MS_D0
30
31
XD_D5
19 SD_DAT0/XD_D6/MS_D0
XD_D7/MS_D3 XD_D6 MS_DATA0 XD_D3/MS_D1
21 XD_D7/MS_D3 32 XD_D7 MS_DATA1 20 1
22 PLT_RST# 18 XD_D2/MS_D2 1 AFTP48
PLT_RST# XD_RDY MS_DATA2 XD_D7/MS_D3 AFTP50
PCIE_RXN2 23 XD_RDY 1 XD_R/B MS_DATA3 16 1
24 +3.3V_RUN SD_DAT2/XD_RE# SD_DAT2/XD_RE# 2 AFTP49
XD_CE# XD_RE XD_D5/MS_BS AFTP51
PCIE_RXP2 25 XD_CE# 3 XD_CE MS_BS 21 1
26 XD_CLE XD_CLE 4 17 MS_INS# MS_INS#
XD_ALE XD_CLE MS_INS MS_CLK
27 XD_ALE 5 XD_ALE MS_SCLK 15 MS_CLK
C 28 SD_DAT3/XD_WE# SD_DAT3/XD_WE# 6 C
XD_WP# XD_WE
29 XD_WP# 7 XD_WP
30 SMB_CLK XD_CD# XD_CD# 34 13 1
SMB_CLK XD_CD_SW 4IN1_GND
PCIE_TXN2 31 22 AFTP52
SMB_DATA 4IN1_GND
32 SMB_DATA NP1 NP1 4IN1_GND 38
PCIE_TXP2 33 NP2 NP2 4IN1_GND 37
34
35
36 USB_PN4 CARD-PUSH-36P-5-GP
USB_PN4
37 20.I0081.011
38 USB_PP4
USB_PP4
+3.3V_RUN 39
40
41 A00.08/0903
1 43
42 1
AFTP54
SSID = User.Interface
AFTP53
45
47
44
46 1
AFTP55
+1.05V_VCCP
ITP Connector
H_CPURST# use pull-up Resistor close
54D9R2F-L1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
48
1
51R2F-2-GP
49
ITP connector 500 mil ( max ),
R17
R9
R16
R24
R20
R171 50
+5V_ALW 1
DY 2 51
DY others place near CPU side.
52 ITP1
0R3J-0-U-GP NP2 29
2
ITP_TDI ITP_TDI_1
54
ITP_TDI R19
1
DY 2
0R2J-2-GP
1
ITP_TMS ITP_TMS_1
ITP_TMS ITP_TRST# R23
1
1
DY 2
2 0R2J-2-GP ITP_TRST#_1
2
B SKT-MINI52P-21-GP ITP_TRST# R10 R21 DY 0R2J-2-GP

3
4 B
62.10043.581 ITP_TCK ITP_TCK_1
ITP_TCK 1
DY 2 5
6
ITP_TDO 0R2J-2-GP ITP_TDO_1
ITP_TDO
CLK_CPU_ITP# R18 1
1
DY 2
2 22D6R2F-L1-GP CLK_CPU_ITP#_1
7
CLK_CPU_ITP#
CLK_CPU_ITP R345 1 DY 2 0R2J-2-GP CLK_CPU_ITP_1
8
CLK_CPU_ITP
R342 DY 0R2J-2-GP
9
10
R25 11
H_CPURST#_1
H_CPURST#
ITP_BPM#5
1 2
DY R8
1
1
DY 2
2 1KR2J-1-GP ITP_BPM#5_1
12
ITP_BPM#5
150R2F-1-GP R12 DY 0R2J-2-GP
13
14
ITP_BPM#4 ITP_BPM#4_1
ITP_BPM#4
R15
1
DY 2
0R2J-2-GP
15
16
DY
ITP_BPM#3
R3
1
DY 2
0R2J-2-GP
17
18
ITP_BPM#2
R5
1
DY 2
0R2J-2-GP
19
20
ITP_BPM#1 1 ITP_BPM#1_1
ITP_BPM#1
R6 DY 2
0R2J-2-GP
21
22
ITP_BPM#0 R344 1 ITP_BPM#0_1
ITP_BPM#0
+3.3V_RUN 1 2 R4 DY 2
0R2J-2-GP
23
24
ITP_DBRESET# ITP_DBRESET#_1
ITP_DBRESET#
1K2R2F-1-GP R343
1
DY 2
0R2J-2-GP +1.05V_VCCP
25
26
1
+5V_ALW +3.3V_RUN WLAN_ACT 1 27
CLK_PCIE_MINI1# 1 AFTP56 R22 R11 28
ITP_DBRESET#_1
CLK_PCIE_MINI1 1 AFTP59 54D9R2F-L1-GP 54D9R2F-L1-GP 30
1
E51_TXD_R 1 AFTP58
C305 C468 E51_RXD_R AFTP61 MLX-CON28-3-GP
DY 1
2
SCD1U16V2KX-3GP SCD1U16V2KX-3GP PCIE_RXN2 1 AFTP65 20.K0116.028
2
PCIE_TXP2 1 AFTP64
A +3.3V_RUN AFTP67 A
1 <Core Design>
+1.5V_RUN 1 AFTP69 +1.05V_VCCP use Decoupling Capacitor close
WIFI_RF_EN 1 AFTP72
+3.3V_RUN +1.5V_RUN PLT_RST# AFTP71 ITP connector 100 mil ( max )
SMB_CLK
1
1 AFTP73 Wistron Corporation
SMB_DATA AFTP75 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1
AFTP74 CPU ITP Connector Taipei Hsien 221, Taiwan, R.O.C.
1
1
C235
C241
C294
C471
WLAN_ACT
TCK(PIN 5) Title
DY DY DY
1
TCK(PIN AC5)
MINICARD(WLAN)/SD/ITP CONNRev
2
EC65
SC220P50V2KX-3GP FBO(PIN 11) Size Document Number
2
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title
MINICARD(WWAN)
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title
MINICARD(WPAN)
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO
AUD_VREFOUT_B
Speaker MIC IN
SC1U10V3KX-3GP
1
1
4K7R2J-2-GP
4K7R2J-2-GP
1
R471
R470
C559
Connector
2
D D
2
5
SPK1
AUD_SPK_L2 1 R30 2 AUD_SPK_L2_R 1

AUD_SPK_L2 0R0603-PAD MIC1
AUD_SPK_L1 1 R28 2 AUD_SPK_L1_R 2 1 1
AUD_SPK_L1 AUD_SPK_R2
AUD_SPK_R2 1 R31 20R0603-PAD AUD_SPK_R2_R 3 AFTP76
AUD_SPK_R1 1 R32 20R0603-PAD AUD_SPK_R1_R 4 AUD_EXT_MIC_L C539 2 1 SC1U10V3KX-3GP MIC_IN_L_2 1 R481 2 MIC_IN_L_C 2
AUD_SPK_R1 0R0603-PAD AUD_EXT_MIC_L 0R0603-PAD
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SB 6
MLX-CON4-15-GP-U
6
1
1
EC3
EC4
EC6
EC8
20.F0693.004 AUD_EXT_MIC_R C540 2 1 SC1U10V3KX-3GP MIC_IN_R_2 1 R480 2 MIC_IN_R_C 3
AUD_EXT_MIC_R 0R0603-PAD
DY DY DY DY SB 4
2
2
EXT_MIC_JD# 5
SC100P50V2JN-3GP
SC100P50V2JN-3GP
7
8
1
EC157
EC158
9
10
1 AUD_SPK_L2_R
2
AFTP77 1 AUD_SPK_L1_R PHONE-JK284-GP
AFTP79 1 AUD_SPK_R2_R 22.10133.D01
AFTP80 1 AUD_SPK_R1_R
AFTP78
C C
1 MIC_IN_L_C
AFTP81
1 MIC_IN_R_C
AFTP82
1 EXT_MIC_JD#
AFTP83
Internal LINE1
Microphone OUT LOUT1
AFTP84 1 1
BLM18BD601SN1D-GP
INT_MIC_L_R 1 CN6 60D4R2F-GP AUD_HP1_JD# 2
INT_MIC_L_R MICROPHONE-40-GP-U1 AUD_HP1_JD# R475 L19
23.42143.001 AUD_HP1_JACK_L 1 2 AUD_HP1_JACK_L2 1 2 AUD_HP1_JACK_L1 6
2
AUD_HP1_JACK_L
1
B B
EC160 AUD_HP1_JACK_R 1 2 AUD_HP1_JACK_R2 1 2 AUD_HP1_JACK_R1 3
SC1KP50V2KX-1GP AUD_HP1_JACK_R
SC100P50V2JN-3GP
SC100P50V2JN-3GP
L20
2
R474 4
BLM18BD601SN1D-GP
1
EC155
EC156
60D4R2F-GP
DY DY 5
7
2
600ohm 100MHz 8
9
200mA 0.5ohm DC 10
PHONE-JK284-GP
22.10133.D01
1 AUD_HP1_JD#
AFTP85
1 AUD_HP1_JACK_L1
AFTP86
1 AUD_HP1_JACK_R1
AFTP87
A A
<Core Design>
Wistron Corporation
Title

Audio Jack Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = ExpressCard SSID = User.Interface Camera Connector
1 PCIE_TXP5
AFTP92 1 PCIE_TXN5
AFTP96 1 PCIE_RXP5 CAMERA1
AFTP95 1 PCIE_RXN5 10 USB_PN11
Place them Near to Chip AFTP98 1 CLK_PCIE_NEW 8 CAMERA_DET#
D AFTP97 CLK_PCIE_NEW# AUD_DMIC_CLK_G_R R69 D
1 7 1 2 33R2J-2-GP AUD_DMIC_CLK_G
AFTP100 1 +3.3V_ALW 6
3
+3.3V_ALW +1.5V_RUN +3.3V_RUN +3.3V_CARD +1.5V_CARD +3.3V_CARDAUX AFTP99 1 LID_CLOSE# 5 AUD_DMIC_IN0_R R70 1 2 33R2J-2-GP AUD_DMIC_IN0
AFTP101 1 CPUSB# 4 +3.3V_CAMERA
AFTP102 USB_PP7 USB_PN11 L2
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC4D7U6D3V5KX-3GP
1 3
AFTP103 1 USB_PN7 2 USB_PP11 DY DLW21SN900SQ2LUGP
1
1
C499
C504
C487
C256
C484
C486
C262
C502
C505
AFTP104
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1
AFTP107
DY 1 1
1
EC17
EC18
9 C65
DY
2
2
NEWCARD_CLKREQ# SC4D7P50V2CN-1GP
1
DY DY
2
AFTP105 1 +3.3V_CARD ACES-CON8-3-GP-U
2
AFTP106 1 PERST#
AFTP108 1 +3.3V_CARDAUX 20.F0779.008 USB_PP11
AFTP110 1 PCIE_WAKE#
AFTP109 1 +1.5V_CARD
AFTP112 1 SMB_DATA
AFTP111 1 SMB_CLK
AFTP113
Digital Mic Power

+3.3V_RUN +3.3V_CAMERA AUD_DMIC_IN0_R
SC220P50V2KX-3GP
SC220P50V2KX-3GP
NEWCARD_OC# 1 AFTP114 1 R77 2 AUD_DMIC_CLK_G_R
EC15
EC14
PM_SLP_S3# 0R0603-PAD
1
1
1
EC16 C66 DY DY
21
19
18
DY
2
7
C
U55 SCD1U16V2KX-3GP SC4D7U6D3V3KX-GP C
2
GND
GND
RCLKEN
OC#
STBY#
16 NC#16 SHDN# 20 PM_SLP_S4#

14 8 PERST# RN24
+1.5V_RUN 1_5VIN PERST#
13 9 CPUSB# 3 2 1 CAMERA_DET#
+1.5V_CARD
+3.3V_CARD 5
1_5VOUT CPUSB#
10 CPPE# 4 DY 1
+3.3V_ALW
AFTP89 1 AUD_DMIC_CLK_G_R
3_3VOUT CPPE# NRST AFTP88 AUD_DMIC_IN0_R
+3.3V_RUN 4 3_3VIN SYSRST# 6 1
SRN100KJ-6-GP AFTP90 1 +3.3V_CAMERA
SB AFTP91 1 USB_PN11
1_5VOUT
3_3VOUT
AUXOUT
1 R435 2 AFTP93 1 USB_PP11

1_5VIN
3_3VIN
PLT_RST#
AUXIN
0R0402-PAD AFTP94
C494 2 1 SC22P50V2JN-4GP
DY
G577BR91U-GP
15
17
11
12
3
2
+3.3V_CARDAUX +3.3V_RUN
+3.3V_ALW
+1.5V_CARD
+3.3V_CARD
+1.5V_RUN SSID = User.Interface Bluetooth Module conn.
+1.5V_CARD Max. 650mA, Average 500mA.
+3.3V_CARD Max. 1300mA, Average 1000mA
+3.3V_CARDAUX Max. 275mA
B BT1 B
+3.3V_RUN 11
1
BT_ACT 2
WLAN_ACT 3
4
USB_PP6 5
USB_PN6 6
New Card Connector BLUETOOTH_EN 7
8
9
10
SC220P50V2KX-3GP
10KR2J-3-GP
100KR2J-1-GP
SC2D2U10V3KX-1GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
12
1
NEW1
1
R74
R83
C77
EC33
EC31
EC32
31 FOX-CON10-GP-U
NP1
1 2 1 AFTP120 1 USB_PP6 DY DY DY DY 20.F0711.010
2
AFTP116 1 USB_PN6
2
AFTP121 1 CPPE# 3 4 PCIE_TXP5 AFTP115 1 BLUETOOTH_EN
NEWCARD_CLKREQ# NEWCARD_CLKREQ# 5 6 PCIE_TXN5 AFTP117 1 WLAN_ACT
7 8 AFTP118 1 +3.3V_RUN
+3.3V_CARD
9 10 PCIE_RXP5 AFTP119
PERST# 11 12 PCIE_RXN5
13 14
+3.3V_CARDAUX 15 16 CLK_PCIE_NEW
PCIE_WAKE# 17 18 CLK_PCIE_NEW#
+1.5V_CARD 19 20
21 22 +3.3V_ALW
23 24 LID_CLOSE# LID_CLOSE#
A SMB_DATA A
25 26 CPUSB# <Core Design>
SMB_CLK
1 CONN_TP2 27 28 USB_PP7
AFTP123 1 CONN_TP3 29 30 USB_PN7
AFTP122 NP2
1

EC70 EC69 Taipei Hsien 221, Taiwan, R.O.C.
FOX-CONN30A-9GP DY SC5P50V2CN-2GP DY SC5P50V2CN-2GP
2
20.F0908.030 Title
Size
Bluetooth/CAM/New Card
Document Number Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SPI FLASH ROM (16M bits) SSID = Flash.ROM SSID = User.Interface

+3.3V_RTC_LDO
+3.3V_RTC_LDO
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
Power Dash Board to Board CONN
1
C470
C472
1
3
4
C454
D R476 RN50 SC10U6D3V5MX-3GP DY D
2
100KR2J-1-GP SRN100KJ-6-GP
2009/07/29 CN1
2
5
2
1
R500
EC_SPI_HOLD# 1 2 KBC_PWRBTN#_IN 1
KBC_PWRBTN#
EMI REQUEST
100R2J-2-GP
-3
AFTP124
1 2
3
1
U23 +3.3V_RTC_LDO 4
EC161
EC_SPI_CS# EC_SPI_CS# 1 8
DY SC220P50V2KX-3GP 6
2
CS# VCC EC_SPI_HOLD#
EC_SPI_DI 1 R419 2 0R2J-2-GP 2 DO HOLD# 7
EC_SPI_WP#_R 1 R482 2 0R0402-PAD EC_SPI_WP# 3 WP# CLK 6 EC_SPI_CLK
4 5 R414 1 2 33R2J-2-GP ACES-CON4-10-GP-U
GND DIO EC_SPI_DO
-1
1
1
EC135 W25X16AVSSIG-GP
SC4D7P50V2CN-1GP EC133 EC134
2
SC4D7P50V2CN-1GP SC4D7P50V2CN-1GP
2
C SSID = User.Interface Power/Battery LED SSID = RBATT C
+5V_ALW
POWER LED
LED1
Q12 R491
PWRLED B R1
C
E
LED_PWR# 1
330R2J-3-GP
2 PWR_LED_B 3 White
1
RTC Connector
1
R2 +3.3V_RTC_LDO
PDTC124EU-1-GP EC62 Amber U24
DY SC220P50V2KX-3GP
2
+RTC_CELL
2
2
LED-OW-3-GP +RTC_VCC
1 R227 2 RTC_PWR_L 3 RTC1
0R0402-PAD R220
BATT LED SB 1 RTC_PWR 1 2 1 PWR
1
1 2 GND
Q11 R492 C519 1KR2J-1-GP AFTP125 NP1
LED_BAT# BAT_LED_B SC1U10V3KX-3GP SDMG0340LC7F-GP-U NP1
C 1 2 NP2
2
R1 NP2
BATLOW_LED B
E 270R2J-L
1
R2 Width=20mils BAT-CON2-1-GP-U
PDTC124EU-1-GP EC61 62.70001.011
B
DY SC220P50V2KX-3GP B
2
1 +RTC_VCC
AFTP126
SSID = User.Interface Capacitive Button
R33 0R3J-0-U-GP CN2

+3.3V_RUN 1
DY 2 7
R34 1 FUSE-D5A32V-5-GP
+5V_RUN DY 2 1
2
CAP_SCL 3
CAP_SCL
CAP_SDA 4
CAP_SDA
1 5
A AFTP128 +5V_RUN A
CAPA_INT# 6
DY AFTP129
1
1 CAP_SCL
<Core Design>
SC220P50V2KX-3GP
SC220P50V2KX-3GP
8 AFTP131 1 CAP_SDA
AFTP130 CAPA_INT#
1
Wistron Corporation
1
1
EC5
EC7
ACES-CON6-12-GP AFTP132
20.K0358.006 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DY DY Taipei Hsien 221, Taiwan, R.O.C.
2
Title
Size
FWH/LED/Power Dash/RTC/Cap
Document Number Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = USB
D
Right USB Port CONN D
+5V_USB2
USB_PN2 USB_PN2
6
CN3
2
4
L1 3
L-63UH-GP 2
DY AFTP127 1 1
MLX-CON4-15-GP-U
20.F0693.004
5
USB_PP2 USB_PP2
1 +5V_USB2
AFTP133 1 USB_PN2
AFTP135 1 USB_PP2
C
AFTP134 C
+5V_USB2
+5V_ALW
-1 at least 80 mil
U1 at least 80 mil
1 GND VOUT 8
SC1U10V3KX-3GP
ST100U6D3VBM-7GP
SCD1U16V2KX-3GP
2 VIN VOUT 7
1
100KR2J-1-GP
3 VIN VOUT 6
1
TC11
R296
C328
C327
TC12
SC4D7U6D3V3KX-GP
4 EN/EN# FLG# 5
1
EC78
DY DY
SC1U6D3V2KX-GP
2
2
RT9711BPF-GP
2
USB_OC#2
USB_PWR_EN#
B B
A A
<Core Design>
Wistron Corporation
Title
USB
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = KBC SSID = Touch.Pad
TouchPad Connector
D D
+5V_RUN
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
1
1
C167
C168
Internal KeyBoard Connector
2
+5V_RUN
KB1
29
2
1
1 KCOL10 1
2 KCOL11 1 AFTP137 RN18
3 KCOL9 1 AFTP136 SRN10KJ-5-GP TPAD1
4 KCOL14 1 AFTP138 5
5 KCOL13 1 AFTP140
3
4
7 KCOL16 1 AFTP142
8 KCOL12 1 AFTP141 TPCLK 2
9 KCOL0 1 AFTP144 TPDATA 3
10 KCOL2 1 AFTP143 KROW[0..7] 1 4
11 KCOL1 1 AFTP145 AFTP146
1
1
13 KCOL8 1 AFTP148 KCOL[0..16] C174 C163
C 14 KCOL6 1 AFTP147 SC33P50V2JN-3GP SC33P50V2JN-3GP C
2
2
15 KCOL7 1 AFTP149 ACES-CON4-10-GP-U
16 KCOL4 1 AFTP151
17 KCOL5 1 AFTP153 20.K0320.004
18 KROW0 1 AFTP152
19 KROW3 1 AFTP154
20 KROW1 1 AFTP156
21 KROW5 1 AFTP155
22 KROW2 1 AFTP158
23 KROW4 1 AFTP157 1 +5V_RUN
24 KROW6 1 AFTP159 AFTP161 1 TPCLK
25 KROW7 1 AFTP160 AFTP163 1 TPDATA
26 1 AFTP162 AFTP165
27 AFTP164
KB_DET#
28
1
JAE-CON27-GP
20.K0291.027 AFTP166
B B
For EMS
KCOL3 KCOL11 KROW3 KCOL16
KCOL2 KCOL10 KROW2
KCOL1 KCOL9 KROW1
KCOL0 KCOL8 KROW0
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
1
1
EC110
EC104
EC107
EC102
EC105
EC103
EC109
EC112
EC127
EC125
EC129
EC123
EC118
DY DY DY DY DY DY DY DY DY DY DY DY DY
2
2
KCOL7 KCOL15 KROW7
KCOL6 KCOL14 KROW6
A KCOL5 KCOL13 KROW5 A
<Core Design>
KCOL4 KCOL12 KROW4
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
Wistron Corporation
1
1
EC114
EC121
EC119
EC115
EC111
EC113
EC120
EC130
EC128
EC126
EC124

EC116
DY DY DY DY DY DY DY DY DY DY DY DY Taipei Hsien 221, Taiwan, R.O.C.

2
Title
Size
KeyBoard/Touch Pad
Document Number Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Support +5V_ALW
1
R98
1
15KR2J-1-GP
R93 DY
E
10KR2J-3-GP D9
1
B CH3904PT-GP BAV99-4-GP +5V_ALW +3.3V_ALW
3
Q7
2
2
R99
1
D R95 PSID_DISABLE#_R D
100KR2J-1-GP
2
DY 1 PSID_DISABLE#
R90
I/O Board Connector 0R2J-2-GP 2K2R2J-2-GP
G
1
Q6 D8
2
FDV301N-NL-GP BAV99-4-GP
3
R91
PS_ID D S 1 2
D
PS_ID_EC
33R2J-2-GP
R92
CN4 1
DY 2
51 53 33R2J-2-GP
NP1 52
This cap should be used
1 2 only as last resort for
3 4 1 AFTP167 EMI suppression.
5 6 +DC_IN U46 +DC_IN_SS
7 8 1 S D 8
9 10 2 S D 7
SC1U25V5KX-1GP
S D
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
11 12 3 6
240KR3-GP
AFTP168 1 13 14 1 4 G D 5
1
C373
C375
C380
C381
C379
AFTP169 C332
R337
M_RED M_RED
15
17
16
18
DY SCD1U50V3KX-GP AO4407A-GP
2
C 19 20 C
2
M_GREEN M_GREEN 21 22
2
23 24 +5V_RUN
M_BLUE M_BLUE 25 26 GMCH_HSYNC Id=17A
27 28 GMCH_VSYNC Q16
29 30 DDC_DATA_CON Q5
R2
E Qg=100~150nC
DDC_DATA_CON
DDC_CLK_CON 3 OUT Rdson=5.4~6.5mohm
31
33
32
34
DDC_CLK_CON
1 R1
B
DY
R1
+5V_USB1
35 36
AD_OFF
IN DY 2 GND
C
USB_PP0
2
37 38 R2 PDTA124EU-1-GP
USB_PN0
39 40 USB_PP1 R336
41 42 USB_PN1 DDTC124EUA-7F-GP 47KR3J-L-GP
43 44
MDI1+ 45 46 MDI0+
1
MDI1- 47 48 MDI0-
49 50 +2.5V_LOM
NP2 55
54 56
ACES-CONN50A-GP-U +3.3V_RTC_LDO
D2
1 +5V_USB1 2
AFTP170 1 USB_PP0
AFTP173 1 USB_PN0 USB Power BAT_SCL 3
AFTP172
AFTP174
AFTP171
1
1
USB_PP1
USB_PN1
MDI1+
+5V_ALW -1 U9 +5V_USB1 1
1
AFTP176 1 MDI1- at least 80 mil 1 8 at least 80 mil BAV99-4-GP
+5V_RUN +2.5V_LOM AFTP175 MDI0+ GND OC1#
1 2 IN OUT1 7
AFTP177 MDI0-
ST100U6D3VBM-8GP
SCD1U16V2KX-3GP
1 3 EN1/EN1# OUT2 6
1
1
AFTP178 M_RED C4501 C4502 D3
SC4D7U6D3V3KX-GP
B 1 4 EN2/EN2# OC2# 5 B
1
1
TC18
EC84
AFTP179 M_BLUE
SC1U6D3V2KX-GP
1 2
C342 C33 AFTP181 1 GMCH_VSYNC DY DY DY
2
2
SCD01U16V2KX-3GP SCD01U16V2KX-3GP AFTP180 1 DDC_DATA_CON G546B2P1UF-GP BAT_SDA 3
2
2
AFTP182 1 DDC_CLK_CON
AFTP183 M_GREEN USB_OC#0
1 USB_OC#1 1
AFTP185 1 GMCH_HSYNC
AFTP184 1 +5V_RUN BAV99-4-GP
AFTP186 1 +2.5V_LOM
AFTP187
D1
USB_PWR_EN# 2
BAT_IN# 3
BAV99-4-GP
Batt Connecter 1 PBAT_PRES1# D18

AFTP188 1 PBAT_SMBDAT1 2
AFTP189 1 PBAT_SMBCLK1
BATT1 AFTP191 +PBATT PBAT_ALARM#
1 3
AFTP190
GND 11 1
GND 10
9 1 AFTP192
2009/07/29 R294 Reserved for EMI BAV99-4-GP
GND2
8 2 1 +3.3V_RTC_LDO Place near DCIN1
A
GND1
BAT_ALERT
SYS_PRES#
7
6
PBAT_ALARM#
PBAT_PRES1#
1
R1
AFTP193
-3 470KR2J-2-GP +DC_IN <Core Design>
A
BATT_PRS# 5 1 2100R2J-2-GP BAT_IN#

4 PBAT_SMBDAT1 4 1
DAT_SMB BAT_SDA
1
PBAT_SMBCLK1 RN1 2 SRN100J-3-GP

CLK_SMB
BATT2+
3
2
3 BAT_SCL C330 Wistron Corporation
1 SCD01U50V2KX-1GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
+PBATT
2
BATT1+ Taipei Hsien 221, Taiwan, R.O.C.

1
2 R2 1 BATT_SENSE
C326 C325 0R0603-PAD Title
TYCO-CON9-1-GP
SCD1U50V3KX-GP SC2200P50V2KX-2GP SB
LEFT IO/DCIN/BATT CONN
2
20.80959.009 Size Document Number Rev

Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
SSID = LOM
D D
C
SSID = VIDEO C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title
Size
LAN CONNECTOR / CRT
Document Number Rev
Custom -3
Roberts
5 4 3 2 1
A
B
C
D
2 1
1 1 1 1 1
DY
EC54
H12 H18 SCD1U16V2KX-3GP +3.3V_RTC_LDO
HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP
H6
H3
SPR2
WLAN_ACT
2 1
BLUETOOTH_EN
HOLE
HOLE
BT_ACT
DY
EC151
34.45T31.001
SCD1U16V2KX-3GP
SPRING-24-GP
5
5
2 1
1 1 1 2 1
1 EC81
DY
H9 H11 EC162 SCD1U16V2KX-3GP
HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP SCD1U25V2ZY-1GP
H2
1
2 1
SPR3
HOLE
2 1
DY
EC88
DY
H14
34.4W005.001
EC163 SCD1U16V2KX-3GP
HOLE
34.45T31.001
SCD1U25V2ZY-1GP
Mini Card BOSS
SPRING-24-GP
1 1 1 2 1
DY
1 H10 H5 EC164 2 1
HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP SCD1U25V2ZY-1GP
H7
EC93
HOLE
+3.3V_RUN
SC47P50V2JN-3GP
SPR5
1
2 1
DY
34.4B312.002
EC9
SPRING-58-GP
H16
34.4W004.001
1 1 1 2 1 SCD1U16V2KX-3GP
HOLE
New Card BOSS

+5V_MOD
DY
H4 H13 EC165 2 1
BOSS Placement
HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP SCD1U16V2KX-3GP
H8
1
DY
EC71
HOLE
2 1 SCD1U16V2KX-3GP
DY
SPR4
EC166 2 1
SCD1U16V2KX-3GP
DY
1 EC122
34.45T31.001
1 1 1 SCD1U16V2KX-3GP
SPRING-24-GP
H17 H15
4
4
2 1
H19
34.4W001.001
HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP
H1
DY
HOLE
1 EC108
HOLE
NB Thermal BOSS
SCD1U16V2KX-3GP
SPR1
1 2 1
34.45T31.001
SPRING-24-GP
DY
H20 EC60
+5V_ALW
+5V_ALW
HOLE355X355R111-S1-GP SCD1U16V2KX-3GP
1
1
1
EC169
EC168
EC167
1 2 1
2
DY2
2
DY
DY
DY
SW1 EC53
SPRING-24-GP SCD1U16V2KX-3GP
Spring
2 1
DY
EC96
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2 1
For TP button holder touch. EC99

+3.3V_ALW
SC47P50V2JN-3GP
3
3
2 1 2 1 2 1 2 1 2 1
DY
DY
DY
DY
DY
EC173 EC83 EC85 EC41 EC92

+5V_RUN
+3.3V_RUN
+PWR_SRC
+DC_IN_SS
SCD1U25V2ZY-1GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U50V3KX-GP

+0.9V_DDR_VTT
2 1 2 1 2 1 2 1 2 1
DY
DY
DY
DY
EC171 EC137 EC101 EC34 C324

SCD1U25V2ZY-1GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U50V3KX-GP
2 1 2 1 2 1 2 1
DY
DY
DY
DY
EC172 EC150 EC82 EC43

SCD1U25V2ZY-1GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2 1 2 1
DY
DY
EC170 EC159
SCD1U25V2ZY-1GP SCD1U16V2KX-3GP
2 1
2 1 2 1 2 1 2 1
EC174 DY
DY
DY
DY
DY
SCD1U25V2ZY-1GP EC58 EC90 EC45 EC97

+5V_RUN
+PWR_SRC
+1.8V_SUS
+3.3V_RUN
SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U50V3KX-GP
2 1 2 1 2 1 2 1
DY
DY
DY
DY
EC10 EC11 EC44 EC13

2 1 2 1 2 1 2 1
DY
DY
DY
EC86 EC50 EC47 EC1

2
2
2 1 2 1 2 1 2 1
DY
DY
DY
DY
EC64 EC68 EC46 EC94

2 1 2 1 2 1
DY
DY
DY
EC141 EC153 EC55

SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2 1 2 1 2 1
DY
DY
DY
EC149 EC152 EC98

Title
Size
2 1 2 1 2 1 2 1
Custom
DY
DY
DY
DY
EC136 EC148 EC106 EC49

<Core Design>
SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP

+1.05V_VCCP
2 1 2 1 2 1 2 1
DY
DY
DY
DY
EC72 EC67 EC117 EC138

SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
Document Number
Date: Tuesday, August 11, 2009
2 1 2 1 2 1
DY
DY
DY
EC63 EC59 EC51

2 1
2 1 2 1 2 1
DY
EC91
DY
DY
DY
+3.3V_RUN
EC42 EC52 SCD1U16V2KX-3GP EC89

1
1

MISC
Roberts
Sheet
2 1 2 1 2 1
DY
DY
DY
47
EC66 EC100 EC2

2 1 2 1 2 1
of
DY
EC73 EC95 EC131


SSID = Mechanical
59
-3
Rev
Wistron Corporation
A
B
C
D
5 4 3 2 1
D D
+PWR_SRC TPS51116
Adapter
ISL6266AHRZ TPS5117 +1.8V_SUS

LDO
P2003EVG
Charger
MAX8731A +VCC_CORE +1.05V_VCCP
APL5912
Battery +PBATT +V_DDR_MCH_REF +0.9V_DDR_VTT
+1.5V_RUN
MAX17020
C C
G577BR91U
+5V_ALW2 +5V_ALW +3.3V_ALW
+1.5V_CARD
G9091 G546B2P1UF AO4468 RT9711BPF AO4468 G577BR91U AO3403
+3.3V_RTC_LDO +5V_USB1 +5V_RUN +5V_USB2 +3.3V_RUN +3.3V_CARDAUX +3.3V_LAN
88E8040
G9091 MAX9789A FDC655BN SI4800BDY G5281RC1U G577BR91U RTS5158E
B B
+3.3V_CRT_LDO +VDDA +5V_HDD +5V_MOD +LCDVDD +3.3V_CARD +3.3V_RUN_CARD +2.5V_LOM +1.2V_LOM
Power Shape
Regulator LDO Switch
A A
<Core Design>
Wistron Corporation
Title
Size
Power Block Diagram
Document Number Rev
Custom -3
Roberts
5 4 3 2 1
A B C D E
ICH9M SMBus Block Diagram KBC SMBus Block Diagram

+5V_RUN
SRN10KJ-5-GP
1 TouchPad Conn. 1
PSDAT1 TPDATA
　 TPDATA TPDATA
+3.3V_ALW +3.3V_RUN
PSCLK1 TPCLK
　 TPCLK TPCLK
+3.3V_RTC_LDO
　　
+3.3V_RUN 　
SRN2K2J-1-GP SRN2K2J-1-GP
　 SRN4K7J-8-GP
ICH9M DIMM 1
SMBCLK SMB_CLK
　　 ICH_SMBCLK
SCL SRN100J-3-GP Battery Conn. SMBus address:16
SMBDATA SMB_DATA
　　 ICH_SMBDATA SDA
SCL1 BAT_SCL
　　 PBAT_SMBCLK1 CLK_SMB
SDA1 BAT_SDA
　　 PBAT_SMBDAT1 DAT_SMB
SMBus Address:A0
2N7002SPT
DIMM 2 MAX8731
　 ICH_SMBCLK SCL
　 ICH_SMBDATA SDA KBC SCL
SDA
SMBus address:12
2
SMBus Address:A4 WPC773L 2
Express Clock
+3.3V_RUN
Card Generator 　
　 SMB_CLK
SMB_CLK
ICH_SMBCLK
SCLK
+3.3V_RTC_LDO
+3.3V_RUN
　 SMB_DATA
SMB_DATA
ICH_SMBDATA
SDATA
SRN4K7J-8-GP
　　
Thermal
SMBus address:D2 SMBus address:7A
SRN4K7J-8-GP 　　 THERM_SCL SCL
　 THERM_SDA SDA
Minicard
WLAN
GPIO61/SCL2 KBC_SCL1
　 2N7002DW-1-GP
ICH_SMBCLK
SMB_CLK
GPIO62/SDA2 KBC_SDA1
　
ICH_SMBDATA
SMB_DATA 　
0R2J-2-GP
Capacity SMBus address:86
0R2J-2-GP Button
+3.3V_RUN
3 3
SRN2K2J-1-GP
LDDC_CLK LDDC_CLK
　
LDDC_DATA LDDC_DATA
　
LCD Conn.
+3.3V_RUN +5V_CRT_RUN
　　
GMCH
Charger Board CONN.

+3.3V_RUN
SRN2K2J-1-GP SRN2K2J-1-GP
　
CTRL_DDC_CLK GMCH_DDCCLK
　　 DDC_CLK_CON
CTRL_DDC_DATA GMCH_DDCDATA
　　 DDC_DATA_CON CRT CONN
4 4
2N7002DW-1-GP
<Core Design>
Wistron Corporation
Title
SMBUS Block Diagram

C -3
Roberts
A B C D E
A B C D E
Thermal Block Diagram Audio Block Diagram

1 1
SPEAKER
OUTL+
OUTL-
OUTR-
OUTR+
PORT_D_L SPKR_INL
PORT_D_R SPKR_INR
MAX9789A
PORT_A_L HP_INL HPL HP
DP1 H_THERMDA
CPU
THRMDA
PORT_A_R HP_INR HPR
OUT
SC470P50V3JN-2GP
2
DN1 H_THERMDC THRMDC Codec 2
Thermal 92HD71B7
EMC2102
PORTB_L MIC
DP2 EMC2102_DP2 PORTB_R
SC470P50V3JN-2GP
MMBT3904-3-GP VREFOUT_B IN
DN2 EMC2102_DN2
System sensor, put

between CPU and NB.
3 DMIC_CLK Digital 3
VOL_UP/DMIC_0/GPIO1
MIC
Array
DP3 EMC2102_DP3
MMBT3904-3-GP
SC470P50V3JN-2GP
DN3 EMC2102_DN3
PORTC_L
Place near the CPU Analog
PORTC_R
and GMCH.
VREFOUT_C MIC
4 4
<Core Design>
Wistron Corporation
Title
Size
Thermal/Audio Block Diagram
Document Number Rev
Custom -3
Roberts
A B C D E
5 4 3 2 1
D D
C C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title

VGA-PCIE(1/4) Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title
VGA-VRAM(2/4)
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title
VGA-HDMI/STRAP(3/4)
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title
Size
VGA-LVDS/TV/CRT/(4/4)
Document Number Rev
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title
VRAM
Custom -3
Roberts
5 4 3 2 1
5 4 3 2 1
DATE VERSON NO PAGE Modified List Issue Description OWNER

1 45 CN4 Pin.51 from +DC_IN change to GND. CN4 Pin.51 should be ground. EE
2 24 Dummy R422 LID SW is push-pull type, no need pull high. EE
06/03 3 41 CAMERA1 conn reduce from 10 to 8 pin. Follow camera design. EE
4 42 RTC1 CONN change p/n: 22.70031.001 to 62.70001.011. Qty issue to change another. EE
D 5 46 Exchange H14 and H6 names. Correction. H14 for mini card boss ; H6 is hole. EE D
6 42 Reverse LED1. Correction. Amber for BAT_LED_B ; White for PWR_LED_B. EE

7 37,41 Remove CN5 and related circuit in page.41. Remove debug board connector. EE
Add dummy R: R493, R494, R495, R496, R497, R498, R499 For debug mini card, change LPC Bus to mini card base.
06/05 Set dummy res to avoid damaging MB or additional mini card.
8 37 Dummy R210, R211 For debug mini card. EE
Set dummy res to avoid damaging MB or additional mini card.
9 24 Dummy R150. Staff R151. PCB Version for SB. EE
10 42 CN1 Pin.2 set to NC. Add R500 and dummy EC161. Avoid shorting between KBC_PWRBTN# and GND. EE
New R and C are for EMC pre-location.
06/06 11 24 Dummy R406. Dummy R406 for no keyboard detect function. EE
Change R425, R422, R409, R406, R401, R404 to 100K ohm. R change to 100k for save power.
12 36 Update HDD symbol. Update symbol and footprint for only SATA HDD. (no co-layout) EE
13 35~45 Change All TP near connectors to AFTP (ZZ.AFT30.101). For AFTE test pad. EE
06/10 14 04 Change C461 and C462 from 15pF to 12pF. For X3 cap choice by report suggestion. EE
15 17 Change C520 and C522 from 15pF to 12pF. For X4 cap choice by report suggestion. EE
C
16 24,42 Add 0 ohm R482 on EC_SPI_WP# and link to KBC/GPIO30. KBC can control WP# of Flash ROM. EE C
Change RN50 to 100k and Add R476 for EC_SPI_WP#. R change to 100k for save power.
17 40 Change L19 and L20 to 68.00082.531. For EMI. EE
06/12 18 45 Change M_RED to CN4 Pin.17 ; M_GREEN to CN4 Pin.21 ; M_BLUE to CN4 Pin.25. Avoiding noise to impact CRT signals. EE
CN4 Pin.23 and Pin.27 to GND.
19 47 Add H20. Add square GND for TP button holder touch. EE
20 42 Dummy CN2, R34. Cap. button function is disable. EE
06/16 21 47 Add dummy EC162, EC163, EC164. For EMI. EE
X01 Add dummy EC165, EC166.
Add dummy EC167, EC168, EC169.
06/17 22 04 Change R216 to 22 ohm. The same clock dirve to U25 and U34. EE
23 44 Dummy EC110, EC104, EC107, EC102, EC105, EC103, EC109, EC112, EC127, EC125, For EMI. EE
EC129, EC123, EC118, EC116, EC114, EC121, EC119, EC115, EC111, EC113, EC120,
06/18 EC130, EC128, EC126, EC124.
24 43 Short R26, R27. No need 0 ohm R. EE
25 47 Add SW1. ME request. EE
B
26 35 LCD1.38 link to GFX_PWR_SRC ; LCD1.37 set NC ; LCD1.35 link to +LCDVDD ; For LED backlight panel. EE B
LCD1.34 link to +3.3V_RUN ; LCD1.33 link to LCD_BRIGHTNESS ; LCD1.32 to GND ;
LCD1.31 link to LCD_CBL_DET#.
27 18 Dummy R179, R423. SW check vender ID by SMBus. EE
06/19 28 24 Dummy R416, R418. Cap. button function is disable. EE

29 40 Change LOUT1 and MIC1 to 22.10133.D01. Change jack source. EE
30 17,18 Dummy U25.B10 link R506 to GND; U25.C18 link R501 to GND; Avoiding abnormal action in U25(ICH9-M). EE
Dummy U25.C21 link R502 to GND; U25.C11 link R503 to GND;
Dummy U25.AE18 link R504 to GND; U25.AF21 link R505 to GND.
Dummy R421, R424.
31 25 Change R82 to 20K 1% ; Change R78 to 10K 1%. For T8 shutdown is set 88 deg-C. EE
06/23 32 47 Add dummy EC170, EC171, EC172, EC173, EC174. For EMI. EE
06/27 33 42 Change U23 to 72.25X16.A01. Better performance. EE
A <Core Design> A
Wistron Corporation
Title
Change List - EE (1/3)

A3 -3
Roberts
5 4 3 2 1
5 4 3 2 1

34 18 Staff R421, R424. (PT build cut-in) Avoiding always issue interrupt event. EE
35 23 Dummy R290 ; Staff R291. (PT build cut-in) Adjust audio amp. gain value. EE
36 20 Add dummy R507. Add RUN power for LAN. EE
37 21 Short R253, R254. No need 0 ohm R. EE
D 38 24 Staff R138, R150 ; Dummy R141, R151. PCB Version for SC. EE D
39 35 Add R508 ; Change R359 to 49.9k ohm. For LCD power sequence. EE
07/30 Move C535 (Change 0.033uF), R472 to page.23. For PC beep.
Remove C536 (Change 0.033uF), C542. EE
40 22,23
Add R484 to gnd ; Add C566 for AUD_SET, C567 for AUD_BIAS.
C565 for 6040 only.
41 36 Material change: HDD1 ME request. EE
42 37 Material change: CARD1 ME request. EE
43 47 Material change: SPR4 ME request. EE
44 09 Add TP271 for U52/ SDVO_CTRLDATA. TP. EE
X02 45 41 Short R79, R80. No need 0 ohm R. EE
46 04 Symbol change: U54. For clock generator co-layout. EE
47 - Change to close line: No need 0 ohm R. EE
08/06 R204, R200, R356, R139, R152, R408, R394, R390, R403, R402, R96, R120, R378,
R360, R140, R373, R97, R405, R155, R154, R262, R266, R439, R265, R226, R269,
R174, R175, R183, R432, R433, R434, R430, R431, R437, R191, R177, R270, R188,
C R436, R452, R259, R282, R250, R249, R467, R153, R81, R77. C
48 24,32 Move R182 to page.24. Movement. EE

49 37 Short R428, R426 ; Add DY L21. Pre-location for Minicard USB trace. EE
50 - Short R139, R96 , R155, R154, R226, R174, R175, R432, R433. No need 0 ohm R. EE
08/07 51 19 Staff C488. For DMI. EE
52 23 Use 2.2uF C564 and C557 for Maxim U62 IC. For improving bobo sound. EE
08/11 53 32 Material change: TC23. (DY) Material issue. EE
08/15 54 11 Material change: TC19, TC21. Material issue. EE
55 21 USB_PP10 for U34.5 ; USB_PN10 for U34.4. (ST build cut-in) Schematic modification. EE
09/02 56 24 Staff R151 ; Dummy R150. PCB Version for -1(Xbuild). EE
57 24 Add dummy R509 to gnd for KBC GPIO24. (09/10 update) For GM45. EE
58 05,17 Dummy R76 ; Staff R167 For H_THRMTRIP# to SB. EE
59 12,20, Change to close line: No need 0 ohm R. EE
09/03 A00 24 R115, R246, R182, R158, R159, R170.
60 37 Remove L21. No need L21. EE
B B
09/09 61 19 Staff R453, C511 ; DY C521. Follow Intel DG 2.0. EE

62 04 Short RN42, RN43, RN44, RN45, RN48, RN22, RN23, RN54, RN53, RN52, RN51. No need 0 ohm R. EE
09/10 63 21 Add dummy R510 and C568. For U34 power bounce issue. EE
Staff R282 0 ohm.
64 04 Dummy R196. For debug. Normally, no need it. EE
09/22 65 25 R82 change to 10k ; R78 change to 2.37k. For T8 thermal shutdown setting. EE
66 23 Staff R288 ; Dummy R289. For Audio amp. gain. EE
67 21 Dummy R284, C318. For U34 power bounce issue. EE
Staff R282 to Bead 68.00082.531.
10/02 Staff R510 to 2.2K ; Staff C568.
A <Core Design> A
Wistron Corporation
Title

A3 -3
Roberts
5 4 3 2 1
5 4 3 2 1

1 43 EC78 change to 1u follow u1 spec design EE
2 43 TC12 change to 4.7u follow u1 spec design EE
05/18 -1 3 45 add c4501 and c4502 follow u1 spec design EE
4 24 change R192 from short pad to 0ohm EE
D 5 42 change R419 from short pad to 0ohm EE D
6 14/15 change R57 R54 R55 R56 from 0ohm to short pad EE

1 35 add D25 prevent GFX_PWR_SRC burn U20 by passing LCD_CBL_DET# EE
2 35 change R81 from short pad to 100ohm For ESD EE
07/27 -3 3 35 change R73 from 100R2F to 100R2J EE
4 35 add R3502 and R3503 For ESD EE
5 45/9 change R1 R94 from 100R2F to 100R2J EE
6 42 change R500 from short pad to 100ohm For ESD EE
7 42 add R141,R146,R150. dummy R138,R143,R151 For MB VERSION ID
C C
B B
<Core Design>
A A
Wistron Corporation
Title

A3 -3
Roberts
A B C D E

1 32 R189 change to 2.2K ohm, C216 dummy. For +1.5V_RUN sequence. Power EE
2 30 C378 change to 0.01uF. For +1.05V_VCCP sequence. Power EE
06/03 3 34 C316 change from 4.7nF to 0.01uF. For +3.3V_RUN sequence and improve +3.3V_ALW voltage drop Power EE
due to SW(U31) turn on quickly (higher loading).
4 34 Staff C314 and change from 4.7nF to 6.8nF. For +5V_RUN sequence and improve +5V_ALW voltage drop Power EE
4 4
due to SW(U30) turn on quickly (higher loading).
5 36 Dummy Q20, U57, R462, R457, C527 and U58, U28, R251, R252, C293, C295 No sniffer function, no control HDD & ODD power. Power EE
06/05 Change R258, R256 to G81, G82
Change R278, R279, R277, R276 to G83, G84, G85, G86
6 27 R136 change to 270k and R108 change to 237k For 5V/3.3V OCP Power EE
06/06 7 28 R38 change to 12.1k R38 for VCORE OCP
R323 change to 3.92k , C360 change to 0.047 uF 10V X7R R323 and C360 for transient and load line. Power EE
8 31 PC9 to GND. PC9 to GND otherwise DC-DC IC can not obtain power to Power EE
generate 1.8V/0.9V output.
X01 9 31 PR2 change to 9.31k ohm. For 1.8V OCP. Power EE
10 30 Add D23. For power sequence. Power EE
06/10 11 18,24 Remove U60, R482, R476 and change trace name VRMPWRGD to VGATE_PWRGD. For power sequence. Power EE
06/18 12 31 PR7.1 link to +5116_PWR_SRC. Reserve for other source. Power EE
13 30 Rename "+1.05V_SUSP" to "+1.05V_RUNP" Correct naming. Power EE
06/23 14 26,45 Material change: U37, U46, U47. NIKO-SEM P2003EVG component has some risk. Power EE
07/30 15 31 Change PR7 value from 622k to 619k ohm. For 2nd source. Power EE
3 X02 16 26,45 Material change: U37, U46, U47. Power team request. Power EE 3
08/11
17 26,27, Change to close line: No need 0 ohm R. Power EE
28,31 R46 ,R137 ,R127,R106 ,R384 ,R391 ,R35 ,R29 ,R307 ,R308 ,R309 ,R303 ,R304 ,
09/03 A00 R298 ,R301 ,R310 ,R313 ,PR14.
18 26 R61 change 4.7k to 10k. Power team request. Power EE
xx
19
xx 20
21
22
xx 23 x x x Power EE
2 xx 24 x x x Power EE 2
25 x x x Power EE
1 <Core Design> 1
Wistron Corporation
Title
Change List - Power

A3 -3
Roberts
A B C D E

Dell Inspiron 1545 Wistron Dr1 Roberts Uma 48 4aq01 031 08212 3 PDF

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5 4 3 2 1

DR1(Roberts) Schematics Document

Size Document Number

SLG8SP513VTR 4 Penryn PCB P/N : 48.4AQ01.031 INPUTS OUTPUTS

PCIE x 1 & USB 2.0 x 1 New Card SYSTEM DC/DC

HP1 OP AMP SPI WINBOND

PCIE Routing USB Table

SSID = CLOCK NEWCARD_CLKREQ#

Co-layout Ref: 71.09355.B03 (ICS9LPRS355BKLFT)

3D3V_S0_CK505 3D3V_S0_CK505 27_SEL CLK_MCH_DREFCLK CLK_MCH_DREFCLK#

R206 EC140 EC139

ITP_EN 1 CPU_ITP PCI2_TME

R218 R202 27_SEL PIN 20 PIN 21

1 SRCT0 SRCC0 PM45

SEL2 SEL1 SEL0

TP13 RSVD_CPU_4 RSVD#T2

Size Document Number

H_D#0 E22 Y22 H_D#32

H_D#16 N22 AE24 H_D#48

H_D#31 N25 AC23 H_D#63

CPU_GTLREF0 AD26 R26 COMP0 R350 1 2 27D4R2F-L1-GP

Route the CPU_TEST3 and CPU_TEST5 signals

Size Document Number

AA15 AF5 CPU_VID1 Layout Note: K26 AE14

VCC VID3 CPU_VID4 to the CPU VCCA pin. VSS VSS

Size Document Number

H_D#33 AD14 H12 H_ADS#

Capacitors close MCH H_D#38 Y7

H_D#41 Y9 AH7 CLK_MCH_BCLK

C399 R367 H_D#42 AA13 AH6 CLK_MCH_BCLK#

H_D#45 H_D#_44 H_DRDY#

H_D#46 H_D#_45 H_HIT#

H_CPURST# C12 B14 H_REQ#4

H_AVREF H_AVREF H_RS#_2

DDR CLK/ CONTROL/COMPENSATION

CFG Strap Low High AH12 RESERVED#AH12 SA_CK#_0 AR24 M_CLK_DDR#0

AT40 PWROK GFX_VR_EN C34

NC#BG47 499R2F-2-GP CLKREQ#_B

BG45 E36 1 TP271

BD1 NC#BD1 HDA_SYNC A28

M_A_DQ[63..0] U52D 4 OF 10 M_B_DQ[63..0] U52E 5 OF 10

M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_A_A[14..0] M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7

AV5 SA_DQ_48 SA_MA_11 BG26 AV2 SB_DQ_48 SB_MA_10 BB16

U52G 7 OF 10 +1.05V_VCCP Place on the Edge

BC29 VCC_SM VCC_AXG_NCTF AG19 AC26 VCC

VCC_SM/NC VCC_AXG_NCTF VCC_NCTF

AF20 VCC_AXG VCC_NCTF AC29

T14 VCC_AXG VCC_SM_LF BA37 SM_LF2_GMCH

2 0R0603-PAD VCCA_DAC_BG VTT

120ohm 100MHz SC1KP50V2KX-1GP U2

AA48 VCCA_PEG_PLL 50mA

120ohm 100MHz DY SC10U6D3V5MX-3GP

220ohm 100MHz 1R3F-GP

2 AL24 VCCA_SM_CK_NCTF VCC_SM_CK BG20

180ohm 100MHz 1 R395 2 VCC_HDA A32 VCC_HDA 50mA HDA

AA47 VCCD_PEG_PLL 50mA VCC_DMI AG47

SCD1U10V2KX-4GP L37 A8 VTTLF1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

VSS VSS VSS VSS_NCTF GMCH_DDCDATA CRT_DDC_CLK PEG_TX_8

VSS VSS VSS VSS_SCB GMCH_GND21 TP103

VSS VSS VSS NC#B45

CANTIGA-GM-GP-U-NF Wistron Corporation

M_A_A0 102 108