EL512 VLSI Subsystem Design

Course Instructor: Biswajit Mishra

Winter 2017-18
Tentative Syllabus

􀁸 Wires and Interconnect:

o Resistance, Capacitance, RC delay analysis, Cross-talk delay and noise effects, Repeaters, Logical
Effort, Crosstalk control, etc.

􀁸 Dynamic Logic, Domino logic, Keepers, etc

􀁸 Sequential Circuits:
o Latches, Flip-flops, RC delay analysis, Sequencing Methods: FF based, 2- phase Latch based, and
Pulsed latch based. Timing analysis: Set-up time (Max-delay) constraint, Hold time (Min-delay)
constraint, Clock-skew budgeting, Time borrowing, simple synchronizer, FSM, introduction to pipelined
system/ALU, etc.

􀁸 Datapath Subsystems:
o Adders: Full Adder using a variety of Logics styles, bit-serial Adder, Ripple Carry Adder, Carry-skip
Adder, Carry Look-ahead Adder, Brent-Kung Adder, Kogge-Stone Adder, Carry-Save Adder (multi -
operand addition), etc.
o Multipliers: Unsigned Array Multiplier, Booth Encoded Multiplier, Baugh-Wooley Multiplier,
Wallace tree multiplier, etc.
o Division: Non-restoring method, and restoring method, etc.
o Standard Math function implementation: Cordic Algorithm, Newton-raphson mehod, etc.
o Comparators, shifter-registers, random number generator based on Linear Feedback Shift-Registers
(LFSR), etc.
o Error Correcting Codes: LFSR based CRC, and Hamming7-4 codes.

􀁸 Memory Array Subsystems

o Register-file
o Content-addressable memory
o LIFO and FIFO
o SRAM: decoders, column MUX, RC Analysis, etc

NOTE: Most of the above topics would be taught, with the help of relevant codes written in VHDL.

Textbook:

Text 1: "Digital Integrated Circuits: A Design Perspective", by Jan Rabaey.

Text 2: "Digital Integrated Circuits: A Design Perspective", by Jan Rabaey, Anantha Chandrakasan and
Borivoje Nikolic.

Books

(1) Weste, Neil H. E., Harris, David & Banerjee, Ayan: CMOS VLSI design : a circuits and systems
perspective, 3rd. ed.. (3rd. ed.) Delhi. Pearson Education, 2006. (621.395 WES)
(2) Parhami, Behrooz: Computer arithmetic: Algorithms and hardware design. New York. Oxford
University Press, 1999. (005.1 PAR 001257)
(3) Lin, Ming-Bo: Introduction to VLSI systems : a logic, circuit, and system perspective. Boca Raton.
CRC Press, 2012. (621.395 LIN)
(4) Stine, James E.: Digital computer arithmetic datapath design using verilog HDL. Boston. Kluwer
Academic Publishers, 2004. (621.395 STI 013461)
(5) Cavanagh, Joseph J. F.: Digital design and Verilog HDL fundamentals. Boca Raton. CRC Press, 2008.
(621.395 CAV)

Grading Policy (similar lines):

Laboratory assignments: 10%

Project (1, 2, 3): 10%+10%++10%
Midterms (1, 2): 15%+15%
Final Exam: 30%

** Project would be done in a group followed by a paper presentation/writing

EL512 VLSI Subsystem Design
Lectures: Every Mon- 1400-1455, Tue- 1400-1455, Fri- 1600-1655 CEP 104

Prof (Dr) Biswajit Mishra

biswajit mishra@daiict.ac.in
Office: FB2, 2112
Office Hours: TBD
(079) 3051-0561

Course Description: The motivation for the course is to emphasize more on the practical aspect of VLSI
Subsystem design by using the concepts already taught in previous Introduction to VLSI course.

Prerequisite(s): Digital logic Design, Introduction to VLSI (??)

Credit Hours: 3-0-0-3

Course Objectives:
At the completion of this course, students will be able to:
1. The student will be able to design and implement CMOS digital circuits and optimize them with
respect to size (area), speed and power dissipation.

Knowledge and Understanding:

Having successfully completed the module, you will be able to demonstrate knowledge and understanding
of:
1. Introduction to Cadence, Schematic Design, Analogue Layout and Simulation, Extraction and LVS
2. Digital Simulation and RTL Synthesis
3. Automatic Place and Route, Pad Rings and Chip Architecture
4. Subsystem Architecture

Intellectual Skills:
Having successfully completed the module, you will be able to:

1. Advanced IC Design Skills

2. Use of EDA Tools
3. Understanding of Analog Simulation
4. Understanding of Digital Simulation
5. Place and Routing
6. Design techniques at Circuit, Architectural and System level

Extra Help: Do not hesitate to come to my office during office hours or by appointment to discuss a
coursework problem or any aspect of the course.

Attendance Policy: Attendance is mandatory unless the student has compelling reasons not to attend - in
which case come and see me. Students are responsible for all missed work, regardless of the reason for
absence. It is also the absentee’s responsibility to get all missing notes or materials.

Important Dates:
Will be posted soon.