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Compal Confidential 2

DCL513A Schematics Document


Banias ICP uFCBGA/uFCPGA Package with Montara-GM
Core Logic
3
2004-05-05 3

REV: 1.0

4 4

Compal Electronics, Inc.


Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期一, 八月 16, 2004 Sheet 1 of 43
A B C D E
A B C D E

Compal confidential Block Diagram

Model Name :DCL513A


File Name : LA-2201 Rev: 2.0 Mobile Intel Celeron Processer Thermal Sensor Clock Generator
1
uFCBGA/uFCPGA CPU ADM1032 ICS950810CG 1

478 pin page 4,5


page 4 page 13
HA#(3..31) HD#(0..63)
System Bus
400MHz
Fan Control
page 31
Memory
LVDS & CRT BUS(DDR)
Montara 855GME DDR-SO-DIMM X2
Connector page 19 2.5V 200/266/333MHz
BANK 0, 1, 2, 3

DVO uFCBGA-732 pin page 10,11,12

TV-Out Conn. TV Encoder


page 6,7,8,9
page 18 CH7011 page 18

2 HUB-Link 2

USB port 0, 2, 4 USBx3

PCI BUS MBC Conn.


3.3V 33MHz 3.3V 48MHz
USB conn page 25
ICH4-M page 26
USB port 1

MINI @1394 LAN BGA-421 3.3V 24.576MHz AC-LINK


Controller
CardBus
PCI I/F RTL 8101L ENE CB1410 page 14,15,16
3.3V ATA100
VIA VT6301S
page 24 page 23 page 22 page 20

@1394
RJ45 Slot 0 LPC BUS
3
Connector page 22 page 21 3
page 23 3.3V 33MHz

LED INDICATE
Winbond
page 26 ENE KB910 W83L518D
LPC to X-BUS page 25
& KBC HDD CDROM AC97
Power On/Off Codec
SIO LPC47N217 page 29 SD/MS Slot
Reset & RTC page 25
page 17 page 17
ALC202
page 32
page 31
page 27

DC/DC Interface AMP& Phone


Suspend PARALLEL Jack
EC I/O Buffer Touch Pad
page 28 page 30 page 28 page 33
page 34
4 4

FIR BIOS Int.KBD


page 30 page 28
Power Circuit
page 31
DC/DC
page Compal Electronics, Inc.
36,37,38,39,40,41,42,43
Legacy I/O Option Title
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期一, 八月 16, 2004 Sheet 2 of 43
A B C D E
A B C D E

Board ID Table for AD channel


Voltage Rails
Vcc 3.3V +/- 5%
Power Plane Description S0-S1 S3 S5
R368 100K +/- 5%
Board ID R361 V AD_BID min V AD_BID typ V AD_BID max
VIN Adapter power supply (19V) N/A N/A N/A 0 0 0 V 0 V 0 V
1 B+ AC or battery power rail for power circuit. N/A N/A N/A 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V 1

+CPU_CORE Core voltage for CPU ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+VCCP 1.05V rail for Processor I/O ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+1.2VS 1.2VS switched power rail for GMCH ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+1.25VS 1.25V switched power rail ON OFF OFF 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+1.5VALW 1.5V power rail ON ON ON 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+1.5V 1.5V power rail ON ON OFF 7 NC 2.500 V 3.300 V 3.300 V
+1.5VS 1.5V power rail for GMCH ON OFF OFF
+1.8VS 1.8V switched power rail ON OFF OFF
+2.5V 2.5V power rail ON ON OFF
+2.5VS 2.5V switched power rail ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3V 3.3V power rail ON ON OFF
+3VS 3.3V switched power rail ON OFF OFF
Board ID PCB Revision
+5VALW 5V always on power rail ON ON ON*
0
2 2
+5V 5V power rail ON ON OFF
1 0.1
+5VS 5V switched power rail ON OFF OFF
2 0.2
+12VALW 12V always on power rail ON ON ON*
3 1.0
RTCVCC RTC power ON ON ON
4
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
5
6
7

External PCI Devices


Device IDSEL# REQ#/GNT# Interrupts

C ardBus AD20 2 PIRQA


LAN AD17 3 PIRQF

3
Mini-PCI AD18/AD20 1/4 PIRQG/PIRQH 3

1394 AD16 0 PIRQE

4 4

Compal Electronics, Inc.


Title
Notes & PIR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 3 of 43
A B C D E
5 4 3 2 1

H_RS#[0..2] HD#[0..63]
H_RS#[0..2] 6 HD#[0..63] 6
+3VS
HA#[3..31]
6 HA#[3..31]
H_REQ#[0..4]
6 H_REQ#[0..4]
JP12A 1

1
HA#3 P4 A19 HD#0 C103
HA#4
HA#5
U4
A3#
A4#
Banias D0#
D1# A25 HD#1
HD#2 2
0.1U_0402_16V4Z R87
@10K_0402_5%
V3 A5# D2# A22
HA#6 R3 B21 HD#3 1 C100
HA#7 A6# D3# HD#4 2200P_0402_50V7K
V2 A24

2
HA#8 A7# D4# HD#5 U18
D W1 A8# D5# B26 D
HA#9 T4 A21 HD#6 THERMDA 2 1
+VCCP HA#10 A9# D6# HD#7 2 D+ VDD1
W2 A10# D7# B20
HA#11 Y4 C20 HD#8 THERMDC 3 6
HA#12 A11# D8# HD#9 D- ALERT#
Y1 A12# D9# B24
1 R275
2 ITP_TDI HA#13 U1 D24 HD#10 8 4
A13# D10# 29 EC_SMB_CK2 SCLK THERM#
150_0402_5% HA#14 AA3 E24 HD#11
HA#15 A14# D11# HD#12
Y3 A15# D12# C26 29 EC_SMB_DA2 7 SDATA GND 5
1 R278
2 ITP_TRST# HA#16 AA2 B23 HD#13
680_0402_5% HA#17 A16# D13# HD#14
AF4 A17# D14# E23
HA#18 AC4 C25 HD#15 ADM1032ARM_RM8
HA#19 A18# D15# HD#16
AC7 A19# D16# H23
HA#20 AC3 G25 HD#17
HA#21 A20# D17# HD#18
AD3 A21# D18# L23
Note: HA#22 AE4 M26 HD#19
HA#23 A22# D19# HD#20
Placement near to CPU Conn AD2 A23# D20# H24
HA#24 AB4 F25 HD#21
HA#25 A24# D21# HD#22
AC6 A25# ADDR GROUP DATA GROUP D22# G24
HA#26 AD5 J23 HD#23
HA#27 A26# D23# HD#24
AE2 A27# D24# M23
HA#28 AD6 J25 HD#25
HA#29 A28# D25# HD#26
AF3 A29# D26# L26
HA#30 AE1 N24 HD#27
HA#31 A30# D27# HD#28
AF1 A31# D28# M25
H26 HD#29
H_REQ#0 D29# HD#30
R2 REQ0# D30# N25
H_REQ#1 P3 K25 HD#31
H_REQ#2 REQ1# D31# HD#32
T2 REQ2# D32# Y26
H_REQ#3 P1 AA24 HD#33
C H_REQ#4 REQ3# D33# HD#34 C
T1 REQ4# D34# T25
U23 HD#35
D35# HD#36
6 H_ADSTB#0 U3 ADSTB0# D36# V23
AE5 R24 HD#37
6 H_ADSTB#1 ADSTB1# D37#
R26 HD#38
D38# HD#39
D39# R23
A16 AA23 HD#40
13 CLK_CPU_ITP ITP_CLK0 D40#
A15 U26 HD#41
13 CLK_CPU_ITP# ITP_CLK1 D41#
V24 HD#42
D42# HD#43
13 CLK_CPU_BCLK B15 BCLK0 D43# U25
B14 HOST CLK V26 HD#44
13 CLK_CPU_BCLK# BCLK1 D44#
Y23 HD#45
D45# HD#46
D46# AA26
Y25 HD#47 +VCCP
D47# HD#48
6 H_ADS# N2 ADS# D48# AB25
L1 AC23 HD#49
6 H_BNR# BNR# D49#
J3 AB24 HD#50 1 2 ITP_TDO
6 H_BPRI# BPRI# D50# HD#51 R286 @54.9_0402_1%
6 H_BR0# N4 BR0# D51# AC20
L4 AC22 HD#52 1 2 H_CPURST#
6 H_DEFER# DEFER# D52# HD#53 R277 @54.9_0402_1%
6 H_DRDY# H2 DRDY# D53# AC25
K3 AD23 HD#54 1 2 ITP_TMS
6 H_HIT# HIT# D54#
K4 CONTROL GROUP AE22 HD#55 R272 39.2_0603_1%
6 H_HITM# HITM# D55#
1 2 H_IERR# A4 AF23 HD#56
+VCCP R285 IERR# D56# HD#57 ITP_TCK
6 H_LOCK# J2 LOCK# D57# AD24 1 2
56_0402_5% H_CPURST# B11 AF20 HD#58 R287 27.4_0402_1%
6 H_CPURST# RESET# D58# HD#59
D59# AE21
AD21 HD#60
H_RS#0 D60# HD#61
H1 RS0# D61# AF25
H_RS#1 K1 AF22 HD#62 Note:
B H_RS#2 RS1# D62# HD#63 B
L2 RS2# D63# AF26 Placement near to ITP Conn
6 H_TRDY# M3 TRDY#

DINV0# D25 H_DINV#0 6


DINV1# J26 H_DINV#1 6
C8 BPM0# DINV2# T24 H_DINV#2 6
R297 B8 AD20
BPM1# DINV3# H_DINV#3 6
150_0402_5% A9 BPM2#
+3VALW 1 2 C9 BPM3#
DSTBN0# C23 H_DSTBN#0 6
ITP_DBRESET# 1 2 A7 K24
15 ITP_DBRESET# DBR# DSTBN1# H_DSTBN#1 6
R284 0_0402_5% M2 W25
6 H_DBSY# DBSY# DSTBN2# H_DSTBN#2 6
7,14 H_DPSLP# B7 DPSLP# DSTBN3# AE24 H_DSTBN#3 6
7 H_DPWR# C19 DPWR# DSTBP0# C22 H_DSTBP#0 6
A10 PRDY# DSTBP1# L24 H_DSTBP#1 6
+VCCP 1 2 B10 PREQ# MISC DSTBP2# W24 H_DSTBP#2 6
R270 PRO_CHOT#B17 AE25 +3VS
PROCHOT# DSTBP3# H_DSTBP#3 6
330_0402_5%
14 H_PW RGD E4 PWRGOOD

2
14 H_CPUSLP# A6 SLP#
ITP_TCK A13 R309
R274 ITP_TDI TCK @10K_0402_5%
C12 TDI
@1K_0402_5% ITP_TDO A12 C2
TDO A20M# H_A20M# 14
1 2 TEST1 C5 D3 H_FERR# 14

1
TEST2 TEST1 FERR#
1 2 F23 TEST2 IGNNE# A3 H_IGNNE# 14 PROCHOT#
R266 ITP_TMS C11 B5
TMS INIT# H_INIT# 14
@1K_0402_5% ITP_TRST# B13 D1
TRST# LINT0 H_INTR 14

1
D4 C
LINT1 H_NMI 14
A LEGACY CPU 1 2 2 Q42 A
+VCCP R282 B
THERMAL STPCLK# C6 H_STPCLK# 14 @2SC2411K_SOT23
THERMDA B18 B4 @56_0402_5% E
THERMDA DIODE H_SMI# 14

3
THERMDC A18 SMI#
THERMDC
15 THERMTRIP# C17 THERMTRIP# +VCCP 1 2 PRO_CHOT#
R281
56_0402_5%
AMP_1473129-1 Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Banias Processor in mFCPGA479 with ITP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A3 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DCL55 LA-2201
Date: 星期四, 五月 06, 2004 Sheet 4 of 43
5 4 3 2 1
5 4 3 2 1

+CPU_CORE
+CPU_CORE
JP12C
1 1 1 1 1 1
F20 VCC VSS T26
JP12B + C249 + C248 + C251 + C250 + C247 + C246 F22 U2
VCC VSS
G5 VCC VSS U6
1 2 VCCSENSE AE7 A2 G21 U22
R195 @54.9_0402_1%
VSSSENSE AF6 VCCSENSE VSS 2 2 2 2 2 2 VCC VSS
1 2 VSSSENSE VSS A5 H6 VCC VSS U24
R188 @54.9_0402_1% A8 220U_D2_4VM_R12 220U_D2_4VM_R12 @220U_D2_4VM_R12 H22 V1
VSS 220U_D2_4VM_R12 220U_D2_4VM_R12 @220U_D2_4VM_R12 VCC VSS
VSS A11 J5 VCC VSS V4
+1.8VS F26 VCCA0 VSS A14 J21 VCC VSS V5
D B1 VCCA1 VSS A17 K22 VCC VSS V21 D
N1 A20 +CPU_CORE U5 V25
VCCA2 VSS VCC VSS
AC26 VCCA3 VSS A23 V6 VCC VSS W3
VSS A26 V22 VCC VSS W6
+VCCP P23 VCCQ0 VSS B3 1 1 1 1 1 1 1 W5 VCC VSS W22
W4 VCCQ1 VSS B6 W21 VCC VSS W23
B9 C266 C318 C264 C355 C324 C314 C356 Y6 W26
VSS
B12 Y22
VCC Banias VSS
Y2
D10 VCCP
Banias VSS
VSS B16
2 2
10U_0805_6.3V6M
2 2
10U_0805_6.3V6M
2 2
10U_0805_6.3V6M
2
10U_0805_6.3V6M
AA5
VCC
VCC
VSS
VSS Y5
D12 VCCP VSS B19 AA7 VCC VSS Y21
D14 B22 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M AA9 Y24
VCCP VSS VCC VSS
D16 VCCP VSS B25 AA11 VCC VSS AA1
E11 C1 +CPU_CORE AA13 AA4
VCCP VSS VCC VSS
E13 VCCP VSS C4 AA15 VCC VSS AA6
E15 VCCP VSS C7 AA17 VCC VSS AA8
F10 VCCP VSS C10 1 1 1 1 1 1 1 AA19 VCC VSS AA10
F12 VCCP VSS C13 AA21 VCC VSS AA12
F14 C15 C265 C354 C307 C282 C332 C279 C298 AB6 AA14
VCCP VSS VCC VSS
F16 VCCP POWER, GROUNG,
VSS RESERVED
C18 SIGNALS AND NC2 2 2 2 2 2 2
AB8 VCC VSS AA16
K6 VCCP VSS C21 AB10 VCC VSS AA18
L5 C24 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M AB12 AA20
VCCP VSS 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M VCC VSS
L21 VCCP VSS D2 AB14 VCC VSS AA22
M6 VCCP VSS D5
+CPU_CORE
AB16 VCC POWER, GROUND VSS AA25
M22 VCCP VSS D7 AB18 VCC VSS AB3
N5 VCCP VSS D9 AB20 VCC VSS AB5
N21 VCCP VSS D11 AB22 VCC VSS AB7
P6 VCCP VSS D13 1 1 1 1 1 1 1 AC9 VCC VSS AB9
P22 VCCP VSS D15 AC11 VCC VSS AB11
R5 D17 C280 C281 C283 C257 C323 C260 C342 AC13 AB13
C VCCP VSS VCC VSS C
R21 VCCP VSS D19 AC15 VCC VSS AB15
2 2 2 2 2 2 2
T6 VCCP VSS D21 AC17 VCC VSS AB17
T22 D23 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M AC19 AB19
VCCP VSS 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M VCC VSS
U21 VCCP VSS D26 AD8 VCC VSS AB21
VSS E3 AD10 VCC VSS AB23
E6 +CPU_CORE AD12 AB26
VSS VCC VSS
+CPU_CORE D6 VCC VSS E8 AD14 VCC VSS AC2
D8 VCC VSS E10 AD16 VCC VSS AC5
D18 VCC VSS E12 1 1 1 1 1 1 1 AD18 VCC VSS AC8
D20 VCC VSS E14 AE9 VCC VSS AC10
D22 E16 C278 C259 C333 C309 C261 C258 C359 AE11 AC12
VCC VSS VCC VSS
E5 VCC VSS E18 AE13 VCC VSS AC14
2 2 2 2 2 2 2
E7 VCC VSS E20 AE15 VCC VSS AC16
E9 E22 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M AE17 AC18
VCC VSS 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M VCC VSS
E17 VCC VSS E25 AE19 VCC VSS AC21
E19 VCC VSS F1 AF8 VCC VSS AC24
E21 F4 +CPU_CORE AF10 AD1
VCC VSS VCC VSS
F6 VCC VSS F5 AF12 VCC VSS AD4
F8 VCC VSS F7 AF14 VCC VSS AD7
F18 VCC VSS F9 1 1 1 1 1 1 1 AF16 VCC VSS AD9
VSS F11 AF18 VCC VSS AD11
F13 C344 C263 C350 C353 C256 C262 C352 AD13
VSS VSS
40 PSI# E1 PSI# VSS F15 VSS AD15
2 2 2 2 2 2 2
VSS F17 VSS AD17
+VCCP
40 CPU_VID0 E2 F19 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M AD19
VID0 VSS 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M VSS
40 CPU_VID1 F2 VID1 VSS F21 VSS AD22
40 CPU_VID2 F3 VID2 VSS F24 M4 VSS VSS AD25
1

R190 40 CPU_VID3 G3 G2 M5 AE3


1K_0402_1% VID3 VSS VSS VSS
40 CPU_VID4 G4 VID4 VSS G6 M21 VSS VSS AE6
B B
40 CPU_VID5 H4 VID5 VSS G22 Vcc-core C,uF ESR, mohm ESL,nH M24 VSS VSS AE8
VSS G23 Decoupling N3 VSS VSS AE10
G26 N6 AE12
2

GTL_REF0 VSS VSS VSS


1 2 AD26 GTLREF0 VSS H3 SPCAP,Polymer 4X220uF 12m ohm/4 3.5nH/4 N22 VSS VSS AE14
R187 E26 H5 N23 AE16
2K_0402_1% RSVD VSS VSS VSS
G1 RSVD VSS H21 MLCC 0805 X5R 35X10uF 5m ohm/35 0.6nH/35 N26 VSS VSS AE18
AC1 RSVD VSS H25 P2 VSS VSS AE20
VSS J1 P5 VSS VSS AE23
J4 +1.8VS P21 AE26
COMP0 VSS VSS VSS
P25 COMP0 VSS J6 P24 VSS VSS AF2
COMP1 P26 J22 R1 AF5
COMP2 COMP1 VSS VSS VSS
AB2 COMP2 VSS J24 R4 VSS VSS AF9
COMP3 AB1 K2 1 1 1 1 1 1 1 1 R6 AF11
COMP3 VSS VSS VSS
VSS K5 R22 VSS VSS AF13
1

K21 C363 C394 C328 C272 C320 C276 C374 C388 R25 AF15
R238 R239 R197 R198 VSS VSS VSS
1 2 B2 RSVD VSS K23 T3 VSS VSS AF17
27.4_0402_1%54.9_0402_1% 54.9_0402_1% R276 @1K_0402_5% 2 2 2 2 2 2 2 2
1 2 AF7 RSVD VSS K26 T5 VSS VSS AF19
27.4_0402_1% R189
1 @1K_0402_5%
2 C14 RSVD L3 T21 AF21
R279 @1K_0402_5% VSS 0.01U_0402_16V7K 0.01U_0402_16V7K 10U_1206_16V4Z 10U_1206_16V4Z VSS VSS
1 2 C3 RSVD L6 T23 AF24
2

R273 @1K_0402_5% VSS 0.01U_0402_16V7K 0.01U_0402_16V7K 10U_1206_16V4Z 10U_1206_16V4Z VSS VSS


VSS L22
1 2 C16 L25
R280 @1K_0402_5% TEST3 VSS
M1 AMP_1473129-1
VSS +VCCP

AMP_1473129-1
+3VS 1
1 1 1 1 1 1 1 1 1 1
2

R467 +
2

A
R468 C419 C373 C316 C383 C372 C337 C382 C379 C326 C371 C296 A
R469 @330_0402_5%
@330_0402_5% @1.3k_0402_5% 2 2 2 2 2 2 2 2 2 2 2
1 1

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z


CLK_SEL# 13
1

C 150U_D2_6.3VM 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z


2 Q53
Reserve for Dothan CPU B @2SC2411K_SOT23 Compal Electronics, Inc.
1

C E Title
3

2 Q54 Banias Processor in mFCPGA479


B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
@2SC2411K_SOT23 E
3

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A3
DCL55 LA-2201 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 5 of 43
5 4 3 2 1
5 4 3 2 1

U12A
HA#[3..31] HD#[0..63]
4 HA#[3..31] HD#[0..63] 4

4 H_REQ#[0..4]
H_REQ#[0..4]
HA#3
Montara-GM(L) HD#0
P23 HA#3 HD#0 K22
HA#4 T25 H27 HD#1
HUB_PD[0..10] HA#5 HA#4 HD#1 HD#2
T28 K25
14 HUB_PD[0..10]
HA#6
HA#7
R27
U23
HA#5
HA#6
HD#2
HD#3 L24
J27
HD#3
HD#4
HOST REF VOLTAGE
HA#8 HA7# HD#4 HD#5
U24 HA#8 HD#5 G28
HA#9 R24 L27 HD#6
HA#10 HA#9 HD#6 HD#7
U28 HA#10 HD#7 L23
HA#11 V28 L25 HD#8 +VCCP +VCCP +VCCP
HA#12 HA#11 HD#8 HD#9
D U27 HA#12 HD#9 J24 D
HA#13 T27 H25 HD#10
HA#13 HD#10

2
HA#14 V27 K23 HD#11
HA#15 HA#14 HD#11 HD#12 R204 R250 R299
U25 HA#15 HD#12 G27
HA#16 V26 K26 HD#13 301_0603_1% 301_0603_1% 49.9_0603_1%
HA#17 HA#16 HD#13 HD#14
Y24 HA#17 HD#14 J23
HA#18 V25 H26 HD#15 HXSWING H YSW ING HCCVREF

2 1

2 1
HA#19 HA#18 HD#15 HD#16
V23 HA#19 HD#16 F25
HA#20 W25 F26 HD#17 2 2 2 2
HA#20 HD#17

2
HA#21 Y25 B27 HD#18 R203 C338 R289 C397
HA#22 HA#21 HD#18 HD#19 150_0603_1% C301 R245 C398
AA27 HA#22 HD#19 H23
HA#23 W24 E27 HD#20 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
HA#24 HA#23 HD#20 HD#21 1 150_0603_1% 1 1
1U_0603_10V6K 1
W23 G25

1
HA#25 HA#24 HD#21 HD#22
W27 F28

1
HA#26 HA#25 HD#22 HD#23
Y27 HA#26 HD#23 D27
HA#27 AA28 G24 HD#24
HA#28 HA#27 HD#24 HD#25 100_0603_1%
W28 HA#28 HD#25 C28
HA#29 AB27 B26 HD#26
HA#30 HA#29 HD#26 HD#27
Y26 HA#30 HD#27 G22
HA#31 AB28 C26 HD#28
HA#31 HD#28 HD#29
HD#29 E26
H_REQ#0 R28 G23 HD#30
H_REQ#1 HREQ#0 HD#30 HD#31 +VCCP +VCCP
P25 HREQ#1 HD#31 B28
H_REQ#2 R23 B21 HD#32
H_REQ#3 HREQ#2 HD#32 HD#33
R25 HREQ#3 HD#33 G21

2
H_REQ#4 HD#34
4 H_ADSTB#0
T23
T26
HREQ#4
HADSTB#0
HOST HD#34
HD#35
C24
C23 HD#35 R283 R263
AA26 D22 HD#36 49.9_0603_1% 49.9_0603_1%
4 H_ADSTB#1 HADSTB#1 HD#36
C25 HD#37
C
HD#37 HD#38 C
13 CLK_MCH_BCLK# AD29 E24

1
BCLK# HD#38 HD#39 HAVREF HDVREF
13 CLK_MCH_BCLK AE29 BCLK HD#39 D24
H YSW ING K28 G20 HD#40 2
HYSWING HD#40

2
HXSWING B18 E23 HD#41 2 2
R242 1 HXSWING HD#41
2 27.4_0402_1% HYRCOMP H28 HYRCOMP HD#42 B22 HD#42 C399 C341
R214 1 2 27.4_0402_1% HXRCOMP B20 B23 HD#43 0.1U_0402_16V4Z C343
HXRCOMP HD#43 HD#44 R290 1 R255 0.1U_0402_16V4Z
HD#44 F23
HDVREF HD#45 1
1U_0603_10V6K 1
K21 F21

1
HVREF0 HD#45 HD#46 100_0603_1% 100_0603_1%
J21 HVREF1 HD#46 C20
J17 C21 HD#47
HCCVREF HVREF2 HD#47 HD#48
Y28 HCCVREF HD#48 G18
HAVREF Y22 E19 HD#49
HAVREF HD#49 HD#50
HD#50 E20
H_DSTBN#0 J28 G17 HD#51
4 H_DSTBN#0 H_DSTBN#1 HDSTBN#0 HD#51 HD#52
4 H_DSTBN#1 C27 HDSTBN#1 HD#52 D20
H_DSTBN#2 E22 F19 HD#53
4 H_DSTBN#2 H_DSTBN#3 HDSTBN#2 HD#53 HD#54
4 H_DSTBN#3 D18 HDSTBN#3 HD#54 C19
H_DSTBP#0 K27 C17 HD#55
4 H_DSTBP#0 H_DSTBP#1 HDSTBP#0 HD#55 HD#56
D26 F17
4
4
H_DSTBP#1
H_DSTBP#2
H_DSTBP#2
H_DSTBP#3
E21
E18
HDSTBP#1
HDSTBP#2
HD#56
HD#57 B19
G16
HD#57
HD#58
HUB I/F REF VOLTAGE
4 H_DSTBP#3 H_DINV#0 HDSTBP#3 HD#58 HD#59
4 H_DINV#0 J25 DINV0# HD#59 E16
H_DINV#1 E25 C16 HD#60
4 H_DINV#1 H_DINV#2 DINV1# HD#60 HD#61
4 H_DINV#2 B25 DINV2# HD#61 E17
H_DINV#3 G19 D16 HD#62 +1.5VS
4 H_DINV#3 DINV3# HD#62 HD#63
HD#63 C18
CPURST# F15
4 H_CPURST# CPURST#

2
HUB_PD0 U7 R265
B HUB_PD1 HL_0 B
U4 HL_1 80.6_0603_1%
HUB_PD2 U3 L28
HL_2 ADS# H_ADS# 4
HUB_PD3 V3 M25 0.796V
H_TRDY# 4

1
HUB_PD4 HL_3 HTRDY# HUB_VSWING
W2 HL_4 DRDY# N24 H_DRDY# 4 HUB_VSWING
HUB_PD5 W6 M28
HL_5 DEFER# H_DEFER# 4
HUB_PD6 V6 N28 2 2
HL_6 HITM# H_HITM# 4

2
HUB_PD7 W7 N27 C381 C380
HL_7 HIT# H_HIT# 4
HUB_PD8 T3 P27 R257
HL_8 HLOCK# H_LOCK# 4
HUB_PD9 V5 M23 51.1_0603_1% 0.1U_0402_16V4Z 0.01U_0402_16V7K
HL_9 BREQ0# H_BR0# 4
HUB I/F

HUB_PD10 1 1
V4 HL_10 BNR# N25 H_BNR# 4
HI_PSTRB W3 P28
14 HUB_PSTRB H_BPRI# 4

1
HI_PSTRB# HLSTB BPRI#
14 HUB_PSTRB# V2 HLSTB# DBSY# M26 H_DBSY# 4
+1.35VS 2 1 T2 HLRCOMP RS#0 N23 H_RS#0 4 0.35V
R269 27.4_0402_1% HUB_VSWING U2 P26 HUB_VREF HUB_VREF
PSWING RS#1 H_RS#1 4
HUB_VREF W1 M27
HLVREF RS#2 H_RS#2 4
2 2

2
127Ohm For GM+ C392 C404
R252
RG82G4350M_uFCBGA732 40.2_0603_1% 0.1U_0402_16V4Z 0.01U_0402_16V7K
1 1
1

A A

Compal Electronics, Inc.


Title
MONTARA-GM-HOST(1/4)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 6 of 43
5 4 3 2 1
5 4 3 2 1

U12B

DVOC_D[0..11]
Montara-GM(L) CLK_MCH_48M
18 DVOC_D[0..11] R3 DVOBD0/(NC) BLUE C9 B 19
R5 DVOBD1/(NC) BLUE# D9

2
R6 C8
R4
P6
DVOBD2/(NC)
DVOBD3/(NC)
GREEN
GREEN# D8
A7
G 19
R223
@33_0402_5%
I2C BUS PULL UP
DVOBD4/(NC) RED R 19
P5 A8 +1.5VS
DVOBD5/(NC) RED# RP50
N5 H10 HSYNC 19 127Ohm For GM+

1
DVOBD6/(NC) HSYNC

DAC
P2 DVOBD7/(NC) VSYNC J9 VSYNC 19 2
N2 E8 REFSET C302 MDVICLK 1 8
DVOBD8/(NC) REFSET MDDCCLK
D N3 DVOBD9/(NC) DDCACLK B6 DDC_CLK 19 2 7 D

2
+1.5VS M1 G9 @22P_0402_50V8J MDVIDATA 3 6
DVOBD10/(NC) DDCADATA DDC_DATA 19 1
M5 R247 MDDCDATA 4 5
DVOBD11/(NC)
127_0603_1%

2
P3 2.2K_0804_8P4R_5%
R240 DVOBCLK/(NC)
no TV OUT mount R253 P4 G14 TXOUT0- 19

1
DVOBCLK#/(NC) IYAM0 MI2CCLK
1K_0402_5% T6 DVOBHSYNC/(NC) IYAM1 E15 TXOUT1- 19 2 1
T5 C15 R249 2.2K_0402_5%
DVOBVSYNC/(NC) IYAM2 TXOUT2- 19
R256 L2 C13 MI2CDATA 2 1

1
DVOBC_CLKINT DVOBBLANK#/(NC) IYAM3 R264 2.2K_0402_5%
2 1 M2 DVOBFLDSTL/(NC) IYAP0 F14 TXOUT0+ 19
100K_0402_5% E14
IYAP1 TXOUT1+ 19
1

G2 DVOBCINTR# IYAP2 C14 TXOUT2+ 19


R253 DVOBC_CLKINT M3 B13
18 DVOBC_CLKINT DVOBCCLKINT IYAP3
100K_0402_5% H12 LCD_DC2 R217 2 1 2.2K_0402_5% +3VS
IYBM0 TZOUT0- 19
DVOC_CLK J3 E12 LCD_DD2 R216 2 1 2.2K_0402_5%
18 DVOC_CLK DVOCCLK IYBM1 TZOUT1- 19
DVOC_CLK# J2 C12
18 DVOC_CLK# TZOUT2- 19
2

DVOC_HSYNC DVOCCLK# IYBM2


18 DVOC_HSYNC K6 DVOCHSYNC IYBM3 G11
DVOC_VSYNC L5 G12
18 DVOC_VSYNC DVOCVSYNC IYBP0 TZOUT0+ 19
L3 DVOCBLANK# IYBP1 E11 TZOUT1+ 19
1 2 H5 DVOCFLDSTL IYBP2 C11 TZOUT2+ 19
R241 100K_0402_5% G10
IYBP3
ICLKAM D14 TXCLK- 19
MI2CCLK K7 E13
18 MI2CCLK MI2CCLK ICLKAP TXCLK+ 19
MI2CDATA N6 E10 DVO REF

DVO
LVDS
18 MI2CDATA MI2CDATA ICLKBM TZCLK- 19
MDVICLK N7 F10
MDVICLK ICLKBP TZCLK+ 19
no TV out mount R466 , Del R251,R235 MDVIDATA M6
MDDCCLK
MDDCDATA
P7
T7
MDVIDATA
MDDCCLK DDCPCLK B4
C5
LCD_DC2
LCD_DD2
LCD_CLK 19
+1.5VS
VOLTAGE
+1.5VS MDDCDATA DDCPDATA LCD_DATA 19
C G8 R243 2 1 @0_0402_5% C
PANELBKLTCTL INVT_PWM 19,29

2
DVOC_D0 K5 F8
DVOCD0 PANELBKLTEN ENBKL 29
2

R466 DVOC_D1 K1 A5 CLK_SSC_66M R236


DVOCD1 PANELVDDEN ENVDD 19
1K_0402_5% DVOC_D2 K3 1 2 1K_0603_1%
DVOCD2

2
DVOC_D3 K2 D12 @ C321 22P_0402_50V8J
DVOC_D4 DVOCD3 LVREFH R211 GVREF
J6 F12

2 1
DVODETECT DVOC_D5 DVOCD4 LVREFL @33_0402_5%
J5
21

DVOC_D6 DVOCD5 +3VS


H2 DVOCD6 LVBG B12 2
R251 DVOC_D7 H1 A10 R191 2 1 1.5K_0603_1% R237

1
DVOC_D8 DVOCD7 LIBG C325
@1K_0603_1% H3 DVOCD8 2

2
DVOC_D9 H4 C284 0.1U_0402_16V4Z
@ DVOCD9 1
+1.5VS DVOC_D10 H6 R222
1

1
DVOC_D11 DVOCD10 CLK_MCH_48M @22P_0402_50V8J
G3 DVOCD11 DREFCLK B7 CLK_MCH_48M 13 @510_0402_5%
CLK_SSC_66M 1
DREFSSCLK B17 CLK_SSC_66M 13
CLKS
H9 1K_0603_1%

1
LCLKCTLA
2

C6 LCLKCTLB
R219 LCLKCTLB
10K_0603_1% E5 ADDID0 CLK_MCH_66M
F5 ADDID1
E3 AA22 H_DPWR# 4
1

ADDID2 DPWR#/(NC)

1
E2 ADDID3 DPSLP# Y23 H_DPSLP# 4,14
G5 AD28 PCIRST#
ADDID4 RSTIN# PCIRST# 14,18,20,21,22,23,24,25,27
1

D
MISC

F4 R291
Q38 ADDID5 @33_0402_5%
15 RTCCLK 2 G6 ADDID6 PWROK J11 VGATE 13,15,40
G BSN20_SOT23 1 R235 2 F6

2
@1K_0402_5% ADDID7 EXTTS
S D6 1 2 +3VS
3

DVODETECT EXTTS0 R200 10K_0603_1%


@ L7 DVODETECT MCHDETECTVSS AJ1 1
D5 DPMS
GVREF F1 C405
B GVREF @22P_0402_50V8J B
15 AGP_BUSY# F7 AGPBUSY#
DVORCOMP 2
D1 DVORCOMP NC0 B1
CLK_MCH_66M Y3 AH1
13 CLK_MCH_66M GCLKIN NC1
NC2 A2
2

AA5 RVSD0 NC3 AJ2


R234 F2 A28
40.2_0603_1% RVSD1 NC4
F3 RVSD2 NC5 AJ28
B2 RVSD3 NC6 A29
NC

B3 B29
1

RVSD4 NC7
C2 RVSD5 NC8 AH29 Starp pin list
GST0 C3 AJ29
GST1 GST[1] NC9
C4 GST[0] NC10 AA9 LCLKCTLB: High for P4
D2 RVSD8 NC11 AJ4 N.C. for Banias(default low)
D3 RVSD9
DVODETECT: Low to enable DVO
D7 RVSD10
High to disable DVO
L4 RVSD11 +1.5VS
RG82G4350M_uFCBGA732 GST0 GST1 PSB/Sys Mem/ GFX Core
0 0 400/266/200 (default)
GST0 1 2 0 1 400/200/200
R227 @1K_0402_5%
GST1 1 2 1 0 400/200/133
R226 @1K_0402_5%

A A

Compal Electronics, Inc.


Title
MONTARA-GM-LVDS(2/4)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 7 of 43
5 4 3 2 1
5 4 3 2 1

U12C U12D
C1 VSS0 VSS91 R17
G1 U17
DDR_SMA0
Montara-GM(L) DDR_SDQ0
L1
VSS1
VSS2
VSS92
VSS93 AB17
10 DDR_SMA0 AC18 SMA0 SDQ0 AF2 U1 VSS3 VSS94 AC17
DDR_SMA1 AD14 AE3 DDR_SDQ1 AA1 F18
10,11 DDR_SMA1 SMA1 SDQ1 VSS4 VSS95
DDR_SMA2 AD13 AF4 DDR_SDQ2 AE1 J18
10,11 DDR_SMA2 SMA2 SDQ2 VSS5 VSS96
DDR_SMA3 AD17 AH2 DDR_SDQ3 R2 AA18
10 DDR_SMA3 SMA3 SDQ3 VSS6 VSS97
DDR_SMA4 AD11 AD3 DDR_SDQ4 AG3 AG18
10,11 DDR_SMA4 SMA4 SDQ4 DDR_SDQ[0..63] VSS7 VSS98
DDR_SMA5 AC13 AE2 DDR_SDQ5 AJ3 A19
10,11 DDR_SMA5 SMA5 SDQ5 DDR_SDQ[0..63] 10 VSS8 VSS99
DDR_SMA6 AD8 AG4 DDR_SDQ6 D4 D19
DDR_SMA7 SMA6 SDQ6 DDR_SDQ7 VSS9 VSS100
AD7 SMA7 SDQ7 AH3 G4 VSS10 VSS101 H19
D DDR_SMA8 AC6 AD6 DDR_SDQ8 DDR_SDQS[0..8] K4 AB19 D
SMA8 SDQ8 DDR_SDQS[0..8] 10 VSS11 VSS102
DDR_SMA9 AC5 AG5 DDR_SDQ9 N4 AE19
DDR_SMA10 SMA9 SDQ9 DDR_SDQ10 VSS12 VSS103
AC19 SMA10 SDQ10 AG7 T4 VSS13 VSS105 F20
DDR_SMA11 AD5 AE8 DDR_SDQ11 DDR_CB[0..7] W4 J20
SMA11 SDQ11 DDR_CB[0..7] 10 VSS14 VSS106
DDR_SMA12 AB5 AF5 DDR_SDQ12 AA4 AA20
SMA12 SDQ12 DDR_SDQ13 VSS15 VSS107
SDQ13 AH4 AC4 VSS16 VSS108 AC20
AF7 DDR_SDQ14 DDR_SMA[6..12] AE4 A21
SDQ14 DDR_SMA[6..12] 10 VSS17 VSS109
AH6 DDR_SDQ15 B5 D21
DDR_SDQS0 SDQ15 DDR_SDQ16 VSS18 VSS110
DDR_SDQS1
AG2
AH5
SDQS0
SDQS1
MEMORY SDQ16
SDQ17
AF8
AG8 DDR_SDQ17 DDR_SDM[0..8]
DDR_SDM[0..8] 10
U5
Y5
VSS19
VSS20
VSS111
VSS112
H21
M21
DDR_SDQS2 AH8 AH9 DDR_SDQ18 Y6 P21
DDR_SDQS3 SDQS2 SDQ18 DDR_SDQ19 VSS21 VSS113
AE12 SDQS3 SDQ19 AG10 AG6 VSS22 VSS114 T21
DDR_SDQS4 AH17 AH7 DDR_SDQ20 C7 V21
DDR_SDQS5 SDQS4 SDQ20 DDR_SDQ21 VSS23 VSS115
AE21 SDQS5 SDQ21 AD9 E7 VSS24 VSS116 Y21

Montara-GM(L)
DDR_SDQS6 AH24 AF10 DDR_SDQ22 G7 AA21
DDR_SDQS7 SDQS6 SDQ22 DDR_SDQ23 VSS25 VSS117
AH27 SDQS7 SDQ23 AE11 J7 VSS26 VSS118 AB21
DDR_SDQS8 AD15 AH10 DDR_SDQ24 M7 AG21
SDQS8 SDQ24 DDR_SDQ25 VSS27 VSS119
SDQ25 AH11 DDR REF & SWING VOLTAGE R7 VSS28 VSS120 B24
AG13 DDR_SDQ26 AA7 F22
DDR_SWE# SDQ26 DDR_SDQ27 VSS29 VSS121
10 DDR_SWE# AD25 SWE# SDQ27 AF14 AE7 VSS30 VSS122 J22
DDR_SRAS# AC21 AG11 DDR_SDQ28 AJ7 L22
10 DDR_SRAS# SRAS# SDQ28 VSS31 VSS123
DDR_SCAS# AC24 AD12 DDR_SDQ29 H8 N22
10 DDR_SCAS# SCAS# SDQ29 VSS32 VSS124
AF13 DDR_SDQ30 K8 R22
SDQ30 DDR_SDQ31 +2.5V VSS33 VSS125
SDQ31 AH13 P8 VSS34 VSS126 U22
AB2 AH16 DDR_SDQ32 T8 W22
10 DDR_CLK0 SCK0 SDQ32 VSS35 VSS127
AA2 AG17 DDR_SDQ33 V8 AE22
10 DDR_CLK0# SCK0# SDQ33 VSS36 VSS128

1
AC26 AF19 DDR_SDQ34 Y8 A23
10 DDR_CLK1 SCK1 SDQ34 VSS37 VSS129
AB25 AE20 DDR_SDQ35 R301 AC8 D23
10 DDR_CLK1# SCK1# SDQ35 VSS38 VSS130
AC3 AD18 DDR_SDQ36 60.4_0603_1% E9 AA23
10 DDR_CLK2 SCK2 SDQ36 VSS39 VSS131
C AD4 AE18 DDR_SDQ37 L9 AC23 C
10 DDR_CLK2# SCK2# SDQ37 VSS40 VSS132
AC2 AH18 DDR_SDQ38 MRCOMP N9 AJ23
11 DDR_CLK3

1 2
SCK3 SDQ38 DDR_SDQ39 VSS41 VSS133
11 DDR_CLK3# AD2 SCK3# SDQ39 AG19 R9 VSS42 VSS134 F24
AB23 AH20 DDR_SDQ40 2 U9 H24
11 DDR_CLK4 SCK4 SDQ40 VSS43 VSS135
AB24 AG20 DDR_SDQ41 R300 W9 K24
11 DDR_CLK4# SCK4# SDQ41 VSS44 VSS136
AA3 AF22 DDR_SDQ42 C420 60.4_0603_1% AB9 M24
11 DDR_CLK5 SCK5 SDQ42 VSS45 VSS137
AB4 AH22 DDR_SDQ43 AG9 P24
11 DDR_CLK5# SCK5# SDQ43 1 VSS46 VSS138
AF20 DDR_SDQ44 0.1U_0402_16V4Z C10 T24

2
SDQ44 DDR_SDQ45 VSS47 VSS139
SDQ45 AH19 J10 VSS48 VSS140 V24
AC7 AH21 DDR_SDQ46 AA10 AA24
10,11 DDR_CKE0 SCKE0 SDQ46 VSS49 VSS141
AB7 AG22 DDR_SDQ47 AE10 AG24
10,11 DDR_CKE1 SCKE1 SDQ47 VSS50 VSS142
AC9 AE23 DDR_SDQ48 D11 A25
11 DDR_CKE2 SCKE2 SDQ48 VSS51 VSS143
AC10 AH23 DDR_SDQ49 F11 D25
11 DDR_CKE3 SCKE3 SDQ49 VSS52 VSS144
AD23 AE24 DDR_SDQ50 H11 AA25
10,11 DDR_SCS#0 SCS#0 SDQ50 VSS53 VSS145
AD26 AH25 DDR_SDQ51 +2.5V AB11 AE25
10,11 DDR_SCS#1 SCS#1 SDQ51 VSS54 VSS146
AC22 AG23 DDR_SDQ52 AC11 G26
11 DDR_SCS#2 SCS#2 SDQ52 VSS55 VSS147
AC25 AF23 DDR_SDQ53 AJ11 J26
11 DDR_SCS#3 SCS#3 SDQ53 VSS56 VSS148

1
AF25 DDR_SDQ54 J12 L26
SDQ54 DDR_SDQ55 R323 VSS57 VSS149
SDQ55 AG25 AA12 VSS58 VSS150 N26
DDR_SBS0 AD22 AH26 DDR_SDQ56 604_0603_1% AG12 R26
10 DDR_SBS0 SBA0 SDQ56 VSS59 VSS151
DDR_SBS1 AD20 AE26 DDR_SDQ57 A13 U26
10 DDR_SBS1 SBA1 SDQ57 VSS60 VSS152
AG28 DDR_SDQ58 MVSWINGL 0.497V D13 W26

2
SDQ58 DDR_SDQ59 VSS61 VSS153
SDQ59 AF28 F13 VSS62 VSS154 AB26
DDR_SDM0 AE5 AG26 DDR_SDQ60 2 H13 A27
SDM0 SDQ60 VSS63 VSS155

1
DDR_SDM1 AE6 AF26 DDR_SDQ61 N13 F27
DDR_SDM2 SDM1 SDQ61 DDR_SDQ62 R322 C437 VSS64 VSS156
AE9 SDM2 SDQ62 AE27 R13 VSS65 VSS157 AC27
DDR_SDM3 AH12 AD27 DDR_SDQ63 150_0603_1% U13 AG27
DDR_SDM4 SDM3 SDQ63 1
0.1U_0402_16V4Z VSS66 VSS158
AD19 SDM4 AB13 VSS67 VSS159 AJ27
DDR_SDM5 AD21 AE13 AC28

2
B DDR_SDM6 SDM5 VSS68 VSS160 B
AD24 SDM6 J14 VSS69 VSS161 AE28
DDR_SDM7 AH28 AG14 DDR_CB0 P14 C29
DDR_SDM8 SDM7 SDQ64 DDR_CB1 VSS70 VSS162
AH15 SDM8 SDQ65 AE14 T14 VSS71 VSS163 E29
AE17 DDR_CB2 AA14 G29
SDQ66 DDR_CB3 VSS72 VSS164
SDQ67 AG16 AC14 VSS73 VSS165 J29
DDR_SMA_B1 AD16 AH14 DDR_CB4 D15 L29
11 DDR_SMA_B1 SMA_B1 SDQ68 VSS74 VSS166
DDR_SMA_B2 AC12 AE15 DDR_CB5 +2.5V H15 N29
11 DDR_SMA_B2 SMA_B2 SDQ69 VSS75 VSS167
DDR_SMA_B4 AF11 AF16 DDR_CB6 N15 U29
11 DDR_SMA_B4 SMA_B4 SDQ70 VSS76 VSS168
DDR_SMA_B5 AD10 AF17 DDR_CB7 R15 W29
11 DDR_SMA_B5 SMA_B5 SDQ71 VSS77 VSS169

1
U15 VSS78 VSS170 AA29
AC15 R324 AB15 AJ10
RCVENOUT# VSS79 VSS171
AC16 RCVENIN# 150_0603_1% AG15 VSS80 VSS172 AJ12
F16 VSS81 VSS173 AJ18
MRCOMP AB1 AJ24 MVSWINGH 2.002V J16 AJ20
+SDREF

1 2
SMRCOMP SMVREF0 VSS82 VSS174
P16 VSS83 VSS176 C22
MVSWINGL AJ22 2 T16 D28
MVSWINGH SMVSWINGL R325 VSS84 VSS177
AJ19 SMVSWINGH 2 AA16 VSS85 VSS178 E28
C438 AE16 L6
C436 604_0603_1% 0.1U_0402_16V4Z VSS86 VSS179
RG82G4350M_uFCBGA732 A17 VSS87 VSS180 T9
1
2 D17 VSS88 VSS181 AJ26
0.1U_0402_16V4Z 1
H17 VSS89
N17 VSS90

RG82G4350M_uFCBGA732

A A

Compal Electronics, Inc.


Title
MONTARA-GM-DDR(3/4)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS DCL55 LA-2201
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 8 of 43
5 4 3 2 1
5 4 3 2 1

U12E
+1.35VS +VCCP +1.35VS
Montara-GM(L) 1.4A For VCC
J15 VCC0 VTTLF0 G15
P13 VCC1 VTTLF1 H16
T13 VCC2 VTTLF2 H18 1
N14 J19 C319 1 C389 2 2 2 2 2 2 2
VCC3 VTTLF3 + C330 C331 C378 C367 C360 C366 C377
R14 VCC4 VTTLF4 H20 2
U14 L21 C386
VCC5 VTTLF5 150U_D2_6.3VM 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
P15 VCC6 VTTLF6 N21
2 2
10U_1206_16V4Z 1 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
0.1U_0402_16V4Z 1 1
0.1U_0402_16V4Z 1 1
0.1U_0402_16V4Z
T15 VCC7 VTTLF7 R21
1
AA15 VCC8 VTTLF8 U21
D N16 VCC9 VTTLF9 H22 D
R16 VCC10 VTTLF10 M22
U16 VCC11 VTTLF11 P22
P17 VCC12 VTTLF12 T22
T17 V22 +1.35VS +1.35VS_PLLA +1.35VS +1.35VS_PLLB +1.35VS
VCC13 VTTLF13
AA17 VCC14 VTTLF14 Y29 90mA For VCCHL Close to ball D29, Y2
AA19 VCC15 VTTLF15 K29 0.4A 1 2 0.4A 1 2
W21 F29 R199 0_0805_5% R201 0_0805_5%
VCC16 VTTLF16
H14 VCC17 VTTLF17 AB29 1 1
+1.35VS
VTTLF18 A26 1 2 2 2 2 2 2
A20 C370 C410 C409 C308 C403 C270 + C293 C271 + C305
VTTLF19
V1 VCCHL0 VTTLF20 A18
Y1 10U_1206_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 220U_D2_4VM_R12 220U_D2_4VM_R12
VCCHL1 2 1 1 1 1 2 1 2 1
W5 VCCHL2 VTTHF0 A22 2 1 C289 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
U6 VCCHL3 VTTHF1 A24 2 1 C288 0.1U_0402_16V4Z
U8 VCCHL4 VTTHF2 H29 2 1 C327 0.1U_0402_16V4Z
W8 VCCHL5 VTTHF3 M29 2 1 C347 0.1U_0402_16V4Z
V7 VCCHL6 VTTHF4 V29 2 1 C387 0.1U_0402_16V4Z
V9 VCCHL7
VCCSM0 AC1
D29 VCCAHPLL VCCSM1 AG1
+1.35VS_PLLA Y2 AB3
+1.35VS_PLLB VCCAGPLL VCCSM2
AF3
POWER

VCCSM3 +1.5VS_DVO +1.5VS +1.5VS_DAC +1.5VS +1.5VS_ALVDS +1.5VS


A6 VCCADPLLA VCCSM4 Y4
B16 AJ5 +2.5V 90mA 70mA 90mA
VCCADPLLB VCCSM5
VCCSM6 AA6 1 2 1 2 1 2
+1.5VS_DVO AB6 R267 0_0805_5% R193 0_0805_5% R209 0_0805_5%
VCCSM7
E1 VCCDVO_0 VCCSM8 AF6 2 2 1 2 2 2 2
J1 Y7 C346 C368 C292
C
VCCDVO_1 VCCSM9 C254 + C306 C291 C303 C
N1 VCCDVO_2 VCCSM10 AA8
E4 AB8 0.1U_0402_16V4Z 0.01U_0402_16V7K 0.1U_0402_16V4Z
VCCDVO_3 VCCSM11 1
0.1U_0402_16V4Z 1 220U_D2_4VM_R12 1 1 1 1
0.01U_0402_16V7K
J4 VCCDVO_4 VCCSM12 Y9
2 0.1U_0402_16V4Z
M4 VCCDVO_5 VCCSM13 AF9
E6 VCCDVO_6 VCCSM14 AJ9
H7 VCCDVO_7 VCCSM15 AB10
J8 VCCDVO_8 VCCSM16 AA11
L8 VCCDVO_9 VCCSM17 AB12
M8 VCCDVO_10 VCCSM18 AF12
N8 VCCDVO_11 VCCSM19 AA13
R8 AJ13 +VCCP +1.5VS_DLVDS +1.5VS
VCCDVO_12 VCCSM20
K9 VCCDVO_13 VCCSM21 AB14 0.72A 70mA
M9 VCCDVO_14 VCCSM22 AF15 1 2
P9 AB16 R248 0_0805_5%
+1.5VS_DAC VCCDVO_15 VCCSM23
VCCSM24 AJ17 1
VCCSM25 AB18 2 2 2 2 2 2 2 2 1 2
A9 AF18 C349 + C351 C365 C376 C391 C336 C287 C335 C290
VCCADAC0 VCCSM26 C340 C322
B9 VCCADAC1 VCCSM27 AB20
B8 AF21 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
+1.5VS_ALVDS VSSADAC VCCSM28 2
150U_D2_6.3VM 1 1
0.1U_0402_16V4Z 1 1
0.1U_0402_16V4Z 1 1
0.1U_0402_16V4Z 1 1
0.1U_0402_16V4Z 2 22U_1206_10V4Z
1
0.1U_0402_16V4Z
VCCSM29 AJ21
VCCSM30 AB22
A11 VCCALVDS VCCSM31 AF24
B11 VSSALVDS VCCSM32 AJ25
+1.5VS_DLVDS AF27
VCCSM33
VCCSM34 AC29
G13 VCCDLVDS0 VCCSM35 AF29
B14 VCCDLVDS1 VCCSM36 AG29
J13 +2.5V
VCCDLVDS2
B15 VCCDLVDS3
1.9A
B +2.5V_TXLVDS B
+2.5V_QSM
F9 VCCTXLVDS0 1
B10 VCCTXLVDS1 VCCQSM0 AJ6 2 2 2 2 2 2 2 2 2 2 2 2
D10 AJ8 + C434 C411 C412 C400 C406 C418 C417 C416 C431 C430 C432 C433
VCCTXLVDS2 VCCQSM1 +1.35VS_ASM C428
A12 VCCTXLVDS3
+3VS_GPIO 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2
150U_D2_6.3VM 1 1
0.1U_0402_16V4Z 1 1
0.1U_0402_16V4Z 1 1
0.1U_0402_16V4Z 1 1
0.1U_0402_16V4Z 1 1
0.1U_0402_16V4Z 1 1
0.1U_0402_16V4Z
VCCASM0 AD1
A3 VCCGPIO_0 VCCASM1 AF1
A4 VCCGPIO_1

RG82G4350M_uFCBGA732

+2.5V +2.5V_QSM +2.5V +1.35VS_ASM +1.35VS


+3VS_GPIO +3VS +2.5V_TXLVDS L19
R208 1 2 1 2
1 2 90mA 1 2
0_0805_5% R202 0_0805_5% 0_0805 L18
2 1 1 1 2 0_0805
1 2 1 2 2 2
C304 C313 C317 C439 C442 C435 C427 C426
C295 C294 C286 4.7U_1206_16V6K
10U_1206_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1
0.1U_0402_16V4Z 2 2
10U_0805_6.3V6M 2 0.1U_0402_16V4Z
1
2 1
0.1U_0402_16V4Z 2 22U_1206_10V4Z
1 1 1 R328 1 2 1_0603_1% 10U_0805_6.3V6M
0.1U_0402_16V4Z

A A

Compal Electronics, Inc.


Title
MONTARA-GM-POWER(4/4)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 9 of 43
5 4 3 2 1
5 4 3 2 1

RP67 RP74
DDR_SDQ5 1 8 DDR_DQ5 DDR_CB5 1 8 DDR_F_CB5
DDR_SDQ0 2 7 DDR_DQ0 DDR_SDM8 2 7 DDR_DM8
DDR_SDQ4 3 6 DDR_DQ4 DDR_CB6 3 6 DDR_F_CB6
DDR_SDQ1 4 5 DDR_DQ1 DDR_CB3 4 5 DDR_F_CB3
+2.5V +2.5V
10_8P4R_1206_5% 10_8P4R_1206_5%
+1.25VS_SDREF_R
RP79 RP73 JP25
DDR_SDQS0 1 8 DDR_DQS0 DDR_SDQ32 1 8 DDR_DQ32 1 2 1 2
DDR_SDQ3 DDR_DQ3 DDR_SDQS4 DDR_DQS4 VREF VREF R408 +SDREF
2 7 2 7 3 VSS VSS 4 1
DDR_SDQ2 3 6 DDR_DQ2 DDR_SDQ33 3 6 DDR_DQ33 DDR_DQ5 5 6 DDR_DQ4 0_0805_5%
DDR_SDQ7 DDR_DQ7 DDR_SDQ36 DDR_DQ36 DDR_DQ0 DQ0 DQ4 DDR_DQ1 C495
4 5 4 5 7 DQ1 DQ5 8
9 10 0.1U_0402_16V4Z
10_8P4R_1206_5% 10_8P4R_1206_5% DDR_DQS0 VDD VDD DDR_DM0 2
11 DQS0 DM0 12
D DDR_DQ6 DDR_DQ3 D
13 DQ2 DQ6 14
RP66 RP61 15 16
DDR_SDQ6 DDR_DQ6 DDR_SDQ38 DDR_DQ38 DDR_DQ2 VSS VSS DDR_DQ7
1 8 1 8 17 DQ3 DQ7 18
DDR_SDM0 2 7 DDR_DM0 DDR_SDQ37 2 7 DDR_DQ37 DDR_DQ13 19 20 DDR_DQ12
DDR_SDQ13 DDR_DQ13 DDR_SDQ34 DDR_DQ34 DQ8 DQ12
3 6 3 6 21 VDD VDD 22
DDR_SDQ12 4 5 DDR_DQ12 DDR_SDM4 4 5 DDR_DM4 DDR_DQ9 23 24 DDR_DQ8 DDR_SDQ[0..63]
DQ9 DQ13 DDR_SDQ[0..63] 8
DDR_DQS1 25 26 DDR_DM1
10_8P4R_1206_5% 10_8P4R_1206_5% DQS1 DM1 DDR_DQ[0..63]
27 VSS VSS 28 DDR_DQ[0..63] 11
DDR_DQ15 29 30 DDR_DQ10
RP78 RP72 DDR_DQ14 DQ10 DQ14 DDR_DQ11
31 DQ11 DQ15 32
DDR_SDQ9 1 8 DDR_DQ9 DDR_SDQ35 1 8 DDR_DQ35 33 34
DDR_SDQS1 DDR_DQS1 DDR_SDQ39 DDR_DQ39 VDD VDD DDR_DQS[0..8]
2 7 2 7 8 DDR_CLK0 35 CK0 VDD 36 DDR_DQS[0..8] 11
DDR_SDQ8 3 6 DDR_DQ8 DDR_SDQ44 3 6 DDR_DQ44 37 38
DDR_SDM1 DDR_DM1 DDR_SDQ45 DDR_DQ45 8 DDR_CLK0# CK0# VSS DDR_SDQS[0..8]
4 5 4 5 39 VSS VSS 40 DDR_SDQS[0..8] 8
10_8P4R_1206_5% 10_8P4R_1206_5%
DDR_DQ17 41 42 DDR_DQ20 DDR_CB[0..7]
DQ16 DQ20 DDR_CB[0..7] 8
RP65 RP60 DDR_DQ21 43 44 DDR_DQ16
DDR_SDQ15 DDR_DQ15 DDR_SDQ40 DDR_DQ40 DQ17 DQ21 DDR_F_CB[0..7]
1 8 1 8 45 VDD VDD 46 DDR_F_CB[0..7] 11
DDR_SDQ14 2 7 DDR_DQ14 DDR_SDQ41 2 7 DDR_DQ41 DDR_DQS2 47 48 DDR_DM2
DDR_SDQ10 DDR_DQ10 DDR_SDQS5 DDR_DQS5 DDR_DQ18 DQS2 DM2 DDR_DQ19
3 6 3 6 49 DQ18 DQ22 50
DDR_SDQ11 4 5 DDR_DQ11 DDR_SDM5 4 5 DDR_DM5 51 52 DDR_F_SMA[6..12]
VSS VSS DDR_F_SMA[6..12] 11
DDR_DQ22 53 54 DDR_DQ23
10_8P4R_1206_5% 10_8P4R_1206_5% DDR_DQ25 DQ19 DQ23 DDR_DQ24 DDR_SMA[6..12]
55 DQ24 DQ28 56 DDR_SMA[6..12] 8
57 VDD VDD 58
RP77 RP71 DDR_DQ29 59 60 DDR_DQ28
DDR_SDQ20 DDR_DQ20 DDR_SDQ46 DDR_DQ46 DDR_DQS3 DQ25 DQ29 DDR_DM3
1 8 1 8 61 DQS3 DM3 62
DDR_SDQ16 2 7 DDR_DQ16 DDR_SDQ43 2 7 DDR_DQ43 63 64 DDR_DM[0..8]
VSS VSS DDR_DM[0..8] 11
DDR_SDQ17 3 6 DDR_DQ17 DDR_SDQ47 3 6 DDR_DQ47 DDR_DQ30 65 66 DDR_DQ31
DDR_SDQS2 DDR_DQS2 DDR_SDQ42 DDR_DQ42 DDR_DQ26 DQ26 DQ30 DDR_DQ27 DDR_SDM[0..8]
4 5 4 5 67 DQ27 DQ31 68 DDR_SDM[0..8] 8
69 VDD VDD 70
10_8P4R_1206_5% 10_8P4R_1206_5% DDR_F_CB0 71 72 DDR_F_CB4
C DDR_F_CB1 CB0 CB4 DDR_F_CB5 C
73 CB1 CB5 74
RP64 RP59 75 76
DDR_SDQ21 DDR_DQ21 DDR_SDQ49 DDR_DQ49 DDR_DQS8 VSS VSS DDR_DM8
1 8 1 8 77 DQS8 DM8 78
DDR_SDM2 2 7 DDR_DM2 DDR_SDQ52 2 7 DDR_DQ52 DDR_F_CB2 79 80 DDR_F_CB6
DDR_SDQ18 DDR_DQ18 DDR_SDQ53 DDR_DQ53 CB2 CB6
3 6 3 6 81 VDD VDD 82
DDR_SDQ22 4 5 DDR_DQ22 DDR_SDQ48 4 5 DDR_DQ48 DDR_F_CB3 83 84 DDR_F_CB7
CB3 CB7
85 DU DU/RESET# 86
10_8P4R_1206_5% 10_8P4R_1206_5% 87 88
VSS VSS
8 DDR_CLK2 89 CK2 VSS 90
RP76 RP70 91 92
8 DDR_CLK2# CK2# VDD
DDR_SDQ19 1 8 DDR_DQ19 DDR_SDQS6 1 8 DDR_DQS6 93 94
DDR_SDQ23 DDR_DQ23 DDR_SDM6 DDR_DM6 DDR_CKE1 VDD VDD DDR_CKE0
2 7 2 7 8,11 DDR_CKE1 95 CKE1 CKE0 96 DDR_CKE0 8,11
DDR_SDQ24 3 6 DDR_DQ24 DDR_SDQ50 3 6 DDR_DQ50 97 98
DDR_SDQ28 DDR_DQ28 DDR_SDQ51 DDR_DQ51 DDR_SMA12 DU/A13 DU/BA2 DDR_SMA11
4 5 4 5 99 A12 A11 100
DDR_SMA9 101 102 DDR_SMA8
10_8P4R_1206_5% 10_8P4R_1206_5% A9 A8
103 VSS VSS 104
DDR_SMA7 105 106 DDR_SMA6
RP63 RP58 DDR_SMA5 A7 A6 DDR_SMA4
8,11 DDR_SMA5 107 A5 A4 108 DDR_SMA4 8,11
DDR_SDQ25 1 8 DDR_DQ25 DDR_SDQ55 1 8 DDR_DQ55 DDR_SMA3 109 110 DDR_SMA2
A3 A2 DDR_SMA2 8,11
DDR_SDQ29 2 7 DDR_DQ29 DDR_SDQ54 2 7 DDR_DQ54 DDR_SMA1 111 112 DDR_SMA0
8,11 DDR_SMA1 A1 A0
DDR_SDQS3 3 6 DDR_DQS3 DDR_SDQ61 3 6 DDR_DQ61 113 114
DDR_SDM3 DDR_DM3 DDR_SDQ57 DDR_DQ57 DDR_SMA10 VDD VDD DDR_SBS1
4 5 4 5 115 A10/AP BA1 116
DDR_SBS0 117 118 DDR_SRAS#
10_8P4R_1206_5% 10_8P4R_1206_5% DDR_SWE# BA0 RAS# DDR_SCAS#
119 WE# CAS# 120
DDR_SCS#0 121 122 DDR_SCS#1
8,11 DDR_SCS#0 S0# S1# DDR_SCS#1 8,11
RP75 RP69 123 124
DDR_SDQ30 DDR_DQ30 DDR_SDQ56 DDR_DQ56 DU DU
1 8 1 8 125 VSS VSS 126
DDR_SDQ26 2 7 DDR_DQ26 DDR_SDQ60 2 7 DDR_DQ60 DDR_DQ37 127 128 DDR_DQ32
DDR_SDQ31 DDR_DQ31 DDR_SDQS7 DDR_DQS7 DDR_DQ34 DQ32 DQ36 DDR_DQ33
3 6 3 6 129 DQ33 DQ37 130
DDR_SDQ27 4 5 DDR_DQ27 DDR_SDM7 4 5 DDR_DM7 131 132
DDR_DQS4 VDD VDD DDR_DM4
133 DQS4 DM4 134
10_8P4R_1206_5% 10_8P4R_1206_5% DDR_DQ35 135 136 DDR_DQ38
B DQ34 DQ38 B
137 VSS VSS 138
RP62 DDR_DQ36 139 140 DDR_DQ39
DDR_CB1 DDR_F_CB1 RP57 DDR_DQ41 DQ35 DQ39 DDR_DQ45
1 8 141 DQ40 DQ44 142
DDR_CB0 2 7 DDR_F_CB0 DDR_SDQ62 1 8 DDR_DQ62 143 144
DDR_CB4 DDR_F_CB4 DDR_SDQ63 DDR_DQ63 DDR_DQ40 VDD VDD DDR_DQ44
3 6 2 7 145 DQ41 DQ45 146
DDR_SDQS8 4 5 DDR_DQS8 DDR_SDQ58 3 6 DDR_DQ58 DDR_DQS5 147 148 DDR_DM5
DDR_SDQ59 DDR_DQ59 DQS5 DM5
4 5 149 VSS VSS 150
10_8P4R_1206_5% DDR_DQ46 151 152 DDR_DQ47
10_8P4R_1206_5% DDR_DQ43 DQ42 DQ46 DDR_DQ42
153 DQ43 DQ47 154
155 VDD VDD 156
RP68 157 158
VDD CK1# DDR_CLK1# 8
DDR_CB2 1 4 DDR_F_CB2 159 160
VSS CK1 DDR_CLK1 8
DDR_CB7 2 3 DDR_F_CB7 RP16 161 162
DDR_SCAS# DDR_F_SCAS# DDR_DQ48 VSS VSS DDR_DQ49
8 DDR_SCAS# 1 4 DDR_F_SCAS# 11 163 DQ48 DQ52 164
10_4P2R_0404_5% 8 DDR_SWE# DDR_SWE# 2 3 DDR_F_SWE# DDR_DQ53 165 166 DDR_DQ52
DDR_F_SWE# 11 DQ49 DQ53
167 VDD VDD 168
10_4P2R_0404_5% DDR_DQS6 169 170 DDR_DM6
RP15 DDR_DQ50 DQS6 DM6 DDR_DQ55
171 DQ50 DQ54 172
DDR_SMA6 1 4 DDR_F_SMA6 173 174
DDR_SMA7 DDR_F_SMA7 RP12 DDR_DQ51 VSS VSS DDR_DQ54
2 3 175 DQ51 DQ55 176
DDR_SRAS# 1 4 DDR_F_SRAS# DDR_DQ61 177 178 DDR_DQ56
8 DDR_SRAS# DDR_F_SRAS# 11 DQ56 DQ60
10_4P2R_0404_5% DDR_SBS1 2 3 DDR_F_SBS1 179 180
8 DDR_SBS1 DDR_F_SBS1 11 VDD VDD
DDR_DQ57 181 182 DDR_DQ60
10_4P2R_0404_5% DDR_DQS7 DQ57 DQ61 DDR_DM7
183 DQS7 DM7 184
RP14 185 186
DDR_SMA8 DDR_F_SMA8 RP11 DDR_DQ62 VSS VSS DDR_DQ58
1 4 187 DQ58 DQ62 188
DDR_SMA9 2 3 DDR_F_SMA9 DDR_SBS0 1 4 DDR_F_SBS0 DDR_DQ63 189 190 DDR_DQ59
8 DDR_SBS0 DDR_F_SBS0 11 DQ59 DQ63
DDR_SMA10 2 3 DDR_F_SMA10 191 192
10_4P2R_0404_5% VDD VDD
11,13,14 SMB_DATA 193 SDA SA0 194
10_4P2R_0404_5% 195 196
11,13,14 SMB_CLK SCL SA1
RP13 197 198
DDR_SMA11 DDR_F_SMA11 RP10 +3VS VDD_SPD SA2
1 4 199 VDD_ID DU 200
A DDR_SMA12 DDR_F_SMA12 DDR_SMA0 DDR_F_SMA0 A
2 3 8 DDR_SMA0 1 4 DDR_F_SMA0 11
DDR_SMA3 2 3 DDR_F_SMA3
8 DDR_SMA3 DDR_F_SMA3 11
10_4P2R_0404_5% AMP1376409_REVERSE
10_4P2R_0404_5%

DIMM0
Compal Electronics, Inc.
Title
DDR-SODIMM SLOT0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 10 of 43
5 4 3 2 1
A B C D E

+2.5V +2.5V
+1.25VS +1.25VS
+1.25VS_SDREF_R
JP26
RP17 RP27 RP86 1 2
DDR_DQ5 DDR_F_CB0 DDR_DQ54 VREF VREF
1 4 4 1 4 1 3 VSS VSS 4 1
DDR_DQ0 2 3 3 2 DDR_F_CB1 3 2 DDR_DQ56 DDR_DQ5 5 6 DDR_DQ4
DDR_DQ0 DQ0 DQ4 DDR_DQ1 C491
7 DQ1 DQ5 8
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% 9 10 0.1U_0402_16V4Z
DDR_DQS0 VDD VDD DDR_DM0 2
11 DQS0 DM0 12
RP110 RP104 RP44 DDR_DQ6 13 14 DDR_DQ3
DDR_DQ4 DDR_F_CB4 DDR_DQS7 DQ2 DQ6
1 4 4 1 4 1 15 VSS VSS 16
DDR_DQ1 2 3 3 2 DDR_F_CB5 3 2 DDR_DQ57 DDR_DQ2 17 18 DDR_DQ7
DDR_DQ13 DQ3 DQ7 DDR_DQ12
19 DQ8 DQ12 20
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% 21 22
1 DDR_DQ9 VDD VDD DDR_DQ8 1
23 DQ9 DQ13 24
RP18 RP28 RP85 DDR_DQS1 25 26 DDR_DM1 DDR_F_SMA[6..12]
DQS1 DM1 DDR_F_SMA[6..12] 10
DDR_DQ6 1 4 4 1 DDR_F_CB2 4 1 DDR_DQ60 27 28
DDR_DQS0 DDR_DQS8 DDR_DM7 DDR_DQ15 VSS VSS DDR_DQ10 DDR_DQ[0..63]
2 3 3 2 3 2 29 DQ10 DQ14 30 DDR_DQ[0..63] 10
DDR_DQ14 31 32 DDR_DQ11
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% DQ11 DQ15 DDR_DQS[0..8]
33 VDD VDD 34
35 36 DDR_DQS[0..8] 10
8 DDR_CLK3 CK0 VDD DDR_F_CB[0..7]
RP83 RP103 RP45 37 38
8 DDR_CLK3# CK0# VSS DDR_F_CB[0..7] 10
DDR_DM0 1 4 4 1 DDR_DM8 4 1 DDR_DQ63 39 40
DDR_DQ3 DDR_F_CB6 DDR_DQ62 VSS VSS
2 3 3 2 3 2
DDR_DM[0..8]
DDR_DM[0..8] 10
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% DDR_DQ17 41 42 DDR_DQ20
DDR_DQ21 DQ16 DQ20 DDR_DQ16
43 DQ17 DQ21 44
RP19 RP102 RP84 45 46
DDR_DQ2 DDR_F_CB7 DDR_DQ58 DDR_DQS2 VDD VDD DDR_DM2
1 4 4 1 4 1 47 DQS2 DM2 48
DDR_DQ13 2 3 3 2 DDR_F_CB3 3 2 DDR_DQ59 DDR_DQ18 49 50 DDR_DQ19
DQ18 DQ22
51 VSS VSS 52
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% DDR_DQ22 53 54 DDR_DQ23
DDR_DQ25 DQ19 DQ23 DDR_DQ24
55 DQ24 DQ28 56
RP82 RP37 RP100 57 58
DDR_DQ7 DDR_DQ35 DDR_CKE2 DDR_DQ29 VDD VDD DDR_DQ28
1 4 4 1 4 1 59 DQ25 DQ29 60
DDR_DQ12 2 3 3 2 DDR_DQS4 3 2 DDR_F_SMA7 DDR_DQS3 61 62 DDR_DM3
DQS3 DM3
63 VSS VSS 64
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% DDR_DQ30 65 66 DDR_DQ31
DDR_DQ26 DQ26 DQ30 DDR_DQ27
67 DQ27 DQ31 68
RP20 RP93 RP31 69 70
DDR_DQS1 DDR_DQ32 DDR_SMA4 DDR_F_CB0 VDD VDD DDR_F_CB4
1 4 4 1 4 1 DDR_SMA4 8,10 71 CB0 CB4 72
DDR_DQ9 2 3 3 2 DDR_DQ33 3 2 DDR_F_SMA3 DDR_F_CB1 73 74 DDR_F_CB5
CB1 CB5
75 VSS VSS 76
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% DDR_DQS8 77 78 DDR_DM8
DDR_F_CB2 DQS8 DM8 DDR_F_CB6
79 CB2 CB6 80
RP81 RP36 RP32 81 82
2 DDR_DQ8 DDR_DQ34 DDR_SMA5 DDR_F_CB3 VDD VDD DDR_F_CB7 2
1 4 4 1 4 1 DDR_SMA5 8,10 83 CB3 CB7 84
DDR_DM1 2 3 3 2 DDR_DQ37 3 2 DDR_SMA1 85 86
DDR_SMA1 8,10 DU DU/RESET#
87 VSS VSS 88
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% 89 90
8 DDR_CLK5 CK2 VSS
8 DDR_CLK5# 91 CK2# VDD 92
RP21 RP92 RP30 93 94
DDR_DQ14 DDR_DM4 DDR_SMA_B5 DDR_CKE3 VDD VDD DDR_CKE2
1 4 4 1 4 1 8 DDR_CKE3 95 CKE1 CKE0 96 DDR_CKE2 8
DDR_DQ15 2 3 3 2 DDR_DQ38 3 2 DDR_F_SMA9 97 98
DDR_F_SMA12 DU/A13 DU/BA2 DDR_F_SMA11
99 A12 A11 100
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% DDR_F_SMA9 101 102 DDR_F_SMA8
A9 A8
103 VSS VSS 104
RP80 RP38 RP29 DDR_F_SMA7 105 106 DDR_F_SMA6
DDR_DQ10 DDR_DQ41 DDR_CKE3 DDR_SMA_B5 A7 A6 DDR_SMA_B4
1 4 4 1 4 1 8 DDR_SMA_B5 107 A5 A4 108 DDR_SMA_B4 8
DDR_DQ11 2 3 3 2 DDR_DQ36 3 2 DDR_F_SMA12 DDR_F_SMA3 109 110 DDR_SMA_B2
10 DDR_F_SMA3 A3 A2 DDR_SMA_B2 8
DDR_SMA_B1 111 112 DDR_F_SMA0
8 DDR_SMA_B1 A1 A0 DDR_F_SMA0 10
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% 113 114
DDR_F_SMA10 VDD VDD DDR_F_SBS1
115 A10/AP BA1 116
RP22 RP91 RP99 DDR_F_SBS0 117 118 DDR_F_SRAS#
BA0 RAS# DDR_F_SRAS# 10
DDR_DQ21 1 4 4 1 DDR_DQ39 4 1 DDR_F_SMA11 DDR_F_SWE# 119 120 DDR_F_SCAS#
10 DDR_F_SWE# WE# CAS# DDR_F_SCAS# 10
DDR_DQ17 2 3 3 2 DDR_DQ45 3 2 DDR_F_SMA8 DDR_SCS#2 121 122 DDR_SCS#3
8 DDR_SCS#2 S0# S1# DDR_SCS#3 8
123 DU DU 124
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% 125 126
DDR_DQ37 VSS VSS DDR_DQ32
127 DQ32 DQ36 128
RP109 RP39 RP97 DDR_DQ34 129 130 DDR_DQ33
DDR_DQ20 DDR_DQS5 DDR_SMA_B2 DQ33 DQ37
1 4 4 1 4 1 131 VDD VDD 132
DDR_DQ16 2 3 3 2 DDR_DQ40 3 2 DDR_F_SMA0 DDR_DQS4 133 134 DDR_DM4
DDR_DQ35 DQS4 DM4 DDR_DQ38
135 DQ34 DQ38 136
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% 137 138
DDR_DQ36 VSS VSS DDR_DQ39
139 DQ35 DQ39 140
RP23 RP90 RP98 DDR_DQ41 141 142 DDR_DQ45
DDR_DQ18 DDR_DQ44 DDR_F_SMA6 DQ40 DQ44
1 4 4 1 4 1 143 VDD VDD 144
DDR_DQS2 2 3 3 2 DDR_DM5 3 2 DDR_SMA_B4 DDR_DQ40 145 146 DDR_DQ44
3 DDR_DQS5 DQ41 DQ45 DDR_DM5 3
147 DQS5 DM5 148
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% 149 150
DDR_DQ46 VSS VSS DDR_DQ47
151 DQ42 DQ46 152
RP108 RP40 RP95 DDR_DQ43 153 154 DDR_DQ42
DDR_DM2 DDR_DQ46 DDR_F_SCAS# DQ43 DQ47
1 4 4 1 4 1 155 VDD VDD 156
DDR_DQ19 2 3 3 2 DDR_DQ43 3 2 DDR_SCS#3 157 158
VDD CK1# DDR_CLK4# 8
159 VSS CK1 160 DDR_CLK4 8
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% 161 162
DDR_DQ48 VSS VSS DDR_DQ49
163 DQ48 DQ52 164
RP24 RP89 RP35 DDR_DQ53 165 166 DDR_DQ52
DDR_DQ25 DDR_DQ47 DDR_SCS#2 DQ49 DQ53
1 4 4 1 4 1 167 VDD VDD 168
DDR_DQ22 2 3 3 2 DDR_DQ42 3 2 DDR_F_SWE# DDR_DQS6 169 170 DDR_DM6
DDR_DQ50 DQS6 DM6 DDR_DQ55
171 DQ50 DQ54 172
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% 173 174
DDR_DQ51 VSS VSS DDR_DQ54
175 DQ51 DQ55 176
RP107 RP41 RP33 DDR_DQ61 177 178 DDR_DQ56
DDR_DQ23 DDR_DQ53 DDR_SCS#0 DQ56 DQ60
1 4 4 1 4 1 DDR_SCS#0 8,10 179 VDD VDD 180
DDR_DQ24 2 3 3 2 DDR_DQ48 3 2 DDR_SMA2 DDR_DQ57 181 182 DDR_DQ60
DDR_SMA2 8,10 DQ57 DQ61
DDR_DQS7 183 184 DDR_DM7
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% DQS7 DM7
185 VSS VSS 186
DDR_DQ62 187 188 DDR_DQ58
RP25 RP88 RP34 DDR_DQ63 DQ58 DQ62 DDR_DQ59
189 DQ59 DQ63 190
DDR_DQS3 1 4 4 1 DDR_DQ49 4 1 DDR_F_SBS0 191 192
DDR_F_SBS0 10 VDD VDD
DDR_DQ29 2 3 3 2 DDR_DQ52 3 2 DDR_F_SMA10 193 194
10,13,14 SMB_DATA SDA SA0 +3VS
10,13,14 SMB_CLK 195 SCL SA1 196
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5% 197 198
+3VS VDD_SPD SA2
199 VDD_ID DU 200
RP106 RP42 RP94
DDR_DQ28 1 4 4 1 DDR_DQ50 4 1 DDR_SMA_B1
DDR_DM3 2 3 3 2 DDR_DQS6 3 2 DDR_SCS#1 AMP1376408_STANDARD
DDR_SCS#1 8,10
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5%
4 DIMM1 4
RP26 RP87 RP101
DDR_DQ26 1 4 4 1 DDR_DM6 4 1 DDR_CKE0
DDR_CKE0 8,10
DDR_DQ30 2 3 3 2 DDR_DQ55 3 2 DDR_CKE1
DDR_CKE1 8,10
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5%

RP105 RP43 RP96


DDR_DQ31 1 4 4 1 DDR_DQ61 4 1 DDR_F_SBS1
DDR_F_SBS1 10
Compal Electronics, Inc.
DDR_DQ27 2 3 3 2 DDR_DQ51 3 2 DDR_F_SRAS# Title
DDR-SODIMM SLOT1
56_4P2R_0404_5% 56_4P2R_0404_5% 56_4P2R_0404_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 11 of 43
A B C D E
A B C D E

Layout note :
Distribute as close as possible
to DDR-SODIMM.

+2.5V

1 1 1 1 1 1 1 1 1 1 1
1 C146 C145 C169 C142 C160 C140 C151 C165 C141 C147 C144 1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2 2 2

+2.5V +2.5V

1 1 1 1 1 1 1 1
C143 C162 C150 C161 C166 C167 + +
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C163 C164
2 2 2 2 2 2 150U_D2_6.3VM 150U_D2_6.3VM
2 2

Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25V

2 2
+1.25VS

1 1 1 1 1 1 1 1 1 1
C569 C568 C567 C184 C565 C183 C566 C182 C180 C181
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2 2

+1.25VS

1 1 1 1 1 1 1 1 1 1
C185 C563 C564 C186 C187 C192 C189 C562 C193 C561
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2 2

+1.25VS

1 1 1 1 1 1 1 1 1 1
C560 C559 C558 C553 C556 C552 C551 C550 C542 C549
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
3 2 2 2 2 2 2 2 2 2 2 3

+1.25VS

1 1 1 1 1 1 1 1 1 1
C548 C547 C202 C544 C195 C545 C199 C203 C557 C188
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2 2

+1.25VS

1 1 1 1 1 1 1 1 1 1
C554 C546 C555 C191 C201 C200 C190 C197 C196 C198
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2 2

+1.25VS

4 4
1 1 1 1
C205 C194 C543 C204
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2

Compal Electronics, Inc.


Title
DDR SODIMM Decoupling
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 12 of 43
A B C D E
A B C D E F G H

ICS950810 Frequency Select Table Clock Generator


SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2]
0 0 0 166.67 166.67
0 0 1 100.00 100.00
0 1 0 200.00 200.00
0 1 1 133.33 133.33 +3VS +3V_CLK
L14
0_0805
1 2 Width=40 mils 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 L12 1
CY28346-2 Frequency Select Table 0_0805 1 1 1 1 1 1 1 1 1
SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2] 1 2
C93 C101 C104 C106 C112 C113 C102 C97 C116
0 0 0 66.67 66.67 10U_1206_16V4Z
2 2 2 2 2 2 2 2 2
0 0 1 100.00 100.00 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

0 1 0 200.00 200.00
0 1 1 133.33 133.33

14
19
32
37
46
50
1
8
U16
C89

VDD_PCI_0
VDD_PCI_1
VDD_3V66_0
VDD_3V66_1

VDD_CPU_0
VDD_CPU_1
VDD_REF

VDD_48MHZ
@10P_0402_50V8K L13 +3VS
0_0805
+3VS +3VS 1 2 XTALIN 2 26 +3V_VDD 1 2
XTAL_IN VDDA

1
1 1

1
Y1

1
R68 C118 C121
@1K_0402_5% 10U_1206_16V4Z

2
14.31818MHZ_20P_6X1430004201 2 2
R69 1 2 XTALOUT 3 27

2
1K_0402_5% C96 XTAL_OUT VSSA 0.1U_0402_16V4Z
5 CLK_SEL#

2
@10P_0402_50V8K 45 CLK_BCLK 1 2
CPUCLKT2 CLK_CPU_BCLK 4
54 R88 R86
R67 11K_0402_5% SEL0 33_0402_5% 49.9_0402_1%
2 55 SEL1
1 2 1 2 40 SEL2 1 2
R70 @1K_0402_5% R98 1K_0402_5% 1 2
R90 R91
2 33_0402_5% 49.9_0402_1% 2
25 44 CLK_BCLK# 1 2
+3VS 15,29 SLP_S1# PWR_DWN# CPU_CLKC2 CLK_CPU_BCLK# 4
15 STP_PCI# 34 PCI_STOP#
53 49 CLK_MCH 1 2
15,40 STP_CPU# CPU_STOP# CPUCLKT1 CLK_MCH_BCLK 6
R82 R80
2

33_0402_5% 49.9_0402_1%
R367 1 2 1 2
10K_0402_5% +3VS R116 28 VTT_PWRGD# 1 2
10K_0402_5% R83 R84
1

D 33_0402_5% 49.9_0402_1%
1

1 2 2 Q16 48 CLK_MCH# 1 2
7,15,40 VGATE CPUCLKC1 CLK_MCH_BCLK# 6
R118 G 2N7002_SOT23 1 2 43
0_0402_5% +3VS R93 MULT0 CLK_ITP
S 52 1 2 CLK_CPU_ITP 4
3

10K_0402_5% CPUCLKT0 R72


+VCCP 1 2
R117 R71 49.9_0402_1%
@56_0402_5% 29 33_0402_5% 1 2
10,11,14 SMB_DATA SDATA
10,11,14 SMB_CLK 30 SCLK 1 2
R77 R78
33_0402_5% 49.9_0402_1%
51 CLK_ITP# 1 2
CPUCLKC0 CLK_CPU_ITP# 4
33 3V66_0
33_0402_5% R106 2 1 SSC_66M 35 24
7 CLK_SSC_66M 3V66_1/VCH_CLK 3V66_5

R97 23
3V66_4 MCH_66M
1 2 475_0402_1% 42 IREF 3V66_3 22 1 2 R107 33_0402_5% CLK_MCH_66M 7
21 ICH_66M 1 2 R105 33_0402_5%
3V66_2 CLK_ICH_66M 14

R103 1 2 33_0402_5% 39 7 PCI_ICH 1 2 R81 33_0402_5%


15 CLK_ICH_48M 48MHZ_USB PCICLK_F2 CLK_PCI_ICH 14
R102 1 2 33_0402_5% 6
25 SDCLK_48M PCICLK_F1
PCICLK_F0 5
3 3
R104 1 2 33_0402_5% 38
7 CLK_MCH_48M 48MHZ_DOT PCI_1394 R101 33_0402_5%
PCICLK6 18 1 2 CLK_PCI_1394 23
17 PCI_SD 1 2 R100 33_0402_5%
PCICLK5 CLK_PCI_SD 25
R66 16 PCI_LAN 1 2 R96 33_0402_5%
PCICLK4 CLK_PCI_LAN 22
15 CLK_ICH_14M 1 2 33_0402_5% 56 REF PCICLK3 13 PCI_PCM 1 2 R95 33_0402_5%
CLK_PCI_PCM 20
1 2 12 PCI_MINI 1 2 R92 33_0402_5%
27 CLK_14M_SIO PCICLK2 CLK_PCI_MINI 24
GND_3V66_0
GND_3V66_1
GND_48MHZ

R65 11 PCI_SIO 1 2 R89 33_0402_5%


GND_PCI_0
GND_PCI_1

PCICLK1 CLK_PCI_SIO 27
GND_IREF
GND_CPU
33_0402_5% PCI_LPC R85 33_0402_5%
GND_REF

PCICLK0 10 1 2 CLK_PCI_LPC 29
1 1

1 1 1
ICS950810CG_TSSOP56 C108 C109
4
9
15
20
31
36
41
47

C110 C107 C85 @10P_0402_50V8K 2 2 @10P_0402_50V8K

2
@10P_0402_50V8K 2 2
@10P_0402_50V8K
@10P_0402_50V8K

4 4

Compal Electronics, Inc.


Title
Clock Generator
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 13 of 43
A B C D E F G H
A B C D

U20A
CLK_PCI_ICH
ICH4

1
PCI_AD0 H5 W6 INTRUDER#
R347 PCI_AD[0..31] PCI_AD1 AD0 INTRUDER# SMLINK0
20,22,23,24 PCI_AD[0..31] J3 AD1 SMLINK0 AC3
10_0402_5% PCI_AD2 H3 AB1 SMLINK1
PCI_AD3 AD2 SMLINK1 SMB_CLK
PCI_AD4
K1
G5
AD3 SM I/F SMB_CLK AC4
AB4 SMB_DATA
SMB_CLK 10,11,13
SMB_DATA 10,11,13

2
PCI_AD5 AD4 SMB_DATA AC IN
1 J4 AD5 SMB_ALERT#/GPI11 AA5 ACIN 29,36
PCI_AD6 H4
C477 PCI_AD7 AD6
J5 AD7
1 18P_0402_50V8K PCI_AD8 K2 +3VS 1
2 PCI_AD9 AD8
G2 AD9 A20GATE Y22 GATEA20 29
PCI_AD10 L1 AB23
AD10 A20M# H_A20M# 4
PCI_AD11 G4 U23 SMB_CLK 1 2
AD11 DPSLP# H_DPSLP# 4,7
PCI_AD12 L2 AA21 R380 H_FERR# R394
AD12 FERR# H_FERR# 4
CLK_ICH_66M PCI_AD13 H2 W21 56_0402_5% 10K_0402_5%
AD13 IGNNE# H_IGNNE# 4
PCI_AD14 L3 V22 SMB_DATA 1 2
AD14 INIT# H_INIT# 4
1

PCI_AD15 R386
R359 PCI_AD16
F5
F4
AD15 CPU I/F INTR AB22
V21
H_INTR 4
10K_0402_5% +3VS
AD16 NMI H_NMI 4
@22_0402_5% PCI_AD17 N1 Y23
AD17 CPU_PWRGOOD H_PW RGD 4
PCI_AD18 E5 U22 SIDERST# 1 2
AD18 RCIN# RC# 29
PCI_AD19 N2 U21 R320
H_CPUSLP# 4
2

PCI_AD20 AD19 SLP# @8.2K_0402_5%


1 E3 AD20 SMI# W23 H_SMI# 4
PCI_AD21 N3 V23 IRQ14 1 2
AD21 STPCLK# H_STPCLK# 4
C479 PCI_AD22 E4 R385
@10P_0402_50V8K PCI_AD23 AD22 8.2K_0402_5%
M5 AD23
2 PCI_AD24 IRQ15
E2 AD24 1 2
PCI_AD25 P1 L19 HUB_PD0 R378
PCI_AD26 AD25 HI0 HUB_PD1 HUB_PD[0..10] 8.2K_0402_5%
E1 AD26 HI1 L20 HUB_PD[0..10] 6
PCI_AD27 P2 M19 HUB_PD2 RP7
PCI_AD28 AD27 HI2 HUB_PD3 PCI_PIRQE#
D3 AD28 HI3 M21 1 8
PCI_AD29 R1 P19 HUB_PD4 PCI_PIRQF# 2 7
PCI_AD30 AD29 HI4 HUB_PD5 PCI_PIRQG#
D2 AD30 HI5 R19 3 6
PCI_AD31 P4 T20 HUB_PD6 PCI_PIRQH# 4 5

PCI I/F
AD31 HI6 HUB_PD7
HI7 R20
P23 HUB_PD8 100K_8P4R_1206_5%
PCI_C/BE#0 HI8 HUB_PD9
20,22,23,24 PCI_C/BE#0 J2 C/BE#0 HI9 L22
+3VS PCI_C/BE#1 HUB_PD10 R340
RP6
20,22,23,24 PCI_C/BE#1
PCI_C/BE#2
K4
M4
C/BE#1 HUB I/F HI10 N22
K21 1 2 56_0402_5% +1.5VS
20,22,23,24 PCI_C/BE#2 C/BE#2 HI11
2 1 8 PCI_REQ#0 PCI_C/BE#3 N4 2
20,22,23,24 PCI_C/BE#3 C/BE#3
2 7 PCI_REQ#1 T21 CLK_ICH_66M HUB_RCOMP_ICH 1 2
CLK66 CLK_ICH_66M 13
3 6 PCI_REQ#2 PCI_REQ#0 B1 R350
23 PCI_REQ#0 REQ#0
4 5 PCI_REQ#3 PCI_REQ#1 A2 P21 48.7_0603_1%
24 PCI_REQ#1 REQ#1 HI_STB HUB_PSTRB 6
PCI_REQ#2 B3 N20
20 PCI_REQ#2 REQ#2 HI_STB# HUB_PSTRB# 6
8.2K_8P4R_1206_5% PCI_REQ#3 C7
22 PCI_REQ#3 REQ#3
PCI_REQ#4 B6 R23 HUB_RCOMP_ICH
24 PCI_REQ#4 REQ#4 HICOMP
M23 HUB_VREF HUB_VREF 1 2
HUB_VREF HUB_VREF
PCI_GNT#0 C1 R22 HUB_VSWING C470 0.01U_0402_16V7K
23 PCI_GNT#0 GNT#0 HUB_VSWING HUB_VSWING
PCI_GNT#1 E6 HUB_VSWING 1 2
24 PCI_GNT#1 GNT#1
1 2 PIDERST# PCI_GNT#2 A7 C478 0.01U_0402_16V7K
20 PCI_GNT#2 GNT#2
R329 PCI_GNT#3 B7 J19 APICCLK Place close to ball M23, R22
22 PCI_GNT#3 GNT#3 APICCLK
@1K_0402_5% PCI_GNT#4 D6 H19 APICD0
24 PCI_GNT#4 GNT#4 APICD0
K20 APICD1
APICD1

Interrupt I/F
CLK_PCI_ICH P5 D5 PCI_PIRQA#
13 CLK_PCI_ICH PCICLK PIRQA# PCI_PIRQA# 20
C2 PCI_PIRQB#
PCI_FRAME# PIRQB# PCI_PIRQC#
20,22,23,24 PCI_FRAME# F1 FRAME# PIRQC# B4
PCI_DEVSEL# M3 A3 PCI_PIRQD#
20,22,23,24 PCI_DEVSEL# DEVSEL# PIRQD#
P CI_IRDY# L5 C8 PCI_PIRQE#
20,22,23,24 PCI_IRDY# IRDY# PIRQE#/GPI2 PCI_PIRQE# 23
G1 D7 PCI_PIRQF#
20,22,23,24 PCI_PAR PAR PIRQF#/GPI3 PCI_PIRQF# 22
PCI_PERR# L4 C3 PCI_PIRQG# +RTCVCC
20,22,23,24 PCI_PERR# PERR# PIRQG#/GPI4 PCI_PIRQG# 24
PCI_LOCK# M2 C4 PCI_PIRQH#
LOCK# PIRQH#/GPI5 PCI_PIRQH# 24
W2 AC13 IRQ14 INTRUDER# 1 2
PME# IRQ14 IRQ14 17
PCIRST# U5 AA19 IRQ15 R371
7,18,20,21,22,23,24,25,27 PCIRST# PCIRST# IRQ15 IRQ15 17
PCI_SERR# K5 J22 SIRQ 100K_0402_5%
20,22,24 PCI_SERR# SERR# SERIRQ SIRQ 20,25,27,29
PCI_STOP# F3
20,22,23,24 PCI_STOP# STOP#
PCI_TRDY# F2
20,22,23,24 PCI_TRDY# TRDY#
EE_CS D10
PCI_REQA# B5 EEPROM I/F D11 +VCCP
3 PCI_REQB# REQA#/GPI0 EE_IN 3
A6 REQB#/GPI1/REQ5# EE_OUT A8 1 2
PIDERST# E8 C12 R313 H_FERR# 1 2
17 PIDERST# GNTA#/GPO16 EE_SHCLK
SIDERST# C5 @1K_0402_5% R373
17 SIDERST# GNTB#/GPO17/GNT5# 56_0402_5%
PCI Pullups LAN_RXD0 A10
LAN_RXD1 A9
LAN_RXD2 A11
LAN_TXD0 B10
C10 +3VALW
RP8 LAN I/F LAN_TXD1
LAN_TXD2 A12
PCI_PERR# 1 10 C11 SMLINK0 1 2
+3VS LAN_CLK
PCI_REQA# 2 9 PCI_PIRQA# B11 R387
PCI_STOP# PCI_PIRQB# LAN_RSTSYNC 4.7K_0402_5%
3 8 LAN_RST# Y5 1 2
PCI_SERR# 4 7 PCI_REQ#4 R375 APICCLK SMLINK1 1 2
5 6 PCI_REQB# 10K_0402_5% APICD0 R382
+3VS
APICD1 4.7K_0402_5%
8.2K_10P8R_1206_5% FW82801DBM_BGA421

2
R338
R341 R336 0_0402_5%
RP5 10K_0402_5% 10K_0402_5%
P CI_IRDY# 1 10 +3VS

1
PCI_TRDY# 2 9 PCI_PIRQC# U43C
PCI_DEVSEL# 3 8 PCI_PIRQD# SN74LVC125APWLE_TSSOP14
PCI_FRAME# 4 7 SIRQ
5 6 PCI_LOCK#
+3VS
PCIRST# 9 8 B_PCIRST# 17,29
OE#

8.2K_10P8R_1206_5% I O

4 4
10

+3V POWER

Compal Electronics, Inc.


Title
ICH4-M
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 14 of 43
A B C D
A B C D

D22

1 2 ATF_INT# 2 1
+3VS EC_THRM# 29
R366
+3VALW +3VS 10K_0402_5%
U20B RB751V_SOD323
R354
ICH4 10K_0402_5% C500 +3VALW

5
U22 AGP_BUSY# R2 R3 2 1 1U_0805_25V4Z
SLPS4# 7 AGP_BUSY# SYSRST# AGPBUSY# GPI7 EC_SMI#
1 Y3 V4 1 2

P
IN1 LLBATT# SYSRST# GPI8 SCI# EC_SMI# 29
O 4 SLP_S5# 29 29 LLBATT# AB2 BATLOW# GPI12 V5 SCI# 29

5
SLPS5# 2 T3 W3 EC_LID_OUT# U38
IN2 C3_STAT# GPI13 EC_LID_OUT# 29
G
PM_CLKRUN# AC2 GPIO V2 1 2 1

P
1 20,22,24,27,29 PM_CLKRUN# EC_FLASH# 30 1
SN74AHC1G08HDCK_TSSOP5 CLKRUN# GPIO25 +3VS R392 10K_0402_5% IN1 SYSRST#
40 PM_DPRSLPVR V20 W1 4
3
DPRSLPVR GPIO27 O
29 PWRBTN_OUT# AA1 PWRBTN# GPIO28 W4 USB_EN# 26 4 ITP_DBRESET# 2 IN2

G
31 SYS_PWROK AB6 PWROK
EC_RIOUT# Y1 SN74AHC1G08HDCK_TSSOP5

3
29 EC_RIOUT# RSMRST# RI#
29 RSMRST# AA6
W18
RSMRST# PM AA13 PDA0
13,29 SLP_S1# SLP_S1# PDA0 PDA0 17
Y4 AB13 PDA1
29 SLP_S3# SLP_S3# PDA1 PDA1 17
SLPS4# Y2 W13 PDA2 R465
SLP_S4# PDA2 PDA2 17
SLPS5# AA2 Y13 PDCS1# 1 2
SLP_S5# PDCS1# PDCS1# 17
W19 AB14 PDCS3#
13,40 STP_CPU# STP_CPU# PDCS3# PDCS3# 17
Y21 @0_0402_5%
13 STP_PCI# RTCCLK STP_PCI# PDDREQ
7 RTCCLK AA4 SUS_CLK PDDREQ AA11 PDDREQ 17
+3VS AB3 Y12 PDDACK# PDD[0..15]
SUS_STAT#/LPCPD# PDDACK# PDDACK# 17 PDD[0..15] 17
ATF_INT# V1 AC12 PDIOR#
THRM# PDIOR# PDIOR# 17 SDD[0..15]
W12 PDIOW#
PDIOW# PDIOW# 17 SDD[0..15] 17
1 2 V_GATE AB12 PDIORDY
PIORDY PDIORDY 17
R365
1K_0402_5% J21 AB11 PDD0 1 PDIORDY
2
SSMUXSEL PDD0 +3VS
CPUPERF# PDD1 R384
+VCCP 2 1 V_GATE
Y20
V19
CPUPERF# IST PDD1 AC11
Y10 PDD2 4.7K_0402_5%
7,13,40 VGATE R360 VGATE/VRMPWRGD PDD2 PDD3 SDIORDY
PDD3 AA10 +3VS 1 2
0_0402_5% PDD4 R393
1 2 CPUPERF# IAC_BITCLK B8
AC97 I/F PDD4 AA7
AB8 PDD5 4.7K_0402_5%
R374 28,32 IAC_BITCLK AC_BITCLK PDD5 PDD6
28,32 IAC_RST# C13 AC_RST# PDD6 Y8
8.2K_0402_5% IAC_SDATAI0 PDD7
32 IAC_SDATAI0 IAC_SDATAI1
D13
A13
AC_SDATAIN0 IDE I/F PDD7 AA8
AB9 PDD8
28 IAC_SDATAI1 AC_SDATAIN1 PDD8 MAINPWON 36,38,39
+3VS B13 Y9 PDD9
ICH_AC_SDOUT AC_SDATAIN2 PDD9 PDD10 R397
D9 AC_SDATAOUT PDD10 AC9

1
2 ICH_AC_SYNC C9 W9 PDD11 @330_0402_5% C 2
PM_CLKRUN# AC_SYNC PDD11 PDD12 Q45
2 1 PDD12 AB10 +VCCP 1 2 2
R395 W10 PDD13 B @2SC2411K_SOT23
10K_0402_5% LPC_AD0 PDD13 PDD14 E
T2 W11 1 2

3
25,27,29 LPC_AD0 LPC_AD1 LPC_AD0 PDD14 PDD15
25,27,29 LPC_AD1 R4 LPC_AD1 PDD15 Y11
+3VS LPC_AD2 T4 C492
25,27,29 LPC_AD2 LPC_AD3 LPC_AD2 SDA0 @1U_0805_10V6F
25,27,29 LPC_AD3 LPC_DRQ#0
U2
U3
LPC_AD3 LPC I/F SDA0 AA20
AC20 SDA1
SDA0 17
1 2 2 1 THERTRIP#
29 LPC_DRQ#0 LPC_DRQ#0 SDA1 SDA1 17 +VCCP
1 2 SPKR LPC_DRQ#1 U4 AC21 SDA2 R370 R369
27 LPC_DRQ#1 LPC_DRQ#1 SDA2 SDA2 17
R335 LPC_FRAME# T5 AB21 SDCS1# 56_0402_5% 56_0402_5%
25,27,29 LPC_FRAME# LPC_FRAME# SDCS1# SDCS1# 17
@1K_0402_5% AC22 SDCS3#
SDCS3# SDCS3# 17
+3VS THERMTRIP#
4 THERMTRIP#
AB18 SDDREQ
SDDREQ SDDREQ 17
C20 AB19 SDDACK#
26 USBP0+ USBP0+ SDDACK# SDDACK# 17
2 1 ICH_AC_SDOUT D20 Y18 SDIOR#
26 USBP0- USBP0- SDIOR# SDIOR# 17
R326 A21 AA18 SDIOW#
USBP1+ SDIOW# SDIOW# 17
@10K_0402_5% B21 AC19 SDIORDY CLK_ICH_48M
+3VS USBP1- SIORDY SDIORDY 17
C18 CLK_ICH_14M
26 USBP2+ USBP2+

1
D18 W17 SDD0
26 USBP2- USBP2- SDD0

1
A19 AB17 SDD1 R330
28 USBP3+ USBP3+ SDD1
2 1 AGP_BUSY# 28 USBP3- B19 USBP3- SDD2 W16 SDD2 R337 @22_0402_5%
R355 C16 AC16 SDD3 @22_0402_5%
10K_0402_5% USBP4+ SDD3 SDD4
D16 W15

2
USBP4- SDD4 SDD5
26 USBP5+ A17 AB15 1

2
USBP5+ SDD5 SDD6
26 USBP5- B17 USBP5- USB I/F SDD6 W14
AA14 SDD7
1
C460
SDD7 SDD8 C463 @10P_0402_50V8K
SDD8 Y14
SDD9 @10P_0402_50V8K 2
26 OVCUR#0 B15 OC#0 SDD9 AC15
OVCUR#1 SDD10 2
C14 OC#1 SDD10 AA15
3 RP4 SDD11 3
26 OVCUR#2 A15 OC#2 SDD11 Y15
OVCUR#3 1 10 OVCUR#3 B14 AB16 SDD12
+3VALW OC#3 SDD12
OVCUR#4 2 9 OVCUR#4 A14 Y16 SDD13 +RTCVCC
OVCUR#1 EC_LID_OUT# OC#4 SDD13 SDD14
3 8 26 OVCUR#5 D14 OC#5 SDD14 AA17
4 7 LLBATT# Y17 SDD15
SCI# USB_RBIAS SDD15
+3VALW 5 6 A23 USB_RBIAS
B23 USB_RBIAS# 1 2
10K_10P8R_1206_5% 1 R362
2

J23 CLK_ICH_14M 180K_0402_5%


CLK14 CLK_ICH_14M 13
R317 F19 CLK_ICH_48M 2 1 1 2 C484
CLK48 CLK_ICH_48M 13
22.6_0402_1% J20 R377 0.1U_0402_16V4Z
GPIO32 RTC_RST# J1 0_0402_5% 2
17 SIDEPWR G22 GPIO33 RTCRST# W7
2 1 RSMRST# F20 JOPEN
1

GPIO34
* R379 G20 GPIO35 CLOCK VBIAS Y6 VBIAS 1 2R_VBIAS 1 2
100K_0402_5% F21 R128
IAC_BITCLK GPIO36 RTCX1 C139 1K_0402_5%
2 1 H20 GPIO37 RTCX1 AC7
R321 F23 10M_0603_5% 0.047U_0603_16V7K
@10K_0402_5% GPIO38 RTCX2
2 1 RTCCLK
H22
G23
GPIO39 GPIO RTCX2 AC6 1
R127
2

R381 GPIO40
H21 GPIO41
@10K_0402_5% F22 H23 SPKR 32.768KHZ_12.5P_1TJS125DJ2A073
GPIO42 SPKR SPKR 33
E23 GPIO43 1 2 2 1
THERTRIP# R135 R134
MISC THRMTRIP# W20

2
10M_0603_5% @22M_0603_5%
X2 R131

NC

NC
@2.4M_0603_1%
FW82801DBM_BGA421

OUT

1
R318

IN
4 4
33_0402_5%
1 2 ICH_AC_SYNC
28,32 IAC_SYNC
4

1
1 2 ICH_AC_SDOUT C135 1 1
28,32 IAC_SDATAO
1 1 R319 12P_0402_50V8J
33_0402_5% C134
C444 12P_0402_50V8J Compal Electronics, Inc.
C440 @22P_0402_50V8J 2 2 Title
@22P_0402_50V8J 2 2
ICH4-M
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 15 of 43
A B C D
A B C D E F G H

U20C +3VS

D22 VSS0
ICH4 VCC3.3_0 A5
E10 VSS1 VCC3.3_1 AC17
E14 VSS2 VCC3.3_2 AC8
E16 VSS3 VCC3.3_3 B2
E17 VSS4 VCC3.3_4 H18
E18 VSS5 VCC3.3_5 H6
E19 VSS6 VCC3.3_6 J1
E21 VSS7 VCC3.3_7 J18
1 E22 VSS8 VCC3.3_8 K6 1
F8 M10 +3VS +1.5VALW +3VS
VSS9 VCC3.3_9
G19 VSS10 VCC3.3_10 P12
G21 P6 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VSS11 VCC3.3_11
G3 VSS12 VCC3.3_12 U1 1 1 1 1 1 1 1 1 1 1 1 1
G6 VSS13 VCC3.3_13 V10
H1 V16 C486 C462 C471 C488 C499 C464 C482 C449 C448 C457 C447 C456
VSS14 VCC3.3_14 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
J6 VSS15 VCC3.3_15 V18
+3VALW 2 2 2 2 2 2 2 2 2 2 2 2
K11 VSS16
K13 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VSS17
K19 VSS18 VCCSUS3.3_0 E11
K23 VSS19 VCCSUS3.3_1 F10
K3 F15 +1.5VS
VSS20 VCCSUS3.3_2 +1.5VS
L10 VSS21 VCCSUS3.3_3 F16
L11 F17 +1.5VS
VSS22 VCCSUS3.3_4
L12 VSS23 VCCSUS3.3_5 F18 1 1
L13 VSS24 VCCSUS3.3_6 K14 1 1
L14 V7 C467 C485 1 1
VSS25 VCCSUS3.3_7 0.1U_0402_16V4Z C481 C443
L21 VSS26 VCCSUS3.3_8 V8
2 2 C459 C458 0.01U_0402_16V7K
M1 VSS27 VCCSUS3.3_9 V9
0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2
M11 VSS28 +1.5VS 2 2 0.1U_0402_16V4Z
M12 VSS29 0.1U_0402_16V4Z
M13
M20
VSS30 GND POWER K10
VSS31 VCC1.5_0 +3VALW
M22 VSS32 VCC1.5_1 K12
N10 VSS33 VCC1.5_2 K18
N11 K22 0.1U_0402_16V4Z +1.5VS +VCCP
VSS34 VCC1.5_3
N12 VSS35 VCC1.5_4 P10 1 1 1
N13 VSS36 VCC1.5_5 T18
2 N14 U19 C454 C466 C455 1 1 1 1 2
VSS37 VCC1.5_6 0.1U_0402_16V4Z
N19 VSS38 VCC1.5_7 V14
+1.5VALW 2 2 2 C469 C480 C476 C490
N21 VSS39
N23 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VSS40 2 2 2 2
N5 VSS41 VCCSUS1.5_0 E12
P11 E13 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VSS42 VCCSUS1.5_1
P13 VSS43 VCCSUS1.5_2 E20
P20 VSS44 VCCSUS1.5_3 F14
P22 VSS45 VCCSUS1.5_4 G18
P3 VSS46 VCCSUS1.5_5 R6
R18 VSS47 VCCSUS1.5_6 T6
R21 VSS48 VCCSUS1.5_7 U6
R5 VSS49
T1 VSS50
T19 E7 VCC5REF
VSS51 VCC5REF1
T23 VSS52 VCC5REF2 V6
U20 VSS53
V15 E15 VCC5REFSUS
VSS54 VCC5REFSUS1 +1.5VS
V17 VSS55
V3 VSS56
W22 L23 +3VALW +5VALW +3VS +5VS
VSS57 VCCHI_0
W5 VSS58 VCCHI_1 M14
W8 VSS59 VCCHI_2 P18

1
Y19 VSS60 VCCHI_3 T22
Y7 +VCCP R332 R334
VSS61 D19 1K_0402_5% D20 1K_0402_5%
A16 VSS62
A18 AA23 1SS355_SOD323 1SS355_SOD323
VSS63 VCC_CPU_IO_0
A20 P14

2
VSS64 VCC_CPU_IO_1 VCC5REFSUS VCC5REF
A22 VSS65 VCC_CPU_IO_2 U18
3 3
A4 VSS66
AA12 VSS67 1 1
AA16 VSS68 VCCPLL C22 +1.5VS
AA22 C446 C450
VSS69 0.1U_0402_16V4Z 0.1U_0402_16V4Z
AA3 VSS70 2 2
AA9 VSS71 VCCRTC AB5 +RTCVCC
AB20 VSS72
AB7 VSS73
AC1 VSS74
AC10 VSS75 VCCLAN3.3_0 E9 +3VS
AC14 VSS76 VCCLAN3.3_1 F9
AC18 VSS77
AC23 VSS78
AC5 VSS79 VCCLAN1.5_0 F6 +1.5VS
B12 VSS80 VCCLAN1.5_1 F7
B16 +RTCVCC
VSS81
B18 VSS82
B20 VSS83
B22 VSS84
B9 VSS85
C15 C494
VSS86 0.1U_0402_16V4Z
C17 VSS87
C19 VSS88
C21 VSS89
C23 VSS90
C6 VSS91
D1 VSS92
D12 VSS93
4 D15 VSS94 4
D17 VSS95
D19 VSS96
D21 VSS97
D23 VSS98
D4 VSS99
D8
A1
VSS100
VSS101
Compal Electronics, Inc.
Title
ICH4-M
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FW82801DBM_BGA421 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 16 of 43
A B C D E F G H
A B C D E

R463
2 1

0_0402_5% +5VS

HDD Connector

5
1

P
14 PIDERST# A
4 PIDE_RESET#
PDD[0..15] B_PCIRST# Y
15 PDD[0..15] 14,29 B_PCIRST# 2 B

G
1 U23 1

3
@TC7SH08FU_SSOP5
JP16
PIDE_RESET#
PDD7 1 2 PDD8
PDD6 3 4 PDD9
PDD5 5 6 PDD10 R464
PDD4 7 8 PDD11 0_0402_5%
PDD3 9 10 PDD12
11 12 2 1
PDD2 PDD13
PDD1 13 14 PDD14
PDD0 15 16 PDD15 +5VS
17 18
PDDREQ 19 20
15 PDDREQ 21 22 R142
15 PDIOW# 23 24

5
475_0402_1%
15 PDIOR# 25 26
PDIORDY PCSEL 1 2 1

P
15 PDIORDY 27 28 14 SIDERST# A
4 SIDE_RESET#
15 PDDACK# 29 30 Y
R144 B_PCIRST# 2
14 IRQ14 31 32 B

G
1 2 @10K_0402_5%
15 PDA1 33 34 U24
15 PDA0 PDA2 15

3
35 36 @TC7SH08FU_SSOP5
15 PDCS1# 37 38 PDCS3# 15
PHDD_LED# Placea caps. near HDD
29 PHDD_LED# 39 40
41 42 +5VS
+5VS CONN.
R143 43 44 +5VS
+5VS 1 2
100K_0402_5% SUYIN_20002IFR044G204GL

2 1 1 2
1 1 1
C207 C208
10U_1206_16V4Z 10U_1206_16V4Z C209 C211
C210 2 2 1U_0805_25V4Z 0.1U_0402_16V4Z
1000P_0402_50V7K 2 2 2

Q21
SI3456DV-T1_TSOP6
+5VALW +5VMOD

D
6

S
5 4
CD-ROM Connector 2 1

1
1
C157 R132

G
4.7U_1206_16V6K 1K_0402_5%

3
SDD[0..15] 2
SDD[0..15] 15 +12VALW

2
2 1

1
R133 D
100K_0402_5% 2 EXTIDE_EN#
G
S Q19

3
1
D 2N7002_SOT23
1
+5VALW 2
JP17 R126 G C136
3 100K_0402_5% Q18 0.01U_0402_16V7K 3
32 INT_CD_L INT_CD_R 32 S

3
1 2 2
32 CD_AGND 3 4

1
SIDE_RESET# SDD8 D 2N7002_SOT23
SDD7 5 6 SDD9
7 8 15 SIDEPWR 2
SDD6 SDD10 G
SDD5 9 10 SDD11 S Q20

3
SDD4 11 12 SDD12 2N7002_SOT23
SDD3 13 14 SDD13
SDD2 15 16 SDD14
SDD1 17 18 SDD15
SDD0 19 20
21 22 SDDREQ 15 SI3456DV: N CHANNEL
23 24 SDIOR# 15 VGS: 4.5V, RDS: 65 mOHM
15 SDIOW# 25 26 Id(MAX): 5.1A
15 SDIORDY 27 28 SDDACK# 15
+5VS 2 R425 1 14 IRQ15 EXTID2 29
VGS,+-20V
100K_0402_5% 29 30 CBLIDB
15 SDA1 31 32 1 2 +5VMOD
R421
Placea caps. near CDROM
15 SDA0 33 34 SDA2 15 CONN.
100K_0402_5%
15 SDCS1# 35 36 W=80mils SDCS3# 15
SHDD_LED#
29 SHDD_LED# 37 38 +5VMOD
+5VMOD 39 40 +5VMOD
41 42
43 44
SEC_CSEL 45 46
2 1 47 48 1 1 1 1
R424
475_0402_1% 49 50 C148 C156 C158
FOXCONNQL11253-A606 C153 1U_0805_25V4Z 10U_1206_16V4Z
1000P_0402_50V7K 2 2 2 2
4 4
0.1U_0402_16V4Z

Compal Electronics, Inc.


Title
IDE/CD-ROM Module
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 17 of 43
A B C D E
A B C D E

for ABO without TV_out:all this page component unmount

21
22
24
25
27
28
30
31
TV Encoder 7 DVOC_D[0..11]
DVOC_D[0..11]
DVOC_D11 50
U30
9

NC
NC
NC
NC
NC
NC
NC
NC
DVOC_D10 D11 NC
51 D10
DVOC_D9 52 47
DVOC_D8 D9 BCO
53 D8
DVOC_D7 54 48
DVOC_D6 D7 C/H Sync
55 D6
1 DVOC_D5 58 36 R182 @75_0402_5% 1
DVOC_D4 D5 CVBS
59 D4
DVOC_D3 60 37 LUMA
DVOC_D2 D3 Y/G +3VS_7011_DVDD
61 D2
DVOC_D1 62 38 CRMA
DVOC_D0 D1 C/R/V R37
63 D0
39 COMPS +3VS
CVBS/B/U
7 DVOC_CLK# 56 XCLK*
7 DVOC_CLK 57 XCLK DVDD0 1 1 @0_0603_5%
12 C300 C297 C50
DVDD1 C40
2 NC DVDD2 49
@0.1U_0402_16V4Z @0.1U_0402_16V4Z
R183 @0_0603_5% 46 @0.1U_0402_16V4Z 2 @22U_1206_10V4Z
7 DVOBC_CLKINT Pout/DET# DGND0 6
DGND1 11
7 DVOC_HSYNC 4 H DGND2 64
5 +3VS_7011_AVDD
@2N7002_SOT23 7 DVOC_VSYNC V R33
DVDDV 45 +1.5VS
Q35 13 +3VS
7,14,20,21,22,23,24,25,27 PCIRST# RESET*
NC 23
S

3 1 14 29 1 @0_0603_5%
7 MI2CDATA SD NC
15 SC NC 20
@2N7002_SOT23 26 C277 C275 C38
GPIO1 NC @0.1U_0402_16V4Z
@0.1U_0402_16V4Z
G

7 32
2

+3VS GPIO1 NC 2 @22U_1206_10V4Z


S

3 1 GPIO0 8
7 MI2CCLK I2C Address = 1110110X GPIO0
R215 18
AVDD0 +3VS_7011_VDD
10 AS AVDD1 44
+3VS Q39 R228
G

16
2

@10K_0402_5% AGND0
35 ISET AGND1 17 +3VS
@10K_0402_5% With Wide & Short Trace 41 1 R177 @0_0603_5%
2 R212 AGND2 C243 2
19 NC VDD 33

XI/FIN
@1.5K_0603_5% R224 R180 34 @0.1U_0402_16V4Z C242
@140_0402_1% GND0

XO
3 VREF GND1 40
@330_0402_5% 2 @22U_1206_10V4Z
R205

42

43
@10K_0402_5%

@CH7011A-T F_TQFP64
+1.5VS
R207
Y2
@4.7K_0402_5% +3VS
1 2
R232
@10K_0402_1%
@14.31818MHZ_20P_6X1430004201

C244 C245
@22P_0402_50V8J @22P_0402_50V8J

R220
C299 @10K_0402_1%
@0.1U_0402_16V4Z

3 S-VEDIO CONN. 3
1

+3VS Pull High: Default PAL


D9 D10 D8 Pull Low: Default NTSC
@DAN217_SOT23 @DAN217_SOT23 @DAN217_SOT23
2

R52
@10K_0402_5%
+3VS

GPIO1 GPIO0

L5 JP4
LUMA 1 2
@FCM2012C-800_0805 1
L4 2 C70 R53
CRMA 3 @0.1U_0402_16V4Z @330_0402_5%
1 2 4
@@FCM2012C-800_0805
L6 5
COMPS 6
1 2 7
@FCM2012C-800_0805
@S CONN._SUYIN
1

R11 R12 R10 1 1 1 1 1 1


C14 C15 C13 C9 C10 C11
2

4 4
2 2 2 2 2 2

@75_0402_1% @75_0402_1% @82P_0402_50V8J @82P_0402_50V8J @82P_0402_50V8J @82P_0402_50V8J


@75_0402_1% @82P_0402_50V8J @82P_0402_50V8J
Compal Electronics, Inc.
Title
TV Encoder
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 星期四, 五月 06, 2004 Sheet 18 of 43
A B C D E
A B C D E

+12V +3VS
INVPWR_B+

LVDS Connector 2
0_0805
L9 1 B+
+LCDVDD R176
+5V C32
+3VS 100K_0402_5% 4.7U_0805_10V4Z

1
L8 1 D Q9
2
0_0805 R25 2
JP10 1 G SI2302DS_SOT23

1
PID0 100_0402_1% R24 S
PID0 27

3
INVPWR_B+ 1 2 PID1 R475 C36 C30
1 PID1 27 1

1 2
3 4 PID2 68P_0402_50V8J 10K_0402_5% R21 +LCDVDD
5 6 PID2 27 0_0402_5% D
DAC_BRIG PID3 2 Q34 1000P_0402_50V7K
29 DAC_BRIG 7 8 PID3 27 22K
INVT_PWM 2 R179 2 200K_0402_5%
7,29 INVT_PWM

1
DISPOFF# 9 10 2N7002_SOT23 G 47K_0402_5% 22K
11 12 +LCDVDD

1
R476 S Q33
7 LCD_DATA

3
13 14 +LCDVDD C35 C33
7 LCD_CLK 15 16 2 1
DTC124EK_SOT23 4.7U_0805_10V4Z

3
17 18 @0_0402_5% 0.1U_0402_16V4Z
7 TZOUT2+ 19 20 TZCLK+ 7 22K
ENVDD 2
7 TZOUT2- 21 22 TZCLK- 7 7 ENVDD
23 24 22K
C60 C59 Q10
7 TXOUT2+ 25 26 TXOUT1+ 7
7 TXOUT2- 27 28 TXOUT1- 7
0.1U_0402_16V4Z DTC124EK_SOT23

3
29 30 10U_0805_6.3V6M
7 TXCLK+ 31 32 TZOUT0+ 7
7 TXCLK- 33 34 TZOUT0- 7 +3VS
35 36
7 TZOUT1+ 37 38 TXOUT0+ 7
7 TZOUT1- 39 40 TXOUT0- 7
ACES_88022-4000 R30
1K_0402_5%
D13

1 2 DISPOFF#
29 BKOFF#

RB751V_SOD323

2 2

+1.5VS +5VS +R_CRT_VCC +CRT_VCC


D7 F1

1
2 1 1 2
1
D3 D1 D2 RB491D_SOT23 1A_6VDC_MINISMDC110
@DAN217_SOT23 @DAN217_SOT23 @DAN217_SOT23 C213
0.1U_0402_16V4Z
2
CRT Connector
2

3
JP1
CRT-15P
6
11
1 2 CRT_R 1
7 R L2 +3VS
7
FCM2012C-800_0805 12
1 2 CRT_G 2
7 G L1 8

1
FCM2012C-800_0805 13 +CRT_VCC+CRT_VCC
3 CRT_B R149 R150 3
1 2 3
7 B L3 4.7K_0402_5% 4.7K_0402_5%
9
2

1
FCM2012C-800_0805 14 R147 +3VS
1 1 1 1 1 1
4 2.2K_0402_5%

2
R5 R6 R7 C8 C7 C6 C3 C4 C2 10 R148
8P_0402_50V8K 8P_0402_50V8K 8P_0402_50V8K 8P_0402_50V8K 15 2.2K_0402_5%
2 2 2 8P_0402_50V8K 2 2 2
5
1

2
8P_0402_50V8K

G
75_0402_1% 75_0402_1%
75_0402_1% CRT_HSYNC 1 2 D DCD 1 3 DDC_DATA
DDC_DATA 7
L17

S
FCM2012C-800_0805 D DCC

2
Q25

G
1 1
CRT_VSYNC 1 2 2N7002_SOT23
+CRT_VCC 1 2 L16 C216 C214 1 3 DDC_CLK
1 1 DDC_CLK 7
R4 FCM2012C-800_0805 220P_0402_50V7K

S
1K_0402_5% C215 C212 2 2
Q24
5

2 2 2N7002_SOT23
220P_0402_50V7K
P

OE#

2 4 68P_0402_50V8K
7 HSYNC A Y 68P_0402_50V8K
G

U26
SN74AHCT1G125GW_SOT353-5
3

4 4
5

1
P

OE#

7 VSYNC 2 A Y 4
Compal Electronics, Inc.
G

U1
SN74AHCT1G125GW_SOT353-5 Title
3

LVDS & CRT


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 19 of 43
A B C D E
A B C D E

+3V

+3V S1_VCC 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z


1 1 1 1 1 1 1

1 1 1 1 C348 C390 C424 C310 C311 C423 C334


0.1U_0402_16V4Z
C375 C369 C357 C425 2 2 2 2 2 2 2
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 +3V

4 +3V 4
21 VPPD0
21 VPPD1 1 2
21 VCCD0#
C312
21 VCCD1#
0.1U_0402_16V4Z

126

138
122
102
74
73

72
71

44
18

90

86
50
30
14

63
U35

VCCI
VCCD1#
VCCD0#

VPPD1
VPPD0

VCCP0
VCCP1

VCCSK0
VCCSK1

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
PCI_AD[0..31]
14,22,23,24 PCI_AD[0..31]

PCI_AD31 3 144 S1_D10


PCI_AD30 AD31 CAD31/D10 S1_D9 S1_A[0..25]
4 AD30 CAD30/D9 142 S1_A[0..25] 21
PCI_AD29 5 141 S1_D1
PCI_AD28 AD29 CAD29/D1 S1_D8 S1_D[0..15]
7 AD28 CAD28/D8 140 S1_D[0..15] 21
PCI_AD27 8 139 S1_D0
PCI_AD26 AD27 CAD27/D0 S1_A0
9 AD26 CAD26/A0 129
PCI_AD25 10 128 S1_A1
PCI_AD24 AD25 CAD25/A1 S1_A2
11 AD24 CAD24/A2 127
PCI_AD23 15 124 S1_A3
PCI_AD22 AD23 CAD23/A3 S1_A4
16 AD22 CAD22/A4 121
PCI_AD21 17 120 S1_A5
PCI_AD20 AD21 CAD21/A5 S1_A6
19 AD20 CAD20/A6 118
PCI_AD19 23 116 S1_A25
PCI_AD18 AD19 CAD19/A25 S1_A7
24 AD18 CAD18/A7 115
PCI_AD17 25 113 S1_A24
3 PCI_AD16 AD17 CAD17/A24 S1_A17 3
26 AD16 CAD16/A17 98
PCI_AD15 38 96 S1_IOWR#
AD15 CAD15/IOWR# S1_IOWR# 21
PCI_AD14 39 97 S1_A9
PCI_AD13 AD14 CAD14/A9 S1_IORD#
40 AD13 CAD13/IORD# 93 S1_IORD# 21
PCI_AD12 41 95 S1_A11
PCI_AD11 AD12 CAD12/A11 S1_OE#
43 AD11 CAD11/OE# 92 S1_OE# 21
PCI_AD10 45 91 S1_CE2#
AD10 CAD10/CE2# S1_CE2# 21
PCI_AD9 46 89 S1_A10
PCI_AD8 AD9 CAD9/A10 S1_D15
47 AD8 CAD8/D15 87
PCI_AD7 49 85 S1_D7
PCI_AD6 AD7 CAD7/D7 S1_D13
51 AD6 CAD6/D13 82
PCI_AD5 52 83 S1_D6
PCI_AD4 AD5 CAD5/D6 S1_D12
53 AD4 CAD4/D12 80
PCI_AD3 54 81 S1_D5
PCI_AD2 AD3 CAD3/D5 S1_D11
55 AD2 CAD2/D11 77
PCI_AD1 S1_D4
PCI_AD0
56
57
AD1 PQFP 144 CAD1/D4 79
76 S1_D3
AD0 CAD0/D3
12
22.2 X 22.2 X 1.60 125 S1_REG#
14,22,23,24 PCI_C/BE#3 C/BE3# CC/BE3#/REG# S1_REG# 21
27 112 S1_A12
14,22,23,24 PCI_C/BE#2 C/BE2# CC/BE2#/A12
37 99 S1_A8
14,22,23,24 PCI_C/BE#1 C/BE1# CC/BE1#/A8
48 88 S1_CE1#
14,22,23,24 PCI_C/BE#0 C/BE0# CC/BE0#/CE1# S1_CE1# 21
+3V
20 119 S1_RST
7,14,18,21,22,23,24,25,27 PCIRST# RST# CRST#/RESET S1_RST 21
28 111 S1_A23
14,22,23,24 PCI_FRAME# FRAME# CFRAME#/A23
29 110 S1_A15
14,22,23,24 PCI_IRDY# IRDY# CIRDY#/A15
31 109 S1_A22 1 2 PCM_SPK#
14,22,23,24 PCI_TRDY# TRDY# CTRDY#/A22
32 107 S1_A21
14,22,23,24 PCI_DEVSEL# DEVSEL# CDEVSEL#/A21
33 105 S1_A20 R55
2 14,22,23,24 PCI_STOP# STOP# CSTOP#/A20 2
34 104 S1_A14 10K_0402_5%
14,22,23,24 PCI_PERR# PERR# CPERR#/A14
35 133 S1_WAIT#
14,22,24 PCI_SERR# SERR# CSERR#/WAIT# S1_WAIT# 21
36 101 S1_A13
14,22,23,24 PCI_PAR PAR CPAR/A13
1 2 1 123 S1_INPACK#
+3V 14 PCI_REQ#2 REQ# CREQ#/INPACK# S1_INPACK# 21
* R229 14 PCI_GNT#2 2 GNT# CGNT#/WE# 106 S1_WE#
S1_WE# 21
100K_0402_5% CLK_PCI_PCM 21 108 A16_CLK 1 2 S1_A16
13 CLK_PCI_PCM PCLK CCLK/A16 R292 33_0402_5%
22,23,24,29 PCM_PME# 59 135 S1_BVD1
RI_OUT#/PME# CSTSCHG/BVD1 S1_BVD1 21
1 2 70 136 S1_WP
29,30,34,39,42 SUSP# SUSPEND# CCLKRUN#/WP S1_WP 21
PCI_AD20 1 2 R254PCM_ID 13 103 S1_A19
D15 100_0402_1% IDSEL CBLOCK#/A19
@RB751V_SOD323 1 2 R437 60 132 S1_RDY#
14 PCI_PIRQA# MFUNC0 CINT#/READY S1_RDY# 21
0_0402_5% 61 MFUNC1 PCM_SPK#
29 PCM_RI# 64 MFUNC2 SPKOUT 62 PCM_SPK# 33
65 134 S1_BVD2
14,25,27,29 SIRQ MFUNC3 CAUDIO/BVD2 S1_BVD2 21
67 MFUNC4
68 137 S1_CD2#
MFUNC5 CCD2#/CD2# S1_CD2# 21
RSVD/D14
RSVD/A18

69 75 S1_CD1# S1_CD2#
RSVD/D2

15,22,24,27,29 PM_CLKRUN# MFUNC6 CCD1#/CD1# S1_CD1# 21


CLK_PCI_PCM 117 S1_VS2 S1_CD1#
CVS2/VS2# S1_VS2 21
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

66 131 S1_VS1
21 CBRST# VCC/GRST# CVS1/VS1# S1_VS1 21
1

1 1
R259 C575 C576
10_0402_5% CB1410_LQFP144
6
22
42
58
78
94
114
130

84
100
143

1000P_0402_50V7K
2
1000P_0402_50V7K 2
2

1 S1_D2
S1_A18
C361 S1_D14
1 1
18P_0402_50V8K Reserve for CB1410 B0 Version
2

Compal Electronics, Inc.


Title
PCMCIA controller ENE CB1410
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 20 of 43
A B C D E
A B C D E

PCMCIA Power Controller


+12V S1_VCC
S1_VPP
1 1
1
1 C119 C120
C78 U15 0.01U_0402_16V7K 4.7U_1206_16V6K
0.1U_0402_16V4Z C77 2 2
1
AVCC1 13 1
2 0.1U_0402_16V4Z
AVCC2 12
2
9 12V AVCC3 11
S1_VPP

+5V
1
10 S1_VCC
AVPP C76
1
5 1U_0805_25V4Z S1_A[0..25]
5V_1 2 20 S1_A[0..25] S1_D[0..15]
C92 6 1 1
0.1U_0402_16V4Z 5V_2 20 S1_D[0..15]
2 C117 C115
VCCD0# 1 VCCD0# 20
2 0.1U_0402_16V4Z 10U_1206_16V4Z
+3V VCCD1# VCCD1# 20 2 2
VPPD0 15 VPPD0 20
VPPD1 14 VPPD1 20
3 3.3V_1
CardBus Socket
4 8

SHDN#
1 3.3V_2 OC#

GND
C98 JP15
0.1U_0402_16V4Z
2
7 TPS2211IDBR_SSOP16 1 35

16
S1_D3 1 35 S1_CD1#
2 2 36 36 S1_CD1# 20
S1_D4 3 37 S1_D11
S1_D5 3 37 S1_D12
4 4 38 38
CBRST# S1_D6 5 39 S1_D13
S1_D7 5 39 S1_D14
6 6 40 40
+3V +5V S1_CE1# 7 41 S1_D15
2
20 S1_CE1# S1_A10 7 41 S1_CE2# 2
8 8 42 42 S1_CE2# 20
1 1 S1_OE# 9 43 S1_VS1
20 S1_OE# S1_A11 9 43 S1_IORD# S1_VS1 20
10 10 44 44 S1_IORD# 20
C90 C99 S1_A9 11 45 S1_IOWR#
10U_1206_16V4Z 10U_1206_16V4Z S1_A8 11 45 S1_A17 S1_IOWR# 20
12 12 46 46
2 2 S1_A13 S1_A18
13 13 47 47
S1_A14 14 48 S1_A19
S1_WE# 14 48 S1_A20
20 S1_WE# 15 15 49 49
S1_RDY# 16 50 S1_A21
20 S1_RDY# 16 50
S1_VCC 17 17 51 51 S1_VCC
S1_VPP 18 18 52 52 S1_VPP
S1_A16 19 53 S1_A22
S1_A15 19 53 S1_A23
20 20 54 54
S1_A12 21 55 S1_A24
S1_A7 21 55 S1_A25
22 22 56 56
S1_A6 23 57 S1_VS2
S1_A5 23 57 S1_RST S1_VS2 20
24 24 58 58 S1_RST 20
S1_A4 25 59 S1_WAIT#
S1_A3 25 59 S1_INPACK# S1_WAIT# 20
26 26 60 60 S1_INPACK# 20
S1_A2 27 61 S1_REG#
S1_A1 27 61 S1_BVD2 S1_REG# 20
28 28 62 62 S1_BVD2 20
S1_A0 29 63 S1_BVD1
S1_D0 29 63 S1_D8 S1_BVD1 20
30 30 64 64
S1_D1 31 65 S1_D9
S1_D2 31 65 S1_D10
32 32 66 66
S1_WP 33 67 S1_CD2#
20 S1_WP 33 67 S1_CD2# 20
34 34 68 68
69 GND GND 70
71 GND GND 72
3 3
73 GND GND 74
75 GND GND 76
77 GND GND 78
PCMRST# 29 79 GND GND 80
S1_VCC 81 82
GND GND
83 GND GND 84
4

U43B
S1_A23 1 2
OE#

5 6 CBRST# R303 22K_0402_5% FOXCONN_1CA41531-TC2


7,14,18,20,22,23,24,25,27 PCIRST# I O CBRST# 20
S1_WP 1 2
1

R304 22K_0402_5%
SN74LVC125APWLE_TSSOP14 * R417 S1_OE# 1 2
100K_0402_5% R268 22K_0402_5%
+3V POWER
2

S1_RST 1 2
* R447 43K_0402_5%
+3V S1_CE1# 1 2
* R448 43K_0402_5%
S1_CE2# 1 2
* R449 43K_0402_5%

Reserve for CB1410 B0 Version

4 4

Compal Electronics, Inc.


Title
CardBus Socket
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DCL55 LA-2201 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 06, 2004 Sheet 21 of 43
A B C D E
5 4 3 2 1