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Package Types(1)
8-Pin TC4421A TC4422A 8-Pin DFN(2) TC4421A TC4422A 5-Pin TO-220
PDIP/SOIC
Tab is
VDD 1 8 VDD VDD Common
VDD 1 8 VDD VDD
INPUT 2 TC4421A 7 OUTPUT OUTPUT INPUT 2 to VDD
TC4421A 7 OUTPUT OUTPUT
NC 3 TC4422A 6 OUTPUT OUTPUT TC4422A TC4421A
NC 3 6 OUTPUT OUTPUT
GND 4 5 GND GND TC4422A
GND 4 5 GND GND
OUTPUT
GND
VDD
INPUT
GND
VDD
TC4421A
Inverting
130 µA
300 mV Output
Cross-Conduction
Reduction and Pre-Drive Output
Circuitry
Input TC4422A
Non-Inverting
4.7V
GND
Effective
Input
C = 25 pF
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, TA = +25°C with 4.5V VDD 18V.
Parameters Sym Min Typ Max Units Conditions
Input
Logic ‘1’, High Input Voltage VIH 2.4 1.8 — V
Logic ‘0’, Low Input Voltage VIL — 1.3 0.8 V
Input Current IIN –10 — +10 µA 0VVINVDD
Input Voltage VIN –5 — VDD – 0.3 V
Output
High Output Voltage VOH VDD – 0.025 — — V DC Test
Low Output Voltage VOL — — 0.025 V DC Test
Output Resistance, High ROH — 1.25 1.5 IOUT = 10 mA, VDD = 18V
Output Resistance, Low ROL — 0.8 1.1 IOUT = 10 mA, VDD = 18V
Peak Output Current IPK — 10.0 — A VDD = 18V
Continuous Output Current IDC 2 — — A 10V VDD 18V, TA = +25°C
(TC4421A/TC4422A CAT only)
(Note 2)
Latch-Up Protection IREV — >1.5 — A Duty cycle2%, t 300 µsec
Withstand Reverse Current
Switching Time (Note 1)
Rise Time tR — 28 34 ns Figure 4-1, CL = 10,000 pF
Fall Time tF — 26 32 ns Figure 4-1, CL = 10,000 pF
Propagation Delay Time tD1 — 38 45 ns Figure 4-1, CL = 10,000 pF
Propagation Delay Time tD2 — 42 49 ns Figure 4-1, CL = 10,000 pF
Power Supply
Power Supply Current IS — 130 250 µA VIN = 3V
— 35 100 µA VIN = 0V
Operating Input Voltage VDD 4.5 — 18 V
Note 1: Switching times ensured by design.
2: Tested during characterization, not production tested.
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range (V) TA –40 — +125 °C
Maximum Junction Temperature TJ — — +150 °C
Storage Temperature Range TA –65 — +150 °C
Package Thermal Resistances
Thermal Resistance, 5L-TO-220 JA — 71 — °C/W Without heat sink
Thermal Resistance, 8L-6x5 DFN JA — 33.2 — °C/W Typical 4-layer board with
vias to ground plane
Thermal Resistance, 8L-PDIP JA — 125 — °C/W
Thermal Resistance, 8L-SOIC JA — 155 — °C/W
180 300
160
250
140
Rise Time (ns)
5V
0 0
4 6 8 10 12 14 16 18 100 1000 10000 100000
Supply Voltage (V) Capacitive Load (pF)
FIGURE 2-1: Rise Time vs. Supply FIGURE 2-4: Fall Time vs. Capacitive
Voltage. Load.
300 55
VDD = 15V
250 50
5V
Rise Time (ns)
45
200
Time (ns)
10V 40
150 tRISE
35
100
15V 30 tFALL
50 25
0 20
100 1000 10000 100000 -40 -25 -10 5 20 35 50 65 80 95 110 125
Capacitive Load (pF) Temperature (°C)
FIGURE 2-2: Rise Time vs. Capacitive FIGURE 2-5: Rise and Fall Times vs.
Load. Temperature.
180 10-7
1E-7
Crossover Energy (A·sec)
160
140
Fall Time (ns)
120
22,000 pF
100
10-8
1E-8
80
60 10,000 pF
40
20 1,000 pF 100 pF
0 10-9
1E-9
4 6 8 10 12 14 16 18 4 6 8 10 12 14 16 18
FIGURE 2-3: Fall Time vs. Supply FIGURE 2-6: Crossover Energy vs Supply
Voltage. Voltage.
80 140
CLOAD = 10,000 pF
75
Propagation Delay (nS)
120
70
INPUT = High
IQUIESCENT (µA)
65 100
60
55 80
50 tD2
45 60
40 tD1 INPUT = Low
40
35
30 20
4 6 8 10 12 14 16 18 4 6 8 10 12 14 16 18
Supply Voltage (V) Supply Voltage (V)
FIGURE 2-7: Propagation Delay vs. FIGURE 2-10: Quiescent Supply Current
Supply Voltage. vs. Supply Voltage.
75 220
VDD = 12V VDD = 18V
200
Propagation Delay (ns)
70
180
65
IQUIESCENT (µA)
160
INPUT = High
60 140
120
55 100
50 tD2 80
INPUT = Low
60
45 tD1
40
40 20
2 3 4 5 6 7 8 9 10 -40 -25 -10 5 20 35 50 65 80 95 110 125
Input Amplitude (V) Temperature (°C)
FIGURE 2-8: Propagation Delay vs. Input FIGURE 2-11: Quiescent Supply Current
Amplitude. vs. Temperature.
60 2.0
VDD = 12V VDD = 12V
1.9
Propagation Delay (ns)
VIN = 5V
55
Input Threshold (V)
FIGURE 2-9: Propagation Delay vs. FIGURE 2-12: Input Threshold vs.
Temperature. Temperature.
2.0 180
VDD = 18V
1.9 160
1.8 140
1.7 120 2 MHz
1 MHz
1.6 VIH
100
1.5 100 kHz
80
1.4
1.3 60 50 kHz
VIL 40
1.2 10 kHz
1.1 20
1.0 0
4 6 8 10 12 14 16 18 100 1,000 10,000 100,000
Supply Voltage (V) Capacitive Load (pF)
FIGURE 2-13: Input Threshold vs. Supply FIGURE 2-16: Supply Current vs.
Voltage. Capactive Load (VDD = 18V).
5.0 200
VIN = 5V (TC4422A) VDD = 12V
4.5 VIN = 0V (TC4421A) 180
0.0 0
4 6 8 10 12 14 16 18 100 1,000 10,000 100,000
3.5 220
VIN = 0V (TC4422A) VDD = 6V
VIN = 5V (TC4421A)
200
3.0
Supply Current (mA)
180 1 MHz
2.5 160
TJ = 150°C
ROUT-LO (:)
140 2 MHz
2.0 120
200 kHz
1.5 100
100 kHz
80
1.0 TJ = 25°C 60 50 kHz
40
0.5 10 kHz
20
0.0 0
4 6 8 10 12 14 16 18 100 1,000 10,000 100,000
180 220
VDD = 18V VDD = 6V
160 10,000 pF 200
22,000 pF
FIGURE 2-19: Supply Current vs. FIGURE 2-21: Supply Current vs.
Frequency (VDD = 18V). Frequency (VDD = 6V).
200
VDD = 12V
180 10,000 pF
Supply Current (mA)
160 47,000 pF
140
120 22,000 pF
100
0.1 µF 1000 pF
80
60
40
470 pF
20
0
10 100 1000 10000
Frequency (kHz)
Pin No.
Pin No. Pin No.
8-Pin PDIP, Symbol Description
8-Pin DFN 5-Pin TO-220
SOIC
1 1 — VDD Supply input, 4.5V to 18V
2 2 1 INPUT Control input, TTL/CMOS-compatible input
3 3 — NC No connection
4 4 2 GND Ground
5 5 4 GND Ground
6 6 5 OUTPUT CMOS push-pull output
7 7 — OUTPUT CMOS push-pull output
8 8 3 VDD Supply input, 4.5V to 18V
— PAD — NC Exposed metal pad
— — TAB VDD Metal tab is at the VDD potential
+5V
90%
Input
VDD = 18V 10%
0V
tD1 tD2
tF tR
0.1 µF +18V
0.1 µF 4.7 µF 90% 90%
1 8 Output
VDD VDD 10% 10%
0V
Inverting Driver
Input 2 Input Output 6 Output TC4421A
Output 7
CL = 10,000 pF +5V
90%
GND GND Input
4 5
10%
0V
+18V 90%
tD1 90% tD2
Input: 100 kHz, Output tR tF
square wave,
0V 10% 10%
tRISE = tFALL 10 nsec
Non-Inverting Driver
Note: Pinout shown is for the DFN, PDIP and SOIC packages. TC4422A
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XXYYWW 0514
NNN 256
XXXXXXXX TC4421A
XXXXXNNN PA e^3 256
YYWW 0514
XXXXXXXX TC4421A
XXXXYYWW SN e3 0514
NNN 256
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
L H1
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EJECTOR PIN ØP
a (5X)
C1
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Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
E1
n 1
A A2
L
c
A1
B1
p
eB B
Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
E1
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• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
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mean that we are guaranteeing the product as “unbreakable.”
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CERTIFIED BY DNV Tempe, Arizona; Gresham, Oregon and design centers in California
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== ISO/TS 16949 ==
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
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