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LM2936
SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014
Simplified Schematic
GND
CIN COUT
100 nF * 10 µF **
* Required if regulator is located more than 2″ from power supply filter capacitor.
** Required for stability. See Electrical Characteristics for 3-V LM2936 for required values. Must be rated over
intended operating temperature range. Effective series resistance (ESR) is critical, see Typical Characteristics. Locate
capacitor as close as possible to the regulator output and ground pins. Capacitance may be increased without bound.
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2936
SNOSC48O – JUNE 2000 – REVISED DECEMBER 2014 www.ti.com
Table of Contents
1 Features .................................................................. 1 7.3 Feature Description................................................. 12
2 Applications ........................................................... 1 7.4 Device Functional Modes........................................ 13
3 Description ............................................................. 1 8 Application and Implementation ........................ 14
4 Revision History..................................................... 2 8.1 Application Information............................................ 14
8.2 Typical Application ................................................. 14
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4 9 Power Supply Recommendations...................... 15
6.1 Absolute Maximum Ratings ..................................... 4 10 Layout................................................................... 16
6.2 ESD Ratings.............................................................. 4 10.1 Layout Guidelines ................................................. 16
6.3 Recommended Operating Conditions....................... 4 10.2 Layout Examples................................................... 16
6.4 Thermal Information .................................................. 4 10.3 Thermal Considerations ........................................ 16
6.5 Electrical Characteristics for 3-V LM2936................. 5 11 Device and Documentation Support ................. 18
6.6 Electrical Characteristics for 3.3-V LM2936.............. 6 11.1 Documentation Support ........................................ 18
6.7 Electrical Characteristics for 5-V LM2936................. 7 11.2 Trademarks ........................................................... 18
6.8 Typical Characteristics .............................................. 8 11.3 Electrostatic Discharge Caution ............................ 18
7 Detailed Description ............................................ 12 11.4 Glossary ................................................................ 18
7.1 Overview ................................................................. 12 12 Mechanical, Packaging, and Orderable
7.2 Functional Block Diagram ....................................... 12 Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
• Added Pin Configuration and Functions section, ESD Rating table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
IN 1 IN 1
LM2936DT
LM2936MP
4 GND 4 GND
(TAB) GND 2
(TAB)
OUT 3 OUT 3
OUT 1 8 IN OUT 1 8 IN
LM2936BM
LM2936M
GND 2 7 GND GND 2 7 GND
GND 3 6 GND GND 3 6 GND
NC 4 5 SD NC 4 5 NC
OUT 1 8 IN
LM2936MM
OUT 1
NC 2 7 GND
GND 2
NC 3 6 NC
IN 3
NC 4 5 NC
Pin Functions
PIN
D D I/O DESCRIPTION
NAME NDP DGK DCY LP
(LM2936BM) (LM2936M)
IN 8 8 1 8 1 3 I Unregulated input voltage.
GND 2, 3, 6, 7 2, 3, 6, 7 4 7 2, 4 2 — Ground.
Regulated output voltage. Requires a minimum
OUT 1 1 3 1 3 1 O output capacitance, with specific ESR, on this pin
to maintain stability.
Shutdown. LM2936BM only. Pull this pin HIGH (> 2
V) to turn the output OFF. If this pin is left open,
pull ed low (< 0.6 V), or connected to GND, the
SD 5 — — — — — I output will be ON by default. Avoid having any
voltage between 0.6 V and 2 V on this pin as the
output status may not be predicable across the
operating range.
No internal connection, Connect to GND, or leave
NC 4 4, 5 — 2, 3, 4, 5, 6 — — —
open.
6 Specifications
(1) (2)
6.1 Absolute Maximum Ratings
MIN MAX UNIT
Input voltage (survival) −50 60 V
(3)
Power dissipation Internally limited
Junction temperature (TJMAX) 150
°C
Storage temperature, Tstg −65 150
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not
apply when operating the device beyond its specified operating ratings.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) The maximum power dissipation is a function of TJ(MAX), RθJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) − TA) / RθJA. If this dissipation is exceeded, the die temperature can rise above the TJ(MAX) of 150°C, and
the LM2936 may go into thermal shutdown.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. .
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(1) Datasheet min/max specification limits are ensured by design, test, or statistical analysis.
(2) Typicals are at 25°C (unless otherwise specified) and represent the most likely parametric norm.
(1) Datasheet min/max specification limits are ensured by design, test, or statistical analysis.
(2) Typicals are at 25°C (unless otherwise specified) and represent the most likely parametric norm.
(3) To ensure constant junction temperature, pulse testing is used.
(1) Datasheet min/max specification limits are ensured by design, test, or statistical analysis.
(2) Typicals are at 25°C (unless otherwise specified) and represent the most likely parametric norm.
(3) To ensure constant junction temperature, pulse testing is used.
50
Figure 11. 3.3-V LM2936 COUT ESR Figure 12. Peak Output Current
Figure 13. Peak Output Current Figure 14. 5-V LM2936 Current Limit
Figure 15. 5-V LM2936 Line Transient Response Figure 16. 5-V LM2936 Output at Voltage Extremes
Figure 17. 5-V LM2936 Ripple Rejection Figure 18. 5-V LM2936 Load Transient Response
Figure 19. 5-V LM2936 Low Voltage Behavior Figure 20. 5-V LM2936 Output Impedance
7 Detailed Description
7.1 Overview
The LM2936 ultra-low quiescent current regulator features low dropout voltage and low current in the standby
mode. With less than 15 μA quiescent current at a 100-μA load, the LM2936 is ideally suited for automotive and
other battery operated systems. The LM2936 retains all of the features that are common to low dropout
regulators including a low dropout PNP pass device, short circuit protection, reverse battery input protection, and
thermal shutdown. The LM2936 has a 40-V maximum operating voltage limit, a −40°C to 125°C operating
temperature range, and ±3% output voltage tolerance over the entire output current, input voltage, and
temperature range.
IN OUT
Bandgap
Reference
LM2936
GND
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
GND
CIN COUT
100 nF * 10 µF **
* CIN is required only if the regulator is located more than 3 inches from the power-supply-filter capacitors.
** Required for stability. COUT must be at least 10 µF for the LM2936 5-V option, and at least 22 µF for the 3.3-V and
3-V options. Capacitance must be maintained over entire expected operating temperature range, and located as close
as possible to the regulator. The ESR, of the COUT capacitor must at least 300 mΩ, but no more than 8 Ω.
10 Layout
5 4
6 3
GND 7 2 GND
8 1
VIN VOUT
Thermal
Vias
4
GND
CIN 1 3 COUT
GND
VIN VOUT
Figure 25. LM2936 TO-252 (NDP) Layout
GND
LOAD
CIN COUT
IGND
Knowing the power dissipation (PD), the thermal resistance of the package (RθJA), and the ambient temperature
(TA), the junction temperature (TJ) can be estimated using the following formula:
TJ = (PD × RθJA) + TA (2)
Knowing the thermal resistance of the package (RθJA), the ambient temperature (TA), and the maximum allowed
operating junction temperature (TJ) of 125°C, the maximum power dissipation can be estimated using the
following formula:
PD(MAX) = (125°C – TA) / RθJA (3)
Alternately, solving for the required thermal resistance (RθJA):
RθJA = (125°C – TA) / PD(MAX) (4)
The maximum allowed PD information from Equation 3 can be used to estimate the maximum allowed load
current (IOUT), or the maximum allowed VIN:
VIN(MAX) = (PD(MAX) / IOUT) + VOUT (5)
IOUT(MAX) = (PD(MAX) / (VIN – VOUT)) (6)
As an example, an application requires : VIN = 14 V, VOUT = 5 V, IOUT = 25 mA, and TA = 85°C. Find the
maximum RθJA to keep the junction temperature under 125°C.
RθJA ≤ (125°C – TA) / PD(MAX) (7)
RθJA ≤ (125°C – 85°C) / ((14 V – 5 V) × 0.025 A) (8)
RθJA ≤ 40°C / 0.225W (9)
RθJA ≤ 177°C/W (10)
The EIA/JEDEC standard (JESD51-2) provides methodologies to estimate the junction temperature from external
measurements (ΨJB references the temperature at the PCB, and ΨJT references the temperature at the top
surface of the package) when operating under steady-state power dissipation conditions. These methodologies
have been determined to be relatively independent of the copper thermal spreading area that may be attached to
the package DAP when compared to the more typical RθJA. Refer to Texas Instruments Application Report
Semiconductor and IC Package Thermal Metrics (SPRA953), for specifics.
On the 8-pin SOIC (D) package, the four ground pins are thermally connected to the backside of the die. Adding
approximately 0.04 square inches of 2 oz. copper pad area to these four pins will improve the JEDEC RθJA rating
from 111.4°C/W to approximately 100°C/W. If this extra copper area is placed directly beneath the SOIC
package there should not be any impact on board density.
The LM2936 has an internally set thermal shutdown point of typically 160°C. Thermal shutdown is outside the
ensured operating temperature range and is intended as a safety feature only. Continuous operation near the
thermal shutdown temperature should be avoided as it may have a negative affect on the life of the device.
11.2 Trademarks
WEBENCH is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 9-Nov-2018
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 9-Nov-2018
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com 9-Nov-2018
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
LM2936MP-5.0/NOPB ACTIVE SOT-223 DCY 4 1000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 KAAA
& no Sb/Br)
LM2936MPX-3.0/NOPB ACTIVE SOT-223 DCY 4 2000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 KACA
& no Sb/Br)
LM2936MPX-3.3/NOPB ACTIVE SOT-223 DCY 4 2000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 KABA
& no Sb/Br)
LM2936MPX-5.0/NOPB ACTIVE SOT-223 DCY 4 2000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 KAAA
& no Sb/Br)
LM2936MX-3.3/NOPB ACTIVE SOIC D 8 2500 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 LM293
& no Sb/Br) 6-3.3
LM2936MX-5.0 NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 125 LM293
6M-5
LM2936MX-5.0/NOPB ACTIVE SOIC D 8 2500 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 LM293
& no Sb/Br) 6M-5
LM2936Z-3.3/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS CU SN N / A for Pkg Type -40 to 125 LM2936
& no Sb/Br) Z-3.3
LM2936Z-5.0/LFT1 ACTIVE TO-92 LP 3 2000 Green (RoHS CU SN N / A for Pkg Type LM293
& no Sb/Br) 6Z-5
LM2936Z-5.0/LFT3 ACTIVE TO-92 LP 3 2000 Green (RoHS CU SN N / A for Pkg Type LM293
& no Sb/Br) 6Z-5
LM2936Z-5.0/LFT4 ACTIVE TO-92 LP 3 2000 Green (RoHS CU SN N / A for Pkg Type LM293
& no Sb/Br) 6Z-5
LM2936Z-5.0/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS CU SN N / A for Pkg Type -40 to 125 LM293
& no Sb/Br) 6Z-5
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com 9-Nov-2018
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Sep-2019
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Sep-2019
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Sep-2019
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
B
LM2936HVBMAX5.0/NOP SOIC D 8 2500 367.0 367.0 35.0
B
LM2936HVMAX-5.0 SOIC D 8 2500 367.0 367.0 35.0
LM2936HVMAX-5.0/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM2936MM-3.0/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LM2936MM-3.3 VSSOP DGK 8 1000 210.0 185.0 35.0
LM2936MM-3.3/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LM2936MM-5.0/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LM2936MMX-3.3/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
LM2936MMX-5.0 VSSOP DGK 8 3500 367.0 367.0 35.0
LM2936MMX-5.0/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
LM2936MP-3.0/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2936MP-3.3 SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2936MP-3.3/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2936MP-5.0 SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2936MP-5.0/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2936MPX-3.0/NOPB SOT-223 DCY 4 2000 367.0 367.0 35.0
LM2936MPX-3.3/NOPB SOT-223 DCY 4 2000 367.0 367.0 35.0
LM2936MPX-5.0/NOPB SOT-223 DCY 4 2000 367.0 367.0 35.0
LM2936MX-3.3/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM2936MX-5.0 SOIC D 8 2500 367.0 367.0 35.0
LM2936MX-5.0/NOPB SOIC D 8 2500 367.0 367.0 35.0
Pack Materials-Page 3
PACKAGE OUTLINE
NDP0003B SCALE 1.500
TO-252 - 2.55 mm max height
TRANSISTOR OUTLINE
10.42
9.40
6.22 1.27
B
5.97 0.88 A
(2.345)
2.285 (2.5)
2 5.46 6.73
4.57
4.96 6.35
3
0.88
3X 1.02 PKG
0.64 OPTIONAL
0.25 C A B 0.64
8 8
TOP & BOTTOM
1.14
0.89 C
2.55 MAX
SEATING PLANE
4.32 MIN
2 4
4219870/A 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-252.
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EXAMPLE BOARD LAYOUT
NDP0003B TO-252 - 2.55 mm max height
TRANSISTOR OUTLINE
4 SYMM
(4.57) (5.5)
(R0.05) TYP
(4.38) (2.285)
PKG
4219870/A 03/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers
SLMA002(www.ti.com/lit/slm002) and SLMA004 (www.ti.com/lit/slma004).
5. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged or tented.
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EXAMPLE STENCIL DESIGN
NDP0003B TO-252 - 2.55 mm max height
TRANSISTOR OUTLINE
(1.35) TYP
2X (2.15)
(0.26)
2X (1.3) (R0.05) TYP
(1.32) TYP
(4.57)
16X (1.12)
16X (1.15)
(4.38)
PKG
4219870/A 03/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
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PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1
.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]
4X (0 -15 )
4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
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EXAMPLE BOARD LAYOUT
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND
4214825/C 02/2019
NOTES: (continued)
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55] SYMM
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
LP0003A SCALE 1.200 SCALE 1.200
TO-92 - 5.34 mm max height
TO-92
5.21
4.44
EJECTOR PIN
OPTIONAL
5.34
4.32
(1.5) TYP
(2.54) SEATING
2X NOTE 3 PLANE
4 MAX
(0.51) TYP
6X
0.076 MAX
SEATING
PLANE
3X
12.7 MIN
0.43
2X 0.55 3X
3X 0.35
2.6 0.2 0.38
2X 1.27 0.13
FORMED LEAD OPTION
OTHER DIMENSIONS IDENTICAL STRAIGHT LEAD OPTION
TO STRAIGHT LEAD OPTION
2.67
3X
2.03 4.19
3.17
3 2 1
3.43 MIN
4215214/B 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Lead dimensions are not controlled within this area.
4. Reference JEDEC TO-226, variation AA.
5. Shipping method:
a. Straight lead option available in bulk pack only.
b. Formed lead option available in tape and reel or ammo pack.
c. Specific products can be offered in limited combinations of shipping medium and lead options.
d. Consult product folder for more information on available options.
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EXAMPLE BOARD LAYOUT
LP0003A TO-92 - 5.34 mm max height
TO-92
FULL R
0.05 MAX (1.07) TYP
ALL AROUND METAL 3X ( 0.85) HOLE
TYP TYP
2X
METAL
(1.5) 2X (1.5)
2X
SOLDER MASK
OPENING
1 2 3
(R0.05) TYP 2X (1.07)
(1.27)
SOLDER MASK
(2.54)
OPENING
METAL
2X
1 2 3 SOLDER MASK
(R0.05) TYP
(2.6) OPENING
SOLDER MASK
OPENING (5.2)
4215214/B 04/2017
www.ti.com
TAPE SPECIFICATIONS
LP0003A TO-92 - 5.34 mm max height
TO-92
13.7
11.7
32
23
16.5
15.5
11.0 9.75
8.5 8.50
19.0
17.5
4215214/B 04/2017
www.ti.com
MECHANICAL DATA
6,70 (0.264)
6,30 (0.248)
3,10 (0.122)
2,90 (0.114)
4
0,10 (0.004) M
Gauge Plane
1 2 3
0,25 (0.010)
0,84 (0.033) 0°–10°
2,30 (0.091)
0,66 (0.026)
0,10 (0.004) M
4,60 (0.181) 0,75 (0.030) MIN
1,70 (0.067)
1,80 (0.071) MAX 1,50 (0.059)
0,35 (0.014)
0,23 (0.009)
Seating Plane
4202506/B 06/2002
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