MarkVIe

All I/O networks are attached to each controller providing them with all
redundant input data. This hardware architecture along with the software
architecture guarantees that no single point of application input will be lost if a
controller is powered down for maintenance or repair.
ToolboxST
ToolboxST is a Windows-based software for configuring and maintaining the Mark VIe control.
The software must run on a Pentium 4, 1.6 GHz or better with 1GB RAM. Usually the
engineering workstation is a CIMPLICITY HMI Server located on the UDH

Process Alarms
Process and hold alarms are time stamped and stored in a local queue in the controller.
Changes representing alarms are time stamped and sent to the alarm queue. Reports
containing alarm information are assembled and sent over the UDH to the HMIs. Here the
alarms are again queued and prepared for operator display by the alarm viewer.
To configure the alarm scanner on the controller, refer to GEH-6700 ToolboxST for Mark VIe
Control. To configure the controller to send alarms to all HMIs, use the UDH broadcast address
in the alarm IP address area.

Hold list alarms:

Are similar to process alarms; additionally the scanner drives a specified signal, True, whenever
any hold list signal is in the alarm state (hold present). This signal is used to disable automatic
turbine startup logic at various stages in the sequencing. Operators may override a hold list
signal so that the sequencing can proceed even if the hold condition has not cleared

Diagnostic Alarms.
The controller and I/O packs generate diagnostic alarms. Alarm bits are created in the I/O pack
by hardware limit checking. Raw input checking takes place at the frame rate, and resulting
alarms are queued Diagnostic Alarms
The controller and I/O packs generate diagnostic alarms. Alarm bits are created in the I/O pack
by hardware limit checking. Raw input checking takes place at the frame rate, and resulting
alarms are queued. • Each type of I/O pack has hardware limit checking based on high and low
levels set near the ends of the operating range. When the limit is exceeded, a logic signal is set.
(ATTN_xxxx). • In TMR systems, a limit alarm called TMR Diff Limt is created if any of the three
inputs differ from the voted value by more than a preset amount. This limit value is configured
by the user creating a voting alarm indicating a problem exists with a specific input. • If any one
of the hardware limits is set, a pack composite diagnostic alarm, L3DIAG_xxxx, where xxxx is
created in the board name. This signal can be used to trigger a process alarm. • The diagnostic
signals can be individually latched, and then reset with the RESET_DIA signal from the HMI. •
Generally, diagnostic alarms require two occurrences before coming true while process alarms
only require one occurrence. In addition to inputs, each board has its own diagnostics. The I/O
boards have a processor stall timer, which generates the signal, SYSFAIL. This signal lights the
red LED on the front panel. The watchdog timers are set at 150 ms. If an I/O board times out,
the outputs go to a fail-safe condition which is zero (or open contacts) and the input data is put
in the default condition, which is zero. The default condition on contact inputs is subject to the
inversion mask.
The controller has extensive self-diagnostics, most of which are available in the ToolboxST
application.

Controller(UCCAM03)
The controllers are designated as R, S, and T in a TMR system, R and S in a dual system and R in a
single system

During normal operation each controller receives the inputs from the I/O modules on all networks,
optionally votes the TMR inputs, computes the application algorithms including sensor selection if not
voted, sends the outputs to the I/O modules on its own network, and finishes by sending data
between the controllers for synchronization. This time line is known as a frame

The controller mounts in a CompactPCI® (CPCI) enclosure. Controller are designated as R, S, T,

OS = (OS) is QNX® Neutrino®, a real-time, multitasking OS designed

Speed=650 MHz Celeron® processor, single board module

128 MB flash, 128 MB DRAM.

The EPMC contains 32 KB Flash Backed Non Volatile RAM (NVRAM), three 10/100 Mbit Ethernets for
IONet connections, temperature sensors for fan loss detection, and Ethernet Physical Layer snoop
hardware for precision time synchronization

Five communication ports provide links to I/O, operator, and engineering interfaces as follows:

• Ethernet® connection for the Unit Data Highway (UDH) for communication with HMIs, and other
control equipment

• Ethernet connection for the R, S, and T I/O network

• RS-232C connection for setup using the COM1 port

Note The I/O networks are private special purpose Ethernet that support only the I/O packs and the
controllers.

NVRAM

All application software is stored in the controller(s) in non-volatile memory

Operating Environment Controller

Ambient temperature (acceptable): Control Module 0°C to 60°C (32 °F to 140 °F)

Ambient temperature (preferred): 20°C to 30°C (68 °F to 86 °F)

Relative humidity: 5 to 95%, non-condensing.

A fan assembly provides forced ventilation from the bottom of the rack to the top. The rack dissipates
only 35 W with one processor board or 58 W with two and provides the airflow needed for operation at
60°C (140 °F)

The IEEE®1588 protocol is used through the R, S, and T IONets to synchronize the clock of the I/O packs
and controllers to within ± 100 micro seconds.

Configuration of Controller

In redundant control systems, the application software in each controller is identical and is
represented as a single program to maintenance personnel. Downloads of changes are automatically
distributed to the redundant controllers by the control system, and any discrepancies between the
controllers are monitored by diagnostics. All application software is stored in the controller(s) in non-
volatile memory

The controller must be configured with a TCP/IP address prior to connecting to the UDH Ethernet. This is
achieved through the ToolboxST and the COM1 serial port.

Installation

The controller module contains (at a minimum) a controller and a four-slot CPCI rack with either one or
two power supplies. The primary controller must be placed in the left-most slot (slot 1). A second, third
and fourth controller can be placed in a single rack.

Note If the slot 1 controller is removed, the other controllers will stop operating.

Controller Battery

The UCCx uses a lithium battery to supply power to the CMOS (which contains the BIOS settings for the
CPU board) and the real-time clock when the controller is not on. Default CMOS settings are also stored
in flash memory, so when the battery reaches end-of-life, only the real-time clock functions are lost.

The lithium battery for the UCCx has a service life of 10 years.

I/O Networks (IONet):

The I/O networks are IEEE 802.3 100 Mbit full duplex Ethernet networks

All traffic on each IONet is deterministic UDP/IP packets. TCP/IP is not used. Each network (red, blue,
black) is an independent IP.

The networks are fully switched full-duplex preventing collisions that can occur on non-switched
Ethernet networks.
The IEEE1588 protocol is used through the R, S, and T IONet to synchronize the clock of the I/O modules
and controllers to within ± 100 ms.

Note : The I/O networks are private special purpose Ethernets that support only the I/O modules and
the controllers.

I/O Modules:
The Mark VI e I/O modules contain three basic parts, the terminal board, the terminal block, and I/O
pack. The I/O pack’s processor board and data acquisition board are rated for -30°C to 65°C

SOE oF DISCRETE I/O record time 1ms

Operating Environment I/o Module

I/O Module -30°C to 65°C (-22 °F to 149 °F)

1.0 I/O Terminal Boards

Two basic types, S and T =having unique electronic ID

S= S-type board provides a single set of screws for each I/O point and allows a single I/O pack to
condition and digitize the signal

T= The T-type TMR board typically fans the inputs to three separate I/O packs Usually, the T-type board
hardware votes the outputs from the three I/O packs.
The control system should be inspected every 30,000 hours (3.4 years) to ensure the components are
functioning properly. This inspection should include, but is not limited to terminal boards and
cables.

. The board ID is coded into a read-only chip containing the terminal board serial number, board type,
revision number, and the J type connector location.

To clean terminal boards

1 Remove the dirt and dust from the boards using a grounded, natural bristle drapery brush or paint
brush. 2 Wash the board in water with a mild dishwashing detergent. 3 Rinse the board in
deionized water. 4 Rinse in alcohol to remove any remaining traces of the water. 5 Allow the
board to air dry.

Terminal Blocks

T-type terminal boards contain two, 24-point, barrier-type, removable, terminal blocks. Each point can
accept two 3.0 mm (0.12 in) (#12AWG) wires with 300 V insulation per point with either spade or ring-
type lugs

S-type boards support one I/O pack for simplex and dual redundant systems. They are half the size of T-
type boards

S-type board terminal blocks accept one 2.05 mm (#12AWG) wire or two 1.63 mm (#14AWG) wires,
each with 300 V insulation per point

NOTE: A shield strip is provided to the left of each terminal block. It can be connected to a metal base
for immediate grounding or floated to allow individual ground wires from each board to be wired to a
centralized, cabinet ground strip.

1.01 I/O Pack

I/O packs in Mark VIe have a generic processor board and a data acquisition board

I/O packs on each terminal board digitize the signal, perform algorithms,

and communicate with Mark VIe controller.

The I/O pack provides fault detection through a combination of special circuitry in the data acquisition
board and software running in the CPU board. The fault status is transmitted to and used by the
controllers
Each I/O pack also sends an identification message (ID packet) to the main controller when requested.
The packet contains, the hardware catalog number of the I/O board, the hardware revision, the board
barcode serial number, the firmware catalog number, and the firmware version.

I/O Types

There are two types of I/O available.

General purpose I/O is used for both turbine applications and process control.24VdC/48VdC/115/230V
ac,125 Vdc. AI (V/I inputs) and AO (4-20/0-200 mA), 6 serial ports for I/O drivers RS-232C, RS422, RS485
HART® Communications 10/2 Analog , 1 PROFIBUS-DP Master Communications.

Turbine specific I/O is used for direct interface to the unique sensors and actuators on turbines.

Mixed I/O: 4 speed inputs/ pack, synchronizing, shaft voltage, trip outputs, backup sync check, trip
contacts, Servo channels, LVDTs, vibration (proxy/seismic/accel).

Power Supply
The CPCI power supply takes the incoming bulk power from the CPCI backplane and creates ±12, 5, and
3.3 V dc

The power supply is a CPCI hot swap compliant 3U power supply using the standard CPCI 47-pin
connector. Two power supplies can be used to provide power supply redundancy in an optional rack.

Power Sources

Ac input power is received by a JPDB module. JPDB accepts two independent ac sources. Dc input
power is managed by JPDE (24 V/48 V) and JPDF (125 V).

The 28 V dc control power output board (JPDS or JPDM) hosts a PPDA I/O pack providing system
feedback

The power distribution modules (PDM) support 115/230 V ac, 24 and 125 V dc power sources in many
redundant combinations.

The power applied is converted to 28 V dc for operation of the I/O packs.

The controllers may operate from the 28 V dc power, direct ac, or direct 24 V dc battery power.

Heat Loss in a typical 4200 mm (165 in) TMR cabinet is 1500 W fully loaded

POWER REQUIREMENT FOR CABINET

Core Components

IS2020JPDB ac module(PPDA Applied)

The JPDB module consists of a sheet metal structure containing two sets of input line filters and an
IS200JPDB circuit board

Power input from two separate ac sources passes through the line filters to the JPDB board. The board
provides output for bulk 28 V dc control power supplies, terminal boards, and other loads.

There are two versions of the IS200JPDB board: IS2020JPDBG2 has provisions for the connection of an
external ac selector module and IS2020JPDBG1 omits this feature

The JPDB board uses ribbon cable connections for system feedback through PPDA including both ac
bus voltages and individual branch circuit feedback

IS2020JPDF 125 V dc module (PPDA Applied)

Power from a 125 V dc battery feeds through the circuit breaker, filter, and diode to the JPDF
board. The board also has connections for two DACA modules providing ac input/125 V dc
output.

IS200JPDE 24/48 V dc input board (PPDA Applied)

Power input is accepted from a battery and two dc power supplies. It could be provided with
an optional dc circuit breaker and filter when using a battery power source. The JPDE board
distributes the dc power to terminal boards and other loads. In small systems, JPDE could be
used between a battery and 150W dc power supplies.

IS200JPDS 28 V dc control power output board (PPDA Applied)

The JPDS board mounts on a sheet metal structure. Provisions are made supporting a PPDA
I/O pack mounted on the JPDS circuit board. The JPDS circuit board contains three
independent 28 V dc power buses with one bulk power supply input for each bus. Barrier
screw terminals connect the power buses when a single bus with multiple supplies is desired.
Output circuits from JPDS do not contain fuses with the exception of three auxiliary circuits.
The JPDS board design depends on the current limit of the attached power supplies for
branch circuit protection

IS200JPDM 28V dc control power output (PPDA Applied)

board – JPDM is similar to JPDS except it has fewer output connectors and includes branch circuit fuses.
JPDM is used for systems requiring 28 V dc supplies with current limit exceeding branch circuit
capability. This includes systems that use two or more 500 W systems connected together forming a
redundant control power source.

IS220PPDA I/O pack –

The power diagnostic pack mounts on either a JPDS or a JPDM board. Ribbon cables are used to daisy
chain other core boards to the board hosting the PPDA. The pack can identify connected core boards
and pass feedback signals to one or two IONet connections. PPDA has numerous indicator LEDs
providing visual power distribution system status.

Note: PPDA does not take direct protective actions. It only reports information to the system controllers
where corrective action can be programmed

DACA ac to dc conversion module –

This module takes incoming ac power and converts it to 125 V dc. It is used in conjunction with or in
place of 125 V battery power. DACA provides capacitive energy storage for power-dip ride through when
required Calculated Life Expectancy of DACA Capacitor

Recommended Replacement Schedule* At 20° C (68 °F) ambient 100 years At 45° C (113 °F) ambient 20
years At 65° C (149 °F) ambient 5 years

Grounding:

The equipment-grounding connection for the Mark VIe control cabinets is plated copper bus or stub
bus. This connection is bonded to the cabinet enclosure using bolting that keeps the conducting path’s
resistance at 1 ohm or less

Shield grounding page is 113

Signal Reference Structure (SRS) page 98

The goal of the SRS is to hold the electronics at or near case potential to prevent unwanted signals
from disturbing operation. The following conditions must all be met by an SRS:
Signal and Power Level Definitions
Signal and power carrying cables are categorized into four defining levels; low, medium, high, and
power. Each level can include classes.

Low-Level Signals (Level L)

Low-level signals are designated as level L. In general these consist of: • Analog signals 0 through ±50 V
dc, <60 mA • Digital (logic-level) signals less than 28 V dc • 4 – 20 mA current loops • Ac signals less than
24 V ac

EXAMPLES:

All analog and digital signals including LVDTs, Servos, RTDs, Analog Inputs and Outputs, and Pyrometer
signals • Thermocouples are in a special category (Level LS) because they generate millivolt signals with
very low current. • Network communication bus signals: Ethernet, IONet, UDH, PDH, RS-232C, and RS-
422 • Phone circuits

Medium-Level Signals (Level M)

Medium-level signals are designated as level M. Magnetic pickup signals are examples of level
M signals used in the Mark VIe control. These signals consist of: • Analog signals less than 50 V
dc with less than 28 V ac ripple and less than 0.6 A current • 28 V dc light and switching circuits
• 24 V dc switching circuits • Analog pulse rate circuits

Note Level M and level L signals may be run together only inside the control
cabinet.
High-Level Signals (Level H)
High-level signals are designated as level H. These signals consist of: • Dc switching signals
greater than 28 V dc • Analog signals greater than 50 V dc with greater than 28 V ac ripple • Ac
feeders less than 20 A, without motor loads
The following are specific examples of level H signals used in Mark VIe cabling: • Contact inputs
• Relay outputs • Solenoid outputs • PT and CT circuits

Power (Level P)
Power wiring is designated as level P. This consists of ac and dc buses 0 – 600 V with currents 20
A – 800 A. The following are specific examples of level P signals used in plant cabling: • Motor
armature loops • Generator armature loops • Ac power input and dc outputs • Primary and
secondary wiring of transformers above 5 kVA • SCR field exciter ac power input and dc output
• Static exciters (regulated and unregulated) ac power and dc output • 250 V shop bus •
Machine fields
INSTALLING ETHERNET:
If the connection within a building and the sites share a common ground, it is acceptable to use
100BaseTX connections. If connecting between buildings, or there are differences in ground
potential within a building, or distances exceed 100 m (328 ft), then 100BaseFX fiber is
required.

BEFORE POWERUPS CHECKS

To check the power wiring
1 Ensure that all incoming power wiring agrees with the electrical drawings, supplied with the
panel, and is complete and correct.
2 Ensure that the incoming power wiring conforms to approved wiring practices as described
previously.
3 Ensure that all electrical terminal connections are tight.
4 Ensure that no wiring has been damaged or frayed during installation. Replace if necessary.
5 Check that incoming power (125 V dc, 115 V ac, 230 V ac) is the correct voltage and
frequency, and is clean and free of noise. Make sure the DACA converters, if used, are set to the
correct voltage by selecting the JTX1 (115 V ac) or JTX2 (230 V ac) jumper positions on the top
of the converter.
6 If the installation includes more than one JPDF on an interconnected 125 V dc system, the BJS
jumper must be installed in one and only one JPDF. This is because the parallel connection of
more than one ground reference circuit will reduce the impedance to the point where the 125
V dc no longer meets the not hazardous live requirement.
Verifying that the 125 V dc is properly grounded. A qualified person using appropriate safety
procedures and equipment should make tests. Measure the current from first the P125 V dc,
and then the N125 V dc, using a 2000 Ω, 10 W resistor to the protective conductor terminal of
the Mark VIe control in series with a dc ammeter. The measured current should be 1.7 to 2.0
mA, (the tolerance will depend on the test resistor and the JPDF tolerances). If the measured
current exceeds 2.0 mA, the system must be cleared of the extra ground(s). A test current of
about 65 mA, usually indicates one or more hard grounds on the system, while currents in
multiples of 1 mA usually indicate more than one BJS jumper is installed.